pci-host-common.c 4.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180
  1. /*
  2. * Generic PCI host driver common code
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  15. *
  16. * Copyright (C) 2014 ARM Limited
  17. *
  18. * Author: Will Deacon <will.deacon@arm.com>
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/of_address.h>
  22. #include <linux/of_pci.h>
  23. #include <linux/pci-ecam.h>
  24. #include <linux/platform_device.h>
  25. static int gen_pci_parse_request_of_pci_ranges(struct device *dev,
  26. struct list_head *resources, struct resource **bus_range)
  27. {
  28. int err, res_valid = 0;
  29. struct device_node *np = dev->of_node;
  30. resource_size_t iobase;
  31. struct resource_entry *win, *tmp;
  32. err = of_pci_get_host_bridge_resources(np, 0, 0xff, resources, &iobase);
  33. if (err)
  34. return err;
  35. err = devm_request_pci_bus_resources(dev, resources);
  36. if (err)
  37. return err;
  38. resource_list_for_each_entry_safe(win, tmp, resources) {
  39. struct resource *res = win->res;
  40. switch (resource_type(res)) {
  41. case IORESOURCE_IO:
  42. err = pci_remap_iospace(res, iobase);
  43. if (err) {
  44. dev_warn(dev, "error %d: failed to map resource %pR\n",
  45. err, res);
  46. resource_list_destroy_entry(win);
  47. }
  48. break;
  49. case IORESOURCE_MEM:
  50. res_valid |= !(res->flags & IORESOURCE_PREFETCH);
  51. break;
  52. case IORESOURCE_BUS:
  53. *bus_range = res;
  54. break;
  55. }
  56. }
  57. if (res_valid)
  58. return 0;
  59. dev_err(dev, "non-prefetchable memory resource required\n");
  60. return -EINVAL;
  61. }
  62. static void gen_pci_unmap_cfg(void *ptr)
  63. {
  64. pci_ecam_free((struct pci_config_window *)ptr);
  65. }
  66. static struct pci_config_window *gen_pci_init(struct device *dev,
  67. struct list_head *resources, struct pci_ecam_ops *ops)
  68. {
  69. int err;
  70. struct resource cfgres;
  71. struct resource *bus_range = NULL;
  72. struct pci_config_window *cfg;
  73. /* Parse our PCI ranges and request their resources */
  74. err = gen_pci_parse_request_of_pci_ranges(dev, resources, &bus_range);
  75. if (err)
  76. goto err_out;
  77. err = of_address_to_resource(dev->of_node, 0, &cfgres);
  78. if (err) {
  79. dev_err(dev, "missing \"reg\" property\n");
  80. goto err_out;
  81. }
  82. cfg = pci_ecam_create(dev, &cfgres, bus_range, ops);
  83. if (IS_ERR(cfg)) {
  84. err = PTR_ERR(cfg);
  85. goto err_out;
  86. }
  87. err = devm_add_action(dev, gen_pci_unmap_cfg, cfg);
  88. if (err) {
  89. gen_pci_unmap_cfg(cfg);
  90. goto err_out;
  91. }
  92. return cfg;
  93. err_out:
  94. pci_free_resource_list(resources);
  95. return ERR_PTR(err);
  96. }
  97. int pci_host_common_probe(struct platform_device *pdev,
  98. struct pci_ecam_ops *ops)
  99. {
  100. const char *type;
  101. struct device *dev = &pdev->dev;
  102. struct device_node *np = dev->of_node;
  103. struct pci_bus *bus, *child;
  104. struct pci_host_bridge *bridge;
  105. struct pci_config_window *cfg;
  106. struct list_head resources;
  107. int ret;
  108. bridge = devm_pci_alloc_host_bridge(dev, 0);
  109. if (!bridge)
  110. return -ENOMEM;
  111. type = of_get_property(np, "device_type", NULL);
  112. if (!type || strcmp(type, "pci")) {
  113. dev_err(dev, "invalid \"device_type\" %s\n", type);
  114. return -EINVAL;
  115. }
  116. of_pci_check_probe_only();
  117. /* Parse and map our Configuration Space windows */
  118. INIT_LIST_HEAD(&resources);
  119. cfg = gen_pci_init(dev, &resources, ops);
  120. if (IS_ERR(cfg))
  121. return PTR_ERR(cfg);
  122. /* Do not reassign resources if probe only */
  123. if (!pci_has_flag(PCI_PROBE_ONLY))
  124. pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
  125. list_splice_init(&resources, &bridge->windows);
  126. bridge->dev.parent = dev;
  127. bridge->sysdata = cfg;
  128. bridge->busnr = cfg->busr.start;
  129. bridge->ops = &ops->pci_ops;
  130. bridge->map_irq = of_irq_parse_and_map_pci;
  131. bridge->swizzle_irq = pci_common_swizzle;
  132. ret = pci_scan_root_bus_bridge(bridge);
  133. if (ret < 0) {
  134. dev_err(dev, "Scanning root bridge failed");
  135. return ret;
  136. }
  137. bus = bridge->bus;
  138. /*
  139. * We insert PCI resources into the iomem_resource and
  140. * ioport_resource trees in either pci_bus_claim_resources()
  141. * or pci_bus_assign_resources().
  142. */
  143. if (pci_has_flag(PCI_PROBE_ONLY)) {
  144. pci_bus_claim_resources(bus);
  145. } else {
  146. pci_bus_size_bridges(bus);
  147. pci_bus_assign_resources(bus);
  148. list_for_each_entry(child, &bus->children, node)
  149. pcie_bus_configure_settings(child);
  150. }
  151. pci_bus_add_devices(bus);
  152. return 0;
  153. }