pci-epc-core.c 14 KB

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  1. /**
  2. * PCI Endpoint *Controller* (EPC) library
  3. *
  4. * Copyright (C) 2017 Texas Instruments
  5. * Author: Kishon Vijay Abraham I <kishon@ti.com>
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 of
  9. * the License as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/device.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/slab.h>
  22. #include <linux/module.h>
  23. #include <linux/of_device.h>
  24. #include <linux/pci-epc.h>
  25. #include <linux/pci-epf.h>
  26. #include <linux/pci-ep-cfs.h>
  27. static struct class *pci_epc_class;
  28. static void devm_pci_epc_release(struct device *dev, void *res)
  29. {
  30. struct pci_epc *epc = *(struct pci_epc **)res;
  31. pci_epc_destroy(epc);
  32. }
  33. static int devm_pci_epc_match(struct device *dev, void *res, void *match_data)
  34. {
  35. struct pci_epc **epc = res;
  36. return *epc == match_data;
  37. }
  38. /**
  39. * pci_epc_put() - release the PCI endpoint controller
  40. * @epc: epc returned by pci_epc_get()
  41. *
  42. * release the refcount the caller obtained by invoking pci_epc_get()
  43. */
  44. void pci_epc_put(struct pci_epc *epc)
  45. {
  46. if (!epc || IS_ERR(epc))
  47. return;
  48. module_put(epc->ops->owner);
  49. put_device(&epc->dev);
  50. }
  51. EXPORT_SYMBOL_GPL(pci_epc_put);
  52. /**
  53. * pci_epc_get() - get the PCI endpoint controller
  54. * @epc_name: device name of the endpoint controller
  55. *
  56. * Invoke to get struct pci_epc * corresponding to the device name of the
  57. * endpoint controller
  58. */
  59. struct pci_epc *pci_epc_get(const char *epc_name)
  60. {
  61. int ret = -EINVAL;
  62. struct pci_epc *epc;
  63. struct device *dev;
  64. struct class_dev_iter iter;
  65. class_dev_iter_init(&iter, pci_epc_class, NULL, NULL);
  66. while ((dev = class_dev_iter_next(&iter))) {
  67. if (strcmp(epc_name, dev_name(dev)))
  68. continue;
  69. epc = to_pci_epc(dev);
  70. if (!try_module_get(epc->ops->owner)) {
  71. ret = -EINVAL;
  72. goto err;
  73. }
  74. class_dev_iter_exit(&iter);
  75. get_device(&epc->dev);
  76. return epc;
  77. }
  78. err:
  79. class_dev_iter_exit(&iter);
  80. return ERR_PTR(ret);
  81. }
  82. EXPORT_SYMBOL_GPL(pci_epc_get);
  83. /**
  84. * pci_epc_stop() - stop the PCI link
  85. * @epc: the link of the EPC device that has to be stopped
  86. *
  87. * Invoke to stop the PCI link
  88. */
  89. void pci_epc_stop(struct pci_epc *epc)
  90. {
  91. unsigned long flags;
  92. if (IS_ERR(epc) || !epc->ops->stop)
  93. return;
  94. spin_lock_irqsave(&epc->lock, flags);
  95. epc->ops->stop(epc);
  96. spin_unlock_irqrestore(&epc->lock, flags);
  97. }
  98. EXPORT_SYMBOL_GPL(pci_epc_stop);
  99. /**
  100. * pci_epc_start() - start the PCI link
  101. * @epc: the link of *this* EPC device has to be started
  102. *
  103. * Invoke to start the PCI link
  104. */
  105. int pci_epc_start(struct pci_epc *epc)
  106. {
  107. int ret;
  108. unsigned long flags;
  109. if (IS_ERR(epc))
  110. return -EINVAL;
  111. if (!epc->ops->start)
  112. return 0;
  113. spin_lock_irqsave(&epc->lock, flags);
  114. ret = epc->ops->start(epc);
  115. spin_unlock_irqrestore(&epc->lock, flags);
  116. return ret;
  117. }
  118. EXPORT_SYMBOL_GPL(pci_epc_start);
  119. /**
  120. * pci_epc_raise_irq() - interrupt the host system
  121. * @epc: the EPC device which has to interrupt the host
  122. * @type: specify the type of interrupt; legacy or MSI
  123. * @interrupt_num: the MSI interrupt number
  124. *
  125. * Invoke to raise an MSI or legacy interrupt
  126. */
  127. int pci_epc_raise_irq(struct pci_epc *epc, enum pci_epc_irq_type type,
  128. u8 interrupt_num)
  129. {
  130. int ret;
  131. unsigned long flags;
  132. if (IS_ERR(epc))
  133. return -EINVAL;
  134. if (!epc->ops->raise_irq)
  135. return 0;
  136. spin_lock_irqsave(&epc->lock, flags);
  137. ret = epc->ops->raise_irq(epc, type, interrupt_num);
  138. spin_unlock_irqrestore(&epc->lock, flags);
  139. return ret;
  140. }
  141. EXPORT_SYMBOL_GPL(pci_epc_raise_irq);
  142. /**
  143. * pci_epc_get_msi() - get the number of MSI interrupt numbers allocated
  144. * @epc: the EPC device to which MSI interrupts was requested
  145. *
  146. * Invoke to get the number of MSI interrupts allocated by the RC
  147. */
  148. int pci_epc_get_msi(struct pci_epc *epc)
  149. {
  150. int interrupt;
  151. unsigned long flags;
  152. if (IS_ERR(epc))
  153. return 0;
  154. if (!epc->ops->get_msi)
  155. return 0;
  156. spin_lock_irqsave(&epc->lock, flags);
  157. interrupt = epc->ops->get_msi(epc);
  158. spin_unlock_irqrestore(&epc->lock, flags);
  159. if (interrupt < 0)
  160. return 0;
  161. interrupt = 1 << interrupt;
  162. return interrupt;
  163. }
  164. EXPORT_SYMBOL_GPL(pci_epc_get_msi);
  165. /**
  166. * pci_epc_set_msi() - set the number of MSI interrupt numbers required
  167. * @epc: the EPC device on which MSI has to be configured
  168. * @interrupts: number of MSI interrupts required by the EPF
  169. *
  170. * Invoke to set the required number of MSI interrupts.
  171. */
  172. int pci_epc_set_msi(struct pci_epc *epc, u8 interrupts)
  173. {
  174. int ret;
  175. u8 encode_int;
  176. unsigned long flags;
  177. if (IS_ERR(epc))
  178. return -EINVAL;
  179. if (!epc->ops->set_msi)
  180. return 0;
  181. encode_int = order_base_2(interrupts);
  182. spin_lock_irqsave(&epc->lock, flags);
  183. ret = epc->ops->set_msi(epc, encode_int);
  184. spin_unlock_irqrestore(&epc->lock, flags);
  185. return ret;
  186. }
  187. EXPORT_SYMBOL_GPL(pci_epc_set_msi);
  188. /**
  189. * pci_epc_unmap_addr() - unmap CPU address from PCI address
  190. * @epc: the EPC device on which address is allocated
  191. * @phys_addr: physical address of the local system
  192. *
  193. * Invoke to unmap the CPU address from PCI address.
  194. */
  195. void pci_epc_unmap_addr(struct pci_epc *epc, phys_addr_t phys_addr)
  196. {
  197. unsigned long flags;
  198. if (IS_ERR(epc))
  199. return;
  200. if (!epc->ops->unmap_addr)
  201. return;
  202. spin_lock_irqsave(&epc->lock, flags);
  203. epc->ops->unmap_addr(epc, phys_addr);
  204. spin_unlock_irqrestore(&epc->lock, flags);
  205. }
  206. EXPORT_SYMBOL_GPL(pci_epc_unmap_addr);
  207. /**
  208. * pci_epc_map_addr() - map CPU address to PCI address
  209. * @epc: the EPC device on which address is allocated
  210. * @phys_addr: physical address of the local system
  211. * @pci_addr: PCI address to which the physical address should be mapped
  212. * @size: the size of the allocation
  213. *
  214. * Invoke to map CPU address with PCI address.
  215. */
  216. int pci_epc_map_addr(struct pci_epc *epc, phys_addr_t phys_addr,
  217. u64 pci_addr, size_t size)
  218. {
  219. int ret;
  220. unsigned long flags;
  221. if (IS_ERR(epc))
  222. return -EINVAL;
  223. if (!epc->ops->map_addr)
  224. return 0;
  225. spin_lock_irqsave(&epc->lock, flags);
  226. ret = epc->ops->map_addr(epc, phys_addr, pci_addr, size);
  227. spin_unlock_irqrestore(&epc->lock, flags);
  228. return ret;
  229. }
  230. EXPORT_SYMBOL_GPL(pci_epc_map_addr);
  231. /**
  232. * pci_epc_clear_bar() - reset the BAR
  233. * @epc: the EPC device for which the BAR has to be cleared
  234. * @bar: the BAR number that has to be reset
  235. *
  236. * Invoke to reset the BAR of the endpoint device.
  237. */
  238. void pci_epc_clear_bar(struct pci_epc *epc, int bar)
  239. {
  240. unsigned long flags;
  241. if (IS_ERR(epc))
  242. return;
  243. if (!epc->ops->clear_bar)
  244. return;
  245. spin_lock_irqsave(&epc->lock, flags);
  246. epc->ops->clear_bar(epc, bar);
  247. spin_unlock_irqrestore(&epc->lock, flags);
  248. }
  249. EXPORT_SYMBOL_GPL(pci_epc_clear_bar);
  250. /**
  251. * pci_epc_set_bar() - configure BAR in order for host to assign PCI addr space
  252. * @epc: the EPC device on which BAR has to be configured
  253. * @bar: the BAR number that has to be configured
  254. * @size: the size of the addr space
  255. * @flags: specify memory allocation/io allocation/32bit address/64 bit address
  256. *
  257. * Invoke to configure the BAR of the endpoint device.
  258. */
  259. int pci_epc_set_bar(struct pci_epc *epc, enum pci_barno bar,
  260. dma_addr_t bar_phys, size_t size, int flags)
  261. {
  262. int ret;
  263. unsigned long irq_flags;
  264. if (IS_ERR(epc))
  265. return -EINVAL;
  266. if (!epc->ops->set_bar)
  267. return 0;
  268. spin_lock_irqsave(&epc->lock, irq_flags);
  269. ret = epc->ops->set_bar(epc, bar, bar_phys, size, flags);
  270. spin_unlock_irqrestore(&epc->lock, irq_flags);
  271. return ret;
  272. }
  273. EXPORT_SYMBOL_GPL(pci_epc_set_bar);
  274. /**
  275. * pci_epc_write_header() - write standard configuration header
  276. * @epc: the EPC device to which the configuration header should be written
  277. * @header: standard configuration header fields
  278. *
  279. * Invoke to write the configuration header to the endpoint controller. Every
  280. * endpoint controller will have a dedicated location to which the standard
  281. * configuration header would be written. The callback function should write
  282. * the header fields to this dedicated location.
  283. */
  284. int pci_epc_write_header(struct pci_epc *epc, struct pci_epf_header *header)
  285. {
  286. int ret;
  287. unsigned long flags;
  288. if (IS_ERR(epc))
  289. return -EINVAL;
  290. if (!epc->ops->write_header)
  291. return 0;
  292. spin_lock_irqsave(&epc->lock, flags);
  293. ret = epc->ops->write_header(epc, header);
  294. spin_unlock_irqrestore(&epc->lock, flags);
  295. return ret;
  296. }
  297. EXPORT_SYMBOL_GPL(pci_epc_write_header);
  298. /**
  299. * pci_epc_add_epf() - bind PCI endpoint function to an endpoint controller
  300. * @epc: the EPC device to which the endpoint function should be added
  301. * @epf: the endpoint function to be added
  302. *
  303. * A PCI endpoint device can have one or more functions. In the case of PCIe,
  304. * the specification allows up to 8 PCIe endpoint functions. Invoke
  305. * pci_epc_add_epf() to add a PCI endpoint function to an endpoint controller.
  306. */
  307. int pci_epc_add_epf(struct pci_epc *epc, struct pci_epf *epf)
  308. {
  309. unsigned long flags;
  310. struct device *dev = epc->dev.parent;
  311. if (epf->epc)
  312. return -EBUSY;
  313. if (IS_ERR(epc))
  314. return -EINVAL;
  315. if (epf->func_no > epc->max_functions - 1)
  316. return -EINVAL;
  317. epf->epc = epc;
  318. if (dev->of_node) {
  319. of_dma_configure(&epf->dev, dev->of_node);
  320. } else {
  321. dma_set_coherent_mask(&epf->dev, epc->dev.coherent_dma_mask);
  322. epf->dev.dma_mask = epc->dev.dma_mask;
  323. }
  324. spin_lock_irqsave(&epc->lock, flags);
  325. list_add_tail(&epf->list, &epc->pci_epf);
  326. spin_unlock_irqrestore(&epc->lock, flags);
  327. return 0;
  328. }
  329. EXPORT_SYMBOL_GPL(pci_epc_add_epf);
  330. /**
  331. * pci_epc_remove_epf() - remove PCI endpoint function from endpoint controller
  332. * @epc: the EPC device from which the endpoint function should be removed
  333. * @epf: the endpoint function to be removed
  334. *
  335. * Invoke to remove PCI endpoint function from the endpoint controller.
  336. */
  337. void pci_epc_remove_epf(struct pci_epc *epc, struct pci_epf *epf)
  338. {
  339. unsigned long flags;
  340. if (!epc || IS_ERR(epc))
  341. return;
  342. spin_lock_irqsave(&epc->lock, flags);
  343. list_del(&epf->list);
  344. spin_unlock_irqrestore(&epc->lock, flags);
  345. }
  346. EXPORT_SYMBOL_GPL(pci_epc_remove_epf);
  347. /**
  348. * pci_epc_linkup() - Notify the EPF device that EPC device has established a
  349. * connection with the Root Complex.
  350. * @epc: the EPC device which has established link with the host
  351. *
  352. * Invoke to Notify the EPF device that the EPC device has established a
  353. * connection with the Root Complex.
  354. */
  355. void pci_epc_linkup(struct pci_epc *epc)
  356. {
  357. unsigned long flags;
  358. struct pci_epf *epf;
  359. if (!epc || IS_ERR(epc))
  360. return;
  361. spin_lock_irqsave(&epc->lock, flags);
  362. list_for_each_entry(epf, &epc->pci_epf, list)
  363. pci_epf_linkup(epf);
  364. spin_unlock_irqrestore(&epc->lock, flags);
  365. }
  366. EXPORT_SYMBOL_GPL(pci_epc_linkup);
  367. /**
  368. * pci_epc_destroy() - destroy the EPC device
  369. * @epc: the EPC device that has to be destroyed
  370. *
  371. * Invoke to destroy the PCI EPC device
  372. */
  373. void pci_epc_destroy(struct pci_epc *epc)
  374. {
  375. pci_ep_cfs_remove_epc_group(epc->group);
  376. device_unregister(&epc->dev);
  377. kfree(epc);
  378. }
  379. EXPORT_SYMBOL_GPL(pci_epc_destroy);
  380. /**
  381. * devm_pci_epc_destroy() - destroy the EPC device
  382. * @dev: device that wants to destroy the EPC
  383. * @epc: the EPC device that has to be destroyed
  384. *
  385. * Invoke to destroy the devres associated with this
  386. * pci_epc and destroy the EPC device.
  387. */
  388. void devm_pci_epc_destroy(struct device *dev, struct pci_epc *epc)
  389. {
  390. int r;
  391. r = devres_destroy(dev, devm_pci_epc_release, devm_pci_epc_match,
  392. epc);
  393. dev_WARN_ONCE(dev, r, "couldn't find PCI EPC resource\n");
  394. }
  395. EXPORT_SYMBOL_GPL(devm_pci_epc_destroy);
  396. /**
  397. * __pci_epc_create() - create a new endpoint controller (EPC) device
  398. * @dev: device that is creating the new EPC
  399. * @ops: function pointers for performing EPC operations
  400. * @owner: the owner of the module that creates the EPC device
  401. *
  402. * Invoke to create a new EPC device and add it to pci_epc class.
  403. */
  404. struct pci_epc *
  405. __pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
  406. struct module *owner)
  407. {
  408. int ret;
  409. struct pci_epc *epc;
  410. if (WARN_ON(!dev)) {
  411. ret = -EINVAL;
  412. goto err_ret;
  413. }
  414. epc = kzalloc(sizeof(*epc), GFP_KERNEL);
  415. if (!epc) {
  416. ret = -ENOMEM;
  417. goto err_ret;
  418. }
  419. spin_lock_init(&epc->lock);
  420. INIT_LIST_HEAD(&epc->pci_epf);
  421. device_initialize(&epc->dev);
  422. dma_set_coherent_mask(&epc->dev, dev->coherent_dma_mask);
  423. epc->dev.class = pci_epc_class;
  424. epc->dev.dma_mask = dev->dma_mask;
  425. epc->dev.parent = dev;
  426. epc->ops = ops;
  427. ret = dev_set_name(&epc->dev, "%s", dev_name(dev));
  428. if (ret)
  429. goto put_dev;
  430. ret = device_add(&epc->dev);
  431. if (ret)
  432. goto put_dev;
  433. epc->group = pci_ep_cfs_add_epc_group(dev_name(dev));
  434. return epc;
  435. put_dev:
  436. put_device(&epc->dev);
  437. kfree(epc);
  438. err_ret:
  439. return ERR_PTR(ret);
  440. }
  441. EXPORT_SYMBOL_GPL(__pci_epc_create);
  442. /**
  443. * __devm_pci_epc_create() - create a new endpoint controller (EPC) device
  444. * @dev: device that is creating the new EPC
  445. * @ops: function pointers for performing EPC operations
  446. * @owner: the owner of the module that creates the EPC device
  447. *
  448. * Invoke to create a new EPC device and add it to pci_epc class.
  449. * While at that, it also associates the device with the pci_epc using devres.
  450. * On driver detach, release function is invoked on the devres data,
  451. * then, devres data is freed.
  452. */
  453. struct pci_epc *
  454. __devm_pci_epc_create(struct device *dev, const struct pci_epc_ops *ops,
  455. struct module *owner)
  456. {
  457. struct pci_epc **ptr, *epc;
  458. ptr = devres_alloc(devm_pci_epc_release, sizeof(*ptr), GFP_KERNEL);
  459. if (!ptr)
  460. return ERR_PTR(-ENOMEM);
  461. epc = __pci_epc_create(dev, ops, owner);
  462. if (!IS_ERR(epc)) {
  463. *ptr = epc;
  464. devres_add(dev, ptr);
  465. } else {
  466. devres_free(ptr);
  467. }
  468. return epc;
  469. }
  470. EXPORT_SYMBOL_GPL(__devm_pci_epc_create);
  471. static int __init pci_epc_init(void)
  472. {
  473. pci_epc_class = class_create(THIS_MODULE, "pci_epc");
  474. if (IS_ERR(pci_epc_class)) {
  475. pr_err("failed to create pci epc class --> %ld\n",
  476. PTR_ERR(pci_epc_class));
  477. return PTR_ERR(pci_epc_class);
  478. }
  479. return 0;
  480. }
  481. module_init(pci_epc_init);
  482. static void __exit pci_epc_exit(void)
  483. {
  484. class_destroy(pci_epc_class);
  485. }
  486. module_exit(pci_epc_exit);
  487. MODULE_DESCRIPTION("PCI EPC Library");
  488. MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
  489. MODULE_LICENSE("GPL v2");