pci-epf-test.c 13 KB

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  1. /**
  2. * Test driver to test endpoint functionality
  3. *
  4. * Copyright (C) 2017 Texas Instruments
  5. * Author: Kishon Vijay Abraham I <kishon@ti.com>
  6. *
  7. * This program is free software: you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 of
  9. * the License as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/crc32.h>
  20. #include <linux/delay.h>
  21. #include <linux/io.h>
  22. #include <linux/module.h>
  23. #include <linux/slab.h>
  24. #include <linux/pci_ids.h>
  25. #include <linux/random.h>
  26. #include <linux/pci-epc.h>
  27. #include <linux/pci-epf.h>
  28. #include <linux/pci_regs.h>
  29. #define COMMAND_RAISE_LEGACY_IRQ BIT(0)
  30. #define COMMAND_RAISE_MSI_IRQ BIT(1)
  31. #define MSI_NUMBER_SHIFT 2
  32. #define MSI_NUMBER_MASK (0x3f << MSI_NUMBER_SHIFT)
  33. #define COMMAND_READ BIT(8)
  34. #define COMMAND_WRITE BIT(9)
  35. #define COMMAND_COPY BIT(10)
  36. #define STATUS_READ_SUCCESS BIT(0)
  37. #define STATUS_READ_FAIL BIT(1)
  38. #define STATUS_WRITE_SUCCESS BIT(2)
  39. #define STATUS_WRITE_FAIL BIT(3)
  40. #define STATUS_COPY_SUCCESS BIT(4)
  41. #define STATUS_COPY_FAIL BIT(5)
  42. #define STATUS_IRQ_RAISED BIT(6)
  43. #define STATUS_SRC_ADDR_INVALID BIT(7)
  44. #define STATUS_DST_ADDR_INVALID BIT(8)
  45. #define TIMER_RESOLUTION 1
  46. static struct workqueue_struct *kpcitest_workqueue;
  47. struct pci_epf_test {
  48. void *reg[6];
  49. struct pci_epf *epf;
  50. enum pci_barno test_reg_bar;
  51. bool linkup_notifier;
  52. struct delayed_work cmd_handler;
  53. };
  54. struct pci_epf_test_reg {
  55. u32 magic;
  56. u32 command;
  57. u32 status;
  58. u64 src_addr;
  59. u64 dst_addr;
  60. u32 size;
  61. u32 checksum;
  62. } __packed;
  63. static struct pci_epf_header test_header = {
  64. .vendorid = PCI_ANY_ID,
  65. .deviceid = PCI_ANY_ID,
  66. .baseclass_code = PCI_CLASS_OTHERS,
  67. .interrupt_pin = PCI_INTERRUPT_INTA,
  68. };
  69. struct pci_epf_test_data {
  70. enum pci_barno test_reg_bar;
  71. bool linkup_notifier;
  72. };
  73. static int bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 };
  74. static int pci_epf_test_copy(struct pci_epf_test *epf_test)
  75. {
  76. int ret;
  77. void __iomem *src_addr;
  78. void __iomem *dst_addr;
  79. phys_addr_t src_phys_addr;
  80. phys_addr_t dst_phys_addr;
  81. struct pci_epf *epf = epf_test->epf;
  82. struct device *dev = &epf->dev;
  83. struct pci_epc *epc = epf->epc;
  84. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  85. struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
  86. src_addr = pci_epc_mem_alloc_addr(epc, &src_phys_addr, reg->size);
  87. if (!src_addr) {
  88. dev_err(dev, "failed to allocate source address\n");
  89. reg->status = STATUS_SRC_ADDR_INVALID;
  90. ret = -ENOMEM;
  91. goto err;
  92. }
  93. ret = pci_epc_map_addr(epc, src_phys_addr, reg->src_addr, reg->size);
  94. if (ret) {
  95. dev_err(dev, "failed to map source address\n");
  96. reg->status = STATUS_SRC_ADDR_INVALID;
  97. goto err_src_addr;
  98. }
  99. dst_addr = pci_epc_mem_alloc_addr(epc, &dst_phys_addr, reg->size);
  100. if (!dst_addr) {
  101. dev_err(dev, "failed to allocate destination address\n");
  102. reg->status = STATUS_DST_ADDR_INVALID;
  103. ret = -ENOMEM;
  104. goto err_src_map_addr;
  105. }
  106. ret = pci_epc_map_addr(epc, dst_phys_addr, reg->dst_addr, reg->size);
  107. if (ret) {
  108. dev_err(dev, "failed to map destination address\n");
  109. reg->status = STATUS_DST_ADDR_INVALID;
  110. goto err_dst_addr;
  111. }
  112. memcpy(dst_addr, src_addr, reg->size);
  113. pci_epc_unmap_addr(epc, dst_phys_addr);
  114. err_dst_addr:
  115. pci_epc_mem_free_addr(epc, dst_phys_addr, dst_addr, reg->size);
  116. err_src_map_addr:
  117. pci_epc_unmap_addr(epc, src_phys_addr);
  118. err_src_addr:
  119. pci_epc_mem_free_addr(epc, src_phys_addr, src_addr, reg->size);
  120. err:
  121. return ret;
  122. }
  123. static int pci_epf_test_read(struct pci_epf_test *epf_test)
  124. {
  125. int ret;
  126. void __iomem *src_addr;
  127. void *buf;
  128. u32 crc32;
  129. phys_addr_t phys_addr;
  130. struct pci_epf *epf = epf_test->epf;
  131. struct device *dev = &epf->dev;
  132. struct pci_epc *epc = epf->epc;
  133. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  134. struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
  135. src_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size);
  136. if (!src_addr) {
  137. dev_err(dev, "failed to allocate address\n");
  138. reg->status = STATUS_SRC_ADDR_INVALID;
  139. ret = -ENOMEM;
  140. goto err;
  141. }
  142. ret = pci_epc_map_addr(epc, phys_addr, reg->src_addr, reg->size);
  143. if (ret) {
  144. dev_err(dev, "failed to map address\n");
  145. reg->status = STATUS_SRC_ADDR_INVALID;
  146. goto err_addr;
  147. }
  148. buf = kzalloc(reg->size, GFP_KERNEL);
  149. if (!buf) {
  150. ret = -ENOMEM;
  151. goto err_map_addr;
  152. }
  153. memcpy(buf, src_addr, reg->size);
  154. crc32 = crc32_le(~0, buf, reg->size);
  155. if (crc32 != reg->checksum)
  156. ret = -EIO;
  157. kfree(buf);
  158. err_map_addr:
  159. pci_epc_unmap_addr(epc, phys_addr);
  160. err_addr:
  161. pci_epc_mem_free_addr(epc, phys_addr, src_addr, reg->size);
  162. err:
  163. return ret;
  164. }
  165. static int pci_epf_test_write(struct pci_epf_test *epf_test)
  166. {
  167. int ret;
  168. void __iomem *dst_addr;
  169. void *buf;
  170. phys_addr_t phys_addr;
  171. struct pci_epf *epf = epf_test->epf;
  172. struct device *dev = &epf->dev;
  173. struct pci_epc *epc = epf->epc;
  174. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  175. struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
  176. dst_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size);
  177. if (!dst_addr) {
  178. dev_err(dev, "failed to allocate address\n");
  179. reg->status = STATUS_DST_ADDR_INVALID;
  180. ret = -ENOMEM;
  181. goto err;
  182. }
  183. ret = pci_epc_map_addr(epc, phys_addr, reg->dst_addr, reg->size);
  184. if (ret) {
  185. dev_err(dev, "failed to map address\n");
  186. reg->status = STATUS_DST_ADDR_INVALID;
  187. goto err_addr;
  188. }
  189. buf = kzalloc(reg->size, GFP_KERNEL);
  190. if (!buf) {
  191. ret = -ENOMEM;
  192. goto err_map_addr;
  193. }
  194. get_random_bytes(buf, reg->size);
  195. reg->checksum = crc32_le(~0, buf, reg->size);
  196. memcpy(dst_addr, buf, reg->size);
  197. /*
  198. * wait 1ms inorder for the write to complete. Without this delay L3
  199. * error in observed in the host system.
  200. */
  201. mdelay(1);
  202. kfree(buf);
  203. err_map_addr:
  204. pci_epc_unmap_addr(epc, phys_addr);
  205. err_addr:
  206. pci_epc_mem_free_addr(epc, phys_addr, dst_addr, reg->size);
  207. err:
  208. return ret;
  209. }
  210. static void pci_epf_test_raise_irq(struct pci_epf_test *epf_test, u8 irq)
  211. {
  212. u8 msi_count;
  213. struct pci_epf *epf = epf_test->epf;
  214. struct pci_epc *epc = epf->epc;
  215. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  216. struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
  217. reg->status |= STATUS_IRQ_RAISED;
  218. msi_count = pci_epc_get_msi(epc);
  219. if (irq > msi_count || msi_count <= 0)
  220. pci_epc_raise_irq(epc, PCI_EPC_IRQ_LEGACY, 0);
  221. else
  222. pci_epc_raise_irq(epc, PCI_EPC_IRQ_MSI, irq);
  223. }
  224. static void pci_epf_test_cmd_handler(struct work_struct *work)
  225. {
  226. int ret;
  227. u8 irq;
  228. u8 msi_count;
  229. u32 command;
  230. struct pci_epf_test *epf_test = container_of(work, struct pci_epf_test,
  231. cmd_handler.work);
  232. struct pci_epf *epf = epf_test->epf;
  233. struct pci_epc *epc = epf->epc;
  234. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  235. struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
  236. command = reg->command;
  237. if (!command)
  238. goto reset_handler;
  239. reg->command = 0;
  240. reg->status = 0;
  241. irq = (command & MSI_NUMBER_MASK) >> MSI_NUMBER_SHIFT;
  242. if (command & COMMAND_RAISE_LEGACY_IRQ) {
  243. reg->status = STATUS_IRQ_RAISED;
  244. pci_epc_raise_irq(epc, PCI_EPC_IRQ_LEGACY, 0);
  245. goto reset_handler;
  246. }
  247. if (command & COMMAND_WRITE) {
  248. ret = pci_epf_test_write(epf_test);
  249. if (ret)
  250. reg->status |= STATUS_WRITE_FAIL;
  251. else
  252. reg->status |= STATUS_WRITE_SUCCESS;
  253. pci_epf_test_raise_irq(epf_test, irq);
  254. goto reset_handler;
  255. }
  256. if (command & COMMAND_READ) {
  257. ret = pci_epf_test_read(epf_test);
  258. if (!ret)
  259. reg->status |= STATUS_READ_SUCCESS;
  260. else
  261. reg->status |= STATUS_READ_FAIL;
  262. pci_epf_test_raise_irq(epf_test, irq);
  263. goto reset_handler;
  264. }
  265. if (command & COMMAND_COPY) {
  266. ret = pci_epf_test_copy(epf_test);
  267. if (!ret)
  268. reg->status |= STATUS_COPY_SUCCESS;
  269. else
  270. reg->status |= STATUS_COPY_FAIL;
  271. pci_epf_test_raise_irq(epf_test, irq);
  272. goto reset_handler;
  273. }
  274. if (command & COMMAND_RAISE_MSI_IRQ) {
  275. msi_count = pci_epc_get_msi(epc);
  276. if (irq > msi_count || msi_count <= 0)
  277. goto reset_handler;
  278. reg->status = STATUS_IRQ_RAISED;
  279. pci_epc_raise_irq(epc, PCI_EPC_IRQ_MSI, irq);
  280. goto reset_handler;
  281. }
  282. reset_handler:
  283. queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler,
  284. msecs_to_jiffies(1));
  285. }
  286. static void pci_epf_test_linkup(struct pci_epf *epf)
  287. {
  288. struct pci_epf_test *epf_test = epf_get_drvdata(epf);
  289. queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler,
  290. msecs_to_jiffies(1));
  291. }
  292. static void pci_epf_test_unbind(struct pci_epf *epf)
  293. {
  294. struct pci_epf_test *epf_test = epf_get_drvdata(epf);
  295. struct pci_epc *epc = epf->epc;
  296. int bar;
  297. cancel_delayed_work(&epf_test->cmd_handler);
  298. pci_epc_stop(epc);
  299. for (bar = BAR_0; bar <= BAR_5; bar++) {
  300. if (epf_test->reg[bar]) {
  301. pci_epf_free_space(epf, epf_test->reg[bar], bar);
  302. pci_epc_clear_bar(epc, bar);
  303. }
  304. }
  305. }
  306. static int pci_epf_test_set_bar(struct pci_epf *epf)
  307. {
  308. int flags;
  309. int bar;
  310. int ret;
  311. struct pci_epf_bar *epf_bar;
  312. struct pci_epc *epc = epf->epc;
  313. struct device *dev = &epf->dev;
  314. struct pci_epf_test *epf_test = epf_get_drvdata(epf);
  315. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  316. flags = PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_32;
  317. if (sizeof(dma_addr_t) == 0x8)
  318. flags |= PCI_BASE_ADDRESS_MEM_TYPE_64;
  319. for (bar = BAR_0; bar <= BAR_5; bar++) {
  320. epf_bar = &epf->bar[bar];
  321. ret = pci_epc_set_bar(epc, bar, epf_bar->phys_addr,
  322. epf_bar->size, flags);
  323. if (ret) {
  324. pci_epf_free_space(epf, epf_test->reg[bar], bar);
  325. dev_err(dev, "failed to set BAR%d\n", bar);
  326. if (bar == test_reg_bar)
  327. return ret;
  328. }
  329. }
  330. return 0;
  331. }
  332. static int pci_epf_test_alloc_space(struct pci_epf *epf)
  333. {
  334. struct pci_epf_test *epf_test = epf_get_drvdata(epf);
  335. struct device *dev = &epf->dev;
  336. void *base;
  337. int bar;
  338. enum pci_barno test_reg_bar = epf_test->test_reg_bar;
  339. base = pci_epf_alloc_space(epf, sizeof(struct pci_epf_test_reg),
  340. test_reg_bar);
  341. if (!base) {
  342. dev_err(dev, "failed to allocated register space\n");
  343. return -ENOMEM;
  344. }
  345. epf_test->reg[test_reg_bar] = base;
  346. for (bar = BAR_0; bar <= BAR_5; bar++) {
  347. if (bar == test_reg_bar)
  348. continue;
  349. base = pci_epf_alloc_space(epf, bar_size[bar], bar);
  350. if (!base)
  351. dev_err(dev, "failed to allocate space for BAR%d\n",
  352. bar);
  353. epf_test->reg[bar] = base;
  354. }
  355. return 0;
  356. }
  357. static int pci_epf_test_bind(struct pci_epf *epf)
  358. {
  359. int ret;
  360. struct pci_epf_test *epf_test = epf_get_drvdata(epf);
  361. struct pci_epf_header *header = epf->header;
  362. struct pci_epc *epc = epf->epc;
  363. struct device *dev = &epf->dev;
  364. if (WARN_ON_ONCE(!epc))
  365. return -EINVAL;
  366. ret = pci_epc_write_header(epc, header);
  367. if (ret) {
  368. dev_err(dev, "configuration header write failed\n");
  369. return ret;
  370. }
  371. ret = pci_epf_test_alloc_space(epf);
  372. if (ret)
  373. return ret;
  374. ret = pci_epf_test_set_bar(epf);
  375. if (ret)
  376. return ret;
  377. ret = pci_epc_set_msi(epc, epf->msi_interrupts);
  378. if (ret)
  379. return ret;
  380. if (!epf_test->linkup_notifier)
  381. queue_work(kpcitest_workqueue, &epf_test->cmd_handler.work);
  382. return 0;
  383. }
  384. static const struct pci_epf_device_id pci_epf_test_ids[] = {
  385. {
  386. .name = "pci_epf_test",
  387. },
  388. {},
  389. };
  390. static int pci_epf_test_probe(struct pci_epf *epf)
  391. {
  392. struct pci_epf_test *epf_test;
  393. struct device *dev = &epf->dev;
  394. const struct pci_epf_device_id *match;
  395. struct pci_epf_test_data *data;
  396. enum pci_barno test_reg_bar = BAR_0;
  397. bool linkup_notifier = true;
  398. match = pci_epf_match_device(pci_epf_test_ids, epf);
  399. data = (struct pci_epf_test_data *)match->driver_data;
  400. if (data) {
  401. test_reg_bar = data->test_reg_bar;
  402. linkup_notifier = data->linkup_notifier;
  403. }
  404. epf_test = devm_kzalloc(dev, sizeof(*epf_test), GFP_KERNEL);
  405. if (!epf_test)
  406. return -ENOMEM;
  407. epf->header = &test_header;
  408. epf_test->epf = epf;
  409. epf_test->test_reg_bar = test_reg_bar;
  410. epf_test->linkup_notifier = linkup_notifier;
  411. INIT_DELAYED_WORK(&epf_test->cmd_handler, pci_epf_test_cmd_handler);
  412. epf_set_drvdata(epf, epf_test);
  413. return 0;
  414. }
  415. static struct pci_epf_ops ops = {
  416. .unbind = pci_epf_test_unbind,
  417. .bind = pci_epf_test_bind,
  418. .linkup = pci_epf_test_linkup,
  419. };
  420. static struct pci_epf_driver test_driver = {
  421. .driver.name = "pci_epf_test",
  422. .probe = pci_epf_test_probe,
  423. .id_table = pci_epf_test_ids,
  424. .ops = &ops,
  425. .owner = THIS_MODULE,
  426. };
  427. static int __init pci_epf_test_init(void)
  428. {
  429. int ret;
  430. kpcitest_workqueue = alloc_workqueue("kpcitest",
  431. WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
  432. ret = pci_epf_register_driver(&test_driver);
  433. if (ret) {
  434. pr_err("failed to register pci epf test driver --> %d\n", ret);
  435. return ret;
  436. }
  437. return 0;
  438. }
  439. module_init(pci_epf_test_init);
  440. static void __exit pci_epf_test_exit(void)
  441. {
  442. pci_epf_unregister_driver(&test_driver);
  443. }
  444. module_exit(pci_epf_test_exit);
  445. MODULE_DESCRIPTION("PCI EPF TEST DRIVER");
  446. MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
  447. MODULE_LICENSE("GPL v2");