pcie-designware-plat.c 3.1 KB

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  1. /*
  2. * PCIe RC driver for Synopsys DesignWare Core
  3. *
  4. * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
  5. *
  6. * Authors: Joao Pinto <Joao.Pinto@synopsys.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/clk.h>
  13. #include <linux/delay.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel.h>
  17. #include <linux/init.h>
  18. #include <linux/of_gpio.h>
  19. #include <linux/pci.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/resource.h>
  22. #include <linux/signal.h>
  23. #include <linux/types.h>
  24. #include "pcie-designware.h"
  25. struct dw_plat_pcie {
  26. struct dw_pcie *pci;
  27. };
  28. static irqreturn_t dw_plat_pcie_msi_irq_handler(int irq, void *arg)
  29. {
  30. struct pcie_port *pp = arg;
  31. return dw_handle_msi_irq(pp);
  32. }
  33. static int dw_plat_pcie_host_init(struct pcie_port *pp)
  34. {
  35. struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
  36. dw_pcie_setup_rc(pp);
  37. dw_pcie_wait_for_link(pci);
  38. if (IS_ENABLED(CONFIG_PCI_MSI))
  39. dw_pcie_msi_init(pp);
  40. return 0;
  41. }
  42. static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
  43. .host_init = dw_plat_pcie_host_init,
  44. };
  45. static int dw_plat_add_pcie_port(struct pcie_port *pp,
  46. struct platform_device *pdev)
  47. {
  48. struct device *dev = &pdev->dev;
  49. int ret;
  50. pp->irq = platform_get_irq(pdev, 1);
  51. if (pp->irq < 0)
  52. return pp->irq;
  53. if (IS_ENABLED(CONFIG_PCI_MSI)) {
  54. pp->msi_irq = platform_get_irq(pdev, 0);
  55. if (pp->msi_irq < 0)
  56. return pp->msi_irq;
  57. ret = devm_request_irq(dev, pp->msi_irq,
  58. dw_plat_pcie_msi_irq_handler,
  59. IRQF_SHARED | IRQF_NO_THREAD,
  60. "dw-plat-pcie-msi", pp);
  61. if (ret) {
  62. dev_err(dev, "failed to request MSI IRQ\n");
  63. return ret;
  64. }
  65. }
  66. pp->root_bus_nr = -1;
  67. pp->ops = &dw_plat_pcie_host_ops;
  68. ret = dw_pcie_host_init(pp);
  69. if (ret) {
  70. dev_err(dev, "failed to initialize host\n");
  71. return ret;
  72. }
  73. return 0;
  74. }
  75. static const struct dw_pcie_ops dw_pcie_ops = {
  76. };
  77. static int dw_plat_pcie_probe(struct platform_device *pdev)
  78. {
  79. struct device *dev = &pdev->dev;
  80. struct dw_plat_pcie *dw_plat_pcie;
  81. struct dw_pcie *pci;
  82. struct resource *res; /* Resource from DT */
  83. int ret;
  84. dw_plat_pcie = devm_kzalloc(dev, sizeof(*dw_plat_pcie), GFP_KERNEL);
  85. if (!dw_plat_pcie)
  86. return -ENOMEM;
  87. pci = devm_kzalloc(dev, sizeof(*pci), GFP_KERNEL);
  88. if (!pci)
  89. return -ENOMEM;
  90. pci->dev = dev;
  91. pci->ops = &dw_pcie_ops;
  92. dw_plat_pcie->pci = pci;
  93. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  94. pci->dbi_base = devm_ioremap_resource(dev, res);
  95. if (IS_ERR(pci->dbi_base))
  96. return PTR_ERR(pci->dbi_base);
  97. platform_set_drvdata(pdev, dw_plat_pcie);
  98. ret = dw_plat_add_pcie_port(&pci->pp, pdev);
  99. if (ret < 0)
  100. return ret;
  101. return 0;
  102. }
  103. static const struct of_device_id dw_plat_pcie_of_match[] = {
  104. { .compatible = "snps,dw-pcie", },
  105. {},
  106. };
  107. static struct platform_driver dw_plat_pcie_driver = {
  108. .driver = {
  109. .name = "dw-pcie",
  110. .of_match_table = dw_plat_pcie_of_match,
  111. .suppress_bind_attrs = true,
  112. },
  113. .probe = dw_plat_pcie_probe,
  114. };
  115. builtin_platform_driver(dw_plat_pcie_driver);