core.c 74 KB

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  1. /*
  2. * NVM Express device driver
  3. * Copyright (c) 2011-2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/blkdev.h>
  15. #include <linux/blk-mq.h>
  16. #include <linux/delay.h>
  17. #include <linux/errno.h>
  18. #include <linux/hdreg.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/list_sort.h>
  22. #include <linux/slab.h>
  23. #include <linux/types.h>
  24. #include <linux/pr.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/nvme_ioctl.h>
  27. #include <linux/t10-pi.h>
  28. #include <linux/pm_qos.h>
  29. #include <asm/unaligned.h>
  30. #include "nvme.h"
  31. #include "fabrics.h"
  32. #define NVME_MINORS (1U << MINORBITS)
  33. unsigned char admin_timeout = 60;
  34. module_param(admin_timeout, byte, 0644);
  35. MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  36. EXPORT_SYMBOL_GPL(admin_timeout);
  37. unsigned char nvme_io_timeout = 30;
  38. module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  39. MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  40. EXPORT_SYMBOL_GPL(nvme_io_timeout);
  41. static unsigned char shutdown_timeout = 5;
  42. module_param(shutdown_timeout, byte, 0644);
  43. MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  44. static u8 nvme_max_retries = 5;
  45. module_param_named(max_retries, nvme_max_retries, byte, 0644);
  46. MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
  47. static int nvme_char_major;
  48. module_param(nvme_char_major, int, 0);
  49. static unsigned long default_ps_max_latency_us = 100000;
  50. module_param(default_ps_max_latency_us, ulong, 0644);
  51. MODULE_PARM_DESC(default_ps_max_latency_us,
  52. "max power saving latency for new devices; use PM QOS to change per device");
  53. static bool force_apst;
  54. module_param(force_apst, bool, 0644);
  55. MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
  56. static bool streams;
  57. module_param(streams, bool, 0644);
  58. MODULE_PARM_DESC(streams, "turn on support for Streams write directives");
  59. struct workqueue_struct *nvme_wq;
  60. EXPORT_SYMBOL_GPL(nvme_wq);
  61. static LIST_HEAD(nvme_ctrl_list);
  62. static DEFINE_SPINLOCK(dev_list_lock);
  63. static struct class *nvme_class;
  64. static __le32 nvme_get_log_dw10(u8 lid, size_t size)
  65. {
  66. return cpu_to_le32((((size / 4) - 1) << 16) | lid);
  67. }
  68. int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
  69. {
  70. if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
  71. return -EBUSY;
  72. if (!queue_work(nvme_wq, &ctrl->reset_work))
  73. return -EBUSY;
  74. return 0;
  75. }
  76. EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
  77. static int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
  78. {
  79. int ret;
  80. ret = nvme_reset_ctrl(ctrl);
  81. if (!ret)
  82. flush_work(&ctrl->reset_work);
  83. return ret;
  84. }
  85. static blk_status_t nvme_error_status(struct request *req)
  86. {
  87. switch (nvme_req(req)->status & 0x7ff) {
  88. case NVME_SC_SUCCESS:
  89. return BLK_STS_OK;
  90. case NVME_SC_CAP_EXCEEDED:
  91. return BLK_STS_NOSPC;
  92. case NVME_SC_ONCS_NOT_SUPPORTED:
  93. return BLK_STS_NOTSUPP;
  94. case NVME_SC_WRITE_FAULT:
  95. case NVME_SC_READ_ERROR:
  96. case NVME_SC_UNWRITTEN_BLOCK:
  97. case NVME_SC_ACCESS_DENIED:
  98. case NVME_SC_READ_ONLY:
  99. return BLK_STS_MEDIUM;
  100. case NVME_SC_GUARD_CHECK:
  101. case NVME_SC_APPTAG_CHECK:
  102. case NVME_SC_REFTAG_CHECK:
  103. case NVME_SC_INVALID_PI:
  104. return BLK_STS_PROTECTION;
  105. case NVME_SC_RESERVATION_CONFLICT:
  106. return BLK_STS_NEXUS;
  107. default:
  108. return BLK_STS_IOERR;
  109. }
  110. }
  111. static inline bool nvme_req_needs_retry(struct request *req)
  112. {
  113. if (blk_noretry_request(req))
  114. return false;
  115. if (nvme_req(req)->status & NVME_SC_DNR)
  116. return false;
  117. if (nvme_req(req)->retries >= nvme_max_retries)
  118. return false;
  119. return true;
  120. }
  121. void nvme_complete_rq(struct request *req)
  122. {
  123. if (unlikely(nvme_req(req)->status && nvme_req_needs_retry(req))) {
  124. nvme_req(req)->retries++;
  125. blk_mq_requeue_request(req, true);
  126. return;
  127. }
  128. blk_mq_end_request(req, nvme_error_status(req));
  129. }
  130. EXPORT_SYMBOL_GPL(nvme_complete_rq);
  131. void nvme_cancel_request(struct request *req, void *data, bool reserved)
  132. {
  133. int status;
  134. if (!blk_mq_request_started(req))
  135. return;
  136. dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
  137. "Cancelling I/O %d", req->tag);
  138. status = NVME_SC_ABORT_REQ;
  139. if (blk_queue_dying(req->q))
  140. status |= NVME_SC_DNR;
  141. nvme_req(req)->status = status;
  142. blk_mq_complete_request(req);
  143. }
  144. EXPORT_SYMBOL_GPL(nvme_cancel_request);
  145. bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
  146. enum nvme_ctrl_state new_state)
  147. {
  148. enum nvme_ctrl_state old_state;
  149. unsigned long flags;
  150. bool changed = false;
  151. spin_lock_irqsave(&ctrl->lock, flags);
  152. old_state = ctrl->state;
  153. switch (new_state) {
  154. case NVME_CTRL_LIVE:
  155. switch (old_state) {
  156. case NVME_CTRL_NEW:
  157. case NVME_CTRL_RESETTING:
  158. case NVME_CTRL_RECONNECTING:
  159. changed = true;
  160. /* FALLTHRU */
  161. default:
  162. break;
  163. }
  164. break;
  165. case NVME_CTRL_RESETTING:
  166. switch (old_state) {
  167. case NVME_CTRL_NEW:
  168. case NVME_CTRL_LIVE:
  169. changed = true;
  170. /* FALLTHRU */
  171. default:
  172. break;
  173. }
  174. break;
  175. case NVME_CTRL_RECONNECTING:
  176. switch (old_state) {
  177. case NVME_CTRL_LIVE:
  178. changed = true;
  179. /* FALLTHRU */
  180. default:
  181. break;
  182. }
  183. break;
  184. case NVME_CTRL_DELETING:
  185. switch (old_state) {
  186. case NVME_CTRL_LIVE:
  187. case NVME_CTRL_RESETTING:
  188. case NVME_CTRL_RECONNECTING:
  189. changed = true;
  190. /* FALLTHRU */
  191. default:
  192. break;
  193. }
  194. break;
  195. case NVME_CTRL_DEAD:
  196. switch (old_state) {
  197. case NVME_CTRL_DELETING:
  198. changed = true;
  199. /* FALLTHRU */
  200. default:
  201. break;
  202. }
  203. break;
  204. default:
  205. break;
  206. }
  207. if (changed)
  208. ctrl->state = new_state;
  209. spin_unlock_irqrestore(&ctrl->lock, flags);
  210. return changed;
  211. }
  212. EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
  213. static void nvme_free_ns(struct kref *kref)
  214. {
  215. struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
  216. if (ns->ndev)
  217. nvme_nvm_unregister(ns);
  218. if (ns->disk) {
  219. spin_lock(&dev_list_lock);
  220. ns->disk->private_data = NULL;
  221. spin_unlock(&dev_list_lock);
  222. }
  223. put_disk(ns->disk);
  224. ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
  225. nvme_put_ctrl(ns->ctrl);
  226. kfree(ns);
  227. }
  228. static void nvme_put_ns(struct nvme_ns *ns)
  229. {
  230. kref_put(&ns->kref, nvme_free_ns);
  231. }
  232. static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
  233. {
  234. struct nvme_ns *ns;
  235. spin_lock(&dev_list_lock);
  236. ns = disk->private_data;
  237. if (ns) {
  238. if (!kref_get_unless_zero(&ns->kref))
  239. goto fail;
  240. if (!try_module_get(ns->ctrl->ops->module))
  241. goto fail_put_ns;
  242. }
  243. spin_unlock(&dev_list_lock);
  244. return ns;
  245. fail_put_ns:
  246. kref_put(&ns->kref, nvme_free_ns);
  247. fail:
  248. spin_unlock(&dev_list_lock);
  249. return NULL;
  250. }
  251. struct request *nvme_alloc_request(struct request_queue *q,
  252. struct nvme_command *cmd, unsigned int flags, int qid)
  253. {
  254. unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
  255. struct request *req;
  256. if (qid == NVME_QID_ANY) {
  257. req = blk_mq_alloc_request(q, op, flags);
  258. } else {
  259. req = blk_mq_alloc_request_hctx(q, op, flags,
  260. qid ? qid - 1 : 0);
  261. }
  262. if (IS_ERR(req))
  263. return req;
  264. req->cmd_flags |= REQ_FAILFAST_DRIVER;
  265. nvme_req(req)->cmd = cmd;
  266. return req;
  267. }
  268. EXPORT_SYMBOL_GPL(nvme_alloc_request);
  269. static int nvme_toggle_streams(struct nvme_ctrl *ctrl, bool enable)
  270. {
  271. struct nvme_command c;
  272. memset(&c, 0, sizeof(c));
  273. c.directive.opcode = nvme_admin_directive_send;
  274. c.directive.nsid = cpu_to_le32(NVME_NSID_ALL);
  275. c.directive.doper = NVME_DIR_SND_ID_OP_ENABLE;
  276. c.directive.dtype = NVME_DIR_IDENTIFY;
  277. c.directive.tdtype = NVME_DIR_STREAMS;
  278. c.directive.endir = enable ? NVME_DIR_ENDIR : 0;
  279. return nvme_submit_sync_cmd(ctrl->admin_q, &c, NULL, 0);
  280. }
  281. static int nvme_disable_streams(struct nvme_ctrl *ctrl)
  282. {
  283. return nvme_toggle_streams(ctrl, false);
  284. }
  285. static int nvme_enable_streams(struct nvme_ctrl *ctrl)
  286. {
  287. return nvme_toggle_streams(ctrl, true);
  288. }
  289. static int nvme_get_stream_params(struct nvme_ctrl *ctrl,
  290. struct streams_directive_params *s, u32 nsid)
  291. {
  292. struct nvme_command c;
  293. memset(&c, 0, sizeof(c));
  294. memset(s, 0, sizeof(*s));
  295. c.directive.opcode = nvme_admin_directive_recv;
  296. c.directive.nsid = cpu_to_le32(nsid);
  297. c.directive.numd = cpu_to_le32((sizeof(*s) >> 2) - 1);
  298. c.directive.doper = NVME_DIR_RCV_ST_OP_PARAM;
  299. c.directive.dtype = NVME_DIR_STREAMS;
  300. return nvme_submit_sync_cmd(ctrl->admin_q, &c, s, sizeof(*s));
  301. }
  302. static int nvme_configure_directives(struct nvme_ctrl *ctrl)
  303. {
  304. struct streams_directive_params s;
  305. int ret;
  306. if (!(ctrl->oacs & NVME_CTRL_OACS_DIRECTIVES))
  307. return 0;
  308. if (!streams)
  309. return 0;
  310. ret = nvme_enable_streams(ctrl);
  311. if (ret)
  312. return ret;
  313. ret = nvme_get_stream_params(ctrl, &s, NVME_NSID_ALL);
  314. if (ret)
  315. return ret;
  316. ctrl->nssa = le16_to_cpu(s.nssa);
  317. if (ctrl->nssa < BLK_MAX_WRITE_HINTS - 1) {
  318. dev_info(ctrl->device, "too few streams (%u) available\n",
  319. ctrl->nssa);
  320. nvme_disable_streams(ctrl);
  321. return 0;
  322. }
  323. ctrl->nr_streams = min_t(unsigned, ctrl->nssa, BLK_MAX_WRITE_HINTS - 1);
  324. dev_info(ctrl->device, "Using %u streams\n", ctrl->nr_streams);
  325. return 0;
  326. }
  327. /*
  328. * Check if 'req' has a write hint associated with it. If it does, assign
  329. * a valid namespace stream to the write.
  330. */
  331. static void nvme_assign_write_stream(struct nvme_ctrl *ctrl,
  332. struct request *req, u16 *control,
  333. u32 *dsmgmt)
  334. {
  335. enum rw_hint streamid = req->write_hint;
  336. if (streamid == WRITE_LIFE_NOT_SET || streamid == WRITE_LIFE_NONE)
  337. streamid = 0;
  338. else {
  339. streamid--;
  340. if (WARN_ON_ONCE(streamid > ctrl->nr_streams))
  341. return;
  342. *control |= NVME_RW_DTYPE_STREAMS;
  343. *dsmgmt |= streamid << 16;
  344. }
  345. if (streamid < ARRAY_SIZE(req->q->write_hints))
  346. req->q->write_hints[streamid] += blk_rq_bytes(req) >> 9;
  347. }
  348. static inline void nvme_setup_flush(struct nvme_ns *ns,
  349. struct nvme_command *cmnd)
  350. {
  351. memset(cmnd, 0, sizeof(*cmnd));
  352. cmnd->common.opcode = nvme_cmd_flush;
  353. cmnd->common.nsid = cpu_to_le32(ns->ns_id);
  354. }
  355. static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
  356. struct nvme_command *cmnd)
  357. {
  358. unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
  359. struct nvme_dsm_range *range;
  360. struct bio *bio;
  361. range = kmalloc_array(segments, sizeof(*range), GFP_ATOMIC);
  362. if (!range)
  363. return BLK_STS_RESOURCE;
  364. __rq_for_each_bio(bio, req) {
  365. u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector);
  366. u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
  367. range[n].cattr = cpu_to_le32(0);
  368. range[n].nlb = cpu_to_le32(nlb);
  369. range[n].slba = cpu_to_le64(slba);
  370. n++;
  371. }
  372. if (WARN_ON_ONCE(n != segments)) {
  373. kfree(range);
  374. return BLK_STS_IOERR;
  375. }
  376. memset(cmnd, 0, sizeof(*cmnd));
  377. cmnd->dsm.opcode = nvme_cmd_dsm;
  378. cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
  379. cmnd->dsm.nr = cpu_to_le32(segments - 1);
  380. cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
  381. req->special_vec.bv_page = virt_to_page(range);
  382. req->special_vec.bv_offset = offset_in_page(range);
  383. req->special_vec.bv_len = sizeof(*range) * segments;
  384. req->rq_flags |= RQF_SPECIAL_PAYLOAD;
  385. return BLK_STS_OK;
  386. }
  387. static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
  388. struct request *req, struct nvme_command *cmnd)
  389. {
  390. struct nvme_ctrl *ctrl = ns->ctrl;
  391. u16 control = 0;
  392. u32 dsmgmt = 0;
  393. /*
  394. * If formated with metadata, require the block layer provide a buffer
  395. * unless this namespace is formated such that the metadata can be
  396. * stripped/generated by the controller with PRACT=1.
  397. */
  398. if (ns && ns->ms &&
  399. (!ns->pi_type || ns->ms != sizeof(struct t10_pi_tuple)) &&
  400. !blk_integrity_rq(req) && !blk_rq_is_passthrough(req))
  401. return BLK_STS_NOTSUPP;
  402. if (req->cmd_flags & REQ_FUA)
  403. control |= NVME_RW_FUA;
  404. if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
  405. control |= NVME_RW_LR;
  406. if (req->cmd_flags & REQ_RAHEAD)
  407. dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
  408. memset(cmnd, 0, sizeof(*cmnd));
  409. cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
  410. cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
  411. cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
  412. cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
  413. if (req_op(req) == REQ_OP_WRITE && ctrl->nr_streams)
  414. nvme_assign_write_stream(ctrl, req, &control, &dsmgmt);
  415. if (ns->ms) {
  416. switch (ns->pi_type) {
  417. case NVME_NS_DPS_PI_TYPE3:
  418. control |= NVME_RW_PRINFO_PRCHK_GUARD;
  419. break;
  420. case NVME_NS_DPS_PI_TYPE1:
  421. case NVME_NS_DPS_PI_TYPE2:
  422. control |= NVME_RW_PRINFO_PRCHK_GUARD |
  423. NVME_RW_PRINFO_PRCHK_REF;
  424. cmnd->rw.reftag = cpu_to_le32(
  425. nvme_block_nr(ns, blk_rq_pos(req)));
  426. break;
  427. }
  428. if (!blk_integrity_rq(req))
  429. control |= NVME_RW_PRINFO_PRACT;
  430. }
  431. cmnd->rw.control = cpu_to_le16(control);
  432. cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
  433. return 0;
  434. }
  435. blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
  436. struct nvme_command *cmd)
  437. {
  438. blk_status_t ret = BLK_STS_OK;
  439. if (!(req->rq_flags & RQF_DONTPREP)) {
  440. nvme_req(req)->retries = 0;
  441. nvme_req(req)->flags = 0;
  442. req->rq_flags |= RQF_DONTPREP;
  443. }
  444. switch (req_op(req)) {
  445. case REQ_OP_DRV_IN:
  446. case REQ_OP_DRV_OUT:
  447. memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
  448. break;
  449. case REQ_OP_FLUSH:
  450. nvme_setup_flush(ns, cmd);
  451. break;
  452. case REQ_OP_WRITE_ZEROES:
  453. /* currently only aliased to deallocate for a few ctrls: */
  454. case REQ_OP_DISCARD:
  455. ret = nvme_setup_discard(ns, req, cmd);
  456. break;
  457. case REQ_OP_READ:
  458. case REQ_OP_WRITE:
  459. ret = nvme_setup_rw(ns, req, cmd);
  460. break;
  461. default:
  462. WARN_ON_ONCE(1);
  463. return BLK_STS_IOERR;
  464. }
  465. cmd->common.command_id = req->tag;
  466. return ret;
  467. }
  468. EXPORT_SYMBOL_GPL(nvme_setup_cmd);
  469. /*
  470. * Returns 0 on success. If the result is negative, it's a Linux error code;
  471. * if the result is positive, it's an NVM Express status code
  472. */
  473. int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  474. union nvme_result *result, void *buffer, unsigned bufflen,
  475. unsigned timeout, int qid, int at_head, int flags)
  476. {
  477. struct request *req;
  478. int ret;
  479. req = nvme_alloc_request(q, cmd, flags, qid);
  480. if (IS_ERR(req))
  481. return PTR_ERR(req);
  482. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  483. if (buffer && bufflen) {
  484. ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
  485. if (ret)
  486. goto out;
  487. }
  488. blk_execute_rq(req->q, NULL, req, at_head);
  489. if (result)
  490. *result = nvme_req(req)->result;
  491. if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
  492. ret = -EINTR;
  493. else
  494. ret = nvme_req(req)->status;
  495. out:
  496. blk_mq_free_request(req);
  497. return ret;
  498. }
  499. EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
  500. int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  501. void *buffer, unsigned bufflen)
  502. {
  503. return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
  504. NVME_QID_ANY, 0, 0);
  505. }
  506. EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
  507. static void *nvme_add_user_metadata(struct bio *bio, void __user *ubuf,
  508. unsigned len, u32 seed, bool write)
  509. {
  510. struct bio_integrity_payload *bip;
  511. int ret = -ENOMEM;
  512. void *buf;
  513. buf = kmalloc(len, GFP_KERNEL);
  514. if (!buf)
  515. goto out;
  516. ret = -EFAULT;
  517. if (write && copy_from_user(buf, ubuf, len))
  518. goto out_free_meta;
  519. bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
  520. if (IS_ERR(bip)) {
  521. ret = PTR_ERR(bip);
  522. goto out_free_meta;
  523. }
  524. bip->bip_iter.bi_size = len;
  525. bip->bip_iter.bi_sector = seed;
  526. ret = bio_integrity_add_page(bio, virt_to_page(buf), len,
  527. offset_in_page(buf));
  528. if (ret == len)
  529. return buf;
  530. ret = -ENOMEM;
  531. out_free_meta:
  532. kfree(buf);
  533. out:
  534. return ERR_PTR(ret);
  535. }
  536. static int nvme_submit_user_cmd(struct request_queue *q,
  537. struct nvme_command *cmd, void __user *ubuffer,
  538. unsigned bufflen, void __user *meta_buffer, unsigned meta_len,
  539. u32 meta_seed, u32 *result, unsigned timeout)
  540. {
  541. bool write = nvme_is_write(cmd);
  542. struct nvme_ns *ns = q->queuedata;
  543. struct gendisk *disk = ns ? ns->disk : NULL;
  544. struct request *req;
  545. struct bio *bio = NULL;
  546. void *meta = NULL;
  547. int ret;
  548. req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
  549. if (IS_ERR(req))
  550. return PTR_ERR(req);
  551. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  552. if (ubuffer && bufflen) {
  553. ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
  554. GFP_KERNEL);
  555. if (ret)
  556. goto out;
  557. bio = req->bio;
  558. bio->bi_disk = disk;
  559. if (disk && meta_buffer && meta_len) {
  560. meta = nvme_add_user_metadata(bio, meta_buffer, meta_len,
  561. meta_seed, write);
  562. if (IS_ERR(meta)) {
  563. ret = PTR_ERR(meta);
  564. goto out_unmap;
  565. }
  566. }
  567. }
  568. blk_execute_rq(req->q, disk, req, 0);
  569. if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
  570. ret = -EINTR;
  571. else
  572. ret = nvme_req(req)->status;
  573. if (result)
  574. *result = le32_to_cpu(nvme_req(req)->result.u32);
  575. if (meta && !ret && !write) {
  576. if (copy_to_user(meta_buffer, meta, meta_len))
  577. ret = -EFAULT;
  578. }
  579. kfree(meta);
  580. out_unmap:
  581. if (bio)
  582. blk_rq_unmap_user(bio);
  583. out:
  584. blk_mq_free_request(req);
  585. return ret;
  586. }
  587. static void nvme_keep_alive_end_io(struct request *rq, blk_status_t status)
  588. {
  589. struct nvme_ctrl *ctrl = rq->end_io_data;
  590. blk_mq_free_request(rq);
  591. if (status) {
  592. dev_err(ctrl->device,
  593. "failed nvme_keep_alive_end_io error=%d\n",
  594. status);
  595. return;
  596. }
  597. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  598. }
  599. static int nvme_keep_alive(struct nvme_ctrl *ctrl)
  600. {
  601. struct nvme_command c;
  602. struct request *rq;
  603. memset(&c, 0, sizeof(c));
  604. c.common.opcode = nvme_admin_keep_alive;
  605. rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
  606. NVME_QID_ANY);
  607. if (IS_ERR(rq))
  608. return PTR_ERR(rq);
  609. rq->timeout = ctrl->kato * HZ;
  610. rq->end_io_data = ctrl;
  611. blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
  612. return 0;
  613. }
  614. static void nvme_keep_alive_work(struct work_struct *work)
  615. {
  616. struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
  617. struct nvme_ctrl, ka_work);
  618. if (nvme_keep_alive(ctrl)) {
  619. /* allocation failure, reset the controller */
  620. dev_err(ctrl->device, "keep-alive failed\n");
  621. nvme_reset_ctrl(ctrl);
  622. return;
  623. }
  624. }
  625. void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
  626. {
  627. if (unlikely(ctrl->kato == 0))
  628. return;
  629. INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
  630. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  631. }
  632. EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
  633. void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
  634. {
  635. if (unlikely(ctrl->kato == 0))
  636. return;
  637. cancel_delayed_work_sync(&ctrl->ka_work);
  638. }
  639. EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
  640. static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
  641. {
  642. struct nvme_command c = { };
  643. int error;
  644. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  645. c.identify.opcode = nvme_admin_identify;
  646. c.identify.cns = NVME_ID_CNS_CTRL;
  647. *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
  648. if (!*id)
  649. return -ENOMEM;
  650. error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
  651. sizeof(struct nvme_id_ctrl));
  652. if (error)
  653. kfree(*id);
  654. return error;
  655. }
  656. static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl, unsigned nsid,
  657. u8 *eui64, u8 *nguid, uuid_t *uuid)
  658. {
  659. struct nvme_command c = { };
  660. int status;
  661. void *data;
  662. int pos;
  663. int len;
  664. c.identify.opcode = nvme_admin_identify;
  665. c.identify.nsid = cpu_to_le32(nsid);
  666. c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
  667. data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
  668. if (!data)
  669. return -ENOMEM;
  670. status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
  671. NVME_IDENTIFY_DATA_SIZE);
  672. if (status)
  673. goto free_data;
  674. for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
  675. struct nvme_ns_id_desc *cur = data + pos;
  676. if (cur->nidl == 0)
  677. break;
  678. switch (cur->nidt) {
  679. case NVME_NIDT_EUI64:
  680. if (cur->nidl != NVME_NIDT_EUI64_LEN) {
  681. dev_warn(ctrl->device,
  682. "ctrl returned bogus length: %d for NVME_NIDT_EUI64\n",
  683. cur->nidl);
  684. goto free_data;
  685. }
  686. len = NVME_NIDT_EUI64_LEN;
  687. memcpy(eui64, data + pos + sizeof(*cur), len);
  688. break;
  689. case NVME_NIDT_NGUID:
  690. if (cur->nidl != NVME_NIDT_NGUID_LEN) {
  691. dev_warn(ctrl->device,
  692. "ctrl returned bogus length: %d for NVME_NIDT_NGUID\n",
  693. cur->nidl);
  694. goto free_data;
  695. }
  696. len = NVME_NIDT_NGUID_LEN;
  697. memcpy(nguid, data + pos + sizeof(*cur), len);
  698. break;
  699. case NVME_NIDT_UUID:
  700. if (cur->nidl != NVME_NIDT_UUID_LEN) {
  701. dev_warn(ctrl->device,
  702. "ctrl returned bogus length: %d for NVME_NIDT_UUID\n",
  703. cur->nidl);
  704. goto free_data;
  705. }
  706. len = NVME_NIDT_UUID_LEN;
  707. uuid_copy(uuid, data + pos + sizeof(*cur));
  708. break;
  709. default:
  710. /* Skip unnkown types */
  711. len = cur->nidl;
  712. break;
  713. }
  714. len += sizeof(*cur);
  715. }
  716. free_data:
  717. kfree(data);
  718. return status;
  719. }
  720. static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
  721. {
  722. struct nvme_command c = { };
  723. c.identify.opcode = nvme_admin_identify;
  724. c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST;
  725. c.identify.nsid = cpu_to_le32(nsid);
  726. return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
  727. }
  728. static struct nvme_id_ns *nvme_identify_ns(struct nvme_ctrl *ctrl,
  729. unsigned nsid)
  730. {
  731. struct nvme_id_ns *id;
  732. struct nvme_command c = { };
  733. int error;
  734. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  735. c.identify.opcode = nvme_admin_identify;
  736. c.identify.nsid = cpu_to_le32(nsid);
  737. c.identify.cns = NVME_ID_CNS_NS;
  738. id = kmalloc(sizeof(*id), GFP_KERNEL);
  739. if (!id)
  740. return NULL;
  741. error = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
  742. if (error) {
  743. dev_warn(ctrl->device, "Identify namespace failed\n");
  744. kfree(id);
  745. return NULL;
  746. }
  747. return id;
  748. }
  749. static int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
  750. void *buffer, size_t buflen, u32 *result)
  751. {
  752. struct nvme_command c;
  753. union nvme_result res;
  754. int ret;
  755. memset(&c, 0, sizeof(c));
  756. c.features.opcode = nvme_admin_set_features;
  757. c.features.fid = cpu_to_le32(fid);
  758. c.features.dword11 = cpu_to_le32(dword11);
  759. ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
  760. buffer, buflen, 0, NVME_QID_ANY, 0, 0);
  761. if (ret >= 0 && result)
  762. *result = le32_to_cpu(res.u32);
  763. return ret;
  764. }
  765. int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
  766. {
  767. u32 q_count = (*count - 1) | ((*count - 1) << 16);
  768. u32 result;
  769. int status, nr_io_queues;
  770. status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
  771. &result);
  772. if (status < 0)
  773. return status;
  774. /*
  775. * Degraded controllers might return an error when setting the queue
  776. * count. We still want to be able to bring them online and offer
  777. * access to the admin queue, as that might be only way to fix them up.
  778. */
  779. if (status > 0) {
  780. dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
  781. *count = 0;
  782. } else {
  783. nr_io_queues = min(result & 0xffff, result >> 16) + 1;
  784. *count = min(*count, nr_io_queues);
  785. }
  786. return 0;
  787. }
  788. EXPORT_SYMBOL_GPL(nvme_set_queue_count);
  789. static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
  790. {
  791. struct nvme_user_io io;
  792. struct nvme_command c;
  793. unsigned length, meta_len;
  794. void __user *metadata;
  795. if (copy_from_user(&io, uio, sizeof(io)))
  796. return -EFAULT;
  797. if (io.flags)
  798. return -EINVAL;
  799. switch (io.opcode) {
  800. case nvme_cmd_write:
  801. case nvme_cmd_read:
  802. case nvme_cmd_compare:
  803. break;
  804. default:
  805. return -EINVAL;
  806. }
  807. length = (io.nblocks + 1) << ns->lba_shift;
  808. meta_len = (io.nblocks + 1) * ns->ms;
  809. metadata = (void __user *)(uintptr_t)io.metadata;
  810. if (ns->ext) {
  811. length += meta_len;
  812. meta_len = 0;
  813. } else if (meta_len) {
  814. if ((io.metadata & 3) || !io.metadata)
  815. return -EINVAL;
  816. }
  817. memset(&c, 0, sizeof(c));
  818. c.rw.opcode = io.opcode;
  819. c.rw.flags = io.flags;
  820. c.rw.nsid = cpu_to_le32(ns->ns_id);
  821. c.rw.slba = cpu_to_le64(io.slba);
  822. c.rw.length = cpu_to_le16(io.nblocks);
  823. c.rw.control = cpu_to_le16(io.control);
  824. c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
  825. c.rw.reftag = cpu_to_le32(io.reftag);
  826. c.rw.apptag = cpu_to_le16(io.apptag);
  827. c.rw.appmask = cpu_to_le16(io.appmask);
  828. return nvme_submit_user_cmd(ns->queue, &c,
  829. (void __user *)(uintptr_t)io.addr, length,
  830. metadata, meta_len, io.slba, NULL, 0);
  831. }
  832. static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
  833. struct nvme_passthru_cmd __user *ucmd)
  834. {
  835. struct nvme_passthru_cmd cmd;
  836. struct nvme_command c;
  837. unsigned timeout = 0;
  838. int status;
  839. if (!capable(CAP_SYS_ADMIN))
  840. return -EACCES;
  841. if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
  842. return -EFAULT;
  843. if (cmd.flags)
  844. return -EINVAL;
  845. memset(&c, 0, sizeof(c));
  846. c.common.opcode = cmd.opcode;
  847. c.common.flags = cmd.flags;
  848. c.common.nsid = cpu_to_le32(cmd.nsid);
  849. c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
  850. c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
  851. c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
  852. c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
  853. c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
  854. c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
  855. c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
  856. c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
  857. if (cmd.timeout_ms)
  858. timeout = msecs_to_jiffies(cmd.timeout_ms);
  859. status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
  860. (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
  861. (void __user *)(uintptr_t)cmd.metadata, cmd.metadata,
  862. 0, &cmd.result, timeout);
  863. if (status >= 0) {
  864. if (put_user(cmd.result, &ucmd->result))
  865. return -EFAULT;
  866. }
  867. return status;
  868. }
  869. static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
  870. unsigned int cmd, unsigned long arg)
  871. {
  872. struct nvme_ns *ns = bdev->bd_disk->private_data;
  873. switch (cmd) {
  874. case NVME_IOCTL_ID:
  875. force_successful_syscall_return();
  876. return ns->ns_id;
  877. case NVME_IOCTL_ADMIN_CMD:
  878. return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
  879. case NVME_IOCTL_IO_CMD:
  880. return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
  881. case NVME_IOCTL_SUBMIT_IO:
  882. return nvme_submit_io(ns, (void __user *)arg);
  883. default:
  884. #ifdef CONFIG_NVM
  885. if (ns->ndev)
  886. return nvme_nvm_ioctl(ns, cmd, arg);
  887. #endif
  888. if (is_sed_ioctl(cmd))
  889. return sed_ioctl(ns->ctrl->opal_dev, cmd,
  890. (void __user *) arg);
  891. return -ENOTTY;
  892. }
  893. }
  894. #ifdef CONFIG_COMPAT
  895. static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
  896. unsigned int cmd, unsigned long arg)
  897. {
  898. return nvme_ioctl(bdev, mode, cmd, arg);
  899. }
  900. #else
  901. #define nvme_compat_ioctl NULL
  902. #endif
  903. static int nvme_open(struct block_device *bdev, fmode_t mode)
  904. {
  905. return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
  906. }
  907. static void nvme_release(struct gendisk *disk, fmode_t mode)
  908. {
  909. struct nvme_ns *ns = disk->private_data;
  910. module_put(ns->ctrl->ops->module);
  911. nvme_put_ns(ns);
  912. }
  913. static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  914. {
  915. /* some standard values */
  916. geo->heads = 1 << 6;
  917. geo->sectors = 1 << 5;
  918. geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
  919. return 0;
  920. }
  921. #ifdef CONFIG_BLK_DEV_INTEGRITY
  922. static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
  923. u16 bs)
  924. {
  925. struct nvme_ns *ns = disk->private_data;
  926. u16 old_ms = ns->ms;
  927. u8 pi_type = 0;
  928. ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms);
  929. ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
  930. /* PI implementation requires metadata equal t10 pi tuple size */
  931. if (ns->ms == sizeof(struct t10_pi_tuple))
  932. pi_type = id->dps & NVME_NS_DPS_PI_MASK;
  933. if (blk_get_integrity(disk) &&
  934. (ns->pi_type != pi_type || ns->ms != old_ms ||
  935. bs != queue_logical_block_size(disk->queue) ||
  936. (ns->ms && ns->ext)))
  937. blk_integrity_unregister(disk);
  938. ns->pi_type = pi_type;
  939. }
  940. static void nvme_init_integrity(struct nvme_ns *ns)
  941. {
  942. struct blk_integrity integrity;
  943. memset(&integrity, 0, sizeof(integrity));
  944. switch (ns->pi_type) {
  945. case NVME_NS_DPS_PI_TYPE3:
  946. integrity.profile = &t10_pi_type3_crc;
  947. integrity.tag_size = sizeof(u16) + sizeof(u32);
  948. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  949. break;
  950. case NVME_NS_DPS_PI_TYPE1:
  951. case NVME_NS_DPS_PI_TYPE2:
  952. integrity.profile = &t10_pi_type1_crc;
  953. integrity.tag_size = sizeof(u16);
  954. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  955. break;
  956. default:
  957. integrity.profile = NULL;
  958. break;
  959. }
  960. integrity.tuple_size = ns->ms;
  961. blk_integrity_register(ns->disk, &integrity);
  962. blk_queue_max_integrity_segments(ns->queue, 1);
  963. }
  964. #else
  965. static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
  966. u16 bs)
  967. {
  968. }
  969. static void nvme_init_integrity(struct nvme_ns *ns)
  970. {
  971. }
  972. #endif /* CONFIG_BLK_DEV_INTEGRITY */
  973. static void nvme_set_chunk_size(struct nvme_ns *ns)
  974. {
  975. u32 chunk_size = (((u32)ns->noiob) << (ns->lba_shift - 9));
  976. blk_queue_chunk_sectors(ns->queue, rounddown_pow_of_two(chunk_size));
  977. }
  978. static void nvme_config_discard(struct nvme_ns *ns)
  979. {
  980. struct nvme_ctrl *ctrl = ns->ctrl;
  981. u32 logical_block_size = queue_logical_block_size(ns->queue);
  982. BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
  983. NVME_DSM_MAX_RANGES);
  984. if (ctrl->nr_streams && ns->sws && ns->sgs) {
  985. unsigned int sz = logical_block_size * ns->sws * ns->sgs;
  986. ns->queue->limits.discard_alignment = sz;
  987. ns->queue->limits.discard_granularity = sz;
  988. } else {
  989. ns->queue->limits.discard_alignment = logical_block_size;
  990. ns->queue->limits.discard_granularity = logical_block_size;
  991. }
  992. blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
  993. blk_queue_max_discard_segments(ns->queue, NVME_DSM_MAX_RANGES);
  994. queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
  995. if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
  996. blk_queue_max_write_zeroes_sectors(ns->queue, UINT_MAX);
  997. }
  998. static void nvme_report_ns_ids(struct nvme_ctrl *ctrl, unsigned int nsid,
  999. struct nvme_id_ns *id, u8 *eui64, u8 *nguid, uuid_t *uuid)
  1000. {
  1001. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1002. memcpy(eui64, id->eui64, sizeof(id->eui64));
  1003. if (ctrl->vs >= NVME_VS(1, 2, 0))
  1004. memcpy(nguid, id->nguid, sizeof(id->nguid));
  1005. if (ctrl->vs >= NVME_VS(1, 3, 0)) {
  1006. /* Don't treat error as fatal we potentially
  1007. * already have a NGUID or EUI-64
  1008. */
  1009. if (nvme_identify_ns_descs(ctrl, nsid, eui64, nguid, uuid))
  1010. dev_warn(ctrl->device,
  1011. "%s: Identify Descriptors failed\n", __func__);
  1012. }
  1013. }
  1014. static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
  1015. {
  1016. struct nvme_ns *ns = disk->private_data;
  1017. struct nvme_ctrl *ctrl = ns->ctrl;
  1018. u16 bs;
  1019. /*
  1020. * If identify namespace failed, use default 512 byte block size so
  1021. * block layer can use before failing read/write for 0 capacity.
  1022. */
  1023. ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds;
  1024. if (ns->lba_shift == 0)
  1025. ns->lba_shift = 9;
  1026. bs = 1 << ns->lba_shift;
  1027. ns->noiob = le16_to_cpu(id->noiob);
  1028. blk_mq_freeze_queue(disk->queue);
  1029. if (ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)
  1030. nvme_prep_integrity(disk, id, bs);
  1031. blk_queue_logical_block_size(ns->queue, bs);
  1032. if (ns->noiob)
  1033. nvme_set_chunk_size(ns);
  1034. if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
  1035. nvme_init_integrity(ns);
  1036. if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
  1037. set_capacity(disk, 0);
  1038. else
  1039. set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
  1040. if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
  1041. nvme_config_discard(ns);
  1042. blk_mq_unfreeze_queue(disk->queue);
  1043. }
  1044. static int nvme_revalidate_disk(struct gendisk *disk)
  1045. {
  1046. struct nvme_ns *ns = disk->private_data;
  1047. struct nvme_ctrl *ctrl = ns->ctrl;
  1048. struct nvme_id_ns *id;
  1049. u8 eui64[8] = { 0 }, nguid[16] = { 0 };
  1050. uuid_t uuid = uuid_null;
  1051. int ret = 0;
  1052. if (test_bit(NVME_NS_DEAD, &ns->flags)) {
  1053. set_capacity(disk, 0);
  1054. return -ENODEV;
  1055. }
  1056. id = nvme_identify_ns(ctrl, ns->ns_id);
  1057. if (!id)
  1058. return -ENODEV;
  1059. if (id->ncap == 0) {
  1060. ret = -ENODEV;
  1061. goto out;
  1062. }
  1063. nvme_report_ns_ids(ctrl, ns->ns_id, id, eui64, nguid, &uuid);
  1064. if (!uuid_equal(&ns->uuid, &uuid) ||
  1065. memcmp(&ns->nguid, &nguid, sizeof(ns->nguid)) ||
  1066. memcmp(&ns->eui, &eui64, sizeof(ns->eui))) {
  1067. dev_err(ctrl->device,
  1068. "identifiers changed for nsid %d\n", ns->ns_id);
  1069. ret = -ENODEV;
  1070. }
  1071. out:
  1072. kfree(id);
  1073. return ret;
  1074. }
  1075. static char nvme_pr_type(enum pr_type type)
  1076. {
  1077. switch (type) {
  1078. case PR_WRITE_EXCLUSIVE:
  1079. return 1;
  1080. case PR_EXCLUSIVE_ACCESS:
  1081. return 2;
  1082. case PR_WRITE_EXCLUSIVE_REG_ONLY:
  1083. return 3;
  1084. case PR_EXCLUSIVE_ACCESS_REG_ONLY:
  1085. return 4;
  1086. case PR_WRITE_EXCLUSIVE_ALL_REGS:
  1087. return 5;
  1088. case PR_EXCLUSIVE_ACCESS_ALL_REGS:
  1089. return 6;
  1090. default:
  1091. return 0;
  1092. }
  1093. };
  1094. static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
  1095. u64 key, u64 sa_key, u8 op)
  1096. {
  1097. struct nvme_ns *ns = bdev->bd_disk->private_data;
  1098. struct nvme_command c;
  1099. u8 data[16] = { 0, };
  1100. put_unaligned_le64(key, &data[0]);
  1101. put_unaligned_le64(sa_key, &data[8]);
  1102. memset(&c, 0, sizeof(c));
  1103. c.common.opcode = op;
  1104. c.common.nsid = cpu_to_le32(ns->ns_id);
  1105. c.common.cdw10[0] = cpu_to_le32(cdw10);
  1106. return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
  1107. }
  1108. static int nvme_pr_register(struct block_device *bdev, u64 old,
  1109. u64 new, unsigned flags)
  1110. {
  1111. u32 cdw10;
  1112. if (flags & ~PR_FL_IGNORE_KEY)
  1113. return -EOPNOTSUPP;
  1114. cdw10 = old ? 2 : 0;
  1115. cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
  1116. cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
  1117. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
  1118. }
  1119. static int nvme_pr_reserve(struct block_device *bdev, u64 key,
  1120. enum pr_type type, unsigned flags)
  1121. {
  1122. u32 cdw10;
  1123. if (flags & ~PR_FL_IGNORE_KEY)
  1124. return -EOPNOTSUPP;
  1125. cdw10 = nvme_pr_type(type) << 8;
  1126. cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
  1127. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
  1128. }
  1129. static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
  1130. enum pr_type type, bool abort)
  1131. {
  1132. u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
  1133. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
  1134. }
  1135. static int nvme_pr_clear(struct block_device *bdev, u64 key)
  1136. {
  1137. u32 cdw10 = 1 | (key ? 1 << 3 : 0);
  1138. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
  1139. }
  1140. static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
  1141. {
  1142. u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
  1143. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
  1144. }
  1145. static const struct pr_ops nvme_pr_ops = {
  1146. .pr_register = nvme_pr_register,
  1147. .pr_reserve = nvme_pr_reserve,
  1148. .pr_release = nvme_pr_release,
  1149. .pr_preempt = nvme_pr_preempt,
  1150. .pr_clear = nvme_pr_clear,
  1151. };
  1152. #ifdef CONFIG_BLK_SED_OPAL
  1153. int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
  1154. bool send)
  1155. {
  1156. struct nvme_ctrl *ctrl = data;
  1157. struct nvme_command cmd;
  1158. memset(&cmd, 0, sizeof(cmd));
  1159. if (send)
  1160. cmd.common.opcode = nvme_admin_security_send;
  1161. else
  1162. cmd.common.opcode = nvme_admin_security_recv;
  1163. cmd.common.nsid = 0;
  1164. cmd.common.cdw10[0] = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
  1165. cmd.common.cdw10[1] = cpu_to_le32(len);
  1166. return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
  1167. ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0);
  1168. }
  1169. EXPORT_SYMBOL_GPL(nvme_sec_submit);
  1170. #endif /* CONFIG_BLK_SED_OPAL */
  1171. static const struct block_device_operations nvme_fops = {
  1172. .owner = THIS_MODULE,
  1173. .ioctl = nvme_ioctl,
  1174. .compat_ioctl = nvme_compat_ioctl,
  1175. .open = nvme_open,
  1176. .release = nvme_release,
  1177. .getgeo = nvme_getgeo,
  1178. .revalidate_disk= nvme_revalidate_disk,
  1179. .pr_ops = &nvme_pr_ops,
  1180. };
  1181. static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
  1182. {
  1183. unsigned long timeout =
  1184. ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
  1185. u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
  1186. int ret;
  1187. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1188. if (csts == ~0)
  1189. return -ENODEV;
  1190. if ((csts & NVME_CSTS_RDY) == bit)
  1191. break;
  1192. msleep(100);
  1193. if (fatal_signal_pending(current))
  1194. return -EINTR;
  1195. if (time_after(jiffies, timeout)) {
  1196. dev_err(ctrl->device,
  1197. "Device not ready; aborting %s\n", enabled ?
  1198. "initialisation" : "reset");
  1199. return -ENODEV;
  1200. }
  1201. }
  1202. return ret;
  1203. }
  1204. /*
  1205. * If the device has been passed off to us in an enabled state, just clear
  1206. * the enabled bit. The spec says we should set the 'shutdown notification
  1207. * bits', but doing so may cause the device to complete commands to the
  1208. * admin queue ... and we don't know what memory that might be pointing at!
  1209. */
  1210. int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1211. {
  1212. int ret;
  1213. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1214. ctrl->ctrl_config &= ~NVME_CC_ENABLE;
  1215. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1216. if (ret)
  1217. return ret;
  1218. if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
  1219. msleep(NVME_QUIRK_DELAY_AMOUNT);
  1220. return nvme_wait_ready(ctrl, cap, false);
  1221. }
  1222. EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
  1223. int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1224. {
  1225. /*
  1226. * Default to a 4K page size, with the intention to update this
  1227. * path in the future to accomodate architectures with differing
  1228. * kernel and IO page sizes.
  1229. */
  1230. unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
  1231. int ret;
  1232. if (page_shift < dev_page_min) {
  1233. dev_err(ctrl->device,
  1234. "Minimum device page size %u too large for host (%u)\n",
  1235. 1 << dev_page_min, 1 << page_shift);
  1236. return -ENODEV;
  1237. }
  1238. ctrl->page_size = 1 << page_shift;
  1239. ctrl->ctrl_config = NVME_CC_CSS_NVM;
  1240. ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
  1241. ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
  1242. ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
  1243. ctrl->ctrl_config |= NVME_CC_ENABLE;
  1244. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1245. if (ret)
  1246. return ret;
  1247. return nvme_wait_ready(ctrl, cap, true);
  1248. }
  1249. EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
  1250. int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
  1251. {
  1252. unsigned long timeout = jiffies + (ctrl->shutdown_timeout * HZ);
  1253. u32 csts;
  1254. int ret;
  1255. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1256. ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
  1257. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1258. if (ret)
  1259. return ret;
  1260. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1261. if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
  1262. break;
  1263. msleep(100);
  1264. if (fatal_signal_pending(current))
  1265. return -EINTR;
  1266. if (time_after(jiffies, timeout)) {
  1267. dev_err(ctrl->device,
  1268. "Device shutdown incomplete; abort shutdown\n");
  1269. return -ENODEV;
  1270. }
  1271. }
  1272. return ret;
  1273. }
  1274. EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
  1275. static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
  1276. struct request_queue *q)
  1277. {
  1278. bool vwc = false;
  1279. if (ctrl->max_hw_sectors) {
  1280. u32 max_segments =
  1281. (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
  1282. blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
  1283. blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
  1284. }
  1285. if (ctrl->quirks & NVME_QUIRK_STRIPE_SIZE)
  1286. blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
  1287. blk_queue_virt_boundary(q, ctrl->page_size - 1);
  1288. if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
  1289. vwc = true;
  1290. blk_queue_write_cache(q, vwc, vwc);
  1291. }
  1292. static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
  1293. {
  1294. __le64 ts;
  1295. int ret;
  1296. if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
  1297. return 0;
  1298. ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
  1299. ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
  1300. NULL);
  1301. if (ret)
  1302. dev_warn_once(ctrl->device,
  1303. "could not set timestamp (%d)\n", ret);
  1304. return ret;
  1305. }
  1306. static int nvme_configure_apst(struct nvme_ctrl *ctrl)
  1307. {
  1308. /*
  1309. * APST (Autonomous Power State Transition) lets us program a
  1310. * table of power state transitions that the controller will
  1311. * perform automatically. We configure it with a simple
  1312. * heuristic: we are willing to spend at most 2% of the time
  1313. * transitioning between power states. Therefore, when running
  1314. * in any given state, we will enter the next lower-power
  1315. * non-operational state after waiting 50 * (enlat + exlat)
  1316. * microseconds, as long as that state's exit latency is under
  1317. * the requested maximum latency.
  1318. *
  1319. * We will not autonomously enter any non-operational state for
  1320. * which the total latency exceeds ps_max_latency_us. Users
  1321. * can set ps_max_latency_us to zero to turn off APST.
  1322. */
  1323. unsigned apste;
  1324. struct nvme_feat_auto_pst *table;
  1325. u64 max_lat_us = 0;
  1326. int max_ps = -1;
  1327. int ret;
  1328. /*
  1329. * If APST isn't supported or if we haven't been initialized yet,
  1330. * then don't do anything.
  1331. */
  1332. if (!ctrl->apsta)
  1333. return 0;
  1334. if (ctrl->npss > 31) {
  1335. dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
  1336. return 0;
  1337. }
  1338. table = kzalloc(sizeof(*table), GFP_KERNEL);
  1339. if (!table)
  1340. return 0;
  1341. if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
  1342. /* Turn off APST. */
  1343. apste = 0;
  1344. dev_dbg(ctrl->device, "APST disabled\n");
  1345. } else {
  1346. __le64 target = cpu_to_le64(0);
  1347. int state;
  1348. /*
  1349. * Walk through all states from lowest- to highest-power.
  1350. * According to the spec, lower-numbered states use more
  1351. * power. NPSS, despite the name, is the index of the
  1352. * lowest-power state, not the number of states.
  1353. */
  1354. for (state = (int)ctrl->npss; state >= 0; state--) {
  1355. u64 total_latency_us, exit_latency_us, transition_ms;
  1356. if (target)
  1357. table->entries[state] = target;
  1358. /*
  1359. * Don't allow transitions to the deepest state
  1360. * if it's quirked off.
  1361. */
  1362. if (state == ctrl->npss &&
  1363. (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
  1364. continue;
  1365. /*
  1366. * Is this state a useful non-operational state for
  1367. * higher-power states to autonomously transition to?
  1368. */
  1369. if (!(ctrl->psd[state].flags &
  1370. NVME_PS_FLAGS_NON_OP_STATE))
  1371. continue;
  1372. exit_latency_us =
  1373. (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
  1374. if (exit_latency_us > ctrl->ps_max_latency_us)
  1375. continue;
  1376. total_latency_us =
  1377. exit_latency_us +
  1378. le32_to_cpu(ctrl->psd[state].entry_lat);
  1379. /*
  1380. * This state is good. Use it as the APST idle
  1381. * target for higher power states.
  1382. */
  1383. transition_ms = total_latency_us + 19;
  1384. do_div(transition_ms, 20);
  1385. if (transition_ms > (1 << 24) - 1)
  1386. transition_ms = (1 << 24) - 1;
  1387. target = cpu_to_le64((state << 3) |
  1388. (transition_ms << 8));
  1389. if (max_ps == -1)
  1390. max_ps = state;
  1391. if (total_latency_us > max_lat_us)
  1392. max_lat_us = total_latency_us;
  1393. }
  1394. apste = 1;
  1395. if (max_ps == -1) {
  1396. dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
  1397. } else {
  1398. dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
  1399. max_ps, max_lat_us, (int)sizeof(*table), table);
  1400. }
  1401. }
  1402. ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
  1403. table, sizeof(*table), NULL);
  1404. if (ret)
  1405. dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
  1406. kfree(table);
  1407. return ret;
  1408. }
  1409. static void nvme_set_latency_tolerance(struct device *dev, s32 val)
  1410. {
  1411. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1412. u64 latency;
  1413. switch (val) {
  1414. case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
  1415. case PM_QOS_LATENCY_ANY:
  1416. latency = U64_MAX;
  1417. break;
  1418. default:
  1419. latency = val;
  1420. }
  1421. if (ctrl->ps_max_latency_us != latency) {
  1422. ctrl->ps_max_latency_us = latency;
  1423. nvme_configure_apst(ctrl);
  1424. }
  1425. }
  1426. struct nvme_core_quirk_entry {
  1427. /*
  1428. * NVMe model and firmware strings are padded with spaces. For
  1429. * simplicity, strings in the quirk table are padded with NULLs
  1430. * instead.
  1431. */
  1432. u16 vid;
  1433. const char *mn;
  1434. const char *fr;
  1435. unsigned long quirks;
  1436. };
  1437. static const struct nvme_core_quirk_entry core_quirks[] = {
  1438. {
  1439. /*
  1440. * This Toshiba device seems to die using any APST states. See:
  1441. * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
  1442. */
  1443. .vid = 0x1179,
  1444. .mn = "THNSF5256GPUK TOSHIBA",
  1445. .quirks = NVME_QUIRK_NO_APST,
  1446. }
  1447. };
  1448. /* match is null-terminated but idstr is space-padded. */
  1449. static bool string_matches(const char *idstr, const char *match, size_t len)
  1450. {
  1451. size_t matchlen;
  1452. if (!match)
  1453. return true;
  1454. matchlen = strlen(match);
  1455. WARN_ON_ONCE(matchlen > len);
  1456. if (memcmp(idstr, match, matchlen))
  1457. return false;
  1458. for (; matchlen < len; matchlen++)
  1459. if (idstr[matchlen] != ' ')
  1460. return false;
  1461. return true;
  1462. }
  1463. static bool quirk_matches(const struct nvme_id_ctrl *id,
  1464. const struct nvme_core_quirk_entry *q)
  1465. {
  1466. return q->vid == le16_to_cpu(id->vid) &&
  1467. string_matches(id->mn, q->mn, sizeof(id->mn)) &&
  1468. string_matches(id->fr, q->fr, sizeof(id->fr));
  1469. }
  1470. static void nvme_init_subnqn(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
  1471. {
  1472. size_t nqnlen;
  1473. int off;
  1474. nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
  1475. if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
  1476. strcpy(ctrl->subnqn, id->subnqn);
  1477. return;
  1478. }
  1479. if (ctrl->vs >= NVME_VS(1, 2, 1))
  1480. dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
  1481. /* Generate a "fake" NQN per Figure 254 in NVMe 1.3 + ECN 001 */
  1482. off = snprintf(ctrl->subnqn, NVMF_NQN_SIZE,
  1483. "nqn.2014.08.org.nvmexpress:%4x%4x",
  1484. le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
  1485. memcpy(ctrl->subnqn + off, id->sn, sizeof(id->sn));
  1486. off += sizeof(id->sn);
  1487. memcpy(ctrl->subnqn + off, id->mn, sizeof(id->mn));
  1488. off += sizeof(id->mn);
  1489. memset(ctrl->subnqn + off, 0, sizeof(ctrl->subnqn) - off);
  1490. }
  1491. /*
  1492. * Initialize the cached copies of the Identify data and various controller
  1493. * register in our nvme_ctrl structure. This should be called as soon as
  1494. * the admin queue is fully up and running.
  1495. */
  1496. int nvme_init_identify(struct nvme_ctrl *ctrl)
  1497. {
  1498. struct nvme_id_ctrl *id;
  1499. u64 cap;
  1500. int ret, page_shift;
  1501. u32 max_hw_sectors;
  1502. bool prev_apst_enabled;
  1503. ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
  1504. if (ret) {
  1505. dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
  1506. return ret;
  1507. }
  1508. ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
  1509. if (ret) {
  1510. dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
  1511. return ret;
  1512. }
  1513. page_shift = NVME_CAP_MPSMIN(cap) + 12;
  1514. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1515. ctrl->subsystem = NVME_CAP_NSSRC(cap);
  1516. ret = nvme_identify_ctrl(ctrl, &id);
  1517. if (ret) {
  1518. dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
  1519. return -EIO;
  1520. }
  1521. nvme_init_subnqn(ctrl, id);
  1522. if (!ctrl->identified) {
  1523. /*
  1524. * Check for quirks. Quirk can depend on firmware version,
  1525. * so, in principle, the set of quirks present can change
  1526. * across a reset. As a possible future enhancement, we
  1527. * could re-scan for quirks every time we reinitialize
  1528. * the device, but we'd have to make sure that the driver
  1529. * behaves intelligently if the quirks change.
  1530. */
  1531. int i;
  1532. for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
  1533. if (quirk_matches(id, &core_quirks[i]))
  1534. ctrl->quirks |= core_quirks[i].quirks;
  1535. }
  1536. }
  1537. if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
  1538. dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
  1539. ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
  1540. }
  1541. ctrl->oacs = le16_to_cpu(id->oacs);
  1542. ctrl->vid = le16_to_cpu(id->vid);
  1543. ctrl->oncs = le16_to_cpup(&id->oncs);
  1544. atomic_set(&ctrl->abort_limit, id->acl + 1);
  1545. ctrl->vwc = id->vwc;
  1546. ctrl->cntlid = le16_to_cpup(&id->cntlid);
  1547. memcpy(ctrl->serial, id->sn, sizeof(id->sn));
  1548. memcpy(ctrl->model, id->mn, sizeof(id->mn));
  1549. memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
  1550. if (id->mdts)
  1551. max_hw_sectors = 1 << (id->mdts + page_shift - 9);
  1552. else
  1553. max_hw_sectors = UINT_MAX;
  1554. ctrl->max_hw_sectors =
  1555. min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
  1556. nvme_set_queue_limits(ctrl, ctrl->admin_q);
  1557. ctrl->sgls = le32_to_cpu(id->sgls);
  1558. ctrl->kas = le16_to_cpu(id->kas);
  1559. if (id->rtd3e) {
  1560. /* us -> s */
  1561. u32 transition_time = le32_to_cpu(id->rtd3e) / 1000000;
  1562. ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
  1563. shutdown_timeout, 60);
  1564. if (ctrl->shutdown_timeout != shutdown_timeout)
  1565. dev_warn(ctrl->device,
  1566. "Shutdown timeout set to %u seconds\n",
  1567. ctrl->shutdown_timeout);
  1568. } else
  1569. ctrl->shutdown_timeout = shutdown_timeout;
  1570. ctrl->npss = id->npss;
  1571. ctrl->apsta = id->apsta;
  1572. prev_apst_enabled = ctrl->apst_enabled;
  1573. if (ctrl->quirks & NVME_QUIRK_NO_APST) {
  1574. if (force_apst && id->apsta) {
  1575. dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
  1576. ctrl->apst_enabled = true;
  1577. } else {
  1578. ctrl->apst_enabled = false;
  1579. }
  1580. } else {
  1581. ctrl->apst_enabled = id->apsta;
  1582. }
  1583. memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
  1584. if (ctrl->ops->flags & NVME_F_FABRICS) {
  1585. ctrl->icdoff = le16_to_cpu(id->icdoff);
  1586. ctrl->ioccsz = le32_to_cpu(id->ioccsz);
  1587. ctrl->iorcsz = le32_to_cpu(id->iorcsz);
  1588. ctrl->maxcmd = le16_to_cpu(id->maxcmd);
  1589. /*
  1590. * In fabrics we need to verify the cntlid matches the
  1591. * admin connect
  1592. */
  1593. if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
  1594. ret = -EINVAL;
  1595. goto out_free;
  1596. }
  1597. if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
  1598. dev_err(ctrl->device,
  1599. "keep-alive support is mandatory for fabrics\n");
  1600. ret = -EINVAL;
  1601. goto out_free;
  1602. }
  1603. } else {
  1604. ctrl->cntlid = le16_to_cpu(id->cntlid);
  1605. ctrl->hmpre = le32_to_cpu(id->hmpre);
  1606. ctrl->hmmin = le32_to_cpu(id->hmmin);
  1607. ctrl->hmminds = le32_to_cpu(id->hmminds);
  1608. ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
  1609. }
  1610. kfree(id);
  1611. if (ctrl->apst_enabled && !prev_apst_enabled)
  1612. dev_pm_qos_expose_latency_tolerance(ctrl->device);
  1613. else if (!ctrl->apst_enabled && prev_apst_enabled)
  1614. dev_pm_qos_hide_latency_tolerance(ctrl->device);
  1615. ret = nvme_configure_apst(ctrl);
  1616. if (ret < 0)
  1617. return ret;
  1618. ret = nvme_configure_timestamp(ctrl);
  1619. if (ret < 0)
  1620. return ret;
  1621. ret = nvme_configure_directives(ctrl);
  1622. if (ret < 0)
  1623. return ret;
  1624. ctrl->identified = true;
  1625. return 0;
  1626. out_free:
  1627. kfree(id);
  1628. return ret;
  1629. }
  1630. EXPORT_SYMBOL_GPL(nvme_init_identify);
  1631. static int nvme_dev_open(struct inode *inode, struct file *file)
  1632. {
  1633. struct nvme_ctrl *ctrl;
  1634. int instance = iminor(inode);
  1635. int ret = -ENODEV;
  1636. spin_lock(&dev_list_lock);
  1637. list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
  1638. if (ctrl->instance != instance)
  1639. continue;
  1640. if (!ctrl->admin_q) {
  1641. ret = -EWOULDBLOCK;
  1642. break;
  1643. }
  1644. if (!kref_get_unless_zero(&ctrl->kref))
  1645. break;
  1646. file->private_data = ctrl;
  1647. ret = 0;
  1648. break;
  1649. }
  1650. spin_unlock(&dev_list_lock);
  1651. return ret;
  1652. }
  1653. static int nvme_dev_release(struct inode *inode, struct file *file)
  1654. {
  1655. nvme_put_ctrl(file->private_data);
  1656. return 0;
  1657. }
  1658. static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
  1659. {
  1660. struct nvme_ns *ns;
  1661. int ret;
  1662. mutex_lock(&ctrl->namespaces_mutex);
  1663. if (list_empty(&ctrl->namespaces)) {
  1664. ret = -ENOTTY;
  1665. goto out_unlock;
  1666. }
  1667. ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
  1668. if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
  1669. dev_warn(ctrl->device,
  1670. "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
  1671. ret = -EINVAL;
  1672. goto out_unlock;
  1673. }
  1674. dev_warn(ctrl->device,
  1675. "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
  1676. kref_get(&ns->kref);
  1677. mutex_unlock(&ctrl->namespaces_mutex);
  1678. ret = nvme_user_cmd(ctrl, ns, argp);
  1679. nvme_put_ns(ns);
  1680. return ret;
  1681. out_unlock:
  1682. mutex_unlock(&ctrl->namespaces_mutex);
  1683. return ret;
  1684. }
  1685. static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
  1686. unsigned long arg)
  1687. {
  1688. struct nvme_ctrl *ctrl = file->private_data;
  1689. void __user *argp = (void __user *)arg;
  1690. switch (cmd) {
  1691. case NVME_IOCTL_ADMIN_CMD:
  1692. return nvme_user_cmd(ctrl, NULL, argp);
  1693. case NVME_IOCTL_IO_CMD:
  1694. return nvme_dev_user_cmd(ctrl, argp);
  1695. case NVME_IOCTL_RESET:
  1696. dev_warn(ctrl->device, "resetting controller\n");
  1697. return nvme_reset_ctrl_sync(ctrl);
  1698. case NVME_IOCTL_SUBSYS_RESET:
  1699. return nvme_reset_subsystem(ctrl);
  1700. case NVME_IOCTL_RESCAN:
  1701. nvme_queue_scan(ctrl);
  1702. return 0;
  1703. default:
  1704. return -ENOTTY;
  1705. }
  1706. }
  1707. static const struct file_operations nvme_dev_fops = {
  1708. .owner = THIS_MODULE,
  1709. .open = nvme_dev_open,
  1710. .release = nvme_dev_release,
  1711. .unlocked_ioctl = nvme_dev_ioctl,
  1712. .compat_ioctl = nvme_dev_ioctl,
  1713. };
  1714. static ssize_t nvme_sysfs_reset(struct device *dev,
  1715. struct device_attribute *attr, const char *buf,
  1716. size_t count)
  1717. {
  1718. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1719. int ret;
  1720. ret = nvme_reset_ctrl_sync(ctrl);
  1721. if (ret < 0)
  1722. return ret;
  1723. return count;
  1724. }
  1725. static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
  1726. static ssize_t nvme_sysfs_rescan(struct device *dev,
  1727. struct device_attribute *attr, const char *buf,
  1728. size_t count)
  1729. {
  1730. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1731. nvme_queue_scan(ctrl);
  1732. return count;
  1733. }
  1734. static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
  1735. static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
  1736. char *buf)
  1737. {
  1738. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1739. struct nvme_ctrl *ctrl = ns->ctrl;
  1740. int serial_len = sizeof(ctrl->serial);
  1741. int model_len = sizeof(ctrl->model);
  1742. if (!uuid_is_null(&ns->uuid))
  1743. return sprintf(buf, "uuid.%pU\n", &ns->uuid);
  1744. if (memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
  1745. return sprintf(buf, "eui.%16phN\n", ns->nguid);
  1746. if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1747. return sprintf(buf, "eui.%8phN\n", ns->eui);
  1748. while (serial_len > 0 && (ctrl->serial[serial_len - 1] == ' ' ||
  1749. ctrl->serial[serial_len - 1] == '\0'))
  1750. serial_len--;
  1751. while (model_len > 0 && (ctrl->model[model_len - 1] == ' ' ||
  1752. ctrl->model[model_len - 1] == '\0'))
  1753. model_len--;
  1754. return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
  1755. serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
  1756. }
  1757. static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
  1758. static ssize_t nguid_show(struct device *dev, struct device_attribute *attr,
  1759. char *buf)
  1760. {
  1761. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1762. return sprintf(buf, "%pU\n", ns->nguid);
  1763. }
  1764. static DEVICE_ATTR(nguid, S_IRUGO, nguid_show, NULL);
  1765. static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
  1766. char *buf)
  1767. {
  1768. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1769. /* For backward compatibility expose the NGUID to userspace if
  1770. * we have no UUID set
  1771. */
  1772. if (uuid_is_null(&ns->uuid)) {
  1773. printk_ratelimited(KERN_WARNING
  1774. "No UUID available providing old NGUID\n");
  1775. return sprintf(buf, "%pU\n", ns->nguid);
  1776. }
  1777. return sprintf(buf, "%pU\n", &ns->uuid);
  1778. }
  1779. static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
  1780. static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
  1781. char *buf)
  1782. {
  1783. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1784. return sprintf(buf, "%8phd\n", ns->eui);
  1785. }
  1786. static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
  1787. static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
  1788. char *buf)
  1789. {
  1790. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1791. return sprintf(buf, "%d\n", ns->ns_id);
  1792. }
  1793. static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
  1794. static struct attribute *nvme_ns_attrs[] = {
  1795. &dev_attr_wwid.attr,
  1796. &dev_attr_uuid.attr,
  1797. &dev_attr_nguid.attr,
  1798. &dev_attr_eui.attr,
  1799. &dev_attr_nsid.attr,
  1800. NULL,
  1801. };
  1802. static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
  1803. struct attribute *a, int n)
  1804. {
  1805. struct device *dev = container_of(kobj, struct device, kobj);
  1806. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1807. if (a == &dev_attr_uuid.attr) {
  1808. if (uuid_is_null(&ns->uuid) &&
  1809. !memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
  1810. return 0;
  1811. }
  1812. if (a == &dev_attr_nguid.attr) {
  1813. if (!memchr_inv(ns->nguid, 0, sizeof(ns->nguid)))
  1814. return 0;
  1815. }
  1816. if (a == &dev_attr_eui.attr) {
  1817. if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1818. return 0;
  1819. }
  1820. return a->mode;
  1821. }
  1822. static const struct attribute_group nvme_ns_attr_group = {
  1823. .attrs = nvme_ns_attrs,
  1824. .is_visible = nvme_ns_attrs_are_visible,
  1825. };
  1826. #define nvme_show_str_function(field) \
  1827. static ssize_t field##_show(struct device *dev, \
  1828. struct device_attribute *attr, char *buf) \
  1829. { \
  1830. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1831. return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
  1832. } \
  1833. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1834. #define nvme_show_int_function(field) \
  1835. static ssize_t field##_show(struct device *dev, \
  1836. struct device_attribute *attr, char *buf) \
  1837. { \
  1838. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1839. return sprintf(buf, "%d\n", ctrl->field); \
  1840. } \
  1841. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1842. nvme_show_str_function(model);
  1843. nvme_show_str_function(serial);
  1844. nvme_show_str_function(firmware_rev);
  1845. nvme_show_int_function(cntlid);
  1846. static ssize_t nvme_sysfs_delete(struct device *dev,
  1847. struct device_attribute *attr, const char *buf,
  1848. size_t count)
  1849. {
  1850. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1851. if (device_remove_file_self(dev, attr))
  1852. ctrl->ops->delete_ctrl(ctrl);
  1853. return count;
  1854. }
  1855. static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
  1856. static ssize_t nvme_sysfs_show_transport(struct device *dev,
  1857. struct device_attribute *attr,
  1858. char *buf)
  1859. {
  1860. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1861. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
  1862. }
  1863. static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
  1864. static ssize_t nvme_sysfs_show_state(struct device *dev,
  1865. struct device_attribute *attr,
  1866. char *buf)
  1867. {
  1868. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1869. static const char *const state_name[] = {
  1870. [NVME_CTRL_NEW] = "new",
  1871. [NVME_CTRL_LIVE] = "live",
  1872. [NVME_CTRL_RESETTING] = "resetting",
  1873. [NVME_CTRL_RECONNECTING]= "reconnecting",
  1874. [NVME_CTRL_DELETING] = "deleting",
  1875. [NVME_CTRL_DEAD] = "dead",
  1876. };
  1877. if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
  1878. state_name[ctrl->state])
  1879. return sprintf(buf, "%s\n", state_name[ctrl->state]);
  1880. return sprintf(buf, "unknown state\n");
  1881. }
  1882. static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
  1883. static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
  1884. struct device_attribute *attr,
  1885. char *buf)
  1886. {
  1887. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1888. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->subnqn);
  1889. }
  1890. static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
  1891. static ssize_t nvme_sysfs_show_address(struct device *dev,
  1892. struct device_attribute *attr,
  1893. char *buf)
  1894. {
  1895. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1896. return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
  1897. }
  1898. static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
  1899. static struct attribute *nvme_dev_attrs[] = {
  1900. &dev_attr_reset_controller.attr,
  1901. &dev_attr_rescan_controller.attr,
  1902. &dev_attr_model.attr,
  1903. &dev_attr_serial.attr,
  1904. &dev_attr_firmware_rev.attr,
  1905. &dev_attr_cntlid.attr,
  1906. &dev_attr_delete_controller.attr,
  1907. &dev_attr_transport.attr,
  1908. &dev_attr_subsysnqn.attr,
  1909. &dev_attr_address.attr,
  1910. &dev_attr_state.attr,
  1911. NULL
  1912. };
  1913. static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
  1914. struct attribute *a, int n)
  1915. {
  1916. struct device *dev = container_of(kobj, struct device, kobj);
  1917. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1918. if (a == &dev_attr_delete_controller.attr && !ctrl->ops->delete_ctrl)
  1919. return 0;
  1920. if (a == &dev_attr_address.attr && !ctrl->ops->get_address)
  1921. return 0;
  1922. return a->mode;
  1923. }
  1924. static struct attribute_group nvme_dev_attrs_group = {
  1925. .attrs = nvme_dev_attrs,
  1926. .is_visible = nvme_dev_attrs_are_visible,
  1927. };
  1928. static const struct attribute_group *nvme_dev_attr_groups[] = {
  1929. &nvme_dev_attrs_group,
  1930. NULL,
  1931. };
  1932. static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
  1933. {
  1934. struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
  1935. struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
  1936. return nsa->ns_id - nsb->ns_id;
  1937. }
  1938. static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1939. {
  1940. struct nvme_ns *ns, *ret = NULL;
  1941. mutex_lock(&ctrl->namespaces_mutex);
  1942. list_for_each_entry(ns, &ctrl->namespaces, list) {
  1943. if (ns->ns_id == nsid) {
  1944. kref_get(&ns->kref);
  1945. ret = ns;
  1946. break;
  1947. }
  1948. if (ns->ns_id > nsid)
  1949. break;
  1950. }
  1951. mutex_unlock(&ctrl->namespaces_mutex);
  1952. return ret;
  1953. }
  1954. static int nvme_setup_streams_ns(struct nvme_ctrl *ctrl, struct nvme_ns *ns)
  1955. {
  1956. struct streams_directive_params s;
  1957. int ret;
  1958. if (!ctrl->nr_streams)
  1959. return 0;
  1960. ret = nvme_get_stream_params(ctrl, &s, ns->ns_id);
  1961. if (ret)
  1962. return ret;
  1963. ns->sws = le32_to_cpu(s.sws);
  1964. ns->sgs = le16_to_cpu(s.sgs);
  1965. if (ns->sws) {
  1966. unsigned int bs = 1 << ns->lba_shift;
  1967. blk_queue_io_min(ns->queue, bs * ns->sws);
  1968. if (ns->sgs)
  1969. blk_queue_io_opt(ns->queue, bs * ns->sws * ns->sgs);
  1970. }
  1971. return 0;
  1972. }
  1973. static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1974. {
  1975. struct nvme_ns *ns;
  1976. struct gendisk *disk;
  1977. struct nvme_id_ns *id;
  1978. char disk_name[DISK_NAME_LEN];
  1979. int node = dev_to_node(ctrl->dev);
  1980. ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
  1981. if (!ns)
  1982. return;
  1983. ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
  1984. if (ns->instance < 0)
  1985. goto out_free_ns;
  1986. ns->queue = blk_mq_init_queue(ctrl->tagset);
  1987. if (IS_ERR(ns->queue))
  1988. goto out_release_instance;
  1989. queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
  1990. ns->queue->queuedata = ns;
  1991. ns->ctrl = ctrl;
  1992. kref_init(&ns->kref);
  1993. ns->ns_id = nsid;
  1994. ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
  1995. blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
  1996. nvme_set_queue_limits(ctrl, ns->queue);
  1997. nvme_setup_streams_ns(ctrl, ns);
  1998. sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
  1999. id = nvme_identify_ns(ctrl, nsid);
  2000. if (!id)
  2001. goto out_free_queue;
  2002. if (id->ncap == 0)
  2003. goto out_free_id;
  2004. nvme_report_ns_ids(ctrl, ns->ns_id, id, ns->eui, ns->nguid, &ns->uuid);
  2005. if ((ctrl->quirks & NVME_QUIRK_LIGHTNVM) && id->vs[0] == 0x1) {
  2006. if (nvme_nvm_register(ns, disk_name, node)) {
  2007. dev_warn(ctrl->device, "LightNVM init failure\n");
  2008. goto out_free_id;
  2009. }
  2010. }
  2011. disk = alloc_disk_node(0, node);
  2012. if (!disk)
  2013. goto out_free_id;
  2014. disk->fops = &nvme_fops;
  2015. disk->private_data = ns;
  2016. disk->queue = ns->queue;
  2017. disk->flags = GENHD_FL_EXT_DEVT;
  2018. memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
  2019. ns->disk = disk;
  2020. __nvme_revalidate_disk(disk, id);
  2021. mutex_lock(&ctrl->namespaces_mutex);
  2022. list_add_tail(&ns->list, &ctrl->namespaces);
  2023. mutex_unlock(&ctrl->namespaces_mutex);
  2024. kref_get(&ctrl->kref);
  2025. kfree(id);
  2026. device_add_disk(ctrl->device, ns->disk);
  2027. if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
  2028. &nvme_ns_attr_group))
  2029. pr_warn("%s: failed to create sysfs group for identification\n",
  2030. ns->disk->disk_name);
  2031. if (ns->ndev && nvme_nvm_register_sysfs(ns))
  2032. pr_warn("%s: failed to register lightnvm sysfs group for identification\n",
  2033. ns->disk->disk_name);
  2034. return;
  2035. out_free_id:
  2036. kfree(id);
  2037. out_free_queue:
  2038. blk_cleanup_queue(ns->queue);
  2039. out_release_instance:
  2040. ida_simple_remove(&ctrl->ns_ida, ns->instance);
  2041. out_free_ns:
  2042. kfree(ns);
  2043. }
  2044. static void nvme_ns_remove(struct nvme_ns *ns)
  2045. {
  2046. if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
  2047. return;
  2048. if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
  2049. if (blk_get_integrity(ns->disk))
  2050. blk_integrity_unregister(ns->disk);
  2051. sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
  2052. &nvme_ns_attr_group);
  2053. if (ns->ndev)
  2054. nvme_nvm_unregister_sysfs(ns);
  2055. del_gendisk(ns->disk);
  2056. blk_cleanup_queue(ns->queue);
  2057. }
  2058. mutex_lock(&ns->ctrl->namespaces_mutex);
  2059. list_del_init(&ns->list);
  2060. mutex_unlock(&ns->ctrl->namespaces_mutex);
  2061. nvme_put_ns(ns);
  2062. }
  2063. static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  2064. {
  2065. struct nvme_ns *ns;
  2066. ns = nvme_find_get_ns(ctrl, nsid);
  2067. if (ns) {
  2068. if (ns->disk && revalidate_disk(ns->disk))
  2069. nvme_ns_remove(ns);
  2070. nvme_put_ns(ns);
  2071. } else
  2072. nvme_alloc_ns(ctrl, nsid);
  2073. }
  2074. static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
  2075. unsigned nsid)
  2076. {
  2077. struct nvme_ns *ns, *next;
  2078. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
  2079. if (ns->ns_id > nsid)
  2080. nvme_ns_remove(ns);
  2081. }
  2082. }
  2083. static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
  2084. {
  2085. struct nvme_ns *ns;
  2086. __le32 *ns_list;
  2087. unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
  2088. int ret = 0;
  2089. ns_list = kzalloc(0x1000, GFP_KERNEL);
  2090. if (!ns_list)
  2091. return -ENOMEM;
  2092. for (i = 0; i < num_lists; i++) {
  2093. ret = nvme_identify_ns_list(ctrl, prev, ns_list);
  2094. if (ret)
  2095. goto free;
  2096. for (j = 0; j < min(nn, 1024U); j++) {
  2097. nsid = le32_to_cpu(ns_list[j]);
  2098. if (!nsid)
  2099. goto out;
  2100. nvme_validate_ns(ctrl, nsid);
  2101. while (++prev < nsid) {
  2102. ns = nvme_find_get_ns(ctrl, prev);
  2103. if (ns) {
  2104. nvme_ns_remove(ns);
  2105. nvme_put_ns(ns);
  2106. }
  2107. }
  2108. }
  2109. nn -= j;
  2110. }
  2111. out:
  2112. nvme_remove_invalid_namespaces(ctrl, prev);
  2113. free:
  2114. kfree(ns_list);
  2115. return ret;
  2116. }
  2117. static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
  2118. {
  2119. unsigned i;
  2120. for (i = 1; i <= nn; i++)
  2121. nvme_validate_ns(ctrl, i);
  2122. nvme_remove_invalid_namespaces(ctrl, nn);
  2123. }
  2124. static void nvme_scan_work(struct work_struct *work)
  2125. {
  2126. struct nvme_ctrl *ctrl =
  2127. container_of(work, struct nvme_ctrl, scan_work);
  2128. struct nvme_id_ctrl *id;
  2129. unsigned nn;
  2130. if (ctrl->state != NVME_CTRL_LIVE)
  2131. return;
  2132. if (nvme_identify_ctrl(ctrl, &id))
  2133. return;
  2134. nn = le32_to_cpu(id->nn);
  2135. if (ctrl->vs >= NVME_VS(1, 1, 0) &&
  2136. !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
  2137. if (!nvme_scan_ns_list(ctrl, nn))
  2138. goto done;
  2139. }
  2140. nvme_scan_ns_sequential(ctrl, nn);
  2141. done:
  2142. mutex_lock(&ctrl->namespaces_mutex);
  2143. list_sort(NULL, &ctrl->namespaces, ns_cmp);
  2144. mutex_unlock(&ctrl->namespaces_mutex);
  2145. kfree(id);
  2146. }
  2147. void nvme_queue_scan(struct nvme_ctrl *ctrl)
  2148. {
  2149. /*
  2150. * Do not queue new scan work when a controller is reset during
  2151. * removal.
  2152. */
  2153. if (ctrl->state == NVME_CTRL_LIVE)
  2154. queue_work(nvme_wq, &ctrl->scan_work);
  2155. }
  2156. EXPORT_SYMBOL_GPL(nvme_queue_scan);
  2157. /*
  2158. * This function iterates the namespace list unlocked to allow recovery from
  2159. * controller failure. It is up to the caller to ensure the namespace list is
  2160. * not modified by scan work while this function is executing.
  2161. */
  2162. void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
  2163. {
  2164. struct nvme_ns *ns, *next;
  2165. /*
  2166. * The dead states indicates the controller was not gracefully
  2167. * disconnected. In that case, we won't be able to flush any data while
  2168. * removing the namespaces' disks; fail all the queues now to avoid
  2169. * potentially having to clean up the failed sync later.
  2170. */
  2171. if (ctrl->state == NVME_CTRL_DEAD)
  2172. nvme_kill_queues(ctrl);
  2173. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
  2174. nvme_ns_remove(ns);
  2175. }
  2176. EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
  2177. static void nvme_async_event_work(struct work_struct *work)
  2178. {
  2179. struct nvme_ctrl *ctrl =
  2180. container_of(work, struct nvme_ctrl, async_event_work);
  2181. spin_lock_irq(&ctrl->lock);
  2182. while (ctrl->state == NVME_CTRL_LIVE && ctrl->event_limit > 0) {
  2183. int aer_idx = --ctrl->event_limit;
  2184. spin_unlock_irq(&ctrl->lock);
  2185. ctrl->ops->submit_async_event(ctrl, aer_idx);
  2186. spin_lock_irq(&ctrl->lock);
  2187. }
  2188. spin_unlock_irq(&ctrl->lock);
  2189. }
  2190. static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
  2191. {
  2192. u32 csts;
  2193. if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
  2194. return false;
  2195. if (csts == ~0)
  2196. return false;
  2197. return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
  2198. }
  2199. static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
  2200. {
  2201. struct nvme_command c = { };
  2202. struct nvme_fw_slot_info_log *log;
  2203. log = kmalloc(sizeof(*log), GFP_KERNEL);
  2204. if (!log)
  2205. return;
  2206. c.common.opcode = nvme_admin_get_log_page;
  2207. c.common.nsid = cpu_to_le32(NVME_NSID_ALL);
  2208. c.common.cdw10[0] = nvme_get_log_dw10(NVME_LOG_FW_SLOT, sizeof(*log));
  2209. if (!nvme_submit_sync_cmd(ctrl->admin_q, &c, log, sizeof(*log)))
  2210. dev_warn(ctrl->device,
  2211. "Get FW SLOT INFO log error\n");
  2212. kfree(log);
  2213. }
  2214. static void nvme_fw_act_work(struct work_struct *work)
  2215. {
  2216. struct nvme_ctrl *ctrl = container_of(work,
  2217. struct nvme_ctrl, fw_act_work);
  2218. unsigned long fw_act_timeout;
  2219. if (ctrl->mtfa)
  2220. fw_act_timeout = jiffies +
  2221. msecs_to_jiffies(ctrl->mtfa * 100);
  2222. else
  2223. fw_act_timeout = jiffies +
  2224. msecs_to_jiffies(admin_timeout * 1000);
  2225. nvme_stop_queues(ctrl);
  2226. while (nvme_ctrl_pp_status(ctrl)) {
  2227. if (time_after(jiffies, fw_act_timeout)) {
  2228. dev_warn(ctrl->device,
  2229. "Fw activation timeout, reset controller\n");
  2230. nvme_reset_ctrl(ctrl);
  2231. break;
  2232. }
  2233. msleep(100);
  2234. }
  2235. if (ctrl->state != NVME_CTRL_LIVE)
  2236. return;
  2237. nvme_start_queues(ctrl);
  2238. /* read FW slot informationi to clear the AER*/
  2239. nvme_get_fw_slot_info(ctrl);
  2240. }
  2241. void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
  2242. union nvme_result *res)
  2243. {
  2244. u32 result = le32_to_cpu(res->u32);
  2245. bool done = true;
  2246. switch (le16_to_cpu(status) >> 1) {
  2247. case NVME_SC_SUCCESS:
  2248. done = false;
  2249. /*FALLTHRU*/
  2250. case NVME_SC_ABORT_REQ:
  2251. ++ctrl->event_limit;
  2252. if (ctrl->state == NVME_CTRL_LIVE)
  2253. queue_work(nvme_wq, &ctrl->async_event_work);
  2254. break;
  2255. default:
  2256. break;
  2257. }
  2258. if (done)
  2259. return;
  2260. switch (result & 0xff07) {
  2261. case NVME_AER_NOTICE_NS_CHANGED:
  2262. dev_info(ctrl->device, "rescanning\n");
  2263. nvme_queue_scan(ctrl);
  2264. break;
  2265. case NVME_AER_NOTICE_FW_ACT_STARTING:
  2266. queue_work(nvme_wq, &ctrl->fw_act_work);
  2267. break;
  2268. default:
  2269. dev_warn(ctrl->device, "async event result %08x\n", result);
  2270. }
  2271. }
  2272. EXPORT_SYMBOL_GPL(nvme_complete_async_event);
  2273. void nvme_queue_async_events(struct nvme_ctrl *ctrl)
  2274. {
  2275. ctrl->event_limit = NVME_NR_AERS;
  2276. queue_work(nvme_wq, &ctrl->async_event_work);
  2277. }
  2278. EXPORT_SYMBOL_GPL(nvme_queue_async_events);
  2279. static DEFINE_IDA(nvme_instance_ida);
  2280. static int nvme_set_instance(struct nvme_ctrl *ctrl)
  2281. {
  2282. int instance, error;
  2283. do {
  2284. if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
  2285. return -ENODEV;
  2286. spin_lock(&dev_list_lock);
  2287. error = ida_get_new(&nvme_instance_ida, &instance);
  2288. spin_unlock(&dev_list_lock);
  2289. } while (error == -EAGAIN);
  2290. if (error)
  2291. return -ENODEV;
  2292. ctrl->instance = instance;
  2293. return 0;
  2294. }
  2295. static void nvme_release_instance(struct nvme_ctrl *ctrl)
  2296. {
  2297. spin_lock(&dev_list_lock);
  2298. ida_remove(&nvme_instance_ida, ctrl->instance);
  2299. spin_unlock(&dev_list_lock);
  2300. }
  2301. void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
  2302. {
  2303. nvme_stop_keep_alive(ctrl);
  2304. flush_work(&ctrl->async_event_work);
  2305. flush_work(&ctrl->scan_work);
  2306. cancel_work_sync(&ctrl->fw_act_work);
  2307. }
  2308. EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
  2309. void nvme_start_ctrl(struct nvme_ctrl *ctrl)
  2310. {
  2311. if (ctrl->kato)
  2312. nvme_start_keep_alive(ctrl);
  2313. if (ctrl->queue_count > 1) {
  2314. nvme_queue_scan(ctrl);
  2315. nvme_queue_async_events(ctrl);
  2316. nvme_start_queues(ctrl);
  2317. }
  2318. }
  2319. EXPORT_SYMBOL_GPL(nvme_start_ctrl);
  2320. void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
  2321. {
  2322. device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
  2323. spin_lock(&dev_list_lock);
  2324. list_del(&ctrl->node);
  2325. spin_unlock(&dev_list_lock);
  2326. }
  2327. EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
  2328. static void nvme_free_ctrl(struct kref *kref)
  2329. {
  2330. struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
  2331. put_device(ctrl->device);
  2332. nvme_release_instance(ctrl);
  2333. ida_destroy(&ctrl->ns_ida);
  2334. ctrl->ops->free_ctrl(ctrl);
  2335. }
  2336. void nvme_put_ctrl(struct nvme_ctrl *ctrl)
  2337. {
  2338. kref_put(&ctrl->kref, nvme_free_ctrl);
  2339. }
  2340. EXPORT_SYMBOL_GPL(nvme_put_ctrl);
  2341. /*
  2342. * Initialize a NVMe controller structures. This needs to be called during
  2343. * earliest initialization so that we have the initialized structured around
  2344. * during probing.
  2345. */
  2346. int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
  2347. const struct nvme_ctrl_ops *ops, unsigned long quirks)
  2348. {
  2349. int ret;
  2350. ctrl->state = NVME_CTRL_NEW;
  2351. spin_lock_init(&ctrl->lock);
  2352. INIT_LIST_HEAD(&ctrl->namespaces);
  2353. mutex_init(&ctrl->namespaces_mutex);
  2354. kref_init(&ctrl->kref);
  2355. ctrl->dev = dev;
  2356. ctrl->ops = ops;
  2357. ctrl->quirks = quirks;
  2358. INIT_WORK(&ctrl->scan_work, nvme_scan_work);
  2359. INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
  2360. INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
  2361. ret = nvme_set_instance(ctrl);
  2362. if (ret)
  2363. goto out;
  2364. ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
  2365. MKDEV(nvme_char_major, ctrl->instance),
  2366. ctrl, nvme_dev_attr_groups,
  2367. "nvme%d", ctrl->instance);
  2368. if (IS_ERR(ctrl->device)) {
  2369. ret = PTR_ERR(ctrl->device);
  2370. goto out_release_instance;
  2371. }
  2372. get_device(ctrl->device);
  2373. ida_init(&ctrl->ns_ida);
  2374. spin_lock(&dev_list_lock);
  2375. list_add_tail(&ctrl->node, &nvme_ctrl_list);
  2376. spin_unlock(&dev_list_lock);
  2377. /*
  2378. * Initialize latency tolerance controls. The sysfs files won't
  2379. * be visible to userspace unless the device actually supports APST.
  2380. */
  2381. ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
  2382. dev_pm_qos_update_user_latency_tolerance(ctrl->device,
  2383. min(default_ps_max_latency_us, (unsigned long)S32_MAX));
  2384. return 0;
  2385. out_release_instance:
  2386. nvme_release_instance(ctrl);
  2387. out:
  2388. return ret;
  2389. }
  2390. EXPORT_SYMBOL_GPL(nvme_init_ctrl);
  2391. /**
  2392. * nvme_kill_queues(): Ends all namespace queues
  2393. * @ctrl: the dead controller that needs to end
  2394. *
  2395. * Call this function when the driver determines it is unable to get the
  2396. * controller in a state capable of servicing IO.
  2397. */
  2398. void nvme_kill_queues(struct nvme_ctrl *ctrl)
  2399. {
  2400. struct nvme_ns *ns;
  2401. mutex_lock(&ctrl->namespaces_mutex);
  2402. /* Forcibly unquiesce queues to avoid blocking dispatch */
  2403. if (ctrl->admin_q)
  2404. blk_mq_unquiesce_queue(ctrl->admin_q);
  2405. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2406. /*
  2407. * Revalidating a dead namespace sets capacity to 0. This will
  2408. * end buffered writers dirtying pages that can't be synced.
  2409. */
  2410. if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
  2411. continue;
  2412. revalidate_disk(ns->disk);
  2413. blk_set_queue_dying(ns->queue);
  2414. /* Forcibly unquiesce queues to avoid blocking dispatch */
  2415. blk_mq_unquiesce_queue(ns->queue);
  2416. }
  2417. mutex_unlock(&ctrl->namespaces_mutex);
  2418. }
  2419. EXPORT_SYMBOL_GPL(nvme_kill_queues);
  2420. void nvme_unfreeze(struct nvme_ctrl *ctrl)
  2421. {
  2422. struct nvme_ns *ns;
  2423. mutex_lock(&ctrl->namespaces_mutex);
  2424. list_for_each_entry(ns, &ctrl->namespaces, list)
  2425. blk_mq_unfreeze_queue(ns->queue);
  2426. mutex_unlock(&ctrl->namespaces_mutex);
  2427. }
  2428. EXPORT_SYMBOL_GPL(nvme_unfreeze);
  2429. void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
  2430. {
  2431. struct nvme_ns *ns;
  2432. mutex_lock(&ctrl->namespaces_mutex);
  2433. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2434. timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
  2435. if (timeout <= 0)
  2436. break;
  2437. }
  2438. mutex_unlock(&ctrl->namespaces_mutex);
  2439. }
  2440. EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
  2441. void nvme_wait_freeze(struct nvme_ctrl *ctrl)
  2442. {
  2443. struct nvme_ns *ns;
  2444. mutex_lock(&ctrl->namespaces_mutex);
  2445. list_for_each_entry(ns, &ctrl->namespaces, list)
  2446. blk_mq_freeze_queue_wait(ns->queue);
  2447. mutex_unlock(&ctrl->namespaces_mutex);
  2448. }
  2449. EXPORT_SYMBOL_GPL(nvme_wait_freeze);
  2450. void nvme_start_freeze(struct nvme_ctrl *ctrl)
  2451. {
  2452. struct nvme_ns *ns;
  2453. mutex_lock(&ctrl->namespaces_mutex);
  2454. list_for_each_entry(ns, &ctrl->namespaces, list)
  2455. blk_freeze_queue_start(ns->queue);
  2456. mutex_unlock(&ctrl->namespaces_mutex);
  2457. }
  2458. EXPORT_SYMBOL_GPL(nvme_start_freeze);
  2459. void nvme_stop_queues(struct nvme_ctrl *ctrl)
  2460. {
  2461. struct nvme_ns *ns;
  2462. mutex_lock(&ctrl->namespaces_mutex);
  2463. list_for_each_entry(ns, &ctrl->namespaces, list)
  2464. blk_mq_quiesce_queue(ns->queue);
  2465. mutex_unlock(&ctrl->namespaces_mutex);
  2466. }
  2467. EXPORT_SYMBOL_GPL(nvme_stop_queues);
  2468. void nvme_start_queues(struct nvme_ctrl *ctrl)
  2469. {
  2470. struct nvme_ns *ns;
  2471. mutex_lock(&ctrl->namespaces_mutex);
  2472. list_for_each_entry(ns, &ctrl->namespaces, list)
  2473. blk_mq_unquiesce_queue(ns->queue);
  2474. mutex_unlock(&ctrl->namespaces_mutex);
  2475. }
  2476. EXPORT_SYMBOL_GPL(nvme_start_queues);
  2477. int __init nvme_core_init(void)
  2478. {
  2479. int result;
  2480. nvme_wq = alloc_workqueue("nvme-wq",
  2481. WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
  2482. if (!nvme_wq)
  2483. return -ENOMEM;
  2484. result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
  2485. &nvme_dev_fops);
  2486. if (result < 0)
  2487. goto destroy_wq;
  2488. else if (result > 0)
  2489. nvme_char_major = result;
  2490. nvme_class = class_create(THIS_MODULE, "nvme");
  2491. if (IS_ERR(nvme_class)) {
  2492. result = PTR_ERR(nvme_class);
  2493. goto unregister_chrdev;
  2494. }
  2495. return 0;
  2496. unregister_chrdev:
  2497. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2498. destroy_wq:
  2499. destroy_workqueue(nvme_wq);
  2500. return result;
  2501. }
  2502. void nvme_core_exit(void)
  2503. {
  2504. class_destroy(nvme_class);
  2505. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2506. destroy_workqueue(nvme_wq);
  2507. }
  2508. MODULE_LICENSE("GPL");
  2509. MODULE_VERSION("1.0");
  2510. module_init(nvme_core_init);
  2511. module_exit(nvme_core_exit);