region_devs.c 28 KB

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  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/scatterlist.h>
  14. #include <linux/highmem.h>
  15. #include <linux/sched.h>
  16. #include <linux/slab.h>
  17. #include <linux/hash.h>
  18. #include <linux/sort.h>
  19. #include <linux/io.h>
  20. #include <linux/nd.h>
  21. #include "nd-core.h"
  22. #include "nd.h"
  23. /*
  24. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  25. * irrelevant.
  26. */
  27. #include <linux/io-64-nonatomic-hi-lo.h>
  28. static DEFINE_IDA(region_ida);
  29. static DEFINE_PER_CPU(int, flush_idx);
  30. static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
  31. struct nd_region_data *ndrd)
  32. {
  33. int i, j;
  34. dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
  35. nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
  36. for (i = 0; i < (1 << ndrd->hints_shift); i++) {
  37. struct resource *res = &nvdimm->flush_wpq[i];
  38. unsigned long pfn = PHYS_PFN(res->start);
  39. void __iomem *flush_page;
  40. /* check if flush hints share a page */
  41. for (j = 0; j < i; j++) {
  42. struct resource *res_j = &nvdimm->flush_wpq[j];
  43. unsigned long pfn_j = PHYS_PFN(res_j->start);
  44. if (pfn == pfn_j)
  45. break;
  46. }
  47. if (j < i)
  48. flush_page = (void __iomem *) ((unsigned long)
  49. ndrd_get_flush_wpq(ndrd, dimm, j)
  50. & PAGE_MASK);
  51. else
  52. flush_page = devm_nvdimm_ioremap(dev,
  53. PFN_PHYS(pfn), PAGE_SIZE);
  54. if (!flush_page)
  55. return -ENXIO;
  56. ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
  57. + (res->start & ~PAGE_MASK));
  58. }
  59. return 0;
  60. }
  61. int nd_region_activate(struct nd_region *nd_region)
  62. {
  63. int i, j, num_flush = 0;
  64. struct nd_region_data *ndrd;
  65. struct device *dev = &nd_region->dev;
  66. size_t flush_data_size = sizeof(void *);
  67. nvdimm_bus_lock(&nd_region->dev);
  68. for (i = 0; i < nd_region->ndr_mappings; i++) {
  69. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  70. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  71. /* at least one null hint slot per-dimm for the "no-hint" case */
  72. flush_data_size += sizeof(void *);
  73. num_flush = min_not_zero(num_flush, nvdimm->num_flush);
  74. if (!nvdimm->num_flush)
  75. continue;
  76. flush_data_size += nvdimm->num_flush * sizeof(void *);
  77. }
  78. nvdimm_bus_unlock(&nd_region->dev);
  79. ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
  80. if (!ndrd)
  81. return -ENOMEM;
  82. dev_set_drvdata(dev, ndrd);
  83. if (!num_flush)
  84. return 0;
  85. ndrd->hints_shift = ilog2(num_flush);
  86. for (i = 0; i < nd_region->ndr_mappings; i++) {
  87. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  88. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  89. int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
  90. if (rc)
  91. return rc;
  92. }
  93. /*
  94. * Clear out entries that are duplicates. This should prevent the
  95. * extra flushings.
  96. */
  97. for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
  98. /* ignore if NULL already */
  99. if (!ndrd_get_flush_wpq(ndrd, i, 0))
  100. continue;
  101. for (j = i + 1; j < nd_region->ndr_mappings; j++)
  102. if (ndrd_get_flush_wpq(ndrd, i, 0) ==
  103. ndrd_get_flush_wpq(ndrd, j, 0))
  104. ndrd_set_flush_wpq(ndrd, j, 0, NULL);
  105. }
  106. return 0;
  107. }
  108. static void nd_region_release(struct device *dev)
  109. {
  110. struct nd_region *nd_region = to_nd_region(dev);
  111. u16 i;
  112. for (i = 0; i < nd_region->ndr_mappings; i++) {
  113. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  114. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  115. put_device(&nvdimm->dev);
  116. }
  117. free_percpu(nd_region->lane);
  118. ida_simple_remove(&region_ida, nd_region->id);
  119. if (is_nd_blk(dev))
  120. kfree(to_nd_blk_region(dev));
  121. else
  122. kfree(nd_region);
  123. }
  124. static struct device_type nd_blk_device_type = {
  125. .name = "nd_blk",
  126. .release = nd_region_release,
  127. };
  128. static struct device_type nd_pmem_device_type = {
  129. .name = "nd_pmem",
  130. .release = nd_region_release,
  131. };
  132. static struct device_type nd_volatile_device_type = {
  133. .name = "nd_volatile",
  134. .release = nd_region_release,
  135. };
  136. bool is_nd_pmem(struct device *dev)
  137. {
  138. return dev ? dev->type == &nd_pmem_device_type : false;
  139. }
  140. bool is_nd_blk(struct device *dev)
  141. {
  142. return dev ? dev->type == &nd_blk_device_type : false;
  143. }
  144. bool is_nd_volatile(struct device *dev)
  145. {
  146. return dev ? dev->type == &nd_volatile_device_type : false;
  147. }
  148. struct nd_region *to_nd_region(struct device *dev)
  149. {
  150. struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
  151. WARN_ON(dev->type->release != nd_region_release);
  152. return nd_region;
  153. }
  154. EXPORT_SYMBOL_GPL(to_nd_region);
  155. struct nd_blk_region *to_nd_blk_region(struct device *dev)
  156. {
  157. struct nd_region *nd_region = to_nd_region(dev);
  158. WARN_ON(!is_nd_blk(dev));
  159. return container_of(nd_region, struct nd_blk_region, nd_region);
  160. }
  161. EXPORT_SYMBOL_GPL(to_nd_blk_region);
  162. void *nd_region_provider_data(struct nd_region *nd_region)
  163. {
  164. return nd_region->provider_data;
  165. }
  166. EXPORT_SYMBOL_GPL(nd_region_provider_data);
  167. void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
  168. {
  169. return ndbr->blk_provider_data;
  170. }
  171. EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
  172. void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
  173. {
  174. ndbr->blk_provider_data = data;
  175. }
  176. EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
  177. /**
  178. * nd_region_to_nstype() - region to an integer namespace type
  179. * @nd_region: region-device to interrogate
  180. *
  181. * This is the 'nstype' attribute of a region as well, an input to the
  182. * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
  183. * namespace devices with namespace drivers.
  184. */
  185. int nd_region_to_nstype(struct nd_region *nd_region)
  186. {
  187. if (is_memory(&nd_region->dev)) {
  188. u16 i, alias;
  189. for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
  190. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  191. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  192. if (test_bit(NDD_ALIASING, &nvdimm->flags))
  193. alias++;
  194. }
  195. if (alias)
  196. return ND_DEVICE_NAMESPACE_PMEM;
  197. else
  198. return ND_DEVICE_NAMESPACE_IO;
  199. } else if (is_nd_blk(&nd_region->dev)) {
  200. return ND_DEVICE_NAMESPACE_BLK;
  201. }
  202. return 0;
  203. }
  204. EXPORT_SYMBOL(nd_region_to_nstype);
  205. static ssize_t size_show(struct device *dev,
  206. struct device_attribute *attr, char *buf)
  207. {
  208. struct nd_region *nd_region = to_nd_region(dev);
  209. unsigned long long size = 0;
  210. if (is_memory(dev)) {
  211. size = nd_region->ndr_size;
  212. } else if (nd_region->ndr_mappings == 1) {
  213. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  214. size = nd_mapping->size;
  215. }
  216. return sprintf(buf, "%llu\n", size);
  217. }
  218. static DEVICE_ATTR_RO(size);
  219. static ssize_t deep_flush_show(struct device *dev,
  220. struct device_attribute *attr, char *buf)
  221. {
  222. struct nd_region *nd_region = to_nd_region(dev);
  223. /*
  224. * NOTE: in the nvdimm_has_flush() error case this attribute is
  225. * not visible.
  226. */
  227. return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
  228. }
  229. static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
  230. const char *buf, size_t len)
  231. {
  232. bool flush;
  233. int rc = strtobool(buf, &flush);
  234. struct nd_region *nd_region = to_nd_region(dev);
  235. if (rc)
  236. return rc;
  237. if (!flush)
  238. return -EINVAL;
  239. nvdimm_flush(nd_region);
  240. return len;
  241. }
  242. static DEVICE_ATTR_RW(deep_flush);
  243. static ssize_t mappings_show(struct device *dev,
  244. struct device_attribute *attr, char *buf)
  245. {
  246. struct nd_region *nd_region = to_nd_region(dev);
  247. return sprintf(buf, "%d\n", nd_region->ndr_mappings);
  248. }
  249. static DEVICE_ATTR_RO(mappings);
  250. static ssize_t nstype_show(struct device *dev,
  251. struct device_attribute *attr, char *buf)
  252. {
  253. struct nd_region *nd_region = to_nd_region(dev);
  254. return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
  255. }
  256. static DEVICE_ATTR_RO(nstype);
  257. static ssize_t set_cookie_show(struct device *dev,
  258. struct device_attribute *attr, char *buf)
  259. {
  260. struct nd_region *nd_region = to_nd_region(dev);
  261. struct nd_interleave_set *nd_set = nd_region->nd_set;
  262. ssize_t rc = 0;
  263. if (is_memory(dev) && nd_set)
  264. /* pass, should be precluded by region_visible */;
  265. else
  266. return -ENXIO;
  267. /*
  268. * The cookie to show depends on which specification of the
  269. * labels we are using. If there are not labels then default to
  270. * the v1.1 namespace label cookie definition. To read all this
  271. * data we need to wait for probing to settle.
  272. */
  273. device_lock(dev);
  274. nvdimm_bus_lock(dev);
  275. wait_nvdimm_bus_probe_idle(dev);
  276. if (nd_region->ndr_mappings) {
  277. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  278. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  279. if (ndd) {
  280. struct nd_namespace_index *nsindex;
  281. nsindex = to_namespace_index(ndd, ndd->ns_current);
  282. rc = sprintf(buf, "%#llx\n",
  283. nd_region_interleave_set_cookie(nd_region,
  284. nsindex));
  285. }
  286. }
  287. nvdimm_bus_unlock(dev);
  288. device_unlock(dev);
  289. if (rc)
  290. return rc;
  291. return sprintf(buf, "%#llx\n", nd_set->cookie1);
  292. }
  293. static DEVICE_ATTR_RO(set_cookie);
  294. resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
  295. {
  296. resource_size_t blk_max_overlap = 0, available, overlap;
  297. int i;
  298. WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
  299. retry:
  300. available = 0;
  301. overlap = blk_max_overlap;
  302. for (i = 0; i < nd_region->ndr_mappings; i++) {
  303. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  304. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  305. /* if a dimm is disabled the available capacity is zero */
  306. if (!ndd)
  307. return 0;
  308. if (is_memory(&nd_region->dev)) {
  309. available += nd_pmem_available_dpa(nd_region,
  310. nd_mapping, &overlap);
  311. if (overlap > blk_max_overlap) {
  312. blk_max_overlap = overlap;
  313. goto retry;
  314. }
  315. } else if (is_nd_blk(&nd_region->dev))
  316. available += nd_blk_available_dpa(nd_region);
  317. }
  318. return available;
  319. }
  320. static ssize_t available_size_show(struct device *dev,
  321. struct device_attribute *attr, char *buf)
  322. {
  323. struct nd_region *nd_region = to_nd_region(dev);
  324. unsigned long long available = 0;
  325. /*
  326. * Flush in-flight updates and grab a snapshot of the available
  327. * size. Of course, this value is potentially invalidated the
  328. * memory nvdimm_bus_lock() is dropped, but that's userspace's
  329. * problem to not race itself.
  330. */
  331. nvdimm_bus_lock(dev);
  332. wait_nvdimm_bus_probe_idle(dev);
  333. available = nd_region_available_dpa(nd_region);
  334. nvdimm_bus_unlock(dev);
  335. return sprintf(buf, "%llu\n", available);
  336. }
  337. static DEVICE_ATTR_RO(available_size);
  338. static ssize_t init_namespaces_show(struct device *dev,
  339. struct device_attribute *attr, char *buf)
  340. {
  341. struct nd_region_data *ndrd = dev_get_drvdata(dev);
  342. ssize_t rc;
  343. nvdimm_bus_lock(dev);
  344. if (ndrd)
  345. rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
  346. else
  347. rc = -ENXIO;
  348. nvdimm_bus_unlock(dev);
  349. return rc;
  350. }
  351. static DEVICE_ATTR_RO(init_namespaces);
  352. static ssize_t namespace_seed_show(struct device *dev,
  353. struct device_attribute *attr, char *buf)
  354. {
  355. struct nd_region *nd_region = to_nd_region(dev);
  356. ssize_t rc;
  357. nvdimm_bus_lock(dev);
  358. if (nd_region->ns_seed)
  359. rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
  360. else
  361. rc = sprintf(buf, "\n");
  362. nvdimm_bus_unlock(dev);
  363. return rc;
  364. }
  365. static DEVICE_ATTR_RO(namespace_seed);
  366. static ssize_t btt_seed_show(struct device *dev,
  367. struct device_attribute *attr, char *buf)
  368. {
  369. struct nd_region *nd_region = to_nd_region(dev);
  370. ssize_t rc;
  371. nvdimm_bus_lock(dev);
  372. if (nd_region->btt_seed)
  373. rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
  374. else
  375. rc = sprintf(buf, "\n");
  376. nvdimm_bus_unlock(dev);
  377. return rc;
  378. }
  379. static DEVICE_ATTR_RO(btt_seed);
  380. static ssize_t pfn_seed_show(struct device *dev,
  381. struct device_attribute *attr, char *buf)
  382. {
  383. struct nd_region *nd_region = to_nd_region(dev);
  384. ssize_t rc;
  385. nvdimm_bus_lock(dev);
  386. if (nd_region->pfn_seed)
  387. rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
  388. else
  389. rc = sprintf(buf, "\n");
  390. nvdimm_bus_unlock(dev);
  391. return rc;
  392. }
  393. static DEVICE_ATTR_RO(pfn_seed);
  394. static ssize_t dax_seed_show(struct device *dev,
  395. struct device_attribute *attr, char *buf)
  396. {
  397. struct nd_region *nd_region = to_nd_region(dev);
  398. ssize_t rc;
  399. nvdimm_bus_lock(dev);
  400. if (nd_region->dax_seed)
  401. rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
  402. else
  403. rc = sprintf(buf, "\n");
  404. nvdimm_bus_unlock(dev);
  405. return rc;
  406. }
  407. static DEVICE_ATTR_RO(dax_seed);
  408. static ssize_t read_only_show(struct device *dev,
  409. struct device_attribute *attr, char *buf)
  410. {
  411. struct nd_region *nd_region = to_nd_region(dev);
  412. return sprintf(buf, "%d\n", nd_region->ro);
  413. }
  414. static ssize_t read_only_store(struct device *dev,
  415. struct device_attribute *attr, const char *buf, size_t len)
  416. {
  417. bool ro;
  418. int rc = strtobool(buf, &ro);
  419. struct nd_region *nd_region = to_nd_region(dev);
  420. if (rc)
  421. return rc;
  422. nd_region->ro = ro;
  423. return len;
  424. }
  425. static DEVICE_ATTR_RW(read_only);
  426. static ssize_t region_badblocks_show(struct device *dev,
  427. struct device_attribute *attr, char *buf)
  428. {
  429. struct nd_region *nd_region = to_nd_region(dev);
  430. return badblocks_show(&nd_region->bb, buf, 0);
  431. }
  432. static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
  433. static ssize_t resource_show(struct device *dev,
  434. struct device_attribute *attr, char *buf)
  435. {
  436. struct nd_region *nd_region = to_nd_region(dev);
  437. return sprintf(buf, "%#llx\n", nd_region->ndr_start);
  438. }
  439. static DEVICE_ATTR_RO(resource);
  440. static struct attribute *nd_region_attributes[] = {
  441. &dev_attr_size.attr,
  442. &dev_attr_nstype.attr,
  443. &dev_attr_mappings.attr,
  444. &dev_attr_btt_seed.attr,
  445. &dev_attr_pfn_seed.attr,
  446. &dev_attr_dax_seed.attr,
  447. &dev_attr_deep_flush.attr,
  448. &dev_attr_read_only.attr,
  449. &dev_attr_set_cookie.attr,
  450. &dev_attr_available_size.attr,
  451. &dev_attr_namespace_seed.attr,
  452. &dev_attr_init_namespaces.attr,
  453. &dev_attr_badblocks.attr,
  454. &dev_attr_resource.attr,
  455. NULL,
  456. };
  457. static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
  458. {
  459. struct device *dev = container_of(kobj, typeof(*dev), kobj);
  460. struct nd_region *nd_region = to_nd_region(dev);
  461. struct nd_interleave_set *nd_set = nd_region->nd_set;
  462. int type = nd_region_to_nstype(nd_region);
  463. if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
  464. return 0;
  465. if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
  466. return 0;
  467. if (!is_nd_pmem(dev) && a == &dev_attr_badblocks.attr)
  468. return 0;
  469. if (!is_nd_pmem(dev) && a == &dev_attr_resource.attr)
  470. return 0;
  471. if (a == &dev_attr_deep_flush.attr) {
  472. int has_flush = nvdimm_has_flush(nd_region);
  473. if (has_flush == 1)
  474. return a->mode;
  475. else if (has_flush == 0)
  476. return 0444;
  477. else
  478. return 0;
  479. }
  480. if (a != &dev_attr_set_cookie.attr
  481. && a != &dev_attr_available_size.attr)
  482. return a->mode;
  483. if ((type == ND_DEVICE_NAMESPACE_PMEM
  484. || type == ND_DEVICE_NAMESPACE_BLK)
  485. && a == &dev_attr_available_size.attr)
  486. return a->mode;
  487. else if (is_memory(dev) && nd_set)
  488. return a->mode;
  489. return 0;
  490. }
  491. struct attribute_group nd_region_attribute_group = {
  492. .attrs = nd_region_attributes,
  493. .is_visible = region_visible,
  494. };
  495. EXPORT_SYMBOL_GPL(nd_region_attribute_group);
  496. u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
  497. struct nd_namespace_index *nsindex)
  498. {
  499. struct nd_interleave_set *nd_set = nd_region->nd_set;
  500. if (!nd_set)
  501. return 0;
  502. if (nsindex && __le16_to_cpu(nsindex->major) == 1
  503. && __le16_to_cpu(nsindex->minor) == 1)
  504. return nd_set->cookie1;
  505. return nd_set->cookie2;
  506. }
  507. u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
  508. {
  509. struct nd_interleave_set *nd_set = nd_region->nd_set;
  510. if (nd_set)
  511. return nd_set->altcookie;
  512. return 0;
  513. }
  514. void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
  515. {
  516. struct nd_label_ent *label_ent, *e;
  517. lockdep_assert_held(&nd_mapping->lock);
  518. list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
  519. list_del(&label_ent->list);
  520. kfree(label_ent);
  521. }
  522. }
  523. /*
  524. * Upon successful probe/remove, take/release a reference on the
  525. * associated interleave set (if present), and plant new btt + namespace
  526. * seeds. Also, on the removal of a BLK region, notify the provider to
  527. * disable the region.
  528. */
  529. static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus,
  530. struct device *dev, bool probe)
  531. {
  532. struct nd_region *nd_region;
  533. if (!probe && is_nd_region(dev)) {
  534. int i;
  535. nd_region = to_nd_region(dev);
  536. for (i = 0; i < nd_region->ndr_mappings; i++) {
  537. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  538. struct nvdimm_drvdata *ndd = nd_mapping->ndd;
  539. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  540. mutex_lock(&nd_mapping->lock);
  541. nd_mapping_free_labels(nd_mapping);
  542. mutex_unlock(&nd_mapping->lock);
  543. put_ndd(ndd);
  544. nd_mapping->ndd = NULL;
  545. if (ndd)
  546. atomic_dec(&nvdimm->busy);
  547. }
  548. }
  549. if (dev->parent && is_nd_region(dev->parent) && probe) {
  550. nd_region = to_nd_region(dev->parent);
  551. nvdimm_bus_lock(dev);
  552. if (nd_region->ns_seed == dev)
  553. nd_region_create_ns_seed(nd_region);
  554. nvdimm_bus_unlock(dev);
  555. }
  556. if (is_nd_btt(dev) && probe) {
  557. struct nd_btt *nd_btt = to_nd_btt(dev);
  558. nd_region = to_nd_region(dev->parent);
  559. nvdimm_bus_lock(dev);
  560. if (nd_region->btt_seed == dev)
  561. nd_region_create_btt_seed(nd_region);
  562. if (nd_region->ns_seed == &nd_btt->ndns->dev)
  563. nd_region_create_ns_seed(nd_region);
  564. nvdimm_bus_unlock(dev);
  565. }
  566. if (is_nd_pfn(dev) && probe) {
  567. struct nd_pfn *nd_pfn = to_nd_pfn(dev);
  568. nd_region = to_nd_region(dev->parent);
  569. nvdimm_bus_lock(dev);
  570. if (nd_region->pfn_seed == dev)
  571. nd_region_create_pfn_seed(nd_region);
  572. if (nd_region->ns_seed == &nd_pfn->ndns->dev)
  573. nd_region_create_ns_seed(nd_region);
  574. nvdimm_bus_unlock(dev);
  575. }
  576. if (is_nd_dax(dev) && probe) {
  577. struct nd_dax *nd_dax = to_nd_dax(dev);
  578. nd_region = to_nd_region(dev->parent);
  579. nvdimm_bus_lock(dev);
  580. if (nd_region->dax_seed == dev)
  581. nd_region_create_dax_seed(nd_region);
  582. if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
  583. nd_region_create_ns_seed(nd_region);
  584. nvdimm_bus_unlock(dev);
  585. }
  586. }
  587. void nd_region_probe_success(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  588. {
  589. nd_region_notify_driver_action(nvdimm_bus, dev, true);
  590. }
  591. void nd_region_disable(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  592. {
  593. nd_region_notify_driver_action(nvdimm_bus, dev, false);
  594. }
  595. static ssize_t mappingN(struct device *dev, char *buf, int n)
  596. {
  597. struct nd_region *nd_region = to_nd_region(dev);
  598. struct nd_mapping *nd_mapping;
  599. struct nvdimm *nvdimm;
  600. if (n >= nd_region->ndr_mappings)
  601. return -ENXIO;
  602. nd_mapping = &nd_region->mapping[n];
  603. nvdimm = nd_mapping->nvdimm;
  604. return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
  605. nd_mapping->start, nd_mapping->size,
  606. nd_mapping->position);
  607. }
  608. #define REGION_MAPPING(idx) \
  609. static ssize_t mapping##idx##_show(struct device *dev, \
  610. struct device_attribute *attr, char *buf) \
  611. { \
  612. return mappingN(dev, buf, idx); \
  613. } \
  614. static DEVICE_ATTR_RO(mapping##idx)
  615. /*
  616. * 32 should be enough for a while, even in the presence of socket
  617. * interleave a 32-way interleave set is a degenerate case.
  618. */
  619. REGION_MAPPING(0);
  620. REGION_MAPPING(1);
  621. REGION_MAPPING(2);
  622. REGION_MAPPING(3);
  623. REGION_MAPPING(4);
  624. REGION_MAPPING(5);
  625. REGION_MAPPING(6);
  626. REGION_MAPPING(7);
  627. REGION_MAPPING(8);
  628. REGION_MAPPING(9);
  629. REGION_MAPPING(10);
  630. REGION_MAPPING(11);
  631. REGION_MAPPING(12);
  632. REGION_MAPPING(13);
  633. REGION_MAPPING(14);
  634. REGION_MAPPING(15);
  635. REGION_MAPPING(16);
  636. REGION_MAPPING(17);
  637. REGION_MAPPING(18);
  638. REGION_MAPPING(19);
  639. REGION_MAPPING(20);
  640. REGION_MAPPING(21);
  641. REGION_MAPPING(22);
  642. REGION_MAPPING(23);
  643. REGION_MAPPING(24);
  644. REGION_MAPPING(25);
  645. REGION_MAPPING(26);
  646. REGION_MAPPING(27);
  647. REGION_MAPPING(28);
  648. REGION_MAPPING(29);
  649. REGION_MAPPING(30);
  650. REGION_MAPPING(31);
  651. static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
  652. {
  653. struct device *dev = container_of(kobj, struct device, kobj);
  654. struct nd_region *nd_region = to_nd_region(dev);
  655. if (n < nd_region->ndr_mappings)
  656. return a->mode;
  657. return 0;
  658. }
  659. static struct attribute *mapping_attributes[] = {
  660. &dev_attr_mapping0.attr,
  661. &dev_attr_mapping1.attr,
  662. &dev_attr_mapping2.attr,
  663. &dev_attr_mapping3.attr,
  664. &dev_attr_mapping4.attr,
  665. &dev_attr_mapping5.attr,
  666. &dev_attr_mapping6.attr,
  667. &dev_attr_mapping7.attr,
  668. &dev_attr_mapping8.attr,
  669. &dev_attr_mapping9.attr,
  670. &dev_attr_mapping10.attr,
  671. &dev_attr_mapping11.attr,
  672. &dev_attr_mapping12.attr,
  673. &dev_attr_mapping13.attr,
  674. &dev_attr_mapping14.attr,
  675. &dev_attr_mapping15.attr,
  676. &dev_attr_mapping16.attr,
  677. &dev_attr_mapping17.attr,
  678. &dev_attr_mapping18.attr,
  679. &dev_attr_mapping19.attr,
  680. &dev_attr_mapping20.attr,
  681. &dev_attr_mapping21.attr,
  682. &dev_attr_mapping22.attr,
  683. &dev_attr_mapping23.attr,
  684. &dev_attr_mapping24.attr,
  685. &dev_attr_mapping25.attr,
  686. &dev_attr_mapping26.attr,
  687. &dev_attr_mapping27.attr,
  688. &dev_attr_mapping28.attr,
  689. &dev_attr_mapping29.attr,
  690. &dev_attr_mapping30.attr,
  691. &dev_attr_mapping31.attr,
  692. NULL,
  693. };
  694. struct attribute_group nd_mapping_attribute_group = {
  695. .is_visible = mapping_visible,
  696. .attrs = mapping_attributes,
  697. };
  698. EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
  699. int nd_blk_region_init(struct nd_region *nd_region)
  700. {
  701. struct device *dev = &nd_region->dev;
  702. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
  703. if (!is_nd_blk(dev))
  704. return 0;
  705. if (nd_region->ndr_mappings < 1) {
  706. dev_dbg(dev, "invalid BLK region\n");
  707. return -ENXIO;
  708. }
  709. return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
  710. }
  711. /**
  712. * nd_region_acquire_lane - allocate and lock a lane
  713. * @nd_region: region id and number of lanes possible
  714. *
  715. * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
  716. * We optimize for the common case where there are 256 lanes, one
  717. * per-cpu. For larger systems we need to lock to share lanes. For now
  718. * this implementation assumes the cost of maintaining an allocator for
  719. * free lanes is on the order of the lock hold time, so it implements a
  720. * static lane = cpu % num_lanes mapping.
  721. *
  722. * In the case of a BTT instance on top of a BLK namespace a lane may be
  723. * acquired recursively. We lock on the first instance.
  724. *
  725. * In the case of a BTT instance on top of PMEM, we only acquire a lane
  726. * for the BTT metadata updates.
  727. */
  728. unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
  729. {
  730. unsigned int cpu, lane;
  731. cpu = get_cpu();
  732. if (nd_region->num_lanes < nr_cpu_ids) {
  733. struct nd_percpu_lane *ndl_lock, *ndl_count;
  734. lane = cpu % nd_region->num_lanes;
  735. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  736. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  737. if (ndl_count->count++ == 0)
  738. spin_lock(&ndl_lock->lock);
  739. } else
  740. lane = cpu;
  741. return lane;
  742. }
  743. EXPORT_SYMBOL(nd_region_acquire_lane);
  744. void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
  745. {
  746. if (nd_region->num_lanes < nr_cpu_ids) {
  747. unsigned int cpu = get_cpu();
  748. struct nd_percpu_lane *ndl_lock, *ndl_count;
  749. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  750. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  751. if (--ndl_count->count == 0)
  752. spin_unlock(&ndl_lock->lock);
  753. put_cpu();
  754. }
  755. put_cpu();
  756. }
  757. EXPORT_SYMBOL(nd_region_release_lane);
  758. static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
  759. struct nd_region_desc *ndr_desc, struct device_type *dev_type,
  760. const char *caller)
  761. {
  762. struct nd_region *nd_region;
  763. struct device *dev;
  764. void *region_buf;
  765. unsigned int i;
  766. int ro = 0;
  767. for (i = 0; i < ndr_desc->num_mappings; i++) {
  768. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  769. struct nvdimm *nvdimm = mapping->nvdimm;
  770. if ((mapping->start | mapping->size) % SZ_4K) {
  771. dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not 4K aligned\n",
  772. caller, dev_name(&nvdimm->dev), i);
  773. return NULL;
  774. }
  775. if (test_bit(NDD_UNARMED, &nvdimm->flags))
  776. ro = 1;
  777. }
  778. if (dev_type == &nd_blk_device_type) {
  779. struct nd_blk_region_desc *ndbr_desc;
  780. struct nd_blk_region *ndbr;
  781. ndbr_desc = to_blk_region_desc(ndr_desc);
  782. ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
  783. * ndr_desc->num_mappings,
  784. GFP_KERNEL);
  785. if (ndbr) {
  786. nd_region = &ndbr->nd_region;
  787. ndbr->enable = ndbr_desc->enable;
  788. ndbr->do_io = ndbr_desc->do_io;
  789. }
  790. region_buf = ndbr;
  791. } else {
  792. nd_region = kzalloc(sizeof(struct nd_region)
  793. + sizeof(struct nd_mapping)
  794. * ndr_desc->num_mappings,
  795. GFP_KERNEL);
  796. region_buf = nd_region;
  797. }
  798. if (!region_buf)
  799. return NULL;
  800. nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
  801. if (nd_region->id < 0)
  802. goto err_id;
  803. nd_region->lane = alloc_percpu(struct nd_percpu_lane);
  804. if (!nd_region->lane)
  805. goto err_percpu;
  806. for (i = 0; i < nr_cpu_ids; i++) {
  807. struct nd_percpu_lane *ndl;
  808. ndl = per_cpu_ptr(nd_region->lane, i);
  809. spin_lock_init(&ndl->lock);
  810. ndl->count = 0;
  811. }
  812. for (i = 0; i < ndr_desc->num_mappings; i++) {
  813. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  814. struct nvdimm *nvdimm = mapping->nvdimm;
  815. nd_region->mapping[i].nvdimm = nvdimm;
  816. nd_region->mapping[i].start = mapping->start;
  817. nd_region->mapping[i].size = mapping->size;
  818. nd_region->mapping[i].position = mapping->position;
  819. INIT_LIST_HEAD(&nd_region->mapping[i].labels);
  820. mutex_init(&nd_region->mapping[i].lock);
  821. get_device(&nvdimm->dev);
  822. }
  823. nd_region->ndr_mappings = ndr_desc->num_mappings;
  824. nd_region->provider_data = ndr_desc->provider_data;
  825. nd_region->nd_set = ndr_desc->nd_set;
  826. nd_region->num_lanes = ndr_desc->num_lanes;
  827. nd_region->flags = ndr_desc->flags;
  828. nd_region->ro = ro;
  829. nd_region->numa_node = ndr_desc->numa_node;
  830. ida_init(&nd_region->ns_ida);
  831. ida_init(&nd_region->btt_ida);
  832. ida_init(&nd_region->pfn_ida);
  833. ida_init(&nd_region->dax_ida);
  834. dev = &nd_region->dev;
  835. dev_set_name(dev, "region%d", nd_region->id);
  836. dev->parent = &nvdimm_bus->dev;
  837. dev->type = dev_type;
  838. dev->groups = ndr_desc->attr_groups;
  839. nd_region->ndr_size = resource_size(ndr_desc->res);
  840. nd_region->ndr_start = ndr_desc->res->start;
  841. nd_device_register(dev);
  842. return nd_region;
  843. err_percpu:
  844. ida_simple_remove(&region_ida, nd_region->id);
  845. err_id:
  846. kfree(region_buf);
  847. return NULL;
  848. }
  849. struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
  850. struct nd_region_desc *ndr_desc)
  851. {
  852. ndr_desc->num_lanes = ND_MAX_LANES;
  853. return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
  854. __func__);
  855. }
  856. EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
  857. struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
  858. struct nd_region_desc *ndr_desc)
  859. {
  860. if (ndr_desc->num_mappings > 1)
  861. return NULL;
  862. ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
  863. return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
  864. __func__);
  865. }
  866. EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
  867. struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
  868. struct nd_region_desc *ndr_desc)
  869. {
  870. ndr_desc->num_lanes = ND_MAX_LANES;
  871. return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
  872. __func__);
  873. }
  874. EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
  875. /**
  876. * nvdimm_flush - flush any posted write queues between the cpu and pmem media
  877. * @nd_region: blk or interleaved pmem region
  878. */
  879. void nvdimm_flush(struct nd_region *nd_region)
  880. {
  881. struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
  882. int i, idx;
  883. /*
  884. * Try to encourage some diversity in flush hint addresses
  885. * across cpus assuming a limited number of flush hints.
  886. */
  887. idx = this_cpu_read(flush_idx);
  888. idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
  889. /*
  890. * The first wmb() is needed to 'sfence' all previous writes
  891. * such that they are architecturally visible for the platform
  892. * buffer flush. Note that we've already arranged for pmem
  893. * writes to avoid the cache via memcpy_flushcache(). The final
  894. * wmb() ensures ordering for the NVDIMM flush write.
  895. */
  896. wmb();
  897. for (i = 0; i < nd_region->ndr_mappings; i++)
  898. if (ndrd_get_flush_wpq(ndrd, i, 0))
  899. writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
  900. wmb();
  901. }
  902. EXPORT_SYMBOL_GPL(nvdimm_flush);
  903. /**
  904. * nvdimm_has_flush - determine write flushing requirements
  905. * @nd_region: blk or interleaved pmem region
  906. *
  907. * Returns 1 if writes require flushing
  908. * Returns 0 if writes do not require flushing
  909. * Returns -ENXIO if flushing capability can not be determined
  910. */
  911. int nvdimm_has_flush(struct nd_region *nd_region)
  912. {
  913. int i;
  914. /* no nvdimm or pmem api == flushing capability unknown */
  915. if (nd_region->ndr_mappings == 0
  916. || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
  917. return -ENXIO;
  918. for (i = 0; i < nd_region->ndr_mappings; i++) {
  919. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  920. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  921. /* flush hints present / available */
  922. if (nvdimm->num_flush)
  923. return 1;
  924. }
  925. /*
  926. * The platform defines dimm devices without hints, assume
  927. * platform persistence mechanism like ADR
  928. */
  929. return 0;
  930. }
  931. EXPORT_SYMBOL_GPL(nvdimm_has_flush);
  932. int nvdimm_has_cache(struct nd_region *nd_region)
  933. {
  934. return is_nd_pmem(&nd_region->dev);
  935. }
  936. EXPORT_SYMBOL_GPL(nvdimm_has_cache);
  937. void __exit nd_region_devs_exit(void)
  938. {
  939. ida_destroy(&region_ida);
  940. }