htc_drv_init.c 26 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  17. #include "htc.h"
  18. MODULE_AUTHOR("Atheros Communications");
  19. MODULE_LICENSE("Dual BSD/GPL");
  20. MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
  21. static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
  22. module_param_named(debug, ath9k_debug, uint, 0);
  23. MODULE_PARM_DESC(debug, "Debugging mask");
  24. int htc_modparam_nohwcrypt;
  25. module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
  26. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
  27. static int ath9k_htc_btcoex_enable;
  28. module_param_named(btcoex_enable, ath9k_htc_btcoex_enable, int, 0444);
  29. MODULE_PARM_DESC(btcoex_enable, "Enable wifi-BT coexistence");
  30. static int ath9k_ps_enable;
  31. module_param_named(ps_enable, ath9k_ps_enable, int, 0444);
  32. MODULE_PARM_DESC(ps_enable, "Enable WLAN PowerSave");
  33. int htc_use_dev_fw = 0;
  34. module_param_named(use_dev_fw, htc_use_dev_fw, int, 0444);
  35. MODULE_PARM_DESC(use_dev_fw, "Use development FW version");
  36. #ifdef CONFIG_MAC80211_LEDS
  37. int ath9k_htc_led_blink = 1;
  38. module_param_named(blink, ath9k_htc_led_blink, int, 0444);
  39. MODULE_PARM_DESC(blink, "Enable LED blink on activity");
  40. static const struct ieee80211_tpt_blink ath9k_htc_tpt_blink[] = {
  41. { .throughput = 0 * 1024, .blink_time = 334 },
  42. { .throughput = 1 * 1024, .blink_time = 260 },
  43. { .throughput = 5 * 1024, .blink_time = 220 },
  44. { .throughput = 10 * 1024, .blink_time = 190 },
  45. { .throughput = 20 * 1024, .blink_time = 170 },
  46. { .throughput = 50 * 1024, .blink_time = 150 },
  47. { .throughput = 70 * 1024, .blink_time = 130 },
  48. { .throughput = 100 * 1024, .blink_time = 110 },
  49. { .throughput = 200 * 1024, .blink_time = 80 },
  50. { .throughput = 300 * 1024, .blink_time = 50 },
  51. };
  52. #endif
  53. static void ath9k_htc_op_ps_wakeup(struct ath_common *common)
  54. {
  55. ath9k_htc_ps_wakeup((struct ath9k_htc_priv *) common->priv);
  56. }
  57. static void ath9k_htc_op_ps_restore(struct ath_common *common)
  58. {
  59. ath9k_htc_ps_restore((struct ath9k_htc_priv *) common->priv);
  60. }
  61. static const struct ath_ps_ops ath9k_htc_ps_ops = {
  62. .wakeup = ath9k_htc_op_ps_wakeup,
  63. .restore = ath9k_htc_op_ps_restore,
  64. };
  65. static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
  66. {
  67. unsigned long time_left;
  68. if (atomic_read(&priv->htc->tgt_ready) > 0) {
  69. atomic_dec(&priv->htc->tgt_ready);
  70. return 0;
  71. }
  72. /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
  73. time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
  74. if (!time_left) {
  75. dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
  76. return -ETIMEDOUT;
  77. }
  78. atomic_dec(&priv->htc->tgt_ready);
  79. return 0;
  80. }
  81. static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
  82. {
  83. ath9k_hw_deinit(priv->ah);
  84. kfree(priv->ah);
  85. priv->ah = NULL;
  86. }
  87. static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
  88. {
  89. struct ieee80211_hw *hw = priv->hw;
  90. wiphy_rfkill_stop_polling(hw->wiphy);
  91. ath9k_deinit_leds(priv);
  92. ath9k_htc_deinit_debug(priv);
  93. ieee80211_unregister_hw(hw);
  94. ath9k_rx_cleanup(priv);
  95. ath9k_tx_cleanup(priv);
  96. ath9k_deinit_priv(priv);
  97. }
  98. static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
  99. u16 service_id,
  100. void (*tx) (void *,
  101. struct sk_buff *,
  102. enum htc_endpoint_id,
  103. bool txok),
  104. enum htc_endpoint_id *ep_id)
  105. {
  106. struct htc_service_connreq req;
  107. memset(&req, 0, sizeof(struct htc_service_connreq));
  108. req.service_id = service_id;
  109. req.ep_callbacks.priv = priv;
  110. req.ep_callbacks.rx = ath9k_htc_rxep;
  111. req.ep_callbacks.tx = tx;
  112. return htc_connect_service(priv->htc, &req, ep_id);
  113. }
  114. static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
  115. u32 drv_info)
  116. {
  117. int ret;
  118. /* WMI CMD*/
  119. ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
  120. if (ret)
  121. goto err;
  122. /* Beacon */
  123. ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
  124. &priv->beacon_ep);
  125. if (ret)
  126. goto err;
  127. /* CAB */
  128. ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
  129. &priv->cab_ep);
  130. if (ret)
  131. goto err;
  132. /* UAPSD */
  133. ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
  134. &priv->uapsd_ep);
  135. if (ret)
  136. goto err;
  137. /* MGMT */
  138. ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
  139. &priv->mgmt_ep);
  140. if (ret)
  141. goto err;
  142. /* DATA BE */
  143. ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
  144. &priv->data_be_ep);
  145. if (ret)
  146. goto err;
  147. /* DATA BK */
  148. ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
  149. &priv->data_bk_ep);
  150. if (ret)
  151. goto err;
  152. /* DATA VI */
  153. ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
  154. &priv->data_vi_ep);
  155. if (ret)
  156. goto err;
  157. /* DATA VO */
  158. ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
  159. &priv->data_vo_ep);
  160. if (ret)
  161. goto err;
  162. /*
  163. * Setup required credits before initializing HTC.
  164. * This is a bit hacky, but, since queuing is done in
  165. * the HIF layer, shouldn't matter much.
  166. */
  167. if (IS_AR7010_DEVICE(drv_info))
  168. priv->htc->credits = 45;
  169. else
  170. priv->htc->credits = 33;
  171. ret = htc_init(priv->htc);
  172. if (ret)
  173. goto err;
  174. dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
  175. priv->htc->credits);
  176. return 0;
  177. err:
  178. dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
  179. return ret;
  180. }
  181. static void ath9k_reg_notifier(struct wiphy *wiphy,
  182. struct regulatory_request *request)
  183. {
  184. struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
  185. struct ath9k_htc_priv *priv = hw->priv;
  186. ath_reg_notifier_apply(wiphy, request,
  187. ath9k_hw_regulatory(priv->ah));
  188. }
  189. static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
  190. {
  191. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  192. struct ath_common *common = ath9k_hw_common(ah);
  193. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  194. __be32 val, reg = cpu_to_be32(reg_offset);
  195. int r;
  196. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
  197. (u8 *) &reg, sizeof(reg),
  198. (u8 *) &val, sizeof(val),
  199. 100);
  200. if (unlikely(r)) {
  201. ath_dbg(common, WMI, "REGISTER READ FAILED: (0x%04x, %d)\n",
  202. reg_offset, r);
  203. return -EIO;
  204. }
  205. return be32_to_cpu(val);
  206. }
  207. static void ath9k_multi_regread(void *hw_priv, u32 *addr,
  208. u32 *val, u16 count)
  209. {
  210. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  211. struct ath_common *common = ath9k_hw_common(ah);
  212. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  213. __be32 tmpaddr[8];
  214. __be32 tmpval[8];
  215. int i, ret;
  216. for (i = 0; i < count; i++) {
  217. tmpaddr[i] = cpu_to_be32(addr[i]);
  218. }
  219. ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
  220. (u8 *)tmpaddr , sizeof(u32) * count,
  221. (u8 *)tmpval, sizeof(u32) * count,
  222. 100);
  223. if (unlikely(ret)) {
  224. ath_dbg(common, WMI,
  225. "Multiple REGISTER READ FAILED (count: %d)\n", count);
  226. }
  227. for (i = 0; i < count; i++) {
  228. val[i] = be32_to_cpu(tmpval[i]);
  229. }
  230. }
  231. static void ath9k_regwrite_multi(struct ath_common *common)
  232. {
  233. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  234. u32 rsp_status;
  235. int r;
  236. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  237. (u8 *) &priv->wmi->multi_write,
  238. sizeof(struct register_write) * priv->wmi->multi_write_idx,
  239. (u8 *) &rsp_status, sizeof(rsp_status),
  240. 100);
  241. if (unlikely(r)) {
  242. ath_dbg(common, WMI,
  243. "REGISTER WRITE FAILED, multi len: %d\n",
  244. priv->wmi->multi_write_idx);
  245. }
  246. priv->wmi->multi_write_idx = 0;
  247. }
  248. static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
  249. {
  250. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  251. struct ath_common *common = ath9k_hw_common(ah);
  252. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  253. const __be32 buf[2] = {
  254. cpu_to_be32(reg_offset),
  255. cpu_to_be32(val),
  256. };
  257. int r;
  258. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
  259. (u8 *) &buf, sizeof(buf),
  260. (u8 *) &val, sizeof(val),
  261. 100);
  262. if (unlikely(r)) {
  263. ath_dbg(common, WMI, "REGISTER WRITE FAILED:(0x%04x, %d)\n",
  264. reg_offset, r);
  265. }
  266. }
  267. static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
  268. {
  269. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  270. struct ath_common *common = ath9k_hw_common(ah);
  271. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  272. mutex_lock(&priv->wmi->multi_write_mutex);
  273. /* Store the register/value */
  274. priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
  275. cpu_to_be32(reg_offset);
  276. priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
  277. cpu_to_be32(val);
  278. priv->wmi->multi_write_idx++;
  279. /* If the buffer is full, send it out. */
  280. if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER)
  281. ath9k_regwrite_multi(common);
  282. mutex_unlock(&priv->wmi->multi_write_mutex);
  283. }
  284. static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
  285. {
  286. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  287. struct ath_common *common = ath9k_hw_common(ah);
  288. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  289. if (atomic_read(&priv->wmi->mwrite_cnt))
  290. ath9k_regwrite_buffer(hw_priv, val, reg_offset);
  291. else
  292. ath9k_regwrite_single(hw_priv, val, reg_offset);
  293. }
  294. static void ath9k_enable_regwrite_buffer(void *hw_priv)
  295. {
  296. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  297. struct ath_common *common = ath9k_hw_common(ah);
  298. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  299. atomic_inc(&priv->wmi->mwrite_cnt);
  300. }
  301. static void ath9k_regwrite_flush(void *hw_priv)
  302. {
  303. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  304. struct ath_common *common = ath9k_hw_common(ah);
  305. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  306. atomic_dec(&priv->wmi->mwrite_cnt);
  307. mutex_lock(&priv->wmi->multi_write_mutex);
  308. if (priv->wmi->multi_write_idx)
  309. ath9k_regwrite_multi(common);
  310. mutex_unlock(&priv->wmi->multi_write_mutex);
  311. }
  312. static void ath9k_reg_rmw_buffer(void *hw_priv,
  313. u32 reg_offset, u32 set, u32 clr)
  314. {
  315. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  316. struct ath_common *common = ath9k_hw_common(ah);
  317. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  318. u32 rsp_status;
  319. int r;
  320. mutex_lock(&priv->wmi->multi_rmw_mutex);
  321. /* Store the register/value */
  322. priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].reg =
  323. cpu_to_be32(reg_offset);
  324. priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].set =
  325. cpu_to_be32(set);
  326. priv->wmi->multi_rmw[priv->wmi->multi_rmw_idx].clr =
  327. cpu_to_be32(clr);
  328. priv->wmi->multi_rmw_idx++;
  329. /* If the buffer is full, send it out. */
  330. if (priv->wmi->multi_rmw_idx == MAX_RMW_CMD_NUMBER) {
  331. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
  332. (u8 *) &priv->wmi->multi_rmw,
  333. sizeof(struct register_write) * priv->wmi->multi_rmw_idx,
  334. (u8 *) &rsp_status, sizeof(rsp_status),
  335. 100);
  336. if (unlikely(r)) {
  337. ath_dbg(common, WMI,
  338. "REGISTER RMW FAILED, multi len: %d\n",
  339. priv->wmi->multi_rmw_idx);
  340. }
  341. priv->wmi->multi_rmw_idx = 0;
  342. }
  343. mutex_unlock(&priv->wmi->multi_rmw_mutex);
  344. }
  345. static void ath9k_reg_rmw_flush(void *hw_priv)
  346. {
  347. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  348. struct ath_common *common = ath9k_hw_common(ah);
  349. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  350. u32 rsp_status;
  351. int r;
  352. if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
  353. return;
  354. atomic_dec(&priv->wmi->m_rmw_cnt);
  355. mutex_lock(&priv->wmi->multi_rmw_mutex);
  356. if (priv->wmi->multi_rmw_idx) {
  357. r = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
  358. (u8 *) &priv->wmi->multi_rmw,
  359. sizeof(struct register_rmw) * priv->wmi->multi_rmw_idx,
  360. (u8 *) &rsp_status, sizeof(rsp_status),
  361. 100);
  362. if (unlikely(r)) {
  363. ath_dbg(common, WMI,
  364. "REGISTER RMW FAILED, multi len: %d\n",
  365. priv->wmi->multi_rmw_idx);
  366. }
  367. priv->wmi->multi_rmw_idx = 0;
  368. }
  369. mutex_unlock(&priv->wmi->multi_rmw_mutex);
  370. }
  371. static void ath9k_enable_rmw_buffer(void *hw_priv)
  372. {
  373. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  374. struct ath_common *common = ath9k_hw_common(ah);
  375. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  376. if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags))
  377. return;
  378. atomic_inc(&priv->wmi->m_rmw_cnt);
  379. }
  380. static u32 ath9k_reg_rmw_single(void *hw_priv,
  381. u32 reg_offset, u32 set, u32 clr)
  382. {
  383. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  384. struct ath_common *common = ath9k_hw_common(ah);
  385. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  386. struct register_rmw buf, buf_ret;
  387. int ret;
  388. u32 val = 0;
  389. buf.reg = cpu_to_be32(reg_offset);
  390. buf.set = cpu_to_be32(set);
  391. buf.clr = cpu_to_be32(clr);
  392. ret = ath9k_wmi_cmd(priv->wmi, WMI_REG_RMW_CMDID,
  393. (u8 *) &buf, sizeof(buf),
  394. (u8 *) &buf_ret, sizeof(buf_ret),
  395. 100);
  396. if (unlikely(ret)) {
  397. ath_dbg(common, WMI, "REGISTER RMW FAILED:(0x%04x, %d)\n",
  398. reg_offset, ret);
  399. }
  400. return val;
  401. }
  402. static u32 ath9k_reg_rmw(void *hw_priv, u32 reg_offset, u32 set, u32 clr)
  403. {
  404. struct ath_hw *ah = (struct ath_hw *) hw_priv;
  405. struct ath_common *common = ath9k_hw_common(ah);
  406. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
  407. if (test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags)) {
  408. u32 val;
  409. val = REG_READ(ah, reg_offset);
  410. val &= ~clr;
  411. val |= set;
  412. REG_WRITE(ah, reg_offset, val);
  413. return 0;
  414. }
  415. if (atomic_read(&priv->wmi->m_rmw_cnt))
  416. ath9k_reg_rmw_buffer(hw_priv, reg_offset, set, clr);
  417. else
  418. ath9k_reg_rmw_single(hw_priv, reg_offset, set, clr);
  419. return 0;
  420. }
  421. static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
  422. {
  423. *csz = L1_CACHE_BYTES >> 2;
  424. }
  425. static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
  426. {
  427. struct ath_hw *ah = (struct ath_hw *) common->ah;
  428. (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
  429. if (!ath9k_hw_wait(ah,
  430. AR_EEPROM_STATUS_DATA,
  431. AR_EEPROM_STATUS_DATA_BUSY |
  432. AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
  433. AH_WAIT_TIMEOUT))
  434. return false;
  435. *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
  436. AR_EEPROM_STATUS_DATA_VAL);
  437. return true;
  438. }
  439. static const struct ath_bus_ops ath9k_usb_bus_ops = {
  440. .ath_bus_type = ATH_USB,
  441. .read_cachesize = ath_usb_read_cachesize,
  442. .eeprom_read = ath_usb_eeprom_read,
  443. };
  444. static int ath9k_init_queues(struct ath9k_htc_priv *priv)
  445. {
  446. struct ath_common *common = ath9k_hw_common(priv->ah);
  447. int i;
  448. for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
  449. priv->hwq_map[i] = -1;
  450. priv->beacon.beaconq = ath9k_hw_beaconq_setup(priv->ah);
  451. if (priv->beacon.beaconq == -1) {
  452. ath_err(common, "Unable to setup BEACON xmit queue\n");
  453. goto err;
  454. }
  455. priv->cabq = ath9k_htc_cabq_setup(priv);
  456. if (priv->cabq == -1) {
  457. ath_err(common, "Unable to setup CAB xmit queue\n");
  458. goto err;
  459. }
  460. if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BE)) {
  461. ath_err(common, "Unable to setup xmit queue for BE traffic\n");
  462. goto err;
  463. }
  464. if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_BK)) {
  465. ath_err(common, "Unable to setup xmit queue for BK traffic\n");
  466. goto err;
  467. }
  468. if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VI)) {
  469. ath_err(common, "Unable to setup xmit queue for VI traffic\n");
  470. goto err;
  471. }
  472. if (!ath9k_htc_txq_setup(priv, IEEE80211_AC_VO)) {
  473. ath_err(common, "Unable to setup xmit queue for VO traffic\n");
  474. goto err;
  475. }
  476. return 0;
  477. err:
  478. return -EINVAL;
  479. }
  480. static void ath9k_init_misc(struct ath9k_htc_priv *priv)
  481. {
  482. struct ath_common *common = ath9k_hw_common(priv->ah);
  483. memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
  484. common->last_rssi = ATH_RSSI_DUMMY_MARKER;
  485. priv->ah->opmode = NL80211_IFTYPE_STATION;
  486. priv->spec_priv.ah = priv->ah;
  487. priv->spec_priv.spec_config.enabled = 0;
  488. priv->spec_priv.spec_config.short_repeat = true;
  489. priv->spec_priv.spec_config.count = 8;
  490. priv->spec_priv.spec_config.endless = false;
  491. priv->spec_priv.spec_config.period = 0x12;
  492. priv->spec_priv.spec_config.fft_period = 0x02;
  493. }
  494. static int ath9k_init_priv(struct ath9k_htc_priv *priv,
  495. u16 devid, char *product,
  496. u32 drv_info)
  497. {
  498. struct ath_hw *ah = NULL;
  499. struct ath_common *common;
  500. int i, ret = 0, csz = 0;
  501. ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
  502. if (!ah)
  503. return -ENOMEM;
  504. ah->dev = priv->dev;
  505. ah->hw = priv->hw;
  506. ah->hw_version.devid = devid;
  507. ah->hw_version.usbdev = drv_info;
  508. ah->ah_flags |= AH_USE_EEPROM;
  509. ah->reg_ops.read = ath9k_regread;
  510. ah->reg_ops.multi_read = ath9k_multi_regread;
  511. ah->reg_ops.write = ath9k_regwrite;
  512. ah->reg_ops.enable_write_buffer = ath9k_enable_regwrite_buffer;
  513. ah->reg_ops.write_flush = ath9k_regwrite_flush;
  514. ah->reg_ops.enable_rmw_buffer = ath9k_enable_rmw_buffer;
  515. ah->reg_ops.rmw_flush = ath9k_reg_rmw_flush;
  516. ah->reg_ops.rmw = ath9k_reg_rmw;
  517. priv->ah = ah;
  518. common = ath9k_hw_common(ah);
  519. common->ops = &ah->reg_ops;
  520. common->ps_ops = &ath9k_htc_ps_ops;
  521. common->bus_ops = &ath9k_usb_bus_ops;
  522. common->ah = ah;
  523. common->hw = priv->hw;
  524. common->priv = priv;
  525. common->debug_mask = ath9k_debug;
  526. common->btcoex_enabled = ath9k_htc_btcoex_enable == 1;
  527. set_bit(ATH_OP_INVALID, &common->op_flags);
  528. spin_lock_init(&priv->beacon_lock);
  529. spin_lock_init(&priv->tx.tx_lock);
  530. mutex_init(&priv->mutex);
  531. mutex_init(&priv->htc_pm_lock);
  532. tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
  533. (unsigned long)priv);
  534. tasklet_init(&priv->tx_failed_tasklet, ath9k_tx_failed_tasklet,
  535. (unsigned long)priv);
  536. INIT_DELAYED_WORK(&priv->ani_work, ath9k_htc_ani_work);
  537. INIT_WORK(&priv->ps_work, ath9k_ps_work);
  538. INIT_WORK(&priv->fatal_work, ath9k_fatal_work);
  539. setup_timer(&priv->tx.cleanup_timer, ath9k_htc_tx_cleanup_timer,
  540. (unsigned long)priv);
  541. /*
  542. * Cache line size is used to size and align various
  543. * structures used to communicate with the hardware.
  544. */
  545. ath_read_cachesize(common, &csz);
  546. common->cachelsz = csz << 2; /* convert to bytes */
  547. ret = ath9k_hw_init(ah);
  548. if (ret) {
  549. ath_err(common,
  550. "Unable to initialize hardware; initialization status: %d\n",
  551. ret);
  552. goto err_hw;
  553. }
  554. ret = ath9k_init_queues(priv);
  555. if (ret)
  556. goto err_queues;
  557. for (i = 0; i < ATH9K_HTC_MAX_BCN_VIF; i++)
  558. priv->beacon.bslot[i] = NULL;
  559. priv->beacon.slottime = 9;
  560. ath9k_cmn_init_channels_rates(common);
  561. ath9k_cmn_init_crypto(ah);
  562. ath9k_init_misc(priv);
  563. ath9k_htc_init_btcoex(priv, product);
  564. return 0;
  565. err_queues:
  566. ath9k_hw_deinit(ah);
  567. err_hw:
  568. kfree(ah);
  569. priv->ah = NULL;
  570. return ret;
  571. }
  572. static const struct ieee80211_iface_limit if_limits[] = {
  573. { .max = 2, .types = BIT(NL80211_IFTYPE_STATION) |
  574. BIT(NL80211_IFTYPE_P2P_CLIENT) },
  575. { .max = 2, .types = BIT(NL80211_IFTYPE_AP) |
  576. #ifdef CONFIG_MAC80211_MESH
  577. BIT(NL80211_IFTYPE_MESH_POINT) |
  578. #endif
  579. BIT(NL80211_IFTYPE_P2P_GO) },
  580. };
  581. static const struct ieee80211_iface_combination if_comb = {
  582. .limits = if_limits,
  583. .n_limits = ARRAY_SIZE(if_limits),
  584. .max_interfaces = 2,
  585. .num_different_channels = 1,
  586. };
  587. static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
  588. struct ieee80211_hw *hw)
  589. {
  590. struct ath_hw *ah = priv->ah;
  591. struct ath_common *common = ath9k_hw_common(priv->ah);
  592. struct base_eep_header *pBase;
  593. ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
  594. ieee80211_hw_set(hw, MFP_CAPABLE);
  595. ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
  596. ieee80211_hw_set(hw, PS_NULLFUNC_STACK);
  597. ieee80211_hw_set(hw, RX_INCLUDES_FCS);
  598. ieee80211_hw_set(hw, HAS_RATE_CONTROL);
  599. ieee80211_hw_set(hw, SPECTRUM_MGMT);
  600. ieee80211_hw_set(hw, SIGNAL_DBM);
  601. ieee80211_hw_set(hw, AMPDU_AGGREGATION);
  602. if (ath9k_ps_enable)
  603. ieee80211_hw_set(hw, SUPPORTS_PS);
  604. hw->wiphy->interface_modes =
  605. BIT(NL80211_IFTYPE_STATION) |
  606. BIT(NL80211_IFTYPE_ADHOC) |
  607. BIT(NL80211_IFTYPE_AP) |
  608. BIT(NL80211_IFTYPE_P2P_GO) |
  609. BIT(NL80211_IFTYPE_P2P_CLIENT) |
  610. BIT(NL80211_IFTYPE_MESH_POINT) |
  611. BIT(NL80211_IFTYPE_OCB);
  612. hw->wiphy->iface_combinations = &if_comb;
  613. hw->wiphy->n_iface_combinations = 1;
  614. hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
  615. hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN |
  616. WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
  617. WIPHY_FLAG_HAS_CHANNEL_SWITCH;
  618. hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS;
  619. hw->queues = 4;
  620. hw->max_listen_interval = 1;
  621. hw->vif_data_size = sizeof(struct ath9k_htc_vif);
  622. hw->sta_data_size = sizeof(struct ath9k_htc_sta);
  623. /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
  624. hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
  625. sizeof(struct htc_frame_hdr) + 4;
  626. if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ)
  627. hw->wiphy->bands[NL80211_BAND_2GHZ] =
  628. &common->sbands[NL80211_BAND_2GHZ];
  629. if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ)
  630. hw->wiphy->bands[NL80211_BAND_5GHZ] =
  631. &common->sbands[NL80211_BAND_5GHZ];
  632. ath9k_cmn_reload_chainmask(ah);
  633. pBase = ath9k_htc_get_eeprom_base(priv);
  634. if (pBase) {
  635. hw->wiphy->available_antennas_rx = pBase->rxMask;
  636. hw->wiphy->available_antennas_tx = pBase->txMask;
  637. }
  638. SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
  639. wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
  640. }
  641. static int ath9k_init_firmware_version(struct ath9k_htc_priv *priv)
  642. {
  643. struct ieee80211_hw *hw = priv->hw;
  644. struct wmi_fw_version cmd_rsp;
  645. int ret;
  646. memset(&cmd_rsp, 0, sizeof(cmd_rsp));
  647. WMI_CMD(WMI_GET_FW_VERSION);
  648. if (ret)
  649. return -EINVAL;
  650. priv->fw_version_major = be16_to_cpu(cmd_rsp.major);
  651. priv->fw_version_minor = be16_to_cpu(cmd_rsp.minor);
  652. snprintf(hw->wiphy->fw_version, sizeof(hw->wiphy->fw_version), "%d.%d",
  653. priv->fw_version_major,
  654. priv->fw_version_minor);
  655. dev_info(priv->dev, "ath9k_htc: FW Version: %d.%d\n",
  656. priv->fw_version_major,
  657. priv->fw_version_minor);
  658. /*
  659. * Check if the available FW matches the driver's
  660. * required version.
  661. */
  662. if (priv->fw_version_major != MAJOR_VERSION_REQ ||
  663. priv->fw_version_minor < MINOR_VERSION_REQ) {
  664. dev_err(priv->dev, "ath9k_htc: Please upgrade to FW version %d.%d\n",
  665. MAJOR_VERSION_REQ, MINOR_VERSION_REQ);
  666. return -EINVAL;
  667. }
  668. if (priv->fw_version_major == 1 && priv->fw_version_minor < 4)
  669. set_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags);
  670. dev_info(priv->dev, "FW RMW support: %s\n",
  671. test_bit(HTC_FWFLAG_NO_RMW, &priv->fw_flags) ? "Off" : "On");
  672. return 0;
  673. }
  674. static int ath9k_init_device(struct ath9k_htc_priv *priv,
  675. u16 devid, char *product, u32 drv_info)
  676. {
  677. struct ieee80211_hw *hw = priv->hw;
  678. struct ath_common *common;
  679. struct ath_hw *ah;
  680. int error = 0;
  681. struct ath_regulatory *reg;
  682. char hw_name[64];
  683. /* Bring up device */
  684. error = ath9k_init_priv(priv, devid, product, drv_info);
  685. if (error != 0)
  686. goto err_init;
  687. ah = priv->ah;
  688. common = ath9k_hw_common(ah);
  689. ath9k_set_hw_capab(priv, hw);
  690. error = ath9k_init_firmware_version(priv);
  691. if (error != 0)
  692. goto err_fw;
  693. /* Initialize regulatory */
  694. error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
  695. ath9k_reg_notifier);
  696. if (error)
  697. goto err_regd;
  698. reg = &common->regulatory;
  699. /* Setup TX */
  700. error = ath9k_tx_init(priv);
  701. if (error != 0)
  702. goto err_tx;
  703. /* Setup RX */
  704. error = ath9k_rx_init(priv);
  705. if (error != 0)
  706. goto err_rx;
  707. ath9k_hw_disable(priv->ah);
  708. #ifdef CONFIG_MAC80211_LEDS
  709. /* must be initialized before ieee80211_register_hw */
  710. priv->led_cdev.default_trigger = ieee80211_create_tpt_led_trigger(priv->hw,
  711. IEEE80211_TPT_LEDTRIG_FL_RADIO, ath9k_htc_tpt_blink,
  712. ARRAY_SIZE(ath9k_htc_tpt_blink));
  713. #endif
  714. /* Register with mac80211 */
  715. error = ieee80211_register_hw(hw);
  716. if (error)
  717. goto err_register;
  718. /* Handle world regulatory */
  719. if (!ath_is_world_regd(reg)) {
  720. error = regulatory_hint(hw->wiphy, reg->alpha2);
  721. if (error)
  722. goto err_world;
  723. }
  724. error = ath9k_htc_init_debug(priv->ah);
  725. if (error) {
  726. ath_err(common, "Unable to create debugfs files\n");
  727. goto err_world;
  728. }
  729. ath_dbg(common, CONFIG,
  730. "WMI:%d, BCN:%d, CAB:%d, UAPSD:%d, MGMT:%d, BE:%d, BK:%d, VI:%d, VO:%d\n",
  731. priv->wmi_cmd_ep,
  732. priv->beacon_ep,
  733. priv->cab_ep,
  734. priv->uapsd_ep,
  735. priv->mgmt_ep,
  736. priv->data_be_ep,
  737. priv->data_bk_ep,
  738. priv->data_vi_ep,
  739. priv->data_vo_ep);
  740. ath9k_hw_name(priv->ah, hw_name, sizeof(hw_name));
  741. wiphy_info(hw->wiphy, "%s\n", hw_name);
  742. ath9k_init_leds(priv);
  743. ath9k_start_rfkill_poll(priv);
  744. return 0;
  745. err_world:
  746. ieee80211_unregister_hw(hw);
  747. err_register:
  748. ath9k_rx_cleanup(priv);
  749. err_rx:
  750. ath9k_tx_cleanup(priv);
  751. err_tx:
  752. /* Nothing */
  753. err_regd:
  754. /* Nothing */
  755. err_fw:
  756. ath9k_deinit_priv(priv);
  757. err_init:
  758. return error;
  759. }
  760. int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
  761. u16 devid, char *product, u32 drv_info)
  762. {
  763. struct ieee80211_hw *hw;
  764. struct ath9k_htc_priv *priv;
  765. int ret;
  766. hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
  767. if (!hw)
  768. return -ENOMEM;
  769. priv = hw->priv;
  770. priv->hw = hw;
  771. priv->htc = htc_handle;
  772. priv->dev = dev;
  773. htc_handle->drv_priv = priv;
  774. SET_IEEE80211_DEV(hw, priv->dev);
  775. ret = ath9k_htc_wait_for_target(priv);
  776. if (ret)
  777. goto err_free;
  778. priv->wmi = ath9k_init_wmi(priv);
  779. if (!priv->wmi) {
  780. ret = -EINVAL;
  781. goto err_free;
  782. }
  783. ret = ath9k_init_htc_services(priv, devid, drv_info);
  784. if (ret)
  785. goto err_init;
  786. ret = ath9k_init_device(priv, devid, product, drv_info);
  787. if (ret)
  788. goto err_init;
  789. return 0;
  790. err_init:
  791. ath9k_deinit_wmi(priv);
  792. err_free:
  793. ieee80211_free_hw(hw);
  794. return ret;
  795. }
  796. void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
  797. {
  798. if (htc_handle->drv_priv) {
  799. /* Check if the device has been yanked out. */
  800. if (hotunplug)
  801. htc_handle->drv_priv->ah->ah_flags |= AH_UNPLUGGED;
  802. ath9k_deinit_device(htc_handle->drv_priv);
  803. ath9k_deinit_wmi(htc_handle->drv_priv);
  804. ieee80211_free_hw(htc_handle->drv_priv->hw);
  805. }
  806. }
  807. #ifdef CONFIG_PM
  808. void ath9k_htc_suspend(struct htc_target *htc_handle)
  809. {
  810. ath9k_htc_setpower(htc_handle->drv_priv, ATH9K_PM_FULL_SLEEP);
  811. }
  812. int ath9k_htc_resume(struct htc_target *htc_handle)
  813. {
  814. struct ath9k_htc_priv *priv = htc_handle->drv_priv;
  815. int ret;
  816. ret = ath9k_htc_wait_for_target(priv);
  817. if (ret)
  818. return ret;
  819. ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
  820. priv->ah->hw_version.usbdev);
  821. ath9k_configure_leds(priv);
  822. return ret;
  823. }
  824. #endif
  825. static int __init ath9k_htc_init(void)
  826. {
  827. if (ath9k_hif_usb_init() < 0) {
  828. pr_err("No USB devices found, driver not installed\n");
  829. return -ENODEV;
  830. }
  831. return 0;
  832. }
  833. module_init(ath9k_htc_init);
  834. static void __exit ath9k_htc_exit(void)
  835. {
  836. ath9k_hif_usb_exit();
  837. pr_info("Driver unloaded\n");
  838. }
  839. module_exit(ath9k_htc_exit);