wmi.c 278 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/skbuff.h>
  18. #include <linux/ctype.h>
  19. #include "core.h"
  20. #include "htc.h"
  21. #include "debug.h"
  22. #include "wmi.h"
  23. #include "wmi-tlv.h"
  24. #include "mac.h"
  25. #include "testmode.h"
  26. #include "wmi-ops.h"
  27. #include "p2p.h"
  28. #include "hw.h"
  29. #include "hif.h"
  30. #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
  31. #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
  32. /* MAIN WMI cmd track */
  33. static struct wmi_cmd_map wmi_cmd_map = {
  34. .init_cmdid = WMI_INIT_CMDID,
  35. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  36. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  37. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  38. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  39. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  40. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  41. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  42. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  43. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  44. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  45. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  46. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  47. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  48. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  49. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  50. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  51. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  52. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  53. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  54. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  55. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  56. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  57. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  58. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  59. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  60. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  61. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  62. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  63. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  64. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  65. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  66. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  67. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  68. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  69. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  70. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  71. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  72. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  73. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  74. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  75. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  76. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  77. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  78. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  79. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  80. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  81. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  82. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  83. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  84. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  85. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  86. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  87. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  88. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  89. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  90. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  91. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  92. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  93. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  94. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  95. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  96. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  97. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  98. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  99. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  100. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  101. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  102. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  103. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  104. .wlan_profile_set_hist_intvl_cmdid =
  105. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  106. .wlan_profile_get_profile_data_cmdid =
  107. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  108. .wlan_profile_enable_profile_id_cmdid =
  109. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  110. .wlan_profile_list_profile_id_cmdid =
  111. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  112. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  113. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  114. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  115. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  116. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  117. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  118. .wow_enable_disable_wake_event_cmdid =
  119. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  120. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  121. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  122. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  123. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  124. .vdev_spectral_scan_configure_cmdid =
  125. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  126. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  127. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  128. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  129. .network_list_offload_config_cmdid =
  130. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  131. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  132. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  133. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  134. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  135. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  136. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  137. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  138. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  139. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  140. .echo_cmdid = WMI_ECHO_CMDID,
  141. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  142. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  143. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  144. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  145. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  146. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  147. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  148. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  149. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  150. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  151. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  152. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  153. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  154. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  155. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  156. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  157. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  158. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  159. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  160. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  161. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  162. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  163. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  164. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  165. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  166. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  167. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  168. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  169. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  170. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  171. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  172. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  173. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  174. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  175. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  176. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  177. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  178. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  179. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  180. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  181. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  182. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  183. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  184. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  185. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  186. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  187. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  188. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  189. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  190. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  191. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  192. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  193. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  194. };
  195. /* 10.X WMI cmd track */
  196. static struct wmi_cmd_map wmi_10x_cmd_map = {
  197. .init_cmdid = WMI_10X_INIT_CMDID,
  198. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  199. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  200. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  201. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  202. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  203. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  204. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  205. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  206. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  207. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  208. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  209. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  210. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  211. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  212. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  213. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  214. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  215. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  216. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  217. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  218. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  219. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  220. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  221. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  222. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  223. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  224. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  225. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  226. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  227. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  228. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  229. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  230. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  231. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  232. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  233. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  234. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  235. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  236. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  237. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  238. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  239. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  240. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  241. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  242. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  243. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  244. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  245. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  246. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  247. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  248. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  249. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  250. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  251. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  252. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  253. .roam_scan_rssi_change_threshold =
  254. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  255. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  256. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  257. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  258. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  259. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  260. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  261. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  262. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  263. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  264. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  265. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  266. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  267. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  268. .wlan_profile_set_hist_intvl_cmdid =
  269. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  270. .wlan_profile_get_profile_data_cmdid =
  271. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  272. .wlan_profile_enable_profile_id_cmdid =
  273. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  274. .wlan_profile_list_profile_id_cmdid =
  275. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  276. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  277. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  278. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  279. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  280. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  281. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  282. .wow_enable_disable_wake_event_cmdid =
  283. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  284. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  285. .wow_hostwakeup_from_sleep_cmdid =
  286. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  287. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  288. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  289. .vdev_spectral_scan_configure_cmdid =
  290. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  291. .vdev_spectral_scan_enable_cmdid =
  292. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  293. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  294. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  295. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  296. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  297. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  298. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  299. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  300. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  301. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  302. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  303. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  304. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  305. .echo_cmdid = WMI_10X_ECHO_CMDID,
  306. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  307. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  308. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  309. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  310. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  311. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  312. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  313. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  314. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  315. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  316. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  317. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  318. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  319. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  320. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  321. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  322. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  323. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  324. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  325. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  326. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  327. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  328. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  329. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  330. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  331. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  332. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  333. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  334. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  335. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  336. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  337. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  338. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  339. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  340. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  341. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  342. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  343. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  344. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  345. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  346. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  347. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  348. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  349. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  350. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  351. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  352. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  353. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  354. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  355. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  356. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  357. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  358. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  359. };
  360. /* 10.2.4 WMI cmd track */
  361. static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
  362. .init_cmdid = WMI_10_2_INIT_CMDID,
  363. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  364. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  365. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  366. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  367. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  368. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  369. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  370. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  371. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  372. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  373. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  374. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  375. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  376. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  377. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  378. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  379. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  380. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  381. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  382. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  383. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  384. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  385. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  386. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  387. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  388. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  389. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  390. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  391. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  392. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  393. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  394. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  395. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  396. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  397. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  398. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  399. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  400. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  401. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  402. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  403. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  404. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  405. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  406. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  407. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  408. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  409. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  410. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  411. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  412. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  413. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  414. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  415. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  416. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  417. .roam_scan_rssi_change_threshold =
  418. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  419. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  420. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  421. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  422. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  423. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  424. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  425. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  426. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  427. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  428. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  429. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  430. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  431. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  432. .wlan_profile_set_hist_intvl_cmdid =
  433. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  434. .wlan_profile_get_profile_data_cmdid =
  435. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  436. .wlan_profile_enable_profile_id_cmdid =
  437. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  438. .wlan_profile_list_profile_id_cmdid =
  439. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  440. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  441. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  442. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  443. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  444. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  445. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  446. .wow_enable_disable_wake_event_cmdid =
  447. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  448. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  449. .wow_hostwakeup_from_sleep_cmdid =
  450. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  451. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  452. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  453. .vdev_spectral_scan_configure_cmdid =
  454. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  455. .vdev_spectral_scan_enable_cmdid =
  456. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  457. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  458. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  459. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  460. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  461. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  462. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  463. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  464. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  465. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  466. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  467. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  468. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  469. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  470. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  471. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  472. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  473. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  474. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  475. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  476. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  477. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  478. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  479. .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
  480. .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
  481. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  482. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  483. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  484. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  485. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  486. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  487. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  488. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  489. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  490. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  491. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  492. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  493. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  494. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  495. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  496. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  497. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  498. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  499. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  500. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  501. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  502. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  503. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  504. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  505. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  506. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  507. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  508. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  509. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  510. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  511. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  512. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  513. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  514. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  515. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  516. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  517. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  518. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  519. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  520. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  521. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  522. .pdev_bss_chan_info_request_cmdid =
  523. WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  524. };
  525. /* 10.4 WMI cmd track */
  526. static struct wmi_cmd_map wmi_10_4_cmd_map = {
  527. .init_cmdid = WMI_10_4_INIT_CMDID,
  528. .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
  529. .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
  530. .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
  531. .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
  532. .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
  533. .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
  534. .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
  535. .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
  536. .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
  537. .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
  538. .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
  539. .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
  540. .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
  541. .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
  542. .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  543. .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
  544. .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
  545. .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
  546. .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
  547. .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
  548. .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
  549. .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
  550. .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
  551. .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
  552. .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
  553. .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
  554. .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
  555. .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
  556. .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
  557. .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
  558. .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
  559. .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
  560. .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
  561. .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
  562. .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
  563. .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
  564. .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
  565. .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
  566. .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
  567. .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
  568. .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
  569. .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
  570. .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
  571. .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
  572. .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
  573. .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
  574. .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
  575. .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
  576. .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
  577. .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
  578. .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
  579. .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
  580. .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
  581. .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
  582. .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
  583. .roam_scan_rssi_change_threshold =
  584. WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  585. .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
  586. .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
  587. .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
  588. .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
  589. .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
  590. .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
  591. .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
  592. .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
  593. .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
  594. .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
  595. .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
  596. .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
  597. .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
  598. .wlan_profile_set_hist_intvl_cmdid =
  599. WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  600. .wlan_profile_get_profile_data_cmdid =
  601. WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  602. .wlan_profile_enable_profile_id_cmdid =
  603. WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  604. .wlan_profile_list_profile_id_cmdid =
  605. WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  606. .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
  607. .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
  608. .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
  609. .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
  610. .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
  611. .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
  612. .wow_enable_disable_wake_event_cmdid =
  613. WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  614. .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
  615. .wow_hostwakeup_from_sleep_cmdid =
  616. WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  617. .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
  618. .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
  619. .vdev_spectral_scan_configure_cmdid =
  620. WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  621. .vdev_spectral_scan_enable_cmdid =
  622. WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  623. .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
  624. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  625. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  626. .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
  627. .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
  628. .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
  629. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  630. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  631. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  632. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  633. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  634. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  635. .echo_cmdid = WMI_10_4_ECHO_CMDID,
  636. .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
  637. .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
  638. .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
  639. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  640. .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
  641. .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
  642. .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
  643. .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
  644. .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
  645. .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
  646. .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
  647. .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
  648. .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
  649. .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
  650. .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
  651. .wlan_peer_caching_add_peer_cmdid =
  652. WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
  653. .wlan_peer_caching_evict_peer_cmdid =
  654. WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
  655. .wlan_peer_caching_restore_peer_cmdid =
  656. WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
  657. .wlan_peer_caching_print_all_peers_info_cmdid =
  658. WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
  659. .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
  660. .peer_add_proxy_sta_entry_cmdid =
  661. WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
  662. .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
  663. .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
  664. .nan_cmdid = WMI_10_4_NAN_CMDID,
  665. .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
  666. .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
  667. .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
  668. .pdev_smart_ant_set_rx_antenna_cmdid =
  669. WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
  670. .peer_smart_ant_set_tx_antenna_cmdid =
  671. WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
  672. .peer_smart_ant_set_train_info_cmdid =
  673. WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
  674. .peer_smart_ant_set_node_config_ops_cmdid =
  675. WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
  676. .pdev_set_antenna_switch_table_cmdid =
  677. WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
  678. .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
  679. .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
  680. .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
  681. .pdev_ratepwr_chainmsk_table_cmdid =
  682. WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
  683. .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
  684. .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
  685. .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
  686. .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
  687. .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
  688. .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
  689. .pdev_get_ani_ofdm_config_cmdid =
  690. WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
  691. .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
  692. .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
  693. .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
  694. .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
  695. .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
  696. .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
  697. .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
  698. .vdev_filter_neighbor_rx_packets_cmdid =
  699. WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
  700. .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
  701. .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
  702. .pdev_bss_chan_info_request_cmdid =
  703. WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  704. .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
  705. .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
  706. .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
  707. .atf_ssid_grouping_request_cmdid =
  708. WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
  709. .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
  710. .set_periodic_channel_stats_cfg_cmdid =
  711. WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
  712. .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
  713. .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
  714. .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
  715. .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
  716. .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
  717. .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
  718. .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
  719. .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
  720. .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
  721. .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
  722. .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
  723. .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
  724. .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
  725. .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
  726. .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
  727. .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
  728. .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
  729. .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
  730. .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
  731. .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
  732. };
  733. /* MAIN WMI VDEV param map */
  734. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  735. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  736. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  737. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  738. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  739. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  740. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  741. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  742. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  743. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  744. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  745. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  746. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  747. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  748. .wmi_vdev_oc_scheduler_air_time_limit =
  749. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  750. .wds = WMI_VDEV_PARAM_WDS,
  751. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  752. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  753. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  754. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  755. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  756. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  757. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  758. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  759. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  760. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  761. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  762. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  763. .sgi = WMI_VDEV_PARAM_SGI,
  764. .ldpc = WMI_VDEV_PARAM_LDPC,
  765. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  766. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  767. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  768. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  769. .nss = WMI_VDEV_PARAM_NSS,
  770. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  771. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  772. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  773. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  774. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  775. .ap_keepalive_min_idle_inactive_time_secs =
  776. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  777. .ap_keepalive_max_idle_inactive_time_secs =
  778. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  779. .ap_keepalive_max_unresponsive_time_secs =
  780. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  781. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  782. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  783. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  784. .txbf = WMI_VDEV_PARAM_TXBF,
  785. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  786. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  787. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  788. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  789. WMI_VDEV_PARAM_UNSUPPORTED,
  790. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  791. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  792. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  793. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  794. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  795. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  796. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  797. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  798. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  799. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  800. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  801. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  802. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  803. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  804. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  805. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  806. };
  807. /* 10.X WMI VDEV param map */
  808. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  809. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  810. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  811. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  812. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  813. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  814. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  815. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  816. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  817. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  818. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  819. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  820. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  821. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  822. .wmi_vdev_oc_scheduler_air_time_limit =
  823. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  824. .wds = WMI_10X_VDEV_PARAM_WDS,
  825. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  826. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  827. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  828. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  829. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  830. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  831. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  832. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  833. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  834. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  835. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  836. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  837. .sgi = WMI_10X_VDEV_PARAM_SGI,
  838. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  839. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  840. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  841. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  842. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  843. .nss = WMI_10X_VDEV_PARAM_NSS,
  844. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  845. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  846. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  847. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  848. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  849. .ap_keepalive_min_idle_inactive_time_secs =
  850. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  851. .ap_keepalive_max_idle_inactive_time_secs =
  852. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  853. .ap_keepalive_max_unresponsive_time_secs =
  854. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  855. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  856. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  857. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  858. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  859. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  860. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  861. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  862. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  863. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  864. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  865. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  866. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  867. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  868. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  869. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  870. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  871. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  872. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  873. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  874. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  875. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  876. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  877. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  878. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  879. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  880. };
  881. static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
  882. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  883. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  884. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  885. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  886. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  887. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  888. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  889. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  890. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  891. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  892. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  893. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  894. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  895. .wmi_vdev_oc_scheduler_air_time_limit =
  896. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  897. .wds = WMI_10X_VDEV_PARAM_WDS,
  898. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  899. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  900. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  901. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  902. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  903. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  904. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  905. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  906. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  907. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  908. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  909. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  910. .sgi = WMI_10X_VDEV_PARAM_SGI,
  911. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  912. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  913. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  914. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  915. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  916. .nss = WMI_10X_VDEV_PARAM_NSS,
  917. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  918. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  919. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  920. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  921. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  922. .ap_keepalive_min_idle_inactive_time_secs =
  923. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  924. .ap_keepalive_max_idle_inactive_time_secs =
  925. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  926. .ap_keepalive_max_unresponsive_time_secs =
  927. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  928. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  929. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  930. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  931. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  932. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  933. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  934. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  935. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  936. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  937. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  938. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  939. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  940. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  941. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  942. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  943. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  944. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  945. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  946. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  947. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  948. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  949. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  950. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  951. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  952. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  953. };
  954. static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
  955. .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
  956. .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  957. .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
  958. .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
  959. .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
  960. .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
  961. .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
  962. .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
  963. .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
  964. .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
  965. .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
  966. .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
  967. .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
  968. .wmi_vdev_oc_scheduler_air_time_limit =
  969. WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  970. .wds = WMI_10_4_VDEV_PARAM_WDS,
  971. .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
  972. .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
  973. .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
  974. .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
  975. .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
  976. .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
  977. .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
  978. .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
  979. .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
  980. .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
  981. .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
  982. .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
  983. .sgi = WMI_10_4_VDEV_PARAM_SGI,
  984. .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
  985. .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
  986. .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
  987. .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
  988. .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
  989. .nss = WMI_10_4_VDEV_PARAM_NSS,
  990. .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
  991. .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
  992. .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
  993. .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
  994. .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  995. .ap_keepalive_min_idle_inactive_time_secs =
  996. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  997. .ap_keepalive_max_idle_inactive_time_secs =
  998. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  999. .ap_keepalive_max_unresponsive_time_secs =
  1000. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  1001. .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
  1002. .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
  1003. .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
  1004. .txbf = WMI_10_4_VDEV_PARAM_TXBF,
  1005. .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
  1006. .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
  1007. .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
  1008. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  1009. WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  1010. .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
  1011. .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
  1012. .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
  1013. .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
  1014. .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
  1015. .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
  1016. .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
  1017. .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
  1018. .early_rx_bmiss_sample_cycle =
  1019. WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
  1020. .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
  1021. .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
  1022. .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
  1023. .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
  1024. .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
  1025. .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
  1026. .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
  1027. .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
  1028. .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
  1029. };
  1030. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  1031. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  1032. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  1033. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  1034. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  1035. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  1036. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  1037. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  1038. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1039. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  1040. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  1041. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1042. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  1043. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  1044. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1045. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  1046. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1047. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1048. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1049. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1050. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1051. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1052. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  1053. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1054. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  1055. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  1056. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1057. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1058. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1059. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1060. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1061. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1062. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1063. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1064. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  1065. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  1066. .dcs = WMI_PDEV_PARAM_DCS,
  1067. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  1068. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  1069. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1070. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  1071. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  1072. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  1073. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  1074. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  1075. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  1076. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1077. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  1078. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1079. .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
  1080. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1081. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1082. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1083. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1084. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1085. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1086. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1087. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1088. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1089. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1090. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1091. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1092. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1093. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1094. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1095. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1096. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1097. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1098. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1099. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1100. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1101. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1102. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1103. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1104. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1105. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1106. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1107. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1108. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1109. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1110. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1111. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1112. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1113. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1114. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1115. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1116. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1117. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1118. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1119. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1120. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1121. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1122. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1123. };
  1124. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  1125. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1126. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1127. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1128. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1129. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1130. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1131. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1132. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1133. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1134. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1135. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1136. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1137. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1138. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1139. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1140. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1141. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1142. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1143. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1144. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1145. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1146. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1147. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1148. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1149. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1150. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1151. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1152. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1153. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1154. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1155. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1156. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1157. .bcnflt_stats_update_period =
  1158. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1159. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1160. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1161. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1162. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1163. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1164. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1165. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1166. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1167. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1168. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1169. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1170. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1171. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1172. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1173. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1174. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1175. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1176. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1177. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1178. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1179. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1180. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1181. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1182. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1183. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1184. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1185. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1186. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1187. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1188. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1189. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1190. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1191. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1192. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1193. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1194. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1195. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1196. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1197. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1198. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1199. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1200. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1201. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1202. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1203. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1204. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1205. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1206. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1207. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1208. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1209. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1210. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1211. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1212. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1213. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1214. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1215. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1216. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1217. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1218. };
  1219. static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
  1220. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1221. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1222. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1223. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1224. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1225. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1226. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1227. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1228. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1229. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1230. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1231. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1232. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1233. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1234. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1235. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1236. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1237. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1238. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1239. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1240. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1241. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1242. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1243. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1244. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1245. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1246. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1247. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1248. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1249. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1250. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1251. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1252. .bcnflt_stats_update_period =
  1253. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1254. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1255. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1256. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1257. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1258. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1259. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1260. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1261. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1262. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1263. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1264. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1265. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1266. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1267. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1268. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1269. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1270. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1271. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1272. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1273. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1274. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1275. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1276. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1277. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1278. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1279. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1280. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1281. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1282. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1283. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1284. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1285. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1286. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1287. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1288. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1289. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1290. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1291. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1292. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1293. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1294. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1295. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1296. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1297. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1298. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1299. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1300. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1301. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1302. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1303. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1304. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1305. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1306. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1307. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1308. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1309. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1310. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1311. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1312. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1313. };
  1314. /* firmware 10.2 specific mappings */
  1315. static struct wmi_cmd_map wmi_10_2_cmd_map = {
  1316. .init_cmdid = WMI_10_2_INIT_CMDID,
  1317. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  1318. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  1319. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  1320. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  1321. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  1322. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  1323. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  1324. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  1325. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  1326. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  1327. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  1328. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  1329. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  1330. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  1331. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  1332. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  1333. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  1334. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  1335. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  1336. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  1337. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  1338. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  1339. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  1340. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  1341. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  1342. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  1343. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  1344. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  1345. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  1346. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  1347. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  1348. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  1349. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  1350. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  1351. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  1352. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1353. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  1354. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  1355. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  1356. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1357. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  1358. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  1359. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  1360. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  1361. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  1362. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  1363. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  1364. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  1365. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  1366. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  1367. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  1368. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  1369. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  1370. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  1371. .roam_scan_rssi_change_threshold =
  1372. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  1373. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  1374. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  1375. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  1376. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  1377. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  1378. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  1379. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  1380. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  1381. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  1382. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  1383. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  1384. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  1385. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  1386. .wlan_profile_set_hist_intvl_cmdid =
  1387. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  1388. .wlan_profile_get_profile_data_cmdid =
  1389. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  1390. .wlan_profile_enable_profile_id_cmdid =
  1391. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  1392. .wlan_profile_list_profile_id_cmdid =
  1393. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  1394. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  1395. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  1396. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  1397. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  1398. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  1399. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  1400. .wow_enable_disable_wake_event_cmdid =
  1401. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  1402. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  1403. .wow_hostwakeup_from_sleep_cmdid =
  1404. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  1405. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  1406. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  1407. .vdev_spectral_scan_configure_cmdid =
  1408. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  1409. .vdev_spectral_scan_enable_cmdid =
  1410. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  1411. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  1412. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1413. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  1414. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1415. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1416. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  1417. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  1418. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  1419. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  1420. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  1421. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  1422. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  1423. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  1424. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  1425. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  1426. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  1427. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  1428. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1429. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1430. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  1431. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  1432. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  1433. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  1434. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  1435. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  1436. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  1437. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  1438. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1439. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1440. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1441. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  1442. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1443. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1444. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1445. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  1446. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  1447. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  1448. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  1449. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1450. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1451. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1452. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  1453. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  1454. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  1455. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  1456. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  1457. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  1458. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  1459. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  1460. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  1461. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  1462. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1463. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1464. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  1465. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  1466. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1467. };
  1468. static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
  1469. .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
  1470. .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
  1471. .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
  1472. .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
  1473. .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
  1474. .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
  1475. .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
  1476. .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1477. .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
  1478. .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
  1479. .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1480. .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
  1481. .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
  1482. .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1483. .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
  1484. .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1485. .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1486. .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1487. .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1488. .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1489. .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1490. .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
  1491. .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1492. .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
  1493. .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
  1494. .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1495. .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
  1496. .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1497. .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1498. .pdev_stats_update_period =
  1499. WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1500. .vdev_stats_update_period =
  1501. WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1502. .peer_stats_update_period =
  1503. WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1504. .bcnflt_stats_update_period =
  1505. WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1506. .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
  1507. .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
  1508. .dcs = WMI_10_4_PDEV_PARAM_DCS,
  1509. .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
  1510. .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
  1511. .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1512. .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
  1513. .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
  1514. .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
  1515. .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
  1516. .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
  1517. .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
  1518. .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
  1519. .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
  1520. .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
  1521. .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
  1522. .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
  1523. .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
  1524. .smart_antenna_default_antenna =
  1525. WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
  1526. .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
  1527. .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
  1528. .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
  1529. .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
  1530. .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
  1531. .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
  1532. .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
  1533. .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
  1534. .remove_mcast2ucast_buffer =
  1535. WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
  1536. .peer_sta_ps_statechg_enable =
  1537. WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
  1538. .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
  1539. .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
  1540. .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
  1541. .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
  1542. .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
  1543. .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
  1544. .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
  1545. .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
  1546. .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
  1547. .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
  1548. .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
  1549. .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
  1550. .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
  1551. .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
  1552. .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
  1553. .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
  1554. .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
  1555. .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
  1556. .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
  1557. .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
  1558. .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
  1559. .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
  1560. .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
  1561. .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
  1562. .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
  1563. .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
  1564. .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
  1565. .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
  1566. .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
  1567. .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
  1568. };
  1569. static const struct wmi_peer_flags_map wmi_peer_flags_map = {
  1570. .auth = WMI_PEER_AUTH,
  1571. .qos = WMI_PEER_QOS,
  1572. .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
  1573. .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
  1574. .apsd = WMI_PEER_APSD,
  1575. .ht = WMI_PEER_HT,
  1576. .bw40 = WMI_PEER_40MHZ,
  1577. .stbc = WMI_PEER_STBC,
  1578. .ldbc = WMI_PEER_LDPC,
  1579. .dyn_mimops = WMI_PEER_DYN_MIMOPS,
  1580. .static_mimops = WMI_PEER_STATIC_MIMOPS,
  1581. .spatial_mux = WMI_PEER_SPATIAL_MUX,
  1582. .vht = WMI_PEER_VHT,
  1583. .bw80 = WMI_PEER_80MHZ,
  1584. .vht_2g = WMI_PEER_VHT_2G,
  1585. .pmf = WMI_PEER_PMF,
  1586. .bw160 = WMI_PEER_160MHZ,
  1587. };
  1588. static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
  1589. .auth = WMI_10X_PEER_AUTH,
  1590. .qos = WMI_10X_PEER_QOS,
  1591. .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
  1592. .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
  1593. .apsd = WMI_10X_PEER_APSD,
  1594. .ht = WMI_10X_PEER_HT,
  1595. .bw40 = WMI_10X_PEER_40MHZ,
  1596. .stbc = WMI_10X_PEER_STBC,
  1597. .ldbc = WMI_10X_PEER_LDPC,
  1598. .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
  1599. .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
  1600. .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
  1601. .vht = WMI_10X_PEER_VHT,
  1602. .bw80 = WMI_10X_PEER_80MHZ,
  1603. .bw160 = WMI_10X_PEER_160MHZ,
  1604. };
  1605. static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
  1606. .auth = WMI_10_2_PEER_AUTH,
  1607. .qos = WMI_10_2_PEER_QOS,
  1608. .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
  1609. .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
  1610. .apsd = WMI_10_2_PEER_APSD,
  1611. .ht = WMI_10_2_PEER_HT,
  1612. .bw40 = WMI_10_2_PEER_40MHZ,
  1613. .stbc = WMI_10_2_PEER_STBC,
  1614. .ldbc = WMI_10_2_PEER_LDPC,
  1615. .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
  1616. .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
  1617. .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
  1618. .vht = WMI_10_2_PEER_VHT,
  1619. .bw80 = WMI_10_2_PEER_80MHZ,
  1620. .vht_2g = WMI_10_2_PEER_VHT_2G,
  1621. .pmf = WMI_10_2_PEER_PMF,
  1622. .bw160 = WMI_10_2_PEER_160MHZ,
  1623. };
  1624. void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
  1625. const struct wmi_channel_arg *arg)
  1626. {
  1627. u32 flags = 0;
  1628. memset(ch, 0, sizeof(*ch));
  1629. if (arg->passive)
  1630. flags |= WMI_CHAN_FLAG_PASSIVE;
  1631. if (arg->allow_ibss)
  1632. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  1633. if (arg->allow_ht)
  1634. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  1635. if (arg->allow_vht)
  1636. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  1637. if (arg->ht40plus)
  1638. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  1639. if (arg->chan_radar)
  1640. flags |= WMI_CHAN_FLAG_DFS;
  1641. ch->mhz = __cpu_to_le32(arg->freq);
  1642. ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
  1643. if (arg->mode == MODE_11AC_VHT80_80)
  1644. ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
  1645. else
  1646. ch->band_center_freq2 = 0;
  1647. ch->min_power = arg->min_power;
  1648. ch->max_power = arg->max_power;
  1649. ch->reg_power = arg->max_reg_power;
  1650. ch->antenna_max = arg->max_antenna_gain;
  1651. ch->max_tx_power = arg->max_power;
  1652. /* mode & flags share storage */
  1653. ch->mode = arg->mode;
  1654. ch->flags |= __cpu_to_le32(flags);
  1655. }
  1656. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  1657. {
  1658. unsigned long time_left;
  1659. time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
  1660. WMI_SERVICE_READY_TIMEOUT_HZ);
  1661. if (!time_left)
  1662. return -ETIMEDOUT;
  1663. return 0;
  1664. }
  1665. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  1666. {
  1667. unsigned long time_left;
  1668. time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
  1669. WMI_UNIFIED_READY_TIMEOUT_HZ);
  1670. if (!time_left)
  1671. return -ETIMEDOUT;
  1672. return 0;
  1673. }
  1674. struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
  1675. {
  1676. struct sk_buff *skb;
  1677. u32 round_len = roundup(len, 4);
  1678. skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
  1679. if (!skb)
  1680. return NULL;
  1681. skb_reserve(skb, WMI_SKB_HEADROOM);
  1682. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1683. ath10k_warn(ar, "Unaligned WMI skb\n");
  1684. skb_put(skb, round_len);
  1685. memset(skb->data, 0, round_len);
  1686. return skb;
  1687. }
  1688. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  1689. {
  1690. dev_kfree_skb(skb);
  1691. }
  1692. int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  1693. u32 cmd_id)
  1694. {
  1695. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  1696. struct wmi_cmd_hdr *cmd_hdr;
  1697. int ret;
  1698. u32 cmd = 0;
  1699. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1700. return -ENOMEM;
  1701. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  1702. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1703. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  1704. memset(skb_cb, 0, sizeof(*skb_cb));
  1705. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  1706. trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
  1707. if (ret)
  1708. goto err_pull;
  1709. return 0;
  1710. err_pull:
  1711. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  1712. return ret;
  1713. }
  1714. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  1715. {
  1716. struct ath10k *ar = arvif->ar;
  1717. struct ath10k_skb_cb *cb;
  1718. struct sk_buff *bcn;
  1719. bool dtim_zero;
  1720. bool deliver_cab;
  1721. int ret;
  1722. spin_lock_bh(&ar->data_lock);
  1723. bcn = arvif->beacon;
  1724. if (!bcn)
  1725. goto unlock;
  1726. cb = ATH10K_SKB_CB(bcn);
  1727. switch (arvif->beacon_state) {
  1728. case ATH10K_BEACON_SENDING:
  1729. case ATH10K_BEACON_SENT:
  1730. break;
  1731. case ATH10K_BEACON_SCHEDULED:
  1732. arvif->beacon_state = ATH10K_BEACON_SENDING;
  1733. spin_unlock_bh(&ar->data_lock);
  1734. dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
  1735. deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
  1736. ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
  1737. arvif->vdev_id,
  1738. bcn->data, bcn->len,
  1739. cb->paddr,
  1740. dtim_zero,
  1741. deliver_cab);
  1742. spin_lock_bh(&ar->data_lock);
  1743. if (ret == 0)
  1744. arvif->beacon_state = ATH10K_BEACON_SENT;
  1745. else
  1746. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  1747. }
  1748. unlock:
  1749. spin_unlock_bh(&ar->data_lock);
  1750. }
  1751. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  1752. struct ieee80211_vif *vif)
  1753. {
  1754. struct ath10k_vif *arvif = (void *)vif->drv_priv;
  1755. ath10k_wmi_tx_beacon_nowait(arvif);
  1756. }
  1757. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  1758. {
  1759. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  1760. IEEE80211_IFACE_ITER_NORMAL,
  1761. ath10k_wmi_tx_beacons_iter,
  1762. NULL);
  1763. }
  1764. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  1765. {
  1766. /* try to send pending beacons first. they take priority */
  1767. ath10k_wmi_tx_beacons_nowait(ar);
  1768. wake_up(&ar->wmi.tx_credits_wq);
  1769. }
  1770. int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
  1771. {
  1772. int ret = -EOPNOTSUPP;
  1773. might_sleep();
  1774. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  1775. ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
  1776. cmd_id);
  1777. return ret;
  1778. }
  1779. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  1780. /* try to send pending beacons first. they take priority */
  1781. ath10k_wmi_tx_beacons_nowait(ar);
  1782. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  1783. if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
  1784. ret = -ESHUTDOWN;
  1785. (ret != -EAGAIN);
  1786. }), 3 * HZ);
  1787. if (ret)
  1788. dev_kfree_skb_any(skb);
  1789. return ret;
  1790. }
  1791. static struct sk_buff *
  1792. ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
  1793. {
  1794. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
  1795. struct ath10k_vif *arvif;
  1796. struct wmi_mgmt_tx_cmd *cmd;
  1797. struct ieee80211_hdr *hdr;
  1798. struct sk_buff *skb;
  1799. int len;
  1800. u32 vdev_id;
  1801. u32 buf_len = msdu->len;
  1802. u16 fc;
  1803. hdr = (struct ieee80211_hdr *)msdu->data;
  1804. fc = le16_to_cpu(hdr->frame_control);
  1805. if (cb->vif) {
  1806. arvif = (void *)cb->vif->drv_priv;
  1807. vdev_id = arvif->vdev_id;
  1808. } else {
  1809. vdev_id = 0;
  1810. }
  1811. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  1812. return ERR_PTR(-EINVAL);
  1813. len = sizeof(cmd->hdr) + msdu->len;
  1814. if ((ieee80211_is_action(hdr->frame_control) ||
  1815. ieee80211_is_deauth(hdr->frame_control) ||
  1816. ieee80211_is_disassoc(hdr->frame_control)) &&
  1817. ieee80211_has_protected(hdr->frame_control)) {
  1818. len += IEEE80211_CCMP_MIC_LEN;
  1819. buf_len += IEEE80211_CCMP_MIC_LEN;
  1820. }
  1821. len = round_up(len, 4);
  1822. skb = ath10k_wmi_alloc_skb(ar, len);
  1823. if (!skb)
  1824. return ERR_PTR(-ENOMEM);
  1825. cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
  1826. cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
  1827. cmd->hdr.tx_rate = 0;
  1828. cmd->hdr.tx_power = 0;
  1829. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  1830. ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
  1831. memcpy(cmd->buf, msdu->data, msdu->len);
  1832. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
  1833. msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
  1834. fc & IEEE80211_FCTL_STYPE);
  1835. trace_ath10k_tx_hdr(ar, skb->data, skb->len);
  1836. trace_ath10k_tx_payload(ar, skb->data, skb->len);
  1837. return skb;
  1838. }
  1839. static void ath10k_wmi_event_scan_started(struct ath10k *ar)
  1840. {
  1841. lockdep_assert_held(&ar->data_lock);
  1842. switch (ar->scan.state) {
  1843. case ATH10K_SCAN_IDLE:
  1844. case ATH10K_SCAN_RUNNING:
  1845. case ATH10K_SCAN_ABORTING:
  1846. ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
  1847. ath10k_scan_state_str(ar->scan.state),
  1848. ar->scan.state);
  1849. break;
  1850. case ATH10K_SCAN_STARTING:
  1851. ar->scan.state = ATH10K_SCAN_RUNNING;
  1852. if (ar->scan.is_roc)
  1853. ieee80211_ready_on_channel(ar->hw);
  1854. complete(&ar->scan.started);
  1855. break;
  1856. }
  1857. }
  1858. static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
  1859. {
  1860. lockdep_assert_held(&ar->data_lock);
  1861. switch (ar->scan.state) {
  1862. case ATH10K_SCAN_IDLE:
  1863. case ATH10K_SCAN_RUNNING:
  1864. case ATH10K_SCAN_ABORTING:
  1865. ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
  1866. ath10k_scan_state_str(ar->scan.state),
  1867. ar->scan.state);
  1868. break;
  1869. case ATH10K_SCAN_STARTING:
  1870. complete(&ar->scan.started);
  1871. __ath10k_scan_finish(ar);
  1872. break;
  1873. }
  1874. }
  1875. static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
  1876. {
  1877. lockdep_assert_held(&ar->data_lock);
  1878. switch (ar->scan.state) {
  1879. case ATH10K_SCAN_IDLE:
  1880. case ATH10K_SCAN_STARTING:
  1881. /* One suspected reason scan can be completed while starting is
  1882. * if firmware fails to deliver all scan events to the host,
  1883. * e.g. when transport pipe is full. This has been observed
  1884. * with spectral scan phyerr events starving wmi transport
  1885. * pipe. In such case the "scan completed" event should be (and
  1886. * is) ignored by the host as it may be just firmware's scan
  1887. * state machine recovering.
  1888. */
  1889. ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
  1890. ath10k_scan_state_str(ar->scan.state),
  1891. ar->scan.state);
  1892. break;
  1893. case ATH10K_SCAN_RUNNING:
  1894. case ATH10K_SCAN_ABORTING:
  1895. __ath10k_scan_finish(ar);
  1896. break;
  1897. }
  1898. }
  1899. static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
  1900. {
  1901. lockdep_assert_held(&ar->data_lock);
  1902. switch (ar->scan.state) {
  1903. case ATH10K_SCAN_IDLE:
  1904. case ATH10K_SCAN_STARTING:
  1905. ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
  1906. ath10k_scan_state_str(ar->scan.state),
  1907. ar->scan.state);
  1908. break;
  1909. case ATH10K_SCAN_RUNNING:
  1910. case ATH10K_SCAN_ABORTING:
  1911. ar->scan_channel = NULL;
  1912. break;
  1913. }
  1914. }
  1915. static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
  1916. {
  1917. lockdep_assert_held(&ar->data_lock);
  1918. switch (ar->scan.state) {
  1919. case ATH10K_SCAN_IDLE:
  1920. case ATH10K_SCAN_STARTING:
  1921. ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
  1922. ath10k_scan_state_str(ar->scan.state),
  1923. ar->scan.state);
  1924. break;
  1925. case ATH10K_SCAN_RUNNING:
  1926. case ATH10K_SCAN_ABORTING:
  1927. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  1928. if (ar->scan.is_roc && ar->scan.roc_freq == freq)
  1929. complete(&ar->scan.on_channel);
  1930. break;
  1931. }
  1932. }
  1933. static const char *
  1934. ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
  1935. enum wmi_scan_completion_reason reason)
  1936. {
  1937. switch (type) {
  1938. case WMI_SCAN_EVENT_STARTED:
  1939. return "started";
  1940. case WMI_SCAN_EVENT_COMPLETED:
  1941. switch (reason) {
  1942. case WMI_SCAN_REASON_COMPLETED:
  1943. return "completed";
  1944. case WMI_SCAN_REASON_CANCELLED:
  1945. return "completed [cancelled]";
  1946. case WMI_SCAN_REASON_PREEMPTED:
  1947. return "completed [preempted]";
  1948. case WMI_SCAN_REASON_TIMEDOUT:
  1949. return "completed [timedout]";
  1950. case WMI_SCAN_REASON_INTERNAL_FAILURE:
  1951. return "completed [internal err]";
  1952. case WMI_SCAN_REASON_MAX:
  1953. break;
  1954. }
  1955. return "completed [unknown]";
  1956. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1957. return "bss channel";
  1958. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1959. return "foreign channel";
  1960. case WMI_SCAN_EVENT_DEQUEUED:
  1961. return "dequeued";
  1962. case WMI_SCAN_EVENT_PREEMPTED:
  1963. return "preempted";
  1964. case WMI_SCAN_EVENT_START_FAILED:
  1965. return "start failed";
  1966. case WMI_SCAN_EVENT_RESTARTED:
  1967. return "restarted";
  1968. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  1969. return "foreign channel exit";
  1970. default:
  1971. return "unknown";
  1972. }
  1973. }
  1974. static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
  1975. struct wmi_scan_ev_arg *arg)
  1976. {
  1977. struct wmi_scan_event *ev = (void *)skb->data;
  1978. if (skb->len < sizeof(*ev))
  1979. return -EPROTO;
  1980. skb_pull(skb, sizeof(*ev));
  1981. arg->event_type = ev->event_type;
  1982. arg->reason = ev->reason;
  1983. arg->channel_freq = ev->channel_freq;
  1984. arg->scan_req_id = ev->scan_req_id;
  1985. arg->scan_id = ev->scan_id;
  1986. arg->vdev_id = ev->vdev_id;
  1987. return 0;
  1988. }
  1989. int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  1990. {
  1991. struct wmi_scan_ev_arg arg = {};
  1992. enum wmi_scan_event_type event_type;
  1993. enum wmi_scan_completion_reason reason;
  1994. u32 freq;
  1995. u32 req_id;
  1996. u32 scan_id;
  1997. u32 vdev_id;
  1998. int ret;
  1999. ret = ath10k_wmi_pull_scan(ar, skb, &arg);
  2000. if (ret) {
  2001. ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
  2002. return ret;
  2003. }
  2004. event_type = __le32_to_cpu(arg.event_type);
  2005. reason = __le32_to_cpu(arg.reason);
  2006. freq = __le32_to_cpu(arg.channel_freq);
  2007. req_id = __le32_to_cpu(arg.scan_req_id);
  2008. scan_id = __le32_to_cpu(arg.scan_id);
  2009. vdev_id = __le32_to_cpu(arg.vdev_id);
  2010. spin_lock_bh(&ar->data_lock);
  2011. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2012. "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
  2013. ath10k_wmi_event_scan_type_str(event_type, reason),
  2014. event_type, reason, freq, req_id, scan_id, vdev_id,
  2015. ath10k_scan_state_str(ar->scan.state), ar->scan.state);
  2016. switch (event_type) {
  2017. case WMI_SCAN_EVENT_STARTED:
  2018. ath10k_wmi_event_scan_started(ar);
  2019. break;
  2020. case WMI_SCAN_EVENT_COMPLETED:
  2021. ath10k_wmi_event_scan_completed(ar);
  2022. break;
  2023. case WMI_SCAN_EVENT_BSS_CHANNEL:
  2024. ath10k_wmi_event_scan_bss_chan(ar);
  2025. break;
  2026. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  2027. ath10k_wmi_event_scan_foreign_chan(ar, freq);
  2028. break;
  2029. case WMI_SCAN_EVENT_START_FAILED:
  2030. ath10k_warn(ar, "received scan start failure event\n");
  2031. ath10k_wmi_event_scan_start_failed(ar);
  2032. break;
  2033. case WMI_SCAN_EVENT_DEQUEUED:
  2034. case WMI_SCAN_EVENT_PREEMPTED:
  2035. case WMI_SCAN_EVENT_RESTARTED:
  2036. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  2037. default:
  2038. break;
  2039. }
  2040. spin_unlock_bh(&ar->data_lock);
  2041. return 0;
  2042. }
  2043. /* If keys are configured, HW decrypts all frames
  2044. * with protected bit set. Mark such frames as decrypted.
  2045. */
  2046. static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
  2047. struct sk_buff *skb,
  2048. struct ieee80211_rx_status *status)
  2049. {
  2050. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2051. unsigned int hdrlen;
  2052. bool peer_key;
  2053. u8 *addr, keyidx;
  2054. if (!ieee80211_is_auth(hdr->frame_control) ||
  2055. !ieee80211_has_protected(hdr->frame_control))
  2056. return;
  2057. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  2058. if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
  2059. return;
  2060. keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
  2061. addr = ieee80211_get_SA(hdr);
  2062. spin_lock_bh(&ar->data_lock);
  2063. peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
  2064. spin_unlock_bh(&ar->data_lock);
  2065. if (peer_key) {
  2066. ath10k_dbg(ar, ATH10K_DBG_MAC,
  2067. "mac wep key present for peer %pM\n", addr);
  2068. status->flag |= RX_FLAG_DECRYPTED;
  2069. }
  2070. }
  2071. static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
  2072. struct wmi_mgmt_rx_ev_arg *arg)
  2073. {
  2074. struct wmi_mgmt_rx_event_v1 *ev_v1;
  2075. struct wmi_mgmt_rx_event_v2 *ev_v2;
  2076. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  2077. struct wmi_mgmt_rx_ext_info *ext_info;
  2078. size_t pull_len;
  2079. u32 msdu_len;
  2080. u32 len;
  2081. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
  2082. ar->running_fw->fw_file.fw_features)) {
  2083. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  2084. ev_hdr = &ev_v2->hdr.v1;
  2085. pull_len = sizeof(*ev_v2);
  2086. } else {
  2087. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  2088. ev_hdr = &ev_v1->hdr;
  2089. pull_len = sizeof(*ev_v1);
  2090. }
  2091. if (skb->len < pull_len)
  2092. return -EPROTO;
  2093. skb_pull(skb, pull_len);
  2094. arg->channel = ev_hdr->channel;
  2095. arg->buf_len = ev_hdr->buf_len;
  2096. arg->status = ev_hdr->status;
  2097. arg->snr = ev_hdr->snr;
  2098. arg->phy_mode = ev_hdr->phy_mode;
  2099. arg->rate = ev_hdr->rate;
  2100. msdu_len = __le32_to_cpu(arg->buf_len);
  2101. if (skb->len < msdu_len)
  2102. return -EPROTO;
  2103. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2104. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2105. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2106. memcpy(&arg->ext_info, ext_info,
  2107. sizeof(struct wmi_mgmt_rx_ext_info));
  2108. }
  2109. /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
  2110. * trailer with credit update. Trim the excess garbage.
  2111. */
  2112. skb_trim(skb, msdu_len);
  2113. return 0;
  2114. }
  2115. static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
  2116. struct sk_buff *skb,
  2117. struct wmi_mgmt_rx_ev_arg *arg)
  2118. {
  2119. struct wmi_10_4_mgmt_rx_event *ev;
  2120. struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
  2121. size_t pull_len;
  2122. u32 msdu_len;
  2123. struct wmi_mgmt_rx_ext_info *ext_info;
  2124. u32 len;
  2125. ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
  2126. ev_hdr = &ev->hdr;
  2127. pull_len = sizeof(*ev);
  2128. if (skb->len < pull_len)
  2129. return -EPROTO;
  2130. skb_pull(skb, pull_len);
  2131. arg->channel = ev_hdr->channel;
  2132. arg->buf_len = ev_hdr->buf_len;
  2133. arg->status = ev_hdr->status;
  2134. arg->snr = ev_hdr->snr;
  2135. arg->phy_mode = ev_hdr->phy_mode;
  2136. arg->rate = ev_hdr->rate;
  2137. msdu_len = __le32_to_cpu(arg->buf_len);
  2138. if (skb->len < msdu_len)
  2139. return -EPROTO;
  2140. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2141. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2142. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2143. memcpy(&arg->ext_info, ext_info,
  2144. sizeof(struct wmi_mgmt_rx_ext_info));
  2145. }
  2146. /* Make sure bytes added for padding are removed. */
  2147. skb_trim(skb, msdu_len);
  2148. return 0;
  2149. }
  2150. static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
  2151. struct ieee80211_hdr *hdr)
  2152. {
  2153. if (!ieee80211_has_protected(hdr->frame_control))
  2154. return false;
  2155. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  2156. * encrypted payload. However in case of PMF it delivers decrypted
  2157. * frames with Protected Bit set.
  2158. */
  2159. if (ieee80211_is_auth(hdr->frame_control))
  2160. return false;
  2161. /* qca99x0 based FW delivers broadcast or multicast management frames
  2162. * (ex: group privacy action frames in mesh) as encrypted payload.
  2163. */
  2164. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
  2165. ar->hw_params.sw_decrypt_mcast_mgmt)
  2166. return false;
  2167. return true;
  2168. }
  2169. int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  2170. {
  2171. struct wmi_mgmt_rx_ev_arg arg = {};
  2172. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  2173. struct ieee80211_hdr *hdr;
  2174. struct ieee80211_supported_band *sband;
  2175. u32 rx_status;
  2176. u32 channel;
  2177. u32 phy_mode;
  2178. u32 snr;
  2179. u32 rate;
  2180. u32 buf_len;
  2181. u16 fc;
  2182. int ret;
  2183. ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
  2184. if (ret) {
  2185. ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
  2186. dev_kfree_skb(skb);
  2187. return ret;
  2188. }
  2189. channel = __le32_to_cpu(arg.channel);
  2190. buf_len = __le32_to_cpu(arg.buf_len);
  2191. rx_status = __le32_to_cpu(arg.status);
  2192. snr = __le32_to_cpu(arg.snr);
  2193. phy_mode = __le32_to_cpu(arg.phy_mode);
  2194. rate = __le32_to_cpu(arg.rate);
  2195. memset(status, 0, sizeof(*status));
  2196. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2197. "event mgmt rx status %08x\n", rx_status);
  2198. if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
  2199. (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
  2200. WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
  2201. dev_kfree_skb(skb);
  2202. return 0;
  2203. }
  2204. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  2205. status->flag |= RX_FLAG_MMIC_ERROR;
  2206. if (rx_status & WMI_RX_STATUS_EXT_INFO) {
  2207. status->mactime =
  2208. __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
  2209. status->flag |= RX_FLAG_MACTIME_END;
  2210. }
  2211. /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
  2212. * MODE_11B. This means phy_mode is not a reliable source for the band
  2213. * of mgmt rx.
  2214. */
  2215. if (channel >= 1 && channel <= 14) {
  2216. status->band = NL80211_BAND_2GHZ;
  2217. } else if (channel >= 36 && channel <= 169) {
  2218. status->band = NL80211_BAND_5GHZ;
  2219. } else {
  2220. /* Shouldn't happen unless list of advertised channels to
  2221. * mac80211 has been changed.
  2222. */
  2223. WARN_ON_ONCE(1);
  2224. dev_kfree_skb(skb);
  2225. return 0;
  2226. }
  2227. if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
  2228. ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  2229. sband = &ar->mac.sbands[status->band];
  2230. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  2231. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  2232. status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
  2233. hdr = (struct ieee80211_hdr *)skb->data;
  2234. fc = le16_to_cpu(hdr->frame_control);
  2235. /* Firmware is guaranteed to report all essential management frames via
  2236. * WMI while it can deliver some extra via HTT. Since there can be
  2237. * duplicates split the reporting wrt monitor/sniffing.
  2238. */
  2239. status->flag |= RX_FLAG_SKIP_MONITOR;
  2240. ath10k_wmi_handle_wep_reauth(ar, skb, status);
  2241. if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
  2242. status->flag |= RX_FLAG_DECRYPTED;
  2243. if (!ieee80211_is_action(hdr->frame_control) &&
  2244. !ieee80211_is_deauth(hdr->frame_control) &&
  2245. !ieee80211_is_disassoc(hdr->frame_control)) {
  2246. status->flag |= RX_FLAG_IV_STRIPPED |
  2247. RX_FLAG_MMIC_STRIPPED;
  2248. hdr->frame_control = __cpu_to_le16(fc &
  2249. ~IEEE80211_FCTL_PROTECTED);
  2250. }
  2251. }
  2252. if (ieee80211_is_beacon(hdr->frame_control))
  2253. ath10k_mac_handle_beacon(ar, skb);
  2254. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2255. "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
  2256. skb, skb->len,
  2257. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  2258. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2259. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  2260. status->freq, status->band, status->signal,
  2261. status->rate_idx);
  2262. ieee80211_rx(ar->hw, skb);
  2263. return 0;
  2264. }
  2265. static int freq_to_idx(struct ath10k *ar, int freq)
  2266. {
  2267. struct ieee80211_supported_band *sband;
  2268. int band, ch, idx = 0;
  2269. for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
  2270. sband = ar->hw->wiphy->bands[band];
  2271. if (!sband)
  2272. continue;
  2273. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  2274. if (sband->channels[ch].center_freq == freq)
  2275. goto exit;
  2276. }
  2277. exit:
  2278. return idx;
  2279. }
  2280. static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
  2281. struct wmi_ch_info_ev_arg *arg)
  2282. {
  2283. struct wmi_chan_info_event *ev = (void *)skb->data;
  2284. if (skb->len < sizeof(*ev))
  2285. return -EPROTO;
  2286. skb_pull(skb, sizeof(*ev));
  2287. arg->err_code = ev->err_code;
  2288. arg->freq = ev->freq;
  2289. arg->cmd_flags = ev->cmd_flags;
  2290. arg->noise_floor = ev->noise_floor;
  2291. arg->rx_clear_count = ev->rx_clear_count;
  2292. arg->cycle_count = ev->cycle_count;
  2293. return 0;
  2294. }
  2295. static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
  2296. struct sk_buff *skb,
  2297. struct wmi_ch_info_ev_arg *arg)
  2298. {
  2299. struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
  2300. if (skb->len < sizeof(*ev))
  2301. return -EPROTO;
  2302. skb_pull(skb, sizeof(*ev));
  2303. arg->err_code = ev->err_code;
  2304. arg->freq = ev->freq;
  2305. arg->cmd_flags = ev->cmd_flags;
  2306. arg->noise_floor = ev->noise_floor;
  2307. arg->rx_clear_count = ev->rx_clear_count;
  2308. arg->cycle_count = ev->cycle_count;
  2309. arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
  2310. arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
  2311. arg->rx_frame_count = ev->rx_frame_count;
  2312. return 0;
  2313. }
  2314. void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  2315. {
  2316. struct wmi_ch_info_ev_arg arg = {};
  2317. struct survey_info *survey;
  2318. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  2319. int idx, ret;
  2320. ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
  2321. if (ret) {
  2322. ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
  2323. return;
  2324. }
  2325. err_code = __le32_to_cpu(arg.err_code);
  2326. freq = __le32_to_cpu(arg.freq);
  2327. cmd_flags = __le32_to_cpu(arg.cmd_flags);
  2328. noise_floor = __le32_to_cpu(arg.noise_floor);
  2329. rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
  2330. cycle_count = __le32_to_cpu(arg.cycle_count);
  2331. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2332. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  2333. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  2334. cycle_count);
  2335. spin_lock_bh(&ar->data_lock);
  2336. switch (ar->scan.state) {
  2337. case ATH10K_SCAN_IDLE:
  2338. case ATH10K_SCAN_STARTING:
  2339. ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
  2340. goto exit;
  2341. case ATH10K_SCAN_RUNNING:
  2342. case ATH10K_SCAN_ABORTING:
  2343. break;
  2344. }
  2345. idx = freq_to_idx(ar, freq);
  2346. if (idx >= ARRAY_SIZE(ar->survey)) {
  2347. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  2348. freq, idx);
  2349. goto exit;
  2350. }
  2351. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  2352. if (ar->ch_info_can_report_survey) {
  2353. survey = &ar->survey[idx];
  2354. survey->noise = noise_floor;
  2355. survey->filled = SURVEY_INFO_NOISE_DBM;
  2356. ath10k_hw_fill_survey_time(ar,
  2357. survey,
  2358. cycle_count,
  2359. rx_clear_count,
  2360. ar->survey_last_cycle_count,
  2361. ar->survey_last_rx_clear_count);
  2362. }
  2363. ar->ch_info_can_report_survey = false;
  2364. } else {
  2365. ar->ch_info_can_report_survey = true;
  2366. }
  2367. if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
  2368. ar->survey_last_rx_clear_count = rx_clear_count;
  2369. ar->survey_last_cycle_count = cycle_count;
  2370. }
  2371. exit:
  2372. spin_unlock_bh(&ar->data_lock);
  2373. }
  2374. void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  2375. {
  2376. struct wmi_echo_ev_arg arg = {};
  2377. int ret;
  2378. ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
  2379. if (ret) {
  2380. ath10k_warn(ar, "failed to parse echo: %d\n", ret);
  2381. return;
  2382. }
  2383. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2384. "wmi event echo value 0x%08x\n",
  2385. le32_to_cpu(arg.value));
  2386. if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
  2387. complete(&ar->wmi.barrier);
  2388. }
  2389. int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  2390. {
  2391. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  2392. skb->len);
  2393. trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
  2394. return 0;
  2395. }
  2396. void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
  2397. struct ath10k_fw_stats_pdev *dst)
  2398. {
  2399. dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
  2400. dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
  2401. dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
  2402. dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
  2403. dst->cycle_count = __le32_to_cpu(src->cycle_count);
  2404. dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
  2405. dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
  2406. }
  2407. void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
  2408. struct ath10k_fw_stats_pdev *dst)
  2409. {
  2410. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2411. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2412. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2413. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2414. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2415. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2416. dst->local_freed = __le32_to_cpu(src->local_freed);
  2417. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2418. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2419. dst->underrun = __le32_to_cpu(src->underrun);
  2420. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2421. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2422. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2423. dst->data_rc = __le32_to_cpu(src->data_rc);
  2424. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2425. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2426. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2427. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2428. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2429. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2430. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2431. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2432. }
  2433. static void
  2434. ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
  2435. struct ath10k_fw_stats_pdev *dst)
  2436. {
  2437. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2438. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2439. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2440. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2441. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2442. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2443. dst->local_freed = __le32_to_cpu(src->local_freed);
  2444. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2445. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2446. dst->underrun = __le32_to_cpu(src->underrun);
  2447. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2448. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2449. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2450. dst->data_rc = __le32_to_cpu(src->data_rc);
  2451. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2452. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2453. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2454. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2455. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2456. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2457. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2458. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2459. dst->hw_paused = __le32_to_cpu(src->hw_paused);
  2460. dst->seq_posted = __le32_to_cpu(src->seq_posted);
  2461. dst->seq_failed_queueing =
  2462. __le32_to_cpu(src->seq_failed_queueing);
  2463. dst->seq_completed = __le32_to_cpu(src->seq_completed);
  2464. dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
  2465. dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
  2466. dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
  2467. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2468. dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
  2469. dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
  2470. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2471. dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
  2472. }
  2473. void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
  2474. struct ath10k_fw_stats_pdev *dst)
  2475. {
  2476. dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
  2477. dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
  2478. dst->r0_frags = __le32_to_cpu(src->r0_frags);
  2479. dst->r1_frags = __le32_to_cpu(src->r1_frags);
  2480. dst->r2_frags = __le32_to_cpu(src->r2_frags);
  2481. dst->r3_frags = __le32_to_cpu(src->r3_frags);
  2482. dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
  2483. dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
  2484. dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
  2485. dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
  2486. dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
  2487. dst->phy_errs = __le32_to_cpu(src->phy_errs);
  2488. dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
  2489. dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
  2490. }
  2491. void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
  2492. struct ath10k_fw_stats_pdev *dst)
  2493. {
  2494. dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
  2495. dst->rts_bad = __le32_to_cpu(src->rts_bad);
  2496. dst->rts_good = __le32_to_cpu(src->rts_good);
  2497. dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
  2498. dst->no_beacons = __le32_to_cpu(src->no_beacons);
  2499. dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
  2500. }
  2501. void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
  2502. struct ath10k_fw_stats_peer *dst)
  2503. {
  2504. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2505. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2506. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2507. }
  2508. static void
  2509. ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
  2510. struct ath10k_fw_stats_peer *dst)
  2511. {
  2512. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2513. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2514. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2515. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2516. }
  2517. static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
  2518. struct sk_buff *skb,
  2519. struct ath10k_fw_stats *stats)
  2520. {
  2521. const struct wmi_stats_event *ev = (void *)skb->data;
  2522. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2523. int i;
  2524. if (!skb_pull(skb, sizeof(*ev)))
  2525. return -EPROTO;
  2526. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2527. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2528. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2529. for (i = 0; i < num_pdev_stats; i++) {
  2530. const struct wmi_pdev_stats *src;
  2531. struct ath10k_fw_stats_pdev *dst;
  2532. src = (void *)skb->data;
  2533. if (!skb_pull(skb, sizeof(*src)))
  2534. return -EPROTO;
  2535. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2536. if (!dst)
  2537. continue;
  2538. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2539. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2540. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2541. list_add_tail(&dst->list, &stats->pdevs);
  2542. }
  2543. /* fw doesn't implement vdev stats */
  2544. for (i = 0; i < num_peer_stats; i++) {
  2545. const struct wmi_peer_stats *src;
  2546. struct ath10k_fw_stats_peer *dst;
  2547. src = (void *)skb->data;
  2548. if (!skb_pull(skb, sizeof(*src)))
  2549. return -EPROTO;
  2550. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2551. if (!dst)
  2552. continue;
  2553. ath10k_wmi_pull_peer_stats(src, dst);
  2554. list_add_tail(&dst->list, &stats->peers);
  2555. }
  2556. return 0;
  2557. }
  2558. static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
  2559. struct sk_buff *skb,
  2560. struct ath10k_fw_stats *stats)
  2561. {
  2562. const struct wmi_stats_event *ev = (void *)skb->data;
  2563. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2564. int i;
  2565. if (!skb_pull(skb, sizeof(*ev)))
  2566. return -EPROTO;
  2567. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2568. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2569. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2570. for (i = 0; i < num_pdev_stats; i++) {
  2571. const struct wmi_10x_pdev_stats *src;
  2572. struct ath10k_fw_stats_pdev *dst;
  2573. src = (void *)skb->data;
  2574. if (!skb_pull(skb, sizeof(*src)))
  2575. return -EPROTO;
  2576. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2577. if (!dst)
  2578. continue;
  2579. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2580. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2581. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2582. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2583. list_add_tail(&dst->list, &stats->pdevs);
  2584. }
  2585. /* fw doesn't implement vdev stats */
  2586. for (i = 0; i < num_peer_stats; i++) {
  2587. const struct wmi_10x_peer_stats *src;
  2588. struct ath10k_fw_stats_peer *dst;
  2589. src = (void *)skb->data;
  2590. if (!skb_pull(skb, sizeof(*src)))
  2591. return -EPROTO;
  2592. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2593. if (!dst)
  2594. continue;
  2595. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2596. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2597. list_add_tail(&dst->list, &stats->peers);
  2598. }
  2599. return 0;
  2600. }
  2601. static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
  2602. struct sk_buff *skb,
  2603. struct ath10k_fw_stats *stats)
  2604. {
  2605. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2606. u32 num_pdev_stats;
  2607. u32 num_pdev_ext_stats;
  2608. u32 num_vdev_stats;
  2609. u32 num_peer_stats;
  2610. int i;
  2611. if (!skb_pull(skb, sizeof(*ev)))
  2612. return -EPROTO;
  2613. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2614. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2615. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2616. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2617. for (i = 0; i < num_pdev_stats; i++) {
  2618. const struct wmi_10_2_pdev_stats *src;
  2619. struct ath10k_fw_stats_pdev *dst;
  2620. src = (void *)skb->data;
  2621. if (!skb_pull(skb, sizeof(*src)))
  2622. return -EPROTO;
  2623. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2624. if (!dst)
  2625. continue;
  2626. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2627. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2628. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2629. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2630. /* FIXME: expose 10.2 specific values */
  2631. list_add_tail(&dst->list, &stats->pdevs);
  2632. }
  2633. for (i = 0; i < num_pdev_ext_stats; i++) {
  2634. const struct wmi_10_2_pdev_ext_stats *src;
  2635. src = (void *)skb->data;
  2636. if (!skb_pull(skb, sizeof(*src)))
  2637. return -EPROTO;
  2638. /* FIXME: expose values to userspace
  2639. *
  2640. * Note: Even though this loop seems to do nothing it is
  2641. * required to parse following sub-structures properly.
  2642. */
  2643. }
  2644. /* fw doesn't implement vdev stats */
  2645. for (i = 0; i < num_peer_stats; i++) {
  2646. const struct wmi_10_2_peer_stats *src;
  2647. struct ath10k_fw_stats_peer *dst;
  2648. src = (void *)skb->data;
  2649. if (!skb_pull(skb, sizeof(*src)))
  2650. return -EPROTO;
  2651. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2652. if (!dst)
  2653. continue;
  2654. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2655. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2656. /* FIXME: expose 10.2 specific values */
  2657. list_add_tail(&dst->list, &stats->peers);
  2658. }
  2659. return 0;
  2660. }
  2661. static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
  2662. struct sk_buff *skb,
  2663. struct ath10k_fw_stats *stats)
  2664. {
  2665. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2666. u32 num_pdev_stats;
  2667. u32 num_pdev_ext_stats;
  2668. u32 num_vdev_stats;
  2669. u32 num_peer_stats;
  2670. int i;
  2671. if (!skb_pull(skb, sizeof(*ev)))
  2672. return -EPROTO;
  2673. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2674. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2675. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2676. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2677. for (i = 0; i < num_pdev_stats; i++) {
  2678. const struct wmi_10_2_pdev_stats *src;
  2679. struct ath10k_fw_stats_pdev *dst;
  2680. src = (void *)skb->data;
  2681. if (!skb_pull(skb, sizeof(*src)))
  2682. return -EPROTO;
  2683. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2684. if (!dst)
  2685. continue;
  2686. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2687. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2688. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2689. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2690. /* FIXME: expose 10.2 specific values */
  2691. list_add_tail(&dst->list, &stats->pdevs);
  2692. }
  2693. for (i = 0; i < num_pdev_ext_stats; i++) {
  2694. const struct wmi_10_2_pdev_ext_stats *src;
  2695. src = (void *)skb->data;
  2696. if (!skb_pull(skb, sizeof(*src)))
  2697. return -EPROTO;
  2698. /* FIXME: expose values to userspace
  2699. *
  2700. * Note: Even though this loop seems to do nothing it is
  2701. * required to parse following sub-structures properly.
  2702. */
  2703. }
  2704. /* fw doesn't implement vdev stats */
  2705. for (i = 0; i < num_peer_stats; i++) {
  2706. const struct wmi_10_2_4_ext_peer_stats *src;
  2707. struct ath10k_fw_stats_peer *dst;
  2708. int stats_len;
  2709. if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  2710. stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
  2711. else
  2712. stats_len = sizeof(struct wmi_10_2_4_peer_stats);
  2713. src = (void *)skb->data;
  2714. if (!skb_pull(skb, stats_len))
  2715. return -EPROTO;
  2716. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2717. if (!dst)
  2718. continue;
  2719. ath10k_wmi_pull_peer_stats(&src->common.old, dst);
  2720. dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
  2721. if (ath10k_peer_stats_enabled(ar))
  2722. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2723. /* FIXME: expose 10.2 specific values */
  2724. list_add_tail(&dst->list, &stats->peers);
  2725. }
  2726. return 0;
  2727. }
  2728. static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
  2729. struct sk_buff *skb,
  2730. struct ath10k_fw_stats *stats)
  2731. {
  2732. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2733. u32 num_pdev_stats;
  2734. u32 num_pdev_ext_stats;
  2735. u32 num_vdev_stats;
  2736. u32 num_peer_stats;
  2737. u32 num_bcnflt_stats;
  2738. u32 stats_id;
  2739. int i;
  2740. if (!skb_pull(skb, sizeof(*ev)))
  2741. return -EPROTO;
  2742. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2743. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2744. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2745. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2746. num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
  2747. stats_id = __le32_to_cpu(ev->stats_id);
  2748. for (i = 0; i < num_pdev_stats; i++) {
  2749. const struct wmi_10_4_pdev_stats *src;
  2750. struct ath10k_fw_stats_pdev *dst;
  2751. src = (void *)skb->data;
  2752. if (!skb_pull(skb, sizeof(*src)))
  2753. return -EPROTO;
  2754. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2755. if (!dst)
  2756. continue;
  2757. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2758. ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
  2759. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2760. dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
  2761. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2762. list_add_tail(&dst->list, &stats->pdevs);
  2763. }
  2764. for (i = 0; i < num_pdev_ext_stats; i++) {
  2765. const struct wmi_10_2_pdev_ext_stats *src;
  2766. src = (void *)skb->data;
  2767. if (!skb_pull(skb, sizeof(*src)))
  2768. return -EPROTO;
  2769. /* FIXME: expose values to userspace
  2770. *
  2771. * Note: Even though this loop seems to do nothing it is
  2772. * required to parse following sub-structures properly.
  2773. */
  2774. }
  2775. /* fw doesn't implement vdev stats */
  2776. for (i = 0; i < num_peer_stats; i++) {
  2777. const struct wmi_10_4_peer_stats *src;
  2778. struct ath10k_fw_stats_peer *dst;
  2779. src = (void *)skb->data;
  2780. if (!skb_pull(skb, sizeof(*src)))
  2781. return -EPROTO;
  2782. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2783. if (!dst)
  2784. continue;
  2785. ath10k_wmi_10_4_pull_peer_stats(src, dst);
  2786. list_add_tail(&dst->list, &stats->peers);
  2787. }
  2788. for (i = 0; i < num_bcnflt_stats; i++) {
  2789. const struct wmi_10_4_bss_bcn_filter_stats *src;
  2790. src = (void *)skb->data;
  2791. if (!skb_pull(skb, sizeof(*src)))
  2792. return -EPROTO;
  2793. /* FIXME: expose values to userspace
  2794. *
  2795. * Note: Even though this loop seems to do nothing it is
  2796. * required to parse following sub-structures properly.
  2797. */
  2798. }
  2799. if ((stats_id & WMI_10_4_STAT_PEER_EXTD) == 0)
  2800. return 0;
  2801. stats->extended = true;
  2802. for (i = 0; i < num_peer_stats; i++) {
  2803. const struct wmi_10_4_peer_extd_stats *src;
  2804. struct ath10k_fw_extd_stats_peer *dst;
  2805. src = (void *)skb->data;
  2806. if (!skb_pull(skb, sizeof(*src)))
  2807. return -EPROTO;
  2808. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2809. if (!dst)
  2810. continue;
  2811. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2812. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2813. list_add_tail(&dst->list, &stats->peers_extd);
  2814. }
  2815. return 0;
  2816. }
  2817. void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
  2818. {
  2819. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  2820. ath10k_debug_fw_stats_process(ar, skb);
  2821. }
  2822. static int
  2823. ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
  2824. struct wmi_vdev_start_ev_arg *arg)
  2825. {
  2826. struct wmi_vdev_start_response_event *ev = (void *)skb->data;
  2827. if (skb->len < sizeof(*ev))
  2828. return -EPROTO;
  2829. skb_pull(skb, sizeof(*ev));
  2830. arg->vdev_id = ev->vdev_id;
  2831. arg->req_id = ev->req_id;
  2832. arg->resp_type = ev->resp_type;
  2833. arg->status = ev->status;
  2834. return 0;
  2835. }
  2836. void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
  2837. {
  2838. struct wmi_vdev_start_ev_arg arg = {};
  2839. int ret;
  2840. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  2841. ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
  2842. if (ret) {
  2843. ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
  2844. return;
  2845. }
  2846. if (WARN_ON(__le32_to_cpu(arg.status)))
  2847. return;
  2848. complete(&ar->vdev_setup_done);
  2849. }
  2850. void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
  2851. {
  2852. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  2853. complete(&ar->vdev_setup_done);
  2854. }
  2855. static int
  2856. ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
  2857. struct wmi_peer_kick_ev_arg *arg)
  2858. {
  2859. struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
  2860. if (skb->len < sizeof(*ev))
  2861. return -EPROTO;
  2862. skb_pull(skb, sizeof(*ev));
  2863. arg->mac_addr = ev->peer_macaddr.addr;
  2864. return 0;
  2865. }
  2866. void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
  2867. {
  2868. struct wmi_peer_kick_ev_arg arg = {};
  2869. struct ieee80211_sta *sta;
  2870. int ret;
  2871. ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
  2872. if (ret) {
  2873. ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
  2874. ret);
  2875. return;
  2876. }
  2877. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
  2878. arg.mac_addr);
  2879. rcu_read_lock();
  2880. sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
  2881. if (!sta) {
  2882. ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
  2883. arg.mac_addr);
  2884. goto exit;
  2885. }
  2886. ieee80211_report_low_ack(sta, 10);
  2887. exit:
  2888. rcu_read_unlock();
  2889. }
  2890. /*
  2891. * FIXME
  2892. *
  2893. * We don't report to mac80211 sleep state of connected
  2894. * stations. Due to this mac80211 can't fill in TIM IE
  2895. * correctly.
  2896. *
  2897. * I know of no way of getting nullfunc frames that contain
  2898. * sleep transition from connected stations - these do not
  2899. * seem to be sent from the target to the host. There also
  2900. * doesn't seem to be a dedicated event for that. So the
  2901. * only way left to do this would be to read tim_bitmap
  2902. * during SWBA.
  2903. *
  2904. * We could probably try using tim_bitmap from SWBA to tell
  2905. * mac80211 which stations are asleep and which are not. The
  2906. * problem here is calling mac80211 functions so many times
  2907. * could take too long and make us miss the time to submit
  2908. * the beacon to the target.
  2909. *
  2910. * So as a workaround we try to extend the TIM IE if there
  2911. * is unicast buffered for stations with aid > 7 and fill it
  2912. * in ourselves.
  2913. */
  2914. static void ath10k_wmi_update_tim(struct ath10k *ar,
  2915. struct ath10k_vif *arvif,
  2916. struct sk_buff *bcn,
  2917. const struct wmi_tim_info_arg *tim_info)
  2918. {
  2919. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  2920. struct ieee80211_tim_ie *tim;
  2921. u8 *ies, *ie;
  2922. u8 ie_len, pvm_len;
  2923. __le32 t;
  2924. u32 v, tim_len;
  2925. /* When FW reports 0 in tim_len, ensure atleast first byte
  2926. * in tim_bitmap is considered for pvm calculation.
  2927. */
  2928. tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
  2929. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  2930. * we must copy the bitmap upon change and reuse it later
  2931. */
  2932. if (__le32_to_cpu(tim_info->tim_changed)) {
  2933. int i;
  2934. if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
  2935. ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
  2936. tim_len, sizeof(arvif->u.ap.tim_bitmap));
  2937. tim_len = sizeof(arvif->u.ap.tim_bitmap);
  2938. }
  2939. for (i = 0; i < tim_len; i++) {
  2940. t = tim_info->tim_bitmap[i / 4];
  2941. v = __le32_to_cpu(t);
  2942. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  2943. }
  2944. /* FW reports either length 0 or length based on max supported
  2945. * station. so we calculate this on our own
  2946. */
  2947. arvif->u.ap.tim_len = 0;
  2948. for (i = 0; i < tim_len; i++)
  2949. if (arvif->u.ap.tim_bitmap[i])
  2950. arvif->u.ap.tim_len = i;
  2951. arvif->u.ap.tim_len++;
  2952. }
  2953. ies = bcn->data;
  2954. ies += ieee80211_hdrlen(hdr->frame_control);
  2955. ies += 12; /* fixed parameters */
  2956. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  2957. (u8 *)skb_tail_pointer(bcn) - ies);
  2958. if (!ie) {
  2959. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  2960. ath10k_warn(ar, "no tim ie found;\n");
  2961. return;
  2962. }
  2963. tim = (void *)ie + 2;
  2964. ie_len = ie[1];
  2965. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  2966. if (pvm_len < arvif->u.ap.tim_len) {
  2967. int expand_size = tim_len - pvm_len;
  2968. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  2969. void *next_ie = ie + 2 + ie_len;
  2970. if (skb_put(bcn, expand_size)) {
  2971. memmove(next_ie + expand_size, next_ie, move_size);
  2972. ie[1] += expand_size;
  2973. ie_len += expand_size;
  2974. pvm_len += expand_size;
  2975. } else {
  2976. ath10k_warn(ar, "tim expansion failed\n");
  2977. }
  2978. }
  2979. if (pvm_len > tim_len) {
  2980. ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
  2981. return;
  2982. }
  2983. tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
  2984. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  2985. if (tim->dtim_count == 0) {
  2986. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
  2987. if (__le32_to_cpu(tim_info->tim_mcast) == 1)
  2988. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
  2989. }
  2990. ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  2991. tim->dtim_count, tim->dtim_period,
  2992. tim->bitmap_ctrl, pvm_len);
  2993. }
  2994. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  2995. struct sk_buff *bcn,
  2996. const struct wmi_p2p_noa_info *noa)
  2997. {
  2998. if (!arvif->vif->p2p)
  2999. return;
  3000. ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  3001. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
  3002. ath10k_p2p_noa_update(arvif, noa);
  3003. if (arvif->u.ap.noa_data)
  3004. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  3005. skb_put_data(bcn, arvif->u.ap.noa_data,
  3006. arvif->u.ap.noa_len);
  3007. }
  3008. static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
  3009. struct wmi_swba_ev_arg *arg)
  3010. {
  3011. struct wmi_host_swba_event *ev = (void *)skb->data;
  3012. u32 map;
  3013. size_t i;
  3014. if (skb->len < sizeof(*ev))
  3015. return -EPROTO;
  3016. skb_pull(skb, sizeof(*ev));
  3017. arg->vdev_map = ev->vdev_map;
  3018. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3019. if (!(map & BIT(0)))
  3020. continue;
  3021. /* If this happens there were some changes in firmware and
  3022. * ath10k should update the max size of tim_info array.
  3023. */
  3024. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3025. break;
  3026. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3027. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3028. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3029. return -EPROTO;
  3030. }
  3031. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3032. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3033. arg->tim_info[i].tim_bitmap =
  3034. ev->bcn_info[i].tim_info.tim_bitmap;
  3035. arg->tim_info[i].tim_changed =
  3036. ev->bcn_info[i].tim_info.tim_changed;
  3037. arg->tim_info[i].tim_num_ps_pending =
  3038. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3039. arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
  3040. i++;
  3041. }
  3042. return 0;
  3043. }
  3044. static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
  3045. struct sk_buff *skb,
  3046. struct wmi_swba_ev_arg *arg)
  3047. {
  3048. struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
  3049. u32 map;
  3050. size_t i;
  3051. if (skb->len < sizeof(*ev))
  3052. return -EPROTO;
  3053. skb_pull(skb, sizeof(*ev));
  3054. arg->vdev_map = ev->vdev_map;
  3055. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3056. if (!(map & BIT(0)))
  3057. continue;
  3058. /* If this happens there were some changes in firmware and
  3059. * ath10k should update the max size of tim_info array.
  3060. */
  3061. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3062. break;
  3063. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3064. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3065. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3066. return -EPROTO;
  3067. }
  3068. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3069. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3070. arg->tim_info[i].tim_bitmap =
  3071. ev->bcn_info[i].tim_info.tim_bitmap;
  3072. arg->tim_info[i].tim_changed =
  3073. ev->bcn_info[i].tim_info.tim_changed;
  3074. arg->tim_info[i].tim_num_ps_pending =
  3075. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3076. i++;
  3077. }
  3078. return 0;
  3079. }
  3080. static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
  3081. struct sk_buff *skb,
  3082. struct wmi_swba_ev_arg *arg)
  3083. {
  3084. struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
  3085. u32 map, tim_len;
  3086. size_t i;
  3087. if (skb->len < sizeof(*ev))
  3088. return -EPROTO;
  3089. skb_pull(skb, sizeof(*ev));
  3090. arg->vdev_map = ev->vdev_map;
  3091. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3092. if (!(map & BIT(0)))
  3093. continue;
  3094. /* If this happens there were some changes in firmware and
  3095. * ath10k should update the max size of tim_info array.
  3096. */
  3097. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3098. break;
  3099. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3100. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3101. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3102. return -EPROTO;
  3103. }
  3104. tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
  3105. if (tim_len) {
  3106. /* Exclude 4 byte guard length */
  3107. tim_len -= 4;
  3108. arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
  3109. } else {
  3110. arg->tim_info[i].tim_len = 0;
  3111. }
  3112. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3113. arg->tim_info[i].tim_bitmap =
  3114. ev->bcn_info[i].tim_info.tim_bitmap;
  3115. arg->tim_info[i].tim_changed =
  3116. ev->bcn_info[i].tim_info.tim_changed;
  3117. arg->tim_info[i].tim_num_ps_pending =
  3118. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3119. /* 10.4 firmware doesn't have p2p support. notice of absence
  3120. * info can be ignored for now.
  3121. */
  3122. i++;
  3123. }
  3124. return 0;
  3125. }
  3126. static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
  3127. {
  3128. return WMI_TXBF_CONF_BEFORE_ASSOC;
  3129. }
  3130. void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  3131. {
  3132. struct wmi_swba_ev_arg arg = {};
  3133. u32 map;
  3134. int i = -1;
  3135. const struct wmi_tim_info_arg *tim_info;
  3136. const struct wmi_p2p_noa_info *noa_info;
  3137. struct ath10k_vif *arvif;
  3138. struct sk_buff *bcn;
  3139. dma_addr_t paddr;
  3140. int ret, vdev_id = 0;
  3141. ret = ath10k_wmi_pull_swba(ar, skb, &arg);
  3142. if (ret) {
  3143. ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
  3144. return;
  3145. }
  3146. map = __le32_to_cpu(arg.vdev_map);
  3147. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  3148. map);
  3149. for (; map; map >>= 1, vdev_id++) {
  3150. if (!(map & 0x1))
  3151. continue;
  3152. i++;
  3153. if (i >= WMI_MAX_AP_VDEV) {
  3154. ath10k_warn(ar, "swba has corrupted vdev map\n");
  3155. break;
  3156. }
  3157. tim_info = &arg.tim_info[i];
  3158. noa_info = arg.noa_info[i];
  3159. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  3160. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  3161. i,
  3162. __le32_to_cpu(tim_info->tim_len),
  3163. __le32_to_cpu(tim_info->tim_mcast),
  3164. __le32_to_cpu(tim_info->tim_changed),
  3165. __le32_to_cpu(tim_info->tim_num_ps_pending),
  3166. __le32_to_cpu(tim_info->tim_bitmap[3]),
  3167. __le32_to_cpu(tim_info->tim_bitmap[2]),
  3168. __le32_to_cpu(tim_info->tim_bitmap[1]),
  3169. __le32_to_cpu(tim_info->tim_bitmap[0]));
  3170. /* TODO: Only first 4 word from tim_bitmap is dumped.
  3171. * Extend debug code to dump full tim_bitmap.
  3172. */
  3173. arvif = ath10k_get_arvif(ar, vdev_id);
  3174. if (arvif == NULL) {
  3175. ath10k_warn(ar, "no vif for vdev_id %d found\n",
  3176. vdev_id);
  3177. continue;
  3178. }
  3179. /* mac80211 would have already asked us to stop beaconing and
  3180. * bring the vdev down, so continue in that case
  3181. */
  3182. if (!arvif->is_up)
  3183. continue;
  3184. /* There are no completions for beacons so wait for next SWBA
  3185. * before telling mac80211 to decrement CSA counter
  3186. *
  3187. * Once CSA counter is completed stop sending beacons until
  3188. * actual channel switch is done
  3189. */
  3190. if (arvif->vif->csa_active &&
  3191. ieee80211_csa_is_complete(arvif->vif)) {
  3192. ieee80211_csa_finish(arvif->vif);
  3193. continue;
  3194. }
  3195. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  3196. if (!bcn) {
  3197. ath10k_warn(ar, "could not get mac80211 beacon\n");
  3198. continue;
  3199. }
  3200. ath10k_tx_h_seq_no(arvif->vif, bcn);
  3201. ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
  3202. ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
  3203. spin_lock_bh(&ar->data_lock);
  3204. if (arvif->beacon) {
  3205. switch (arvif->beacon_state) {
  3206. case ATH10K_BEACON_SENT:
  3207. break;
  3208. case ATH10K_BEACON_SCHEDULED:
  3209. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
  3210. arvif->vdev_id);
  3211. break;
  3212. case ATH10K_BEACON_SENDING:
  3213. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
  3214. arvif->vdev_id);
  3215. dev_kfree_skb(bcn);
  3216. goto skip;
  3217. }
  3218. ath10k_mac_vif_beacon_free(arvif);
  3219. }
  3220. if (!arvif->beacon_buf) {
  3221. paddr = dma_map_single(arvif->ar->dev, bcn->data,
  3222. bcn->len, DMA_TO_DEVICE);
  3223. ret = dma_mapping_error(arvif->ar->dev, paddr);
  3224. if (ret) {
  3225. ath10k_warn(ar, "failed to map beacon: %d\n",
  3226. ret);
  3227. dev_kfree_skb_any(bcn);
  3228. goto skip;
  3229. }
  3230. ATH10K_SKB_CB(bcn)->paddr = paddr;
  3231. } else {
  3232. if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
  3233. ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
  3234. bcn->len, IEEE80211_MAX_FRAME_LEN);
  3235. skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
  3236. }
  3237. memcpy(arvif->beacon_buf, bcn->data, bcn->len);
  3238. ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
  3239. }
  3240. arvif->beacon = bcn;
  3241. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  3242. trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
  3243. trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
  3244. skip:
  3245. spin_unlock_bh(&ar->data_lock);
  3246. }
  3247. ath10k_wmi_tx_beacons_nowait(ar);
  3248. }
  3249. void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
  3250. {
  3251. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  3252. }
  3253. static void ath10k_dfs_radar_report(struct ath10k *ar,
  3254. struct wmi_phyerr_ev_arg *phyerr,
  3255. const struct phyerr_radar_report *rr,
  3256. u64 tsf)
  3257. {
  3258. u32 reg0, reg1, tsf32l;
  3259. struct ieee80211_channel *ch;
  3260. struct pulse_event pe;
  3261. u64 tsf64;
  3262. u8 rssi, width;
  3263. reg0 = __le32_to_cpu(rr->reg0);
  3264. reg1 = __le32_to_cpu(rr->reg1);
  3265. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3266. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  3267. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  3268. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  3269. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  3270. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  3271. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3272. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  3273. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  3274. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  3275. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  3276. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  3277. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  3278. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3279. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  3280. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  3281. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  3282. if (!ar->dfs_detector)
  3283. return;
  3284. spin_lock_bh(&ar->data_lock);
  3285. ch = ar->rx_channel;
  3286. /* fetch target operating channel during channel change */
  3287. if (!ch)
  3288. ch = ar->tgt_oper_chan;
  3289. spin_unlock_bh(&ar->data_lock);
  3290. if (!ch) {
  3291. ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
  3292. goto radar_detected;
  3293. }
  3294. /* report event to DFS pattern detector */
  3295. tsf32l = phyerr->tsf_timestamp;
  3296. tsf64 = tsf & (~0xFFFFFFFFULL);
  3297. tsf64 |= tsf32l;
  3298. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  3299. rssi = phyerr->rssi_combined;
  3300. /* hardware store this as 8 bit signed value,
  3301. * set to zero if negative number
  3302. */
  3303. if (rssi & 0x80)
  3304. rssi = 0;
  3305. pe.ts = tsf64;
  3306. pe.freq = ch->center_freq;
  3307. pe.width = width;
  3308. pe.rssi = rssi;
  3309. pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
  3310. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3311. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  3312. pe.freq, pe.width, pe.rssi, pe.ts);
  3313. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  3314. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
  3315. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3316. "dfs no pulse pattern detected, yet\n");
  3317. return;
  3318. }
  3319. radar_detected:
  3320. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  3321. ATH10K_DFS_STAT_INC(ar, radar_detected);
  3322. /* Control radar events reporting in debugfs file
  3323. * dfs_block_radar_events
  3324. */
  3325. if (ar->dfs_block_radar_events) {
  3326. ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
  3327. return;
  3328. }
  3329. ieee80211_radar_detected(ar->hw);
  3330. }
  3331. static int ath10k_dfs_fft_report(struct ath10k *ar,
  3332. struct wmi_phyerr_ev_arg *phyerr,
  3333. const struct phyerr_fft_report *fftr,
  3334. u64 tsf)
  3335. {
  3336. u32 reg0, reg1;
  3337. u8 rssi, peak_mag;
  3338. reg0 = __le32_to_cpu(fftr->reg0);
  3339. reg1 = __le32_to_cpu(fftr->reg1);
  3340. rssi = phyerr->rssi_combined;
  3341. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3342. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  3343. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  3344. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  3345. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  3346. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  3347. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3348. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  3349. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  3350. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  3351. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  3352. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  3353. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  3354. /* false event detection */
  3355. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  3356. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  3357. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  3358. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  3359. return -EINVAL;
  3360. }
  3361. return 0;
  3362. }
  3363. void ath10k_wmi_event_dfs(struct ath10k *ar,
  3364. struct wmi_phyerr_ev_arg *phyerr,
  3365. u64 tsf)
  3366. {
  3367. int buf_len, tlv_len, res, i = 0;
  3368. const struct phyerr_tlv *tlv;
  3369. const struct phyerr_radar_report *rr;
  3370. const struct phyerr_fft_report *fftr;
  3371. const u8 *tlv_buf;
  3372. buf_len = phyerr->buf_len;
  3373. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3374. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  3375. phyerr->phy_err_code, phyerr->rssi_combined,
  3376. phyerr->tsf_timestamp, tsf, buf_len);
  3377. /* Skip event if DFS disabled */
  3378. if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
  3379. return;
  3380. ATH10K_DFS_STAT_INC(ar, pulses_total);
  3381. while (i < buf_len) {
  3382. if (i + sizeof(*tlv) > buf_len) {
  3383. ath10k_warn(ar, "too short buf for tlv header (%d)\n",
  3384. i);
  3385. return;
  3386. }
  3387. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3388. tlv_len = __le16_to_cpu(tlv->len);
  3389. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3390. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3391. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  3392. tlv_len, tlv->tag, tlv->sig);
  3393. switch (tlv->tag) {
  3394. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  3395. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  3396. ath10k_warn(ar, "too short radar pulse summary (%d)\n",
  3397. i);
  3398. return;
  3399. }
  3400. rr = (struct phyerr_radar_report *)tlv_buf;
  3401. ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
  3402. break;
  3403. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3404. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  3405. ath10k_warn(ar, "too short fft report (%d)\n",
  3406. i);
  3407. return;
  3408. }
  3409. fftr = (struct phyerr_fft_report *)tlv_buf;
  3410. res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
  3411. if (res)
  3412. return;
  3413. break;
  3414. }
  3415. i += sizeof(*tlv) + tlv_len;
  3416. }
  3417. }
  3418. void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  3419. struct wmi_phyerr_ev_arg *phyerr,
  3420. u64 tsf)
  3421. {
  3422. int buf_len, tlv_len, res, i = 0;
  3423. struct phyerr_tlv *tlv;
  3424. const void *tlv_buf;
  3425. const struct phyerr_fft_report *fftr;
  3426. size_t fftr_len;
  3427. buf_len = phyerr->buf_len;
  3428. while (i < buf_len) {
  3429. if (i + sizeof(*tlv) > buf_len) {
  3430. ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
  3431. i);
  3432. return;
  3433. }
  3434. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3435. tlv_len = __le16_to_cpu(tlv->len);
  3436. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3437. if (i + sizeof(*tlv) + tlv_len > buf_len) {
  3438. ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
  3439. i);
  3440. return;
  3441. }
  3442. switch (tlv->tag) {
  3443. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3444. if (sizeof(*fftr) > tlv_len) {
  3445. ath10k_warn(ar, "failed to parse fft report at byte %d\n",
  3446. i);
  3447. return;
  3448. }
  3449. fftr_len = tlv_len - sizeof(*fftr);
  3450. fftr = tlv_buf;
  3451. res = ath10k_spectral_process_fft(ar, phyerr,
  3452. fftr, fftr_len,
  3453. tsf);
  3454. if (res < 0) {
  3455. ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
  3456. res);
  3457. return;
  3458. }
  3459. break;
  3460. }
  3461. i += sizeof(*tlv) + tlv_len;
  3462. }
  3463. }
  3464. static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3465. struct sk_buff *skb,
  3466. struct wmi_phyerr_hdr_arg *arg)
  3467. {
  3468. struct wmi_phyerr_event *ev = (void *)skb->data;
  3469. if (skb->len < sizeof(*ev))
  3470. return -EPROTO;
  3471. arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
  3472. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3473. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3474. arg->buf_len = skb->len - sizeof(*ev);
  3475. arg->phyerrs = ev->phyerrs;
  3476. return 0;
  3477. }
  3478. static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3479. struct sk_buff *skb,
  3480. struct wmi_phyerr_hdr_arg *arg)
  3481. {
  3482. struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
  3483. if (skb->len < sizeof(*ev))
  3484. return -EPROTO;
  3485. /* 10.4 firmware always reports only one phyerr */
  3486. arg->num_phyerrs = 1;
  3487. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3488. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3489. arg->buf_len = skb->len;
  3490. arg->phyerrs = skb->data;
  3491. return 0;
  3492. }
  3493. int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
  3494. const void *phyerr_buf,
  3495. int left_len,
  3496. struct wmi_phyerr_ev_arg *arg)
  3497. {
  3498. const struct wmi_phyerr *phyerr = phyerr_buf;
  3499. int i;
  3500. if (left_len < sizeof(*phyerr)) {
  3501. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3502. left_len, sizeof(*phyerr));
  3503. return -EINVAL;
  3504. }
  3505. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3506. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3507. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3508. arg->rssi_combined = phyerr->rssi_combined;
  3509. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3510. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3511. arg->buf = phyerr->buf;
  3512. arg->hdr_len = sizeof(*phyerr);
  3513. for (i = 0; i < 4; i++)
  3514. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3515. switch (phyerr->phy_err_code) {
  3516. case PHY_ERROR_GEN_SPECTRAL_SCAN:
  3517. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3518. break;
  3519. case PHY_ERROR_GEN_FALSE_RADAR_EXT:
  3520. arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
  3521. break;
  3522. case PHY_ERROR_GEN_RADAR:
  3523. arg->phy_err_code = PHY_ERROR_RADAR;
  3524. break;
  3525. default:
  3526. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3527. break;
  3528. }
  3529. return 0;
  3530. }
  3531. static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
  3532. const void *phyerr_buf,
  3533. int left_len,
  3534. struct wmi_phyerr_ev_arg *arg)
  3535. {
  3536. const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
  3537. u32 phy_err_mask;
  3538. int i;
  3539. if (left_len < sizeof(*phyerr)) {
  3540. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3541. left_len, sizeof(*phyerr));
  3542. return -EINVAL;
  3543. }
  3544. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3545. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3546. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3547. arg->rssi_combined = phyerr->rssi_combined;
  3548. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3549. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3550. arg->buf = phyerr->buf;
  3551. arg->hdr_len = sizeof(*phyerr);
  3552. for (i = 0; i < 4; i++)
  3553. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3554. phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
  3555. if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
  3556. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3557. else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
  3558. arg->phy_err_code = PHY_ERROR_RADAR;
  3559. else
  3560. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3561. return 0;
  3562. }
  3563. void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  3564. {
  3565. struct wmi_phyerr_hdr_arg hdr_arg = {};
  3566. struct wmi_phyerr_ev_arg phyerr_arg = {};
  3567. const void *phyerr;
  3568. u32 count, i, buf_len, phy_err_code;
  3569. u64 tsf;
  3570. int left_len, ret;
  3571. ATH10K_DFS_STAT_INC(ar, phy_errors);
  3572. ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
  3573. if (ret) {
  3574. ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
  3575. return;
  3576. }
  3577. /* Check number of included events */
  3578. count = hdr_arg.num_phyerrs;
  3579. left_len = hdr_arg.buf_len;
  3580. tsf = hdr_arg.tsf_u32;
  3581. tsf <<= 32;
  3582. tsf |= hdr_arg.tsf_l32;
  3583. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3584. "wmi event phyerr count %d tsf64 0x%llX\n",
  3585. count, tsf);
  3586. phyerr = hdr_arg.phyerrs;
  3587. for (i = 0; i < count; i++) {
  3588. ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
  3589. if (ret) {
  3590. ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
  3591. i);
  3592. return;
  3593. }
  3594. left_len -= phyerr_arg.hdr_len;
  3595. buf_len = phyerr_arg.buf_len;
  3596. phy_err_code = phyerr_arg.phy_err_code;
  3597. if (left_len < buf_len) {
  3598. ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
  3599. return;
  3600. }
  3601. left_len -= buf_len;
  3602. switch (phy_err_code) {
  3603. case PHY_ERROR_RADAR:
  3604. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3605. break;
  3606. case PHY_ERROR_SPECTRAL_SCAN:
  3607. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3608. break;
  3609. case PHY_ERROR_FALSE_RADAR_EXT:
  3610. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3611. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3612. break;
  3613. default:
  3614. break;
  3615. }
  3616. phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
  3617. }
  3618. }
  3619. void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  3620. {
  3621. struct wmi_roam_ev_arg arg = {};
  3622. int ret;
  3623. u32 vdev_id;
  3624. u32 reason;
  3625. s32 rssi;
  3626. ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
  3627. if (ret) {
  3628. ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
  3629. return;
  3630. }
  3631. vdev_id = __le32_to_cpu(arg.vdev_id);
  3632. reason = __le32_to_cpu(arg.reason);
  3633. rssi = __le32_to_cpu(arg.rssi);
  3634. rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
  3635. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3636. "wmi roam event vdev %u reason 0x%08x rssi %d\n",
  3637. vdev_id, reason, rssi);
  3638. if (reason >= WMI_ROAM_REASON_MAX)
  3639. ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
  3640. reason, vdev_id);
  3641. switch (reason) {
  3642. case WMI_ROAM_REASON_BEACON_MISS:
  3643. ath10k_mac_handle_beacon_miss(ar, vdev_id);
  3644. break;
  3645. case WMI_ROAM_REASON_BETTER_AP:
  3646. case WMI_ROAM_REASON_LOW_RSSI:
  3647. case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
  3648. case WMI_ROAM_REASON_HO_FAILED:
  3649. ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
  3650. reason, vdev_id);
  3651. break;
  3652. }
  3653. }
  3654. void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
  3655. {
  3656. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  3657. }
  3658. void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
  3659. {
  3660. char buf[101], c;
  3661. int i;
  3662. for (i = 0; i < sizeof(buf) - 1; i++) {
  3663. if (i >= skb->len)
  3664. break;
  3665. c = skb->data[i];
  3666. if (c == '\0')
  3667. break;
  3668. if (isascii(c) && isprint(c))
  3669. buf[i] = c;
  3670. else
  3671. buf[i] = '.';
  3672. }
  3673. if (i == sizeof(buf) - 1)
  3674. ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
  3675. /* for some reason the debug prints end with \n, remove that */
  3676. if (skb->data[i - 1] == '\n')
  3677. i--;
  3678. /* the last byte is always reserved for the null character */
  3679. buf[i] = '\0';
  3680. ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
  3681. }
  3682. void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  3683. {
  3684. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  3685. }
  3686. void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
  3687. {
  3688. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  3689. }
  3690. void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  3691. struct sk_buff *skb)
  3692. {
  3693. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  3694. }
  3695. void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  3696. struct sk_buff *skb)
  3697. {
  3698. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  3699. }
  3700. void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
  3701. {
  3702. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  3703. }
  3704. void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
  3705. {
  3706. struct wmi_wow_ev_arg ev = {};
  3707. int ret;
  3708. complete(&ar->wow.wakeup_completed);
  3709. ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
  3710. if (ret) {
  3711. ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
  3712. return;
  3713. }
  3714. ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
  3715. wow_reason(ev.wake_reason));
  3716. }
  3717. void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
  3718. {
  3719. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  3720. }
  3721. static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
  3722. struct wmi_pdev_tpc_config_event *ev,
  3723. u32 rate_idx, u32 num_chains,
  3724. u32 rate_code, u8 type)
  3725. {
  3726. u8 tpc, num_streams, preamble, ch, stm_idx;
  3727. num_streams = ATH10K_HW_NSS(rate_code);
  3728. preamble = ATH10K_HW_PREAMBLE(rate_code);
  3729. ch = num_chains - 1;
  3730. tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
  3731. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  3732. goto out;
  3733. if (preamble == WMI_RATE_PREAMBLE_CCK)
  3734. goto out;
  3735. stm_idx = num_streams - 1;
  3736. if (num_chains <= num_streams)
  3737. goto out;
  3738. switch (type) {
  3739. case WMI_TPC_TABLE_TYPE_STBC:
  3740. tpc = min_t(u8, tpc,
  3741. ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
  3742. break;
  3743. case WMI_TPC_TABLE_TYPE_TXBF:
  3744. tpc = min_t(u8, tpc,
  3745. ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
  3746. break;
  3747. case WMI_TPC_TABLE_TYPE_CDD:
  3748. tpc = min_t(u8, tpc,
  3749. ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
  3750. break;
  3751. default:
  3752. ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
  3753. tpc = 0;
  3754. break;
  3755. }
  3756. out:
  3757. return tpc;
  3758. }
  3759. static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
  3760. struct wmi_pdev_tpc_config_event *ev,
  3761. struct ath10k_tpc_stats *tpc_stats,
  3762. u8 *rate_code, u16 *pream_table, u8 type)
  3763. {
  3764. u32 i, j, pream_idx, flags;
  3765. u8 tpc[WMI_TPC_TX_N_CHAIN];
  3766. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  3767. char buff[WMI_TPC_BUF_SIZE];
  3768. flags = __le32_to_cpu(ev->flags);
  3769. switch (type) {
  3770. case WMI_TPC_TABLE_TYPE_CDD:
  3771. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  3772. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  3773. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3774. return;
  3775. }
  3776. break;
  3777. case WMI_TPC_TABLE_TYPE_STBC:
  3778. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  3779. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  3780. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3781. return;
  3782. }
  3783. break;
  3784. case WMI_TPC_TABLE_TYPE_TXBF:
  3785. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  3786. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  3787. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3788. return;
  3789. }
  3790. break;
  3791. default:
  3792. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3793. "invalid table type in wmi tpc event: %d\n", type);
  3794. return;
  3795. }
  3796. pream_idx = 0;
  3797. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  3798. memset(tpc_value, 0, sizeof(tpc_value));
  3799. memset(buff, 0, sizeof(buff));
  3800. if (i == pream_table[pream_idx])
  3801. pream_idx++;
  3802. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  3803. if (j >= __le32_to_cpu(ev->num_tx_chain))
  3804. break;
  3805. tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
  3806. rate_code[i],
  3807. type);
  3808. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  3809. strncat(tpc_value, buff, strlen(buff));
  3810. }
  3811. tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
  3812. tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
  3813. memcpy(tpc_stats->tpc_table[type].tpc_value[i],
  3814. tpc_value, sizeof(tpc_value));
  3815. }
  3816. }
  3817. void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
  3818. {
  3819. u32 i, j, pream_idx, num_tx_chain;
  3820. u8 rate_code[WMI_TPC_RATE_MAX], rate_idx;
  3821. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  3822. struct wmi_pdev_tpc_config_event *ev;
  3823. struct ath10k_tpc_stats *tpc_stats;
  3824. ev = (struct wmi_pdev_tpc_config_event *)skb->data;
  3825. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  3826. if (!tpc_stats)
  3827. return;
  3828. /* Create the rate code table based on the chains supported */
  3829. rate_idx = 0;
  3830. pream_idx = 0;
  3831. /* Fill CCK rate code */
  3832. for (i = 0; i < 4; i++) {
  3833. rate_code[rate_idx] =
  3834. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
  3835. rate_idx++;
  3836. }
  3837. pream_table[pream_idx] = rate_idx;
  3838. pream_idx++;
  3839. /* Fill OFDM rate code */
  3840. for (i = 0; i < 8; i++) {
  3841. rate_code[rate_idx] =
  3842. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
  3843. rate_idx++;
  3844. }
  3845. pream_table[pream_idx] = rate_idx;
  3846. pream_idx++;
  3847. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3848. /* Fill HT20 rate code */
  3849. for (i = 0; i < num_tx_chain; i++) {
  3850. for (j = 0; j < 8; j++) {
  3851. rate_code[rate_idx] =
  3852. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3853. rate_idx++;
  3854. }
  3855. }
  3856. pream_table[pream_idx] = rate_idx;
  3857. pream_idx++;
  3858. /* Fill HT40 rate code */
  3859. for (i = 0; i < num_tx_chain; i++) {
  3860. for (j = 0; j < 8; j++) {
  3861. rate_code[rate_idx] =
  3862. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3863. rate_idx++;
  3864. }
  3865. }
  3866. pream_table[pream_idx] = rate_idx;
  3867. pream_idx++;
  3868. /* Fill VHT20 rate code */
  3869. for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) {
  3870. for (j = 0; j < 10; j++) {
  3871. rate_code[rate_idx] =
  3872. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3873. rate_idx++;
  3874. }
  3875. }
  3876. pream_table[pream_idx] = rate_idx;
  3877. pream_idx++;
  3878. /* Fill VHT40 rate code */
  3879. for (i = 0; i < num_tx_chain; i++) {
  3880. for (j = 0; j < 10; j++) {
  3881. rate_code[rate_idx] =
  3882. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3883. rate_idx++;
  3884. }
  3885. }
  3886. pream_table[pream_idx] = rate_idx;
  3887. pream_idx++;
  3888. /* Fill VHT80 rate code */
  3889. for (i = 0; i < num_tx_chain; i++) {
  3890. for (j = 0; j < 10; j++) {
  3891. rate_code[rate_idx] =
  3892. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3893. rate_idx++;
  3894. }
  3895. }
  3896. pream_table[pream_idx] = rate_idx;
  3897. pream_idx++;
  3898. rate_code[rate_idx++] =
  3899. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3900. rate_code[rate_idx++] =
  3901. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3902. rate_code[rate_idx++] =
  3903. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3904. rate_code[rate_idx++] =
  3905. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3906. rate_code[rate_idx++] =
  3907. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3908. pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
  3909. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  3910. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  3911. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  3912. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  3913. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  3914. tpc_stats->twice_antenna_reduction =
  3915. __le32_to_cpu(ev->twice_antenna_reduction);
  3916. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  3917. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  3918. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3919. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  3920. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3921. rate_code, pream_table,
  3922. WMI_TPC_TABLE_TYPE_CDD);
  3923. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3924. rate_code, pream_table,
  3925. WMI_TPC_TABLE_TYPE_STBC);
  3926. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3927. rate_code, pream_table,
  3928. WMI_TPC_TABLE_TYPE_TXBF);
  3929. ath10k_debug_tpc_stats_process(ar, tpc_stats);
  3930. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3931. "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  3932. __le32_to_cpu(ev->chan_freq),
  3933. __le32_to_cpu(ev->phy_mode),
  3934. __le32_to_cpu(ev->ctl),
  3935. __le32_to_cpu(ev->reg_domain),
  3936. a_sle32_to_cpu(ev->twice_antenna_gain),
  3937. __le32_to_cpu(ev->twice_antenna_reduction),
  3938. __le32_to_cpu(ev->power_limit),
  3939. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  3940. __le32_to_cpu(ev->num_tx_chain),
  3941. __le32_to_cpu(ev->rate_max));
  3942. }
  3943. void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
  3944. {
  3945. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  3946. }
  3947. void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
  3948. {
  3949. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  3950. }
  3951. void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
  3952. {
  3953. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  3954. }
  3955. void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
  3956. {
  3957. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  3958. }
  3959. void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
  3960. {
  3961. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  3962. }
  3963. void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  3964. struct sk_buff *skb)
  3965. {
  3966. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  3967. }
  3968. void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
  3969. {
  3970. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  3971. }
  3972. void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
  3973. {
  3974. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  3975. }
  3976. void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
  3977. {
  3978. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  3979. }
  3980. static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
  3981. u32 num_units, u32 unit_len)
  3982. {
  3983. dma_addr_t paddr;
  3984. u32 pool_size;
  3985. int idx = ar->wmi.num_mem_chunks;
  3986. void *vaddr;
  3987. pool_size = num_units * round_up(unit_len, 4);
  3988. vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
  3989. if (!vaddr)
  3990. return -ENOMEM;
  3991. memset(vaddr, 0, pool_size);
  3992. ar->wmi.mem_chunks[idx].vaddr = vaddr;
  3993. ar->wmi.mem_chunks[idx].paddr = paddr;
  3994. ar->wmi.mem_chunks[idx].len = pool_size;
  3995. ar->wmi.mem_chunks[idx].req_id = req_id;
  3996. ar->wmi.num_mem_chunks++;
  3997. return num_units;
  3998. }
  3999. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  4000. u32 num_units, u32 unit_len)
  4001. {
  4002. int ret;
  4003. while (num_units) {
  4004. ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
  4005. if (ret < 0)
  4006. return ret;
  4007. num_units -= ret;
  4008. }
  4009. return 0;
  4010. }
  4011. static bool
  4012. ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
  4013. const struct wlan_host_mem_req **mem_reqs,
  4014. u32 num_mem_reqs)
  4015. {
  4016. u32 req_id, num_units, unit_size, num_unit_info;
  4017. u32 pool_size;
  4018. int i, j;
  4019. bool found;
  4020. if (ar->wmi.num_mem_chunks != num_mem_reqs)
  4021. return false;
  4022. for (i = 0; i < num_mem_reqs; ++i) {
  4023. req_id = __le32_to_cpu(mem_reqs[i]->req_id);
  4024. num_units = __le32_to_cpu(mem_reqs[i]->num_units);
  4025. unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
  4026. num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
  4027. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4028. if (ar->num_active_peers)
  4029. num_units = ar->num_active_peers + 1;
  4030. else
  4031. num_units = ar->max_num_peers + 1;
  4032. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4033. num_units = ar->max_num_peers + 1;
  4034. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4035. num_units = ar->max_num_vdevs + 1;
  4036. }
  4037. found = false;
  4038. for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
  4039. if (ar->wmi.mem_chunks[j].req_id == req_id) {
  4040. pool_size = num_units * round_up(unit_size, 4);
  4041. if (ar->wmi.mem_chunks[j].len == pool_size) {
  4042. found = true;
  4043. break;
  4044. }
  4045. }
  4046. }
  4047. if (!found)
  4048. return false;
  4049. }
  4050. return true;
  4051. }
  4052. static int
  4053. ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4054. struct wmi_svc_rdy_ev_arg *arg)
  4055. {
  4056. struct wmi_service_ready_event *ev;
  4057. size_t i, n;
  4058. if (skb->len < sizeof(*ev))
  4059. return -EPROTO;
  4060. ev = (void *)skb->data;
  4061. skb_pull(skb, sizeof(*ev));
  4062. arg->min_tx_power = ev->hw_min_tx_power;
  4063. arg->max_tx_power = ev->hw_max_tx_power;
  4064. arg->ht_cap = ev->ht_cap_info;
  4065. arg->vht_cap = ev->vht_cap_info;
  4066. arg->sw_ver0 = ev->sw_version;
  4067. arg->sw_ver1 = ev->sw_version_1;
  4068. arg->phy_capab = ev->phy_capability;
  4069. arg->num_rf_chains = ev->num_rf_chains;
  4070. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4071. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4072. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4073. arg->num_mem_reqs = ev->num_mem_reqs;
  4074. arg->service_map = ev->wmi_service_bitmap;
  4075. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4076. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4077. ARRAY_SIZE(arg->mem_reqs));
  4078. for (i = 0; i < n; i++)
  4079. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4080. if (skb->len <
  4081. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4082. return -EPROTO;
  4083. return 0;
  4084. }
  4085. static int
  4086. ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4087. struct wmi_svc_rdy_ev_arg *arg)
  4088. {
  4089. struct wmi_10x_service_ready_event *ev;
  4090. int i, n;
  4091. if (skb->len < sizeof(*ev))
  4092. return -EPROTO;
  4093. ev = (void *)skb->data;
  4094. skb_pull(skb, sizeof(*ev));
  4095. arg->min_tx_power = ev->hw_min_tx_power;
  4096. arg->max_tx_power = ev->hw_max_tx_power;
  4097. arg->ht_cap = ev->ht_cap_info;
  4098. arg->vht_cap = ev->vht_cap_info;
  4099. arg->sw_ver0 = ev->sw_version;
  4100. arg->phy_capab = ev->phy_capability;
  4101. arg->num_rf_chains = ev->num_rf_chains;
  4102. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4103. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4104. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4105. arg->num_mem_reqs = ev->num_mem_reqs;
  4106. arg->service_map = ev->wmi_service_bitmap;
  4107. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4108. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4109. ARRAY_SIZE(arg->mem_reqs));
  4110. for (i = 0; i < n; i++)
  4111. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4112. if (skb->len <
  4113. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4114. return -EPROTO;
  4115. return 0;
  4116. }
  4117. static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
  4118. {
  4119. struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
  4120. struct sk_buff *skb = ar->svc_rdy_skb;
  4121. struct wmi_svc_rdy_ev_arg arg = {};
  4122. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  4123. int ret;
  4124. bool allocated;
  4125. if (!skb) {
  4126. ath10k_warn(ar, "invalid service ready event skb\n");
  4127. return;
  4128. }
  4129. ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
  4130. if (ret) {
  4131. ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
  4132. return;
  4133. }
  4134. memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
  4135. ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
  4136. arg.service_map_len);
  4137. ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
  4138. ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
  4139. ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
  4140. ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
  4141. ar->fw_version_major =
  4142. (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
  4143. ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
  4144. ar->fw_version_release =
  4145. (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
  4146. ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
  4147. ar->phy_capability = __le32_to_cpu(arg.phy_capab);
  4148. ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
  4149. ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
  4150. ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
  4151. ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
  4152. ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
  4153. arg.service_map, arg.service_map_len);
  4154. if (ar->num_rf_chains > ar->max_spatial_stream) {
  4155. ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
  4156. ar->num_rf_chains, ar->max_spatial_stream);
  4157. ar->num_rf_chains = ar->max_spatial_stream;
  4158. }
  4159. if (!ar->cfg_tx_chainmask) {
  4160. ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
  4161. ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
  4162. }
  4163. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  4164. snprintf(ar->hw->wiphy->fw_version,
  4165. sizeof(ar->hw->wiphy->fw_version),
  4166. "%u.%u.%u.%u",
  4167. ar->fw_version_major,
  4168. ar->fw_version_minor,
  4169. ar->fw_version_release,
  4170. ar->fw_version_build);
  4171. }
  4172. num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
  4173. if (num_mem_reqs > WMI_MAX_MEM_REQS) {
  4174. ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
  4175. num_mem_reqs);
  4176. return;
  4177. }
  4178. if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
  4179. if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
  4180. ar->running_fw->fw_file.fw_features))
  4181. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
  4182. ar->max_num_vdevs;
  4183. else
  4184. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
  4185. ar->max_num_vdevs;
  4186. ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
  4187. ar->max_num_vdevs;
  4188. ar->num_tids = ar->num_active_peers * 2;
  4189. ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
  4190. }
  4191. /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
  4192. * and WMI_SERVICE_IRAM_TIDS, etc.
  4193. */
  4194. allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
  4195. num_mem_reqs);
  4196. if (allocated)
  4197. goto skip_mem_alloc;
  4198. /* Either this event is received during boot time or there is a change
  4199. * in memory requirement from firmware when compared to last request.
  4200. * Free any old memory and do a fresh allocation based on the current
  4201. * memory requirement.
  4202. */
  4203. ath10k_wmi_free_host_mem(ar);
  4204. for (i = 0; i < num_mem_reqs; ++i) {
  4205. req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
  4206. num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
  4207. unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
  4208. num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
  4209. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4210. if (ar->num_active_peers)
  4211. num_units = ar->num_active_peers + 1;
  4212. else
  4213. num_units = ar->max_num_peers + 1;
  4214. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4215. /* number of units to allocate is number of
  4216. * peers, 1 extra for self peer on target
  4217. * this needs to be tied, host and target
  4218. * can get out of sync
  4219. */
  4220. num_units = ar->max_num_peers + 1;
  4221. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4222. num_units = ar->max_num_vdevs + 1;
  4223. }
  4224. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4225. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  4226. req_id,
  4227. __le32_to_cpu(arg.mem_reqs[i]->num_units),
  4228. num_unit_info,
  4229. unit_size,
  4230. num_units);
  4231. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  4232. unit_size);
  4233. if (ret)
  4234. return;
  4235. }
  4236. skip_mem_alloc:
  4237. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4238. "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
  4239. __le32_to_cpu(arg.min_tx_power),
  4240. __le32_to_cpu(arg.max_tx_power),
  4241. __le32_to_cpu(arg.ht_cap),
  4242. __le32_to_cpu(arg.vht_cap),
  4243. __le32_to_cpu(arg.sw_ver0),
  4244. __le32_to_cpu(arg.sw_ver1),
  4245. __le32_to_cpu(arg.fw_build),
  4246. __le32_to_cpu(arg.phy_capab),
  4247. __le32_to_cpu(arg.num_rf_chains),
  4248. __le32_to_cpu(arg.eeprom_rd),
  4249. __le32_to_cpu(arg.num_mem_reqs));
  4250. dev_kfree_skb(skb);
  4251. ar->svc_rdy_skb = NULL;
  4252. complete(&ar->wmi.service_ready);
  4253. }
  4254. void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
  4255. {
  4256. ar->svc_rdy_skb = skb;
  4257. queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
  4258. }
  4259. static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4260. struct wmi_rdy_ev_arg *arg)
  4261. {
  4262. struct wmi_ready_event *ev = (void *)skb->data;
  4263. if (skb->len < sizeof(*ev))
  4264. return -EPROTO;
  4265. skb_pull(skb, sizeof(*ev));
  4266. arg->sw_version = ev->sw_version;
  4267. arg->abi_version = ev->abi_version;
  4268. arg->status = ev->status;
  4269. arg->mac_addr = ev->mac_addr.addr;
  4270. return 0;
  4271. }
  4272. static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
  4273. struct wmi_roam_ev_arg *arg)
  4274. {
  4275. struct wmi_roam_ev *ev = (void *)skb->data;
  4276. if (skb->len < sizeof(*ev))
  4277. return -EPROTO;
  4278. skb_pull(skb, sizeof(*ev));
  4279. arg->vdev_id = ev->vdev_id;
  4280. arg->reason = ev->reason;
  4281. return 0;
  4282. }
  4283. static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
  4284. struct sk_buff *skb,
  4285. struct wmi_echo_ev_arg *arg)
  4286. {
  4287. struct wmi_echo_event *ev = (void *)skb->data;
  4288. arg->value = ev->value;
  4289. return 0;
  4290. }
  4291. int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
  4292. {
  4293. struct wmi_rdy_ev_arg arg = {};
  4294. int ret;
  4295. ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
  4296. if (ret) {
  4297. ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
  4298. return ret;
  4299. }
  4300. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4301. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  4302. __le32_to_cpu(arg.sw_version),
  4303. __le32_to_cpu(arg.abi_version),
  4304. arg.mac_addr,
  4305. __le32_to_cpu(arg.status));
  4306. ether_addr_copy(ar->mac_addr, arg.mac_addr);
  4307. complete(&ar->wmi.unified_ready);
  4308. return 0;
  4309. }
  4310. static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
  4311. {
  4312. const struct wmi_pdev_temperature_event *ev;
  4313. ev = (struct wmi_pdev_temperature_event *)skb->data;
  4314. if (WARN_ON(skb->len < sizeof(*ev)))
  4315. return -EPROTO;
  4316. ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
  4317. return 0;
  4318. }
  4319. static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
  4320. struct sk_buff *skb)
  4321. {
  4322. struct wmi_pdev_bss_chan_info_event *ev;
  4323. struct survey_info *survey;
  4324. u64 busy, total, tx, rx, rx_bss;
  4325. u32 freq, noise_floor;
  4326. u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
  4327. int idx;
  4328. ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
  4329. if (WARN_ON(skb->len < sizeof(*ev)))
  4330. return -EPROTO;
  4331. freq = __le32_to_cpu(ev->freq);
  4332. noise_floor = __le32_to_cpu(ev->noise_floor);
  4333. busy = __le64_to_cpu(ev->cycle_busy);
  4334. total = __le64_to_cpu(ev->cycle_total);
  4335. tx = __le64_to_cpu(ev->cycle_tx);
  4336. rx = __le64_to_cpu(ev->cycle_rx);
  4337. rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
  4338. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4339. "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
  4340. freq, noise_floor, busy, total, tx, rx, rx_bss);
  4341. spin_lock_bh(&ar->data_lock);
  4342. idx = freq_to_idx(ar, freq);
  4343. if (idx >= ARRAY_SIZE(ar->survey)) {
  4344. ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
  4345. freq, idx);
  4346. goto exit;
  4347. }
  4348. survey = &ar->survey[idx];
  4349. survey->noise = noise_floor;
  4350. survey->time = div_u64(total, cc_freq_hz);
  4351. survey->time_busy = div_u64(busy, cc_freq_hz);
  4352. survey->time_rx = div_u64(rx_bss, cc_freq_hz);
  4353. survey->time_tx = div_u64(tx, cc_freq_hz);
  4354. survey->filled |= (SURVEY_INFO_NOISE_DBM |
  4355. SURVEY_INFO_TIME |
  4356. SURVEY_INFO_TIME_BUSY |
  4357. SURVEY_INFO_TIME_RX |
  4358. SURVEY_INFO_TIME_TX);
  4359. exit:
  4360. spin_unlock_bh(&ar->data_lock);
  4361. complete(&ar->bss_survey_done);
  4362. return 0;
  4363. }
  4364. static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
  4365. {
  4366. if (ar->hw_params.hw_ops->set_coverage_class) {
  4367. spin_lock_bh(&ar->data_lock);
  4368. /* This call only ensures that the modified coverage class
  4369. * persists in case the firmware sets the registers back to
  4370. * their default value. So calling it is only necessary if the
  4371. * coverage class has a non-zero value.
  4372. */
  4373. if (ar->fw_coverage.coverage_class)
  4374. queue_work(ar->workqueue, &ar->set_coverage_class_work);
  4375. spin_unlock_bh(&ar->data_lock);
  4376. }
  4377. }
  4378. static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4379. {
  4380. struct wmi_cmd_hdr *cmd_hdr;
  4381. enum wmi_event_id id;
  4382. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4383. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4384. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4385. goto out;
  4386. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4387. switch (id) {
  4388. case WMI_MGMT_RX_EVENTID:
  4389. ath10k_wmi_event_mgmt_rx(ar, skb);
  4390. /* mgmt_rx() owns the skb now! */
  4391. return;
  4392. case WMI_SCAN_EVENTID:
  4393. ath10k_wmi_event_scan(ar, skb);
  4394. ath10k_wmi_queue_set_coverage_class_work(ar);
  4395. break;
  4396. case WMI_CHAN_INFO_EVENTID:
  4397. ath10k_wmi_event_chan_info(ar, skb);
  4398. break;
  4399. case WMI_ECHO_EVENTID:
  4400. ath10k_wmi_event_echo(ar, skb);
  4401. break;
  4402. case WMI_DEBUG_MESG_EVENTID:
  4403. ath10k_wmi_event_debug_mesg(ar, skb);
  4404. ath10k_wmi_queue_set_coverage_class_work(ar);
  4405. break;
  4406. case WMI_UPDATE_STATS_EVENTID:
  4407. ath10k_wmi_event_update_stats(ar, skb);
  4408. break;
  4409. case WMI_VDEV_START_RESP_EVENTID:
  4410. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4411. ath10k_wmi_queue_set_coverage_class_work(ar);
  4412. break;
  4413. case WMI_VDEV_STOPPED_EVENTID:
  4414. ath10k_wmi_event_vdev_stopped(ar, skb);
  4415. ath10k_wmi_queue_set_coverage_class_work(ar);
  4416. break;
  4417. case WMI_PEER_STA_KICKOUT_EVENTID:
  4418. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4419. break;
  4420. case WMI_HOST_SWBA_EVENTID:
  4421. ath10k_wmi_event_host_swba(ar, skb);
  4422. break;
  4423. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  4424. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4425. break;
  4426. case WMI_PHYERR_EVENTID:
  4427. ath10k_wmi_event_phyerr(ar, skb);
  4428. break;
  4429. case WMI_ROAM_EVENTID:
  4430. ath10k_wmi_event_roam(ar, skb);
  4431. ath10k_wmi_queue_set_coverage_class_work(ar);
  4432. break;
  4433. case WMI_PROFILE_MATCH:
  4434. ath10k_wmi_event_profile_match(ar, skb);
  4435. break;
  4436. case WMI_DEBUG_PRINT_EVENTID:
  4437. ath10k_wmi_event_debug_print(ar, skb);
  4438. ath10k_wmi_queue_set_coverage_class_work(ar);
  4439. break;
  4440. case WMI_PDEV_QVIT_EVENTID:
  4441. ath10k_wmi_event_pdev_qvit(ar, skb);
  4442. break;
  4443. case WMI_WLAN_PROFILE_DATA_EVENTID:
  4444. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4445. break;
  4446. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  4447. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4448. break;
  4449. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  4450. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4451. break;
  4452. case WMI_RTT_ERROR_REPORT_EVENTID:
  4453. ath10k_wmi_event_rtt_error_report(ar, skb);
  4454. break;
  4455. case WMI_WOW_WAKEUP_HOST_EVENTID:
  4456. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4457. break;
  4458. case WMI_DCS_INTERFERENCE_EVENTID:
  4459. ath10k_wmi_event_dcs_interference(ar, skb);
  4460. break;
  4461. case WMI_PDEV_TPC_CONFIG_EVENTID:
  4462. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4463. break;
  4464. case WMI_PDEV_FTM_INTG_EVENTID:
  4465. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  4466. break;
  4467. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  4468. ath10k_wmi_event_gtk_offload_status(ar, skb);
  4469. break;
  4470. case WMI_GTK_REKEY_FAIL_EVENTID:
  4471. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  4472. break;
  4473. case WMI_TX_DELBA_COMPLETE_EVENTID:
  4474. ath10k_wmi_event_delba_complete(ar, skb);
  4475. break;
  4476. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  4477. ath10k_wmi_event_addba_complete(ar, skb);
  4478. break;
  4479. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  4480. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  4481. break;
  4482. case WMI_SERVICE_READY_EVENTID:
  4483. ath10k_wmi_event_service_ready(ar, skb);
  4484. return;
  4485. case WMI_READY_EVENTID:
  4486. ath10k_wmi_event_ready(ar, skb);
  4487. ath10k_wmi_queue_set_coverage_class_work(ar);
  4488. break;
  4489. default:
  4490. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4491. break;
  4492. }
  4493. out:
  4494. dev_kfree_skb(skb);
  4495. }
  4496. static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4497. {
  4498. struct wmi_cmd_hdr *cmd_hdr;
  4499. enum wmi_10x_event_id id;
  4500. bool consumed;
  4501. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4502. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4503. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4504. goto out;
  4505. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4506. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4507. /* Ready event must be handled normally also in UTF mode so that we
  4508. * know the UTF firmware has booted, others we are just bypass WMI
  4509. * events to testmode.
  4510. */
  4511. if (consumed && id != WMI_10X_READY_EVENTID) {
  4512. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4513. "wmi testmode consumed 0x%x\n", id);
  4514. goto out;
  4515. }
  4516. switch (id) {
  4517. case WMI_10X_MGMT_RX_EVENTID:
  4518. ath10k_wmi_event_mgmt_rx(ar, skb);
  4519. /* mgmt_rx() owns the skb now! */
  4520. return;
  4521. case WMI_10X_SCAN_EVENTID:
  4522. ath10k_wmi_event_scan(ar, skb);
  4523. ath10k_wmi_queue_set_coverage_class_work(ar);
  4524. break;
  4525. case WMI_10X_CHAN_INFO_EVENTID:
  4526. ath10k_wmi_event_chan_info(ar, skb);
  4527. break;
  4528. case WMI_10X_ECHO_EVENTID:
  4529. ath10k_wmi_event_echo(ar, skb);
  4530. break;
  4531. case WMI_10X_DEBUG_MESG_EVENTID:
  4532. ath10k_wmi_event_debug_mesg(ar, skb);
  4533. ath10k_wmi_queue_set_coverage_class_work(ar);
  4534. break;
  4535. case WMI_10X_UPDATE_STATS_EVENTID:
  4536. ath10k_wmi_event_update_stats(ar, skb);
  4537. break;
  4538. case WMI_10X_VDEV_START_RESP_EVENTID:
  4539. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4540. ath10k_wmi_queue_set_coverage_class_work(ar);
  4541. break;
  4542. case WMI_10X_VDEV_STOPPED_EVENTID:
  4543. ath10k_wmi_event_vdev_stopped(ar, skb);
  4544. ath10k_wmi_queue_set_coverage_class_work(ar);
  4545. break;
  4546. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  4547. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4548. break;
  4549. case WMI_10X_HOST_SWBA_EVENTID:
  4550. ath10k_wmi_event_host_swba(ar, skb);
  4551. break;
  4552. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  4553. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4554. break;
  4555. case WMI_10X_PHYERR_EVENTID:
  4556. ath10k_wmi_event_phyerr(ar, skb);
  4557. break;
  4558. case WMI_10X_ROAM_EVENTID:
  4559. ath10k_wmi_event_roam(ar, skb);
  4560. ath10k_wmi_queue_set_coverage_class_work(ar);
  4561. break;
  4562. case WMI_10X_PROFILE_MATCH:
  4563. ath10k_wmi_event_profile_match(ar, skb);
  4564. break;
  4565. case WMI_10X_DEBUG_PRINT_EVENTID:
  4566. ath10k_wmi_event_debug_print(ar, skb);
  4567. ath10k_wmi_queue_set_coverage_class_work(ar);
  4568. break;
  4569. case WMI_10X_PDEV_QVIT_EVENTID:
  4570. ath10k_wmi_event_pdev_qvit(ar, skb);
  4571. break;
  4572. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  4573. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4574. break;
  4575. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  4576. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4577. break;
  4578. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  4579. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4580. break;
  4581. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  4582. ath10k_wmi_event_rtt_error_report(ar, skb);
  4583. break;
  4584. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  4585. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4586. break;
  4587. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  4588. ath10k_wmi_event_dcs_interference(ar, skb);
  4589. break;
  4590. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  4591. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4592. break;
  4593. case WMI_10X_INST_RSSI_STATS_EVENTID:
  4594. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4595. break;
  4596. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  4597. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4598. break;
  4599. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  4600. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4601. break;
  4602. case WMI_10X_SERVICE_READY_EVENTID:
  4603. ath10k_wmi_event_service_ready(ar, skb);
  4604. return;
  4605. case WMI_10X_READY_EVENTID:
  4606. ath10k_wmi_event_ready(ar, skb);
  4607. ath10k_wmi_queue_set_coverage_class_work(ar);
  4608. break;
  4609. case WMI_10X_PDEV_UTF_EVENTID:
  4610. /* ignore utf events */
  4611. break;
  4612. default:
  4613. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4614. break;
  4615. }
  4616. out:
  4617. dev_kfree_skb(skb);
  4618. }
  4619. static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4620. {
  4621. struct wmi_cmd_hdr *cmd_hdr;
  4622. enum wmi_10_2_event_id id;
  4623. bool consumed;
  4624. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4625. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4626. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4627. goto out;
  4628. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4629. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4630. /* Ready event must be handled normally also in UTF mode so that we
  4631. * know the UTF firmware has booted, others we are just bypass WMI
  4632. * events to testmode.
  4633. */
  4634. if (consumed && id != WMI_10_2_READY_EVENTID) {
  4635. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4636. "wmi testmode consumed 0x%x\n", id);
  4637. goto out;
  4638. }
  4639. switch (id) {
  4640. case WMI_10_2_MGMT_RX_EVENTID:
  4641. ath10k_wmi_event_mgmt_rx(ar, skb);
  4642. /* mgmt_rx() owns the skb now! */
  4643. return;
  4644. case WMI_10_2_SCAN_EVENTID:
  4645. ath10k_wmi_event_scan(ar, skb);
  4646. ath10k_wmi_queue_set_coverage_class_work(ar);
  4647. break;
  4648. case WMI_10_2_CHAN_INFO_EVENTID:
  4649. ath10k_wmi_event_chan_info(ar, skb);
  4650. break;
  4651. case WMI_10_2_ECHO_EVENTID:
  4652. ath10k_wmi_event_echo(ar, skb);
  4653. break;
  4654. case WMI_10_2_DEBUG_MESG_EVENTID:
  4655. ath10k_wmi_event_debug_mesg(ar, skb);
  4656. ath10k_wmi_queue_set_coverage_class_work(ar);
  4657. break;
  4658. case WMI_10_2_UPDATE_STATS_EVENTID:
  4659. ath10k_wmi_event_update_stats(ar, skb);
  4660. break;
  4661. case WMI_10_2_VDEV_START_RESP_EVENTID:
  4662. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4663. ath10k_wmi_queue_set_coverage_class_work(ar);
  4664. break;
  4665. case WMI_10_2_VDEV_STOPPED_EVENTID:
  4666. ath10k_wmi_event_vdev_stopped(ar, skb);
  4667. ath10k_wmi_queue_set_coverage_class_work(ar);
  4668. break;
  4669. case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
  4670. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4671. break;
  4672. case WMI_10_2_HOST_SWBA_EVENTID:
  4673. ath10k_wmi_event_host_swba(ar, skb);
  4674. break;
  4675. case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
  4676. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4677. break;
  4678. case WMI_10_2_PHYERR_EVENTID:
  4679. ath10k_wmi_event_phyerr(ar, skb);
  4680. break;
  4681. case WMI_10_2_ROAM_EVENTID:
  4682. ath10k_wmi_event_roam(ar, skb);
  4683. ath10k_wmi_queue_set_coverage_class_work(ar);
  4684. break;
  4685. case WMI_10_2_PROFILE_MATCH:
  4686. ath10k_wmi_event_profile_match(ar, skb);
  4687. break;
  4688. case WMI_10_2_DEBUG_PRINT_EVENTID:
  4689. ath10k_wmi_event_debug_print(ar, skb);
  4690. ath10k_wmi_queue_set_coverage_class_work(ar);
  4691. break;
  4692. case WMI_10_2_PDEV_QVIT_EVENTID:
  4693. ath10k_wmi_event_pdev_qvit(ar, skb);
  4694. break;
  4695. case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
  4696. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4697. break;
  4698. case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
  4699. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4700. break;
  4701. case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
  4702. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4703. break;
  4704. case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
  4705. ath10k_wmi_event_rtt_error_report(ar, skb);
  4706. break;
  4707. case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
  4708. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4709. break;
  4710. case WMI_10_2_DCS_INTERFERENCE_EVENTID:
  4711. ath10k_wmi_event_dcs_interference(ar, skb);
  4712. break;
  4713. case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
  4714. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4715. break;
  4716. case WMI_10_2_INST_RSSI_STATS_EVENTID:
  4717. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4718. break;
  4719. case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
  4720. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4721. ath10k_wmi_queue_set_coverage_class_work(ar);
  4722. break;
  4723. case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
  4724. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4725. ath10k_wmi_queue_set_coverage_class_work(ar);
  4726. break;
  4727. case WMI_10_2_SERVICE_READY_EVENTID:
  4728. ath10k_wmi_event_service_ready(ar, skb);
  4729. return;
  4730. case WMI_10_2_READY_EVENTID:
  4731. ath10k_wmi_event_ready(ar, skb);
  4732. ath10k_wmi_queue_set_coverage_class_work(ar);
  4733. break;
  4734. case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
  4735. ath10k_wmi_event_temperature(ar, skb);
  4736. break;
  4737. case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
  4738. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  4739. break;
  4740. case WMI_10_2_RTT_KEEPALIVE_EVENTID:
  4741. case WMI_10_2_GPIO_INPUT_EVENTID:
  4742. case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
  4743. case WMI_10_2_GENERIC_BUFFER_EVENTID:
  4744. case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
  4745. case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
  4746. case WMI_10_2_WDS_PEER_EVENTID:
  4747. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4748. "received event id %d not implemented\n", id);
  4749. break;
  4750. default:
  4751. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4752. break;
  4753. }
  4754. out:
  4755. dev_kfree_skb(skb);
  4756. }
  4757. static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4758. {
  4759. struct wmi_cmd_hdr *cmd_hdr;
  4760. enum wmi_10_4_event_id id;
  4761. bool consumed;
  4762. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4763. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4764. if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
  4765. goto out;
  4766. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4767. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4768. /* Ready event must be handled normally also in UTF mode so that we
  4769. * know the UTF firmware has booted, others we are just bypass WMI
  4770. * events to testmode.
  4771. */
  4772. if (consumed && id != WMI_10_4_READY_EVENTID) {
  4773. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4774. "wmi testmode consumed 0x%x\n", id);
  4775. goto out;
  4776. }
  4777. switch (id) {
  4778. case WMI_10_4_MGMT_RX_EVENTID:
  4779. ath10k_wmi_event_mgmt_rx(ar, skb);
  4780. /* mgmt_rx() owns the skb now! */
  4781. return;
  4782. case WMI_10_4_ECHO_EVENTID:
  4783. ath10k_wmi_event_echo(ar, skb);
  4784. break;
  4785. case WMI_10_4_DEBUG_MESG_EVENTID:
  4786. ath10k_wmi_event_debug_mesg(ar, skb);
  4787. ath10k_wmi_queue_set_coverage_class_work(ar);
  4788. break;
  4789. case WMI_10_4_SERVICE_READY_EVENTID:
  4790. ath10k_wmi_event_service_ready(ar, skb);
  4791. return;
  4792. case WMI_10_4_SCAN_EVENTID:
  4793. ath10k_wmi_event_scan(ar, skb);
  4794. ath10k_wmi_queue_set_coverage_class_work(ar);
  4795. break;
  4796. case WMI_10_4_CHAN_INFO_EVENTID:
  4797. ath10k_wmi_event_chan_info(ar, skb);
  4798. break;
  4799. case WMI_10_4_PHYERR_EVENTID:
  4800. ath10k_wmi_event_phyerr(ar, skb);
  4801. break;
  4802. case WMI_10_4_READY_EVENTID:
  4803. ath10k_wmi_event_ready(ar, skb);
  4804. ath10k_wmi_queue_set_coverage_class_work(ar);
  4805. break;
  4806. case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
  4807. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4808. break;
  4809. case WMI_10_4_ROAM_EVENTID:
  4810. ath10k_wmi_event_roam(ar, skb);
  4811. ath10k_wmi_queue_set_coverage_class_work(ar);
  4812. break;
  4813. case WMI_10_4_HOST_SWBA_EVENTID:
  4814. ath10k_wmi_event_host_swba(ar, skb);
  4815. break;
  4816. case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
  4817. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4818. break;
  4819. case WMI_10_4_DEBUG_PRINT_EVENTID:
  4820. ath10k_wmi_event_debug_print(ar, skb);
  4821. ath10k_wmi_queue_set_coverage_class_work(ar);
  4822. break;
  4823. case WMI_10_4_VDEV_START_RESP_EVENTID:
  4824. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4825. ath10k_wmi_queue_set_coverage_class_work(ar);
  4826. break;
  4827. case WMI_10_4_VDEV_STOPPED_EVENTID:
  4828. ath10k_wmi_event_vdev_stopped(ar, skb);
  4829. ath10k_wmi_queue_set_coverage_class_work(ar);
  4830. break;
  4831. case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
  4832. case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
  4833. case WMI_10_4_WDS_PEER_EVENTID:
  4834. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4835. "received event id %d not implemented\n", id);
  4836. break;
  4837. case WMI_10_4_UPDATE_STATS_EVENTID:
  4838. ath10k_wmi_event_update_stats(ar, skb);
  4839. break;
  4840. case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
  4841. ath10k_wmi_event_temperature(ar, skb);
  4842. break;
  4843. case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
  4844. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  4845. break;
  4846. case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
  4847. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4848. break;
  4849. default:
  4850. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4851. break;
  4852. }
  4853. out:
  4854. dev_kfree_skb(skb);
  4855. }
  4856. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  4857. {
  4858. int ret;
  4859. ret = ath10k_wmi_rx(ar, skb);
  4860. if (ret)
  4861. ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
  4862. }
  4863. int ath10k_wmi_connect(struct ath10k *ar)
  4864. {
  4865. int status;
  4866. struct ath10k_htc_svc_conn_req conn_req;
  4867. struct ath10k_htc_svc_conn_resp conn_resp;
  4868. memset(&conn_req, 0, sizeof(conn_req));
  4869. memset(&conn_resp, 0, sizeof(conn_resp));
  4870. /* these fields are the same for all service endpoints */
  4871. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  4872. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  4873. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  4874. /* connect to control service */
  4875. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  4876. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  4877. if (status) {
  4878. ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
  4879. status);
  4880. return status;
  4881. }
  4882. ar->wmi.eid = conn_resp.eid;
  4883. return 0;
  4884. }
  4885. static struct sk_buff *
  4886. ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
  4887. u16 ctl2g, u16 ctl5g,
  4888. enum wmi_dfs_region dfs_reg)
  4889. {
  4890. struct wmi_pdev_set_regdomain_cmd *cmd;
  4891. struct sk_buff *skb;
  4892. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4893. if (!skb)
  4894. return ERR_PTR(-ENOMEM);
  4895. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  4896. cmd->reg_domain = __cpu_to_le32(rd);
  4897. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  4898. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  4899. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  4900. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  4901. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4902. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  4903. rd, rd2g, rd5g, ctl2g, ctl5g);
  4904. return skb;
  4905. }
  4906. static struct sk_buff *
  4907. ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
  4908. rd5g, u16 ctl2g, u16 ctl5g,
  4909. enum wmi_dfs_region dfs_reg)
  4910. {
  4911. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  4912. struct sk_buff *skb;
  4913. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4914. if (!skb)
  4915. return ERR_PTR(-ENOMEM);
  4916. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  4917. cmd->reg_domain = __cpu_to_le32(rd);
  4918. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  4919. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  4920. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  4921. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  4922. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  4923. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4924. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  4925. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  4926. return skb;
  4927. }
  4928. static struct sk_buff *
  4929. ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
  4930. {
  4931. struct wmi_pdev_suspend_cmd *cmd;
  4932. struct sk_buff *skb;
  4933. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4934. if (!skb)
  4935. return ERR_PTR(-ENOMEM);
  4936. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  4937. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  4938. return skb;
  4939. }
  4940. static struct sk_buff *
  4941. ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
  4942. {
  4943. struct sk_buff *skb;
  4944. skb = ath10k_wmi_alloc_skb(ar, 0);
  4945. if (!skb)
  4946. return ERR_PTR(-ENOMEM);
  4947. return skb;
  4948. }
  4949. static struct sk_buff *
  4950. ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  4951. {
  4952. struct wmi_pdev_set_param_cmd *cmd;
  4953. struct sk_buff *skb;
  4954. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  4955. ath10k_warn(ar, "pdev param %d not supported by firmware\n",
  4956. id);
  4957. return ERR_PTR(-EOPNOTSUPP);
  4958. }
  4959. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4960. if (!skb)
  4961. return ERR_PTR(-ENOMEM);
  4962. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  4963. cmd->param_id = __cpu_to_le32(id);
  4964. cmd->param_value = __cpu_to_le32(value);
  4965. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  4966. id, value);
  4967. return skb;
  4968. }
  4969. void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
  4970. struct wmi_host_mem_chunks *chunks)
  4971. {
  4972. struct host_memory_chunk *chunk;
  4973. int i;
  4974. chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
  4975. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  4976. chunk = &chunks->items[i];
  4977. chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  4978. chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  4979. chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  4980. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4981. "wmi chunk %d len %d requested, addr 0x%llx\n",
  4982. i,
  4983. ar->wmi.mem_chunks[i].len,
  4984. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  4985. }
  4986. }
  4987. static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
  4988. {
  4989. struct wmi_init_cmd *cmd;
  4990. struct sk_buff *buf;
  4991. struct wmi_resource_config config = {};
  4992. u32 len, val;
  4993. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  4994. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
  4995. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  4996. config.num_offload_reorder_bufs =
  4997. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  4998. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  4999. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  5000. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  5001. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  5002. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  5003. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5004. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5005. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  5006. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  5007. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5008. config.scan_max_pending_reqs =
  5009. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  5010. config.bmiss_offload_max_vdev =
  5011. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  5012. config.roam_offload_max_vdev =
  5013. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  5014. config.roam_offload_max_ap_profiles =
  5015. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5016. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  5017. config.num_mcast_table_elems =
  5018. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  5019. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  5020. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  5021. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  5022. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  5023. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  5024. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5025. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5026. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  5027. config.gtk_offload_max_vdev =
  5028. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  5029. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  5030. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  5031. len = sizeof(*cmd) +
  5032. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5033. buf = ath10k_wmi_alloc_skb(ar, len);
  5034. if (!buf)
  5035. return ERR_PTR(-ENOMEM);
  5036. cmd = (struct wmi_init_cmd *)buf->data;
  5037. memcpy(&cmd->resource_config, &config, sizeof(config));
  5038. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5039. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
  5040. return buf;
  5041. }
  5042. static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
  5043. {
  5044. struct wmi_init_cmd_10x *cmd;
  5045. struct sk_buff *buf;
  5046. struct wmi_resource_config_10x config = {};
  5047. u32 len, val;
  5048. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5049. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5050. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5051. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5052. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5053. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5054. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5055. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5056. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5057. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5058. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5059. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5060. config.scan_max_pending_reqs =
  5061. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5062. config.bmiss_offload_max_vdev =
  5063. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5064. config.roam_offload_max_vdev =
  5065. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5066. config.roam_offload_max_ap_profiles =
  5067. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5068. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5069. config.num_mcast_table_elems =
  5070. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5071. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5072. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5073. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5074. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  5075. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5076. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5077. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5078. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5079. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5080. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5081. len = sizeof(*cmd) +
  5082. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5083. buf = ath10k_wmi_alloc_skb(ar, len);
  5084. if (!buf)
  5085. return ERR_PTR(-ENOMEM);
  5086. cmd = (struct wmi_init_cmd_10x *)buf->data;
  5087. memcpy(&cmd->resource_config, &config, sizeof(config));
  5088. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5089. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
  5090. return buf;
  5091. }
  5092. static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
  5093. {
  5094. struct wmi_init_cmd_10_2 *cmd;
  5095. struct sk_buff *buf;
  5096. struct wmi_resource_config_10x config = {};
  5097. u32 len, val, features;
  5098. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5099. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5100. if (ath10k_peer_stats_enabled(ar)) {
  5101. config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
  5102. config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
  5103. } else {
  5104. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5105. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5106. }
  5107. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5108. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5109. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5110. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5111. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5112. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5113. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5114. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5115. config.scan_max_pending_reqs =
  5116. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5117. config.bmiss_offload_max_vdev =
  5118. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5119. config.roam_offload_max_vdev =
  5120. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5121. config.roam_offload_max_ap_profiles =
  5122. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5123. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5124. config.num_mcast_table_elems =
  5125. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5126. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5127. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5128. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5129. config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
  5130. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5131. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5132. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5133. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5134. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5135. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5136. len = sizeof(*cmd) +
  5137. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5138. buf = ath10k_wmi_alloc_skb(ar, len);
  5139. if (!buf)
  5140. return ERR_PTR(-ENOMEM);
  5141. cmd = (struct wmi_init_cmd_10_2 *)buf->data;
  5142. features = WMI_10_2_RX_BATCH_MODE;
  5143. if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
  5144. test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
  5145. features |= WMI_10_2_COEX_GPIO;
  5146. if (ath10k_peer_stats_enabled(ar))
  5147. features |= WMI_10_2_PEER_STATS;
  5148. if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
  5149. features |= WMI_10_2_BSS_CHAN_INFO;
  5150. cmd->resource_config.feature_mask = __cpu_to_le32(features);
  5151. memcpy(&cmd->resource_config.common, &config, sizeof(config));
  5152. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5153. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
  5154. return buf;
  5155. }
  5156. static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
  5157. {
  5158. struct wmi_init_cmd_10_4 *cmd;
  5159. struct sk_buff *buf;
  5160. struct wmi_resource_config_10_4 config = {};
  5161. u32 len;
  5162. config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
  5163. config.num_peers = __cpu_to_le32(ar->max_num_peers);
  5164. config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
  5165. config.num_tids = __cpu_to_le32(ar->num_tids);
  5166. config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
  5167. config.num_offload_reorder_buffs =
  5168. __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
  5169. config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
  5170. config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
  5171. config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
  5172. config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
  5173. config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5174. config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5175. config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5176. config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
  5177. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5178. config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
  5179. config.bmiss_offload_max_vdev =
  5180. __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
  5181. config.roam_offload_max_vdev =
  5182. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
  5183. config.roam_offload_max_ap_profiles =
  5184. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
  5185. config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
  5186. config.num_mcast_table_elems =
  5187. __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
  5188. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
  5189. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
  5190. config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
  5191. config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
  5192. config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
  5193. config.rx_skip_defrag_timeout_dup_detection_check =
  5194. __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
  5195. config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
  5196. config.gtk_offload_max_vdev =
  5197. __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
  5198. config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
  5199. config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
  5200. config.max_peer_ext_stats =
  5201. __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
  5202. config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
  5203. config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
  5204. config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
  5205. config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
  5206. config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
  5207. config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
  5208. config.tt_support =
  5209. __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
  5210. config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
  5211. config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
  5212. config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
  5213. len = sizeof(*cmd) +
  5214. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5215. buf = ath10k_wmi_alloc_skb(ar, len);
  5216. if (!buf)
  5217. return ERR_PTR(-ENOMEM);
  5218. cmd = (struct wmi_init_cmd_10_4 *)buf->data;
  5219. memcpy(&cmd->resource_config, &config, sizeof(config));
  5220. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5221. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
  5222. return buf;
  5223. }
  5224. int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
  5225. {
  5226. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  5227. return -EINVAL;
  5228. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  5229. return -EINVAL;
  5230. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  5231. return -EINVAL;
  5232. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  5233. return -EINVAL;
  5234. return 0;
  5235. }
  5236. static size_t
  5237. ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
  5238. {
  5239. int len = 0;
  5240. if (arg->ie_len) {
  5241. len += sizeof(struct wmi_ie_data);
  5242. len += roundup(arg->ie_len, 4);
  5243. }
  5244. if (arg->n_channels) {
  5245. len += sizeof(struct wmi_chan_list);
  5246. len += sizeof(__le32) * arg->n_channels;
  5247. }
  5248. if (arg->n_ssids) {
  5249. len += sizeof(struct wmi_ssid_list);
  5250. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  5251. }
  5252. if (arg->n_bssids) {
  5253. len += sizeof(struct wmi_bssid_list);
  5254. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5255. }
  5256. return len;
  5257. }
  5258. void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
  5259. const struct wmi_start_scan_arg *arg)
  5260. {
  5261. u32 scan_id;
  5262. u32 scan_req_id;
  5263. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  5264. scan_id |= arg->scan_id;
  5265. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5266. scan_req_id |= arg->scan_req_id;
  5267. cmn->scan_id = __cpu_to_le32(scan_id);
  5268. cmn->scan_req_id = __cpu_to_le32(scan_req_id);
  5269. cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
  5270. cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
  5271. cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  5272. cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  5273. cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  5274. cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  5275. cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  5276. cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  5277. cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  5278. cmn->idle_time = __cpu_to_le32(arg->idle_time);
  5279. cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  5280. cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
  5281. cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  5282. }
  5283. static void
  5284. ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
  5285. const struct wmi_start_scan_arg *arg)
  5286. {
  5287. struct wmi_ie_data *ie;
  5288. struct wmi_chan_list *channels;
  5289. struct wmi_ssid_list *ssids;
  5290. struct wmi_bssid_list *bssids;
  5291. void *ptr = tlvs->tlvs;
  5292. int i;
  5293. if (arg->n_channels) {
  5294. channels = ptr;
  5295. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  5296. channels->num_chan = __cpu_to_le32(arg->n_channels);
  5297. for (i = 0; i < arg->n_channels; i++)
  5298. channels->channel_list[i].freq =
  5299. __cpu_to_le16(arg->channels[i]);
  5300. ptr += sizeof(*channels);
  5301. ptr += sizeof(__le32) * arg->n_channels;
  5302. }
  5303. if (arg->n_ssids) {
  5304. ssids = ptr;
  5305. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  5306. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  5307. for (i = 0; i < arg->n_ssids; i++) {
  5308. ssids->ssids[i].ssid_len =
  5309. __cpu_to_le32(arg->ssids[i].len);
  5310. memcpy(&ssids->ssids[i].ssid,
  5311. arg->ssids[i].ssid,
  5312. arg->ssids[i].len);
  5313. }
  5314. ptr += sizeof(*ssids);
  5315. ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
  5316. }
  5317. if (arg->n_bssids) {
  5318. bssids = ptr;
  5319. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  5320. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  5321. for (i = 0; i < arg->n_bssids; i++)
  5322. ether_addr_copy(bssids->bssid_list[i].addr,
  5323. arg->bssids[i].bssid);
  5324. ptr += sizeof(*bssids);
  5325. ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5326. }
  5327. if (arg->ie_len) {
  5328. ie = ptr;
  5329. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  5330. ie->ie_len = __cpu_to_le32(arg->ie_len);
  5331. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  5332. ptr += sizeof(*ie);
  5333. ptr += roundup(arg->ie_len, 4);
  5334. }
  5335. }
  5336. static struct sk_buff *
  5337. ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
  5338. const struct wmi_start_scan_arg *arg)
  5339. {
  5340. struct wmi_start_scan_cmd *cmd;
  5341. struct sk_buff *skb;
  5342. size_t len;
  5343. int ret;
  5344. ret = ath10k_wmi_start_scan_verify(arg);
  5345. if (ret)
  5346. return ERR_PTR(ret);
  5347. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5348. skb = ath10k_wmi_alloc_skb(ar, len);
  5349. if (!skb)
  5350. return ERR_PTR(-ENOMEM);
  5351. cmd = (struct wmi_start_scan_cmd *)skb->data;
  5352. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5353. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5354. cmd->burst_duration_ms = __cpu_to_le32(0);
  5355. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
  5356. return skb;
  5357. }
  5358. static struct sk_buff *
  5359. ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
  5360. const struct wmi_start_scan_arg *arg)
  5361. {
  5362. struct wmi_10x_start_scan_cmd *cmd;
  5363. struct sk_buff *skb;
  5364. size_t len;
  5365. int ret;
  5366. ret = ath10k_wmi_start_scan_verify(arg);
  5367. if (ret)
  5368. return ERR_PTR(ret);
  5369. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5370. skb = ath10k_wmi_alloc_skb(ar, len);
  5371. if (!skb)
  5372. return ERR_PTR(-ENOMEM);
  5373. cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
  5374. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5375. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5376. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
  5377. return skb;
  5378. }
  5379. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  5380. struct wmi_start_scan_arg *arg)
  5381. {
  5382. /* setup commonly used values */
  5383. arg->scan_req_id = 1;
  5384. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  5385. arg->dwell_time_active = 50;
  5386. arg->dwell_time_passive = 150;
  5387. arg->min_rest_time = 50;
  5388. arg->max_rest_time = 500;
  5389. arg->repeat_probe_time = 0;
  5390. arg->probe_spacing_time = 0;
  5391. arg->idle_time = 0;
  5392. arg->max_scan_time = 20000;
  5393. arg->probe_delay = 5;
  5394. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  5395. | WMI_SCAN_EVENT_COMPLETED
  5396. | WMI_SCAN_EVENT_BSS_CHANNEL
  5397. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  5398. | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
  5399. | WMI_SCAN_EVENT_DEQUEUED;
  5400. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  5401. arg->n_bssids = 1;
  5402. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  5403. }
  5404. static struct sk_buff *
  5405. ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
  5406. const struct wmi_stop_scan_arg *arg)
  5407. {
  5408. struct wmi_stop_scan_cmd *cmd;
  5409. struct sk_buff *skb;
  5410. u32 scan_id;
  5411. u32 req_id;
  5412. if (arg->req_id > 0xFFF)
  5413. return ERR_PTR(-EINVAL);
  5414. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  5415. return ERR_PTR(-EINVAL);
  5416. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5417. if (!skb)
  5418. return ERR_PTR(-ENOMEM);
  5419. scan_id = arg->u.scan_id;
  5420. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  5421. req_id = arg->req_id;
  5422. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5423. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  5424. cmd->req_type = __cpu_to_le32(arg->req_type);
  5425. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  5426. cmd->scan_id = __cpu_to_le32(scan_id);
  5427. cmd->scan_req_id = __cpu_to_le32(req_id);
  5428. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5429. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  5430. arg->req_id, arg->req_type, arg->u.scan_id);
  5431. return skb;
  5432. }
  5433. static struct sk_buff *
  5434. ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
  5435. enum wmi_vdev_type type,
  5436. enum wmi_vdev_subtype subtype,
  5437. const u8 macaddr[ETH_ALEN])
  5438. {
  5439. struct wmi_vdev_create_cmd *cmd;
  5440. struct sk_buff *skb;
  5441. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5442. if (!skb)
  5443. return ERR_PTR(-ENOMEM);
  5444. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  5445. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5446. cmd->vdev_type = __cpu_to_le32(type);
  5447. cmd->vdev_subtype = __cpu_to_le32(subtype);
  5448. ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
  5449. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5450. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  5451. vdev_id, type, subtype, macaddr);
  5452. return skb;
  5453. }
  5454. static struct sk_buff *
  5455. ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
  5456. {
  5457. struct wmi_vdev_delete_cmd *cmd;
  5458. struct sk_buff *skb;
  5459. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5460. if (!skb)
  5461. return ERR_PTR(-ENOMEM);
  5462. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  5463. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5464. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5465. "WMI vdev delete id %d\n", vdev_id);
  5466. return skb;
  5467. }
  5468. static struct sk_buff *
  5469. ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
  5470. const struct wmi_vdev_start_request_arg *arg,
  5471. bool restart)
  5472. {
  5473. struct wmi_vdev_start_request_cmd *cmd;
  5474. struct sk_buff *skb;
  5475. const char *cmdname;
  5476. u32 flags = 0;
  5477. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  5478. return ERR_PTR(-EINVAL);
  5479. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  5480. return ERR_PTR(-EINVAL);
  5481. if (restart)
  5482. cmdname = "restart";
  5483. else
  5484. cmdname = "start";
  5485. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5486. if (!skb)
  5487. return ERR_PTR(-ENOMEM);
  5488. if (arg->hidden_ssid)
  5489. flags |= WMI_VDEV_START_HIDDEN_SSID;
  5490. if (arg->pmf_enabled)
  5491. flags |= WMI_VDEV_START_PMF_ENABLED;
  5492. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  5493. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5494. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  5495. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  5496. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  5497. cmd->flags = __cpu_to_le32(flags);
  5498. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  5499. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  5500. if (arg->ssid) {
  5501. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  5502. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  5503. }
  5504. ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
  5505. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5506. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
  5507. cmdname, arg->vdev_id,
  5508. flags, arg->channel.freq, arg->channel.mode,
  5509. cmd->chan.flags, arg->channel.max_power);
  5510. return skb;
  5511. }
  5512. static struct sk_buff *
  5513. ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
  5514. {
  5515. struct wmi_vdev_stop_cmd *cmd;
  5516. struct sk_buff *skb;
  5517. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5518. if (!skb)
  5519. return ERR_PTR(-ENOMEM);
  5520. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  5521. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5522. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  5523. return skb;
  5524. }
  5525. static struct sk_buff *
  5526. ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
  5527. const u8 *bssid)
  5528. {
  5529. struct wmi_vdev_up_cmd *cmd;
  5530. struct sk_buff *skb;
  5531. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5532. if (!skb)
  5533. return ERR_PTR(-ENOMEM);
  5534. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  5535. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5536. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  5537. ether_addr_copy(cmd->vdev_bssid.addr, bssid);
  5538. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5539. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  5540. vdev_id, aid, bssid);
  5541. return skb;
  5542. }
  5543. static struct sk_buff *
  5544. ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
  5545. {
  5546. struct wmi_vdev_down_cmd *cmd;
  5547. struct sk_buff *skb;
  5548. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5549. if (!skb)
  5550. return ERR_PTR(-ENOMEM);
  5551. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  5552. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5553. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5554. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  5555. return skb;
  5556. }
  5557. static struct sk_buff *
  5558. ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  5559. u32 param_id, u32 param_value)
  5560. {
  5561. struct wmi_vdev_set_param_cmd *cmd;
  5562. struct sk_buff *skb;
  5563. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  5564. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5565. "vdev param %d not supported by firmware\n",
  5566. param_id);
  5567. return ERR_PTR(-EOPNOTSUPP);
  5568. }
  5569. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5570. if (!skb)
  5571. return ERR_PTR(-ENOMEM);
  5572. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  5573. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5574. cmd->param_id = __cpu_to_le32(param_id);
  5575. cmd->param_value = __cpu_to_le32(param_value);
  5576. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5577. "wmi vdev id 0x%x set param %d value %d\n",
  5578. vdev_id, param_id, param_value);
  5579. return skb;
  5580. }
  5581. static struct sk_buff *
  5582. ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
  5583. const struct wmi_vdev_install_key_arg *arg)
  5584. {
  5585. struct wmi_vdev_install_key_cmd *cmd;
  5586. struct sk_buff *skb;
  5587. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  5588. return ERR_PTR(-EINVAL);
  5589. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  5590. return ERR_PTR(-EINVAL);
  5591. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
  5592. if (!skb)
  5593. return ERR_PTR(-ENOMEM);
  5594. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  5595. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5596. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  5597. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  5598. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  5599. cmd->key_len = __cpu_to_le32(arg->key_len);
  5600. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  5601. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  5602. if (arg->macaddr)
  5603. ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
  5604. if (arg->key_data)
  5605. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  5606. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5607. "wmi vdev install key idx %d cipher %d len %d\n",
  5608. arg->key_idx, arg->key_cipher, arg->key_len);
  5609. return skb;
  5610. }
  5611. static struct sk_buff *
  5612. ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
  5613. const struct wmi_vdev_spectral_conf_arg *arg)
  5614. {
  5615. struct wmi_vdev_spectral_conf_cmd *cmd;
  5616. struct sk_buff *skb;
  5617. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5618. if (!skb)
  5619. return ERR_PTR(-ENOMEM);
  5620. cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
  5621. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5622. cmd->scan_count = __cpu_to_le32(arg->scan_count);
  5623. cmd->scan_period = __cpu_to_le32(arg->scan_period);
  5624. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  5625. cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
  5626. cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
  5627. cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
  5628. cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
  5629. cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
  5630. cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
  5631. cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
  5632. cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
  5633. cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
  5634. cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
  5635. cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
  5636. cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
  5637. cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
  5638. cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
  5639. cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
  5640. return skb;
  5641. }
  5642. static struct sk_buff *
  5643. ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
  5644. u32 trigger, u32 enable)
  5645. {
  5646. struct wmi_vdev_spectral_enable_cmd *cmd;
  5647. struct sk_buff *skb;
  5648. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5649. if (!skb)
  5650. return ERR_PTR(-ENOMEM);
  5651. cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
  5652. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5653. cmd->trigger_cmd = __cpu_to_le32(trigger);
  5654. cmd->enable_cmd = __cpu_to_le32(enable);
  5655. return skb;
  5656. }
  5657. static struct sk_buff *
  5658. ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
  5659. const u8 peer_addr[ETH_ALEN],
  5660. enum wmi_peer_type peer_type)
  5661. {
  5662. struct wmi_peer_create_cmd *cmd;
  5663. struct sk_buff *skb;
  5664. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5665. if (!skb)
  5666. return ERR_PTR(-ENOMEM);
  5667. cmd = (struct wmi_peer_create_cmd *)skb->data;
  5668. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5669. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5670. cmd->peer_type = __cpu_to_le32(peer_type);
  5671. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5672. "wmi peer create vdev_id %d peer_addr %pM\n",
  5673. vdev_id, peer_addr);
  5674. return skb;
  5675. }
  5676. static struct sk_buff *
  5677. ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
  5678. const u8 peer_addr[ETH_ALEN])
  5679. {
  5680. struct wmi_peer_delete_cmd *cmd;
  5681. struct sk_buff *skb;
  5682. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5683. if (!skb)
  5684. return ERR_PTR(-ENOMEM);
  5685. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  5686. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5687. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5688. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5689. "wmi peer delete vdev_id %d peer_addr %pM\n",
  5690. vdev_id, peer_addr);
  5691. return skb;
  5692. }
  5693. static struct sk_buff *
  5694. ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
  5695. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  5696. {
  5697. struct wmi_peer_flush_tids_cmd *cmd;
  5698. struct sk_buff *skb;
  5699. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5700. if (!skb)
  5701. return ERR_PTR(-ENOMEM);
  5702. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  5703. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5704. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  5705. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5706. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5707. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  5708. vdev_id, peer_addr, tid_bitmap);
  5709. return skb;
  5710. }
  5711. static struct sk_buff *
  5712. ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
  5713. const u8 *peer_addr,
  5714. enum wmi_peer_param param_id,
  5715. u32 param_value)
  5716. {
  5717. struct wmi_peer_set_param_cmd *cmd;
  5718. struct sk_buff *skb;
  5719. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5720. if (!skb)
  5721. return ERR_PTR(-ENOMEM);
  5722. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  5723. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5724. cmd->param_id = __cpu_to_le32(param_id);
  5725. cmd->param_value = __cpu_to_le32(param_value);
  5726. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5727. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5728. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  5729. vdev_id, peer_addr, param_id, param_value);
  5730. return skb;
  5731. }
  5732. static struct sk_buff *
  5733. ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  5734. enum wmi_sta_ps_mode psmode)
  5735. {
  5736. struct wmi_sta_powersave_mode_cmd *cmd;
  5737. struct sk_buff *skb;
  5738. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5739. if (!skb)
  5740. return ERR_PTR(-ENOMEM);
  5741. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  5742. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5743. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  5744. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5745. "wmi set powersave id 0x%x mode %d\n",
  5746. vdev_id, psmode);
  5747. return skb;
  5748. }
  5749. static struct sk_buff *
  5750. ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
  5751. enum wmi_sta_powersave_param param_id,
  5752. u32 value)
  5753. {
  5754. struct wmi_sta_powersave_param_cmd *cmd;
  5755. struct sk_buff *skb;
  5756. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5757. if (!skb)
  5758. return ERR_PTR(-ENOMEM);
  5759. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  5760. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5761. cmd->param_id = __cpu_to_le32(param_id);
  5762. cmd->param_value = __cpu_to_le32(value);
  5763. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5764. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  5765. vdev_id, param_id, value);
  5766. return skb;
  5767. }
  5768. static struct sk_buff *
  5769. ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  5770. enum wmi_ap_ps_peer_param param_id, u32 value)
  5771. {
  5772. struct wmi_ap_ps_peer_cmd *cmd;
  5773. struct sk_buff *skb;
  5774. if (!mac)
  5775. return ERR_PTR(-EINVAL);
  5776. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5777. if (!skb)
  5778. return ERR_PTR(-ENOMEM);
  5779. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  5780. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5781. cmd->param_id = __cpu_to_le32(param_id);
  5782. cmd->param_value = __cpu_to_le32(value);
  5783. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  5784. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5785. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  5786. vdev_id, param_id, value, mac);
  5787. return skb;
  5788. }
  5789. static struct sk_buff *
  5790. ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
  5791. const struct wmi_scan_chan_list_arg *arg)
  5792. {
  5793. struct wmi_scan_chan_list_cmd *cmd;
  5794. struct sk_buff *skb;
  5795. struct wmi_channel_arg *ch;
  5796. struct wmi_channel *ci;
  5797. int len;
  5798. int i;
  5799. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  5800. skb = ath10k_wmi_alloc_skb(ar, len);
  5801. if (!skb)
  5802. return ERR_PTR(-EINVAL);
  5803. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  5804. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  5805. for (i = 0; i < arg->n_channels; i++) {
  5806. ch = &arg->channels[i];
  5807. ci = &cmd->chan_info[i];
  5808. ath10k_wmi_put_wmi_channel(ci, ch);
  5809. }
  5810. return skb;
  5811. }
  5812. static void
  5813. ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
  5814. const struct wmi_peer_assoc_complete_arg *arg)
  5815. {
  5816. struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
  5817. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5818. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  5819. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  5820. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  5821. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  5822. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  5823. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  5824. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  5825. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  5826. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  5827. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  5828. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  5829. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  5830. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  5831. cmd->peer_legacy_rates.num_rates =
  5832. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  5833. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  5834. arg->peer_legacy_rates.num_rates);
  5835. cmd->peer_ht_rates.num_rates =
  5836. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  5837. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  5838. arg->peer_ht_rates.num_rates);
  5839. cmd->peer_vht_rates.rx_max_rate =
  5840. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  5841. cmd->peer_vht_rates.rx_mcs_set =
  5842. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  5843. cmd->peer_vht_rates.tx_max_rate =
  5844. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  5845. cmd->peer_vht_rates.tx_mcs_set =
  5846. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  5847. }
  5848. static void
  5849. ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
  5850. const struct wmi_peer_assoc_complete_arg *arg)
  5851. {
  5852. struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
  5853. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5854. memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
  5855. }
  5856. static void
  5857. ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
  5858. const struct wmi_peer_assoc_complete_arg *arg)
  5859. {
  5860. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5861. }
  5862. static void
  5863. ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
  5864. const struct wmi_peer_assoc_complete_arg *arg)
  5865. {
  5866. struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
  5867. int max_mcs, max_nss;
  5868. u32 info0;
  5869. /* TODO: Is using max values okay with firmware? */
  5870. max_mcs = 0xf;
  5871. max_nss = 0xf;
  5872. info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
  5873. SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
  5874. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5875. cmd->info0 = __cpu_to_le32(info0);
  5876. }
  5877. static void
  5878. ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
  5879. const struct wmi_peer_assoc_complete_arg *arg)
  5880. {
  5881. struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
  5882. ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
  5883. if (arg->peer_bw_rxnss_override)
  5884. cmd->peer_bw_rxnss_override =
  5885. __cpu_to_le32((arg->peer_bw_rxnss_override - 1) |
  5886. BIT(PEER_BW_RXNSS_OVERRIDE_OFFSET));
  5887. else
  5888. cmd->peer_bw_rxnss_override = 0;
  5889. }
  5890. static int
  5891. ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
  5892. {
  5893. if (arg->peer_mpdu_density > 16)
  5894. return -EINVAL;
  5895. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  5896. return -EINVAL;
  5897. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  5898. return -EINVAL;
  5899. return 0;
  5900. }
  5901. static struct sk_buff *
  5902. ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
  5903. const struct wmi_peer_assoc_complete_arg *arg)
  5904. {
  5905. size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
  5906. struct sk_buff *skb;
  5907. int ret;
  5908. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5909. if (ret)
  5910. return ERR_PTR(ret);
  5911. skb = ath10k_wmi_alloc_skb(ar, len);
  5912. if (!skb)
  5913. return ERR_PTR(-ENOMEM);
  5914. ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
  5915. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5916. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5917. arg->vdev_id, arg->addr,
  5918. arg->peer_reassoc ? "reassociate" : "new");
  5919. return skb;
  5920. }
  5921. static struct sk_buff *
  5922. ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
  5923. const struct wmi_peer_assoc_complete_arg *arg)
  5924. {
  5925. size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
  5926. struct sk_buff *skb;
  5927. int ret;
  5928. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5929. if (ret)
  5930. return ERR_PTR(ret);
  5931. skb = ath10k_wmi_alloc_skb(ar, len);
  5932. if (!skb)
  5933. return ERR_PTR(-ENOMEM);
  5934. ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
  5935. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5936. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5937. arg->vdev_id, arg->addr,
  5938. arg->peer_reassoc ? "reassociate" : "new");
  5939. return skb;
  5940. }
  5941. static struct sk_buff *
  5942. ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
  5943. const struct wmi_peer_assoc_complete_arg *arg)
  5944. {
  5945. size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
  5946. struct sk_buff *skb;
  5947. int ret;
  5948. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5949. if (ret)
  5950. return ERR_PTR(ret);
  5951. skb = ath10k_wmi_alloc_skb(ar, len);
  5952. if (!skb)
  5953. return ERR_PTR(-ENOMEM);
  5954. ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
  5955. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5956. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5957. arg->vdev_id, arg->addr,
  5958. arg->peer_reassoc ? "reassociate" : "new");
  5959. return skb;
  5960. }
  5961. static struct sk_buff *
  5962. ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
  5963. const struct wmi_peer_assoc_complete_arg *arg)
  5964. {
  5965. size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
  5966. struct sk_buff *skb;
  5967. int ret;
  5968. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5969. if (ret)
  5970. return ERR_PTR(ret);
  5971. skb = ath10k_wmi_alloc_skb(ar, len);
  5972. if (!skb)
  5973. return ERR_PTR(-ENOMEM);
  5974. ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
  5975. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5976. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5977. arg->vdev_id, arg->addr,
  5978. arg->peer_reassoc ? "reassociate" : "new");
  5979. return skb;
  5980. }
  5981. static struct sk_buff *
  5982. ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
  5983. {
  5984. struct sk_buff *skb;
  5985. skb = ath10k_wmi_alloc_skb(ar, 0);
  5986. if (!skb)
  5987. return ERR_PTR(-ENOMEM);
  5988. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
  5989. return skb;
  5990. }
  5991. static struct sk_buff *
  5992. ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
  5993. enum wmi_bss_survey_req_type type)
  5994. {
  5995. struct wmi_pdev_chan_info_req_cmd *cmd;
  5996. struct sk_buff *skb;
  5997. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5998. if (!skb)
  5999. return ERR_PTR(-ENOMEM);
  6000. cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
  6001. cmd->type = __cpu_to_le32(type);
  6002. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6003. "wmi pdev bss info request type %d\n", type);
  6004. return skb;
  6005. }
  6006. /* This function assumes the beacon is already DMA mapped */
  6007. static struct sk_buff *
  6008. ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
  6009. size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
  6010. bool deliver_cab)
  6011. {
  6012. struct wmi_bcn_tx_ref_cmd *cmd;
  6013. struct sk_buff *skb;
  6014. struct ieee80211_hdr *hdr;
  6015. u16 fc;
  6016. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6017. if (!skb)
  6018. return ERR_PTR(-ENOMEM);
  6019. hdr = (struct ieee80211_hdr *)bcn;
  6020. fc = le16_to_cpu(hdr->frame_control);
  6021. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  6022. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6023. cmd->data_len = __cpu_to_le32(bcn_len);
  6024. cmd->data_ptr = __cpu_to_le32(bcn_paddr);
  6025. cmd->msdu_id = 0;
  6026. cmd->frame_control = __cpu_to_le32(fc);
  6027. cmd->flags = 0;
  6028. cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
  6029. if (dtim_zero)
  6030. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  6031. if (deliver_cab)
  6032. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  6033. return skb;
  6034. }
  6035. void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
  6036. const struct wmi_wmm_params_arg *arg)
  6037. {
  6038. params->cwmin = __cpu_to_le32(arg->cwmin);
  6039. params->cwmax = __cpu_to_le32(arg->cwmax);
  6040. params->aifs = __cpu_to_le32(arg->aifs);
  6041. params->txop = __cpu_to_le32(arg->txop);
  6042. params->acm = __cpu_to_le32(arg->acm);
  6043. params->no_ack = __cpu_to_le32(arg->no_ack);
  6044. }
  6045. static struct sk_buff *
  6046. ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
  6047. const struct wmi_wmm_params_all_arg *arg)
  6048. {
  6049. struct wmi_pdev_set_wmm_params *cmd;
  6050. struct sk_buff *skb;
  6051. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6052. if (!skb)
  6053. return ERR_PTR(-ENOMEM);
  6054. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  6055. ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  6056. ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  6057. ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  6058. ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  6059. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  6060. return skb;
  6061. }
  6062. static struct sk_buff *
  6063. ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
  6064. {
  6065. struct wmi_request_stats_cmd *cmd;
  6066. struct sk_buff *skb;
  6067. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6068. if (!skb)
  6069. return ERR_PTR(-ENOMEM);
  6070. cmd = (struct wmi_request_stats_cmd *)skb->data;
  6071. cmd->stats_id = __cpu_to_le32(stats_mask);
  6072. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
  6073. stats_mask);
  6074. return skb;
  6075. }
  6076. static struct sk_buff *
  6077. ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
  6078. enum wmi_force_fw_hang_type type, u32 delay_ms)
  6079. {
  6080. struct wmi_force_fw_hang_cmd *cmd;
  6081. struct sk_buff *skb;
  6082. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6083. if (!skb)
  6084. return ERR_PTR(-ENOMEM);
  6085. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  6086. cmd->type = __cpu_to_le32(type);
  6087. cmd->delay_ms = __cpu_to_le32(delay_ms);
  6088. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  6089. type, delay_ms);
  6090. return skb;
  6091. }
  6092. static struct sk_buff *
  6093. ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6094. u32 log_level)
  6095. {
  6096. struct wmi_dbglog_cfg_cmd *cmd;
  6097. struct sk_buff *skb;
  6098. u32 cfg;
  6099. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6100. if (!skb)
  6101. return ERR_PTR(-ENOMEM);
  6102. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  6103. if (module_enable) {
  6104. cfg = SM(log_level,
  6105. ATH10K_DBGLOG_CFG_LOG_LVL);
  6106. } else {
  6107. /* set back defaults, all modules with WARN level */
  6108. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6109. ATH10K_DBGLOG_CFG_LOG_LVL);
  6110. module_enable = ~0;
  6111. }
  6112. cmd->module_enable = __cpu_to_le32(module_enable);
  6113. cmd->module_valid = __cpu_to_le32(~0);
  6114. cmd->config_enable = __cpu_to_le32(cfg);
  6115. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6116. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6117. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  6118. __le32_to_cpu(cmd->module_enable),
  6119. __le32_to_cpu(cmd->module_valid),
  6120. __le32_to_cpu(cmd->config_enable),
  6121. __le32_to_cpu(cmd->config_valid));
  6122. return skb;
  6123. }
  6124. static struct sk_buff *
  6125. ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6126. u32 log_level)
  6127. {
  6128. struct wmi_10_4_dbglog_cfg_cmd *cmd;
  6129. struct sk_buff *skb;
  6130. u32 cfg;
  6131. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6132. if (!skb)
  6133. return ERR_PTR(-ENOMEM);
  6134. cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
  6135. if (module_enable) {
  6136. cfg = SM(log_level,
  6137. ATH10K_DBGLOG_CFG_LOG_LVL);
  6138. } else {
  6139. /* set back defaults, all modules with WARN level */
  6140. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6141. ATH10K_DBGLOG_CFG_LOG_LVL);
  6142. module_enable = ~0;
  6143. }
  6144. cmd->module_enable = __cpu_to_le64(module_enable);
  6145. cmd->module_valid = __cpu_to_le64(~0);
  6146. cmd->config_enable = __cpu_to_le32(cfg);
  6147. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6148. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6149. "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
  6150. __le64_to_cpu(cmd->module_enable),
  6151. __le64_to_cpu(cmd->module_valid),
  6152. __le32_to_cpu(cmd->config_enable),
  6153. __le32_to_cpu(cmd->config_valid));
  6154. return skb;
  6155. }
  6156. static struct sk_buff *
  6157. ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
  6158. {
  6159. struct wmi_pdev_pktlog_enable_cmd *cmd;
  6160. struct sk_buff *skb;
  6161. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6162. if (!skb)
  6163. return ERR_PTR(-ENOMEM);
  6164. ev_bitmap &= ATH10K_PKTLOG_ANY;
  6165. cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
  6166. cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
  6167. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
  6168. ev_bitmap);
  6169. return skb;
  6170. }
  6171. static struct sk_buff *
  6172. ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
  6173. {
  6174. struct sk_buff *skb;
  6175. skb = ath10k_wmi_alloc_skb(ar, 0);
  6176. if (!skb)
  6177. return ERR_PTR(-ENOMEM);
  6178. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
  6179. return skb;
  6180. }
  6181. static struct sk_buff *
  6182. ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
  6183. u32 duration, u32 next_offset,
  6184. u32 enabled)
  6185. {
  6186. struct wmi_pdev_set_quiet_cmd *cmd;
  6187. struct sk_buff *skb;
  6188. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6189. if (!skb)
  6190. return ERR_PTR(-ENOMEM);
  6191. cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
  6192. cmd->period = __cpu_to_le32(period);
  6193. cmd->duration = __cpu_to_le32(duration);
  6194. cmd->next_start = __cpu_to_le32(next_offset);
  6195. cmd->enabled = __cpu_to_le32(enabled);
  6196. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6197. "wmi quiet param: period %u duration %u enabled %d\n",
  6198. period, duration, enabled);
  6199. return skb;
  6200. }
  6201. static struct sk_buff *
  6202. ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
  6203. const u8 *mac)
  6204. {
  6205. struct wmi_addba_clear_resp_cmd *cmd;
  6206. struct sk_buff *skb;
  6207. if (!mac)
  6208. return ERR_PTR(-EINVAL);
  6209. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6210. if (!skb)
  6211. return ERR_PTR(-ENOMEM);
  6212. cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
  6213. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6214. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6215. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6216. "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
  6217. vdev_id, mac);
  6218. return skb;
  6219. }
  6220. static struct sk_buff *
  6221. ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6222. u32 tid, u32 buf_size)
  6223. {
  6224. struct wmi_addba_send_cmd *cmd;
  6225. struct sk_buff *skb;
  6226. if (!mac)
  6227. return ERR_PTR(-EINVAL);
  6228. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6229. if (!skb)
  6230. return ERR_PTR(-ENOMEM);
  6231. cmd = (struct wmi_addba_send_cmd *)skb->data;
  6232. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6233. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6234. cmd->tid = __cpu_to_le32(tid);
  6235. cmd->buffersize = __cpu_to_le32(buf_size);
  6236. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6237. "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
  6238. vdev_id, mac, tid, buf_size);
  6239. return skb;
  6240. }
  6241. static struct sk_buff *
  6242. ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6243. u32 tid, u32 status)
  6244. {
  6245. struct wmi_addba_setresponse_cmd *cmd;
  6246. struct sk_buff *skb;
  6247. if (!mac)
  6248. return ERR_PTR(-EINVAL);
  6249. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6250. if (!skb)
  6251. return ERR_PTR(-ENOMEM);
  6252. cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
  6253. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6254. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6255. cmd->tid = __cpu_to_le32(tid);
  6256. cmd->statuscode = __cpu_to_le32(status);
  6257. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6258. "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
  6259. vdev_id, mac, tid, status);
  6260. return skb;
  6261. }
  6262. static struct sk_buff *
  6263. ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6264. u32 tid, u32 initiator, u32 reason)
  6265. {
  6266. struct wmi_delba_send_cmd *cmd;
  6267. struct sk_buff *skb;
  6268. if (!mac)
  6269. return ERR_PTR(-EINVAL);
  6270. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6271. if (!skb)
  6272. return ERR_PTR(-ENOMEM);
  6273. cmd = (struct wmi_delba_send_cmd *)skb->data;
  6274. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6275. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6276. cmd->tid = __cpu_to_le32(tid);
  6277. cmd->initiator = __cpu_to_le32(initiator);
  6278. cmd->reasoncode = __cpu_to_le32(reason);
  6279. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6280. "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
  6281. vdev_id, mac, tid, initiator, reason);
  6282. return skb;
  6283. }
  6284. static struct sk_buff *
  6285. ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
  6286. {
  6287. struct wmi_pdev_get_tpc_config_cmd *cmd;
  6288. struct sk_buff *skb;
  6289. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6290. if (!skb)
  6291. return ERR_PTR(-ENOMEM);
  6292. cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
  6293. cmd->param = __cpu_to_le32(param);
  6294. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6295. "wmi pdev get tcp config param:%d\n", param);
  6296. return skb;
  6297. }
  6298. size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
  6299. {
  6300. struct ath10k_fw_stats_peer *i;
  6301. size_t num = 0;
  6302. list_for_each_entry(i, head, list)
  6303. ++num;
  6304. return num;
  6305. }
  6306. size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
  6307. {
  6308. struct ath10k_fw_stats_vdev *i;
  6309. size_t num = 0;
  6310. list_for_each_entry(i, head, list)
  6311. ++num;
  6312. return num;
  6313. }
  6314. static void
  6315. ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6316. char *buf, u32 *length)
  6317. {
  6318. u32 len = *length;
  6319. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6320. len += scnprintf(buf + len, buf_len - len, "\n");
  6321. len += scnprintf(buf + len, buf_len - len, "%30s\n",
  6322. "ath10k PDEV stats");
  6323. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6324. "=================");
  6325. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6326. "Channel noise floor", pdev->ch_noise_floor);
  6327. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6328. "Channel TX power", pdev->chan_tx_power);
  6329. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6330. "TX frame count", pdev->tx_frame_count);
  6331. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6332. "RX frame count", pdev->rx_frame_count);
  6333. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6334. "RX clear count", pdev->rx_clear_count);
  6335. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6336. "Cycle count", pdev->cycle_count);
  6337. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6338. "PHY error count", pdev->phy_err_count);
  6339. *length = len;
  6340. }
  6341. static void
  6342. ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6343. char *buf, u32 *length)
  6344. {
  6345. u32 len = *length;
  6346. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6347. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6348. "RTS bad count", pdev->rts_bad);
  6349. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6350. "RTS good count", pdev->rts_good);
  6351. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6352. "FCS bad count", pdev->fcs_bad);
  6353. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6354. "No beacon count", pdev->no_beacons);
  6355. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6356. "MIB int count", pdev->mib_int_count);
  6357. len += scnprintf(buf + len, buf_len - len, "\n");
  6358. *length = len;
  6359. }
  6360. static void
  6361. ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6362. char *buf, u32 *length)
  6363. {
  6364. u32 len = *length;
  6365. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6366. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6367. "ath10k PDEV TX stats");
  6368. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6369. "=================");
  6370. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6371. "HTT cookies queued", pdev->comp_queued);
  6372. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6373. "HTT cookies disp.", pdev->comp_delivered);
  6374. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6375. "MSDU queued", pdev->msdu_enqued);
  6376. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6377. "MPDU queued", pdev->mpdu_enqued);
  6378. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6379. "MSDUs dropped", pdev->wmm_drop);
  6380. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6381. "Local enqued", pdev->local_enqued);
  6382. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6383. "Local freed", pdev->local_freed);
  6384. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6385. "HW queued", pdev->hw_queued);
  6386. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6387. "PPDUs reaped", pdev->hw_reaped);
  6388. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6389. "Num underruns", pdev->underrun);
  6390. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6391. "PPDUs cleaned", pdev->tx_abort);
  6392. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6393. "MPDUs requed", pdev->mpdus_requed);
  6394. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6395. "Excessive retries", pdev->tx_ko);
  6396. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6397. "HW rate", pdev->data_rc);
  6398. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6399. "Sched self tiggers", pdev->self_triggers);
  6400. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6401. "Dropped due to SW retries",
  6402. pdev->sw_retry_failure);
  6403. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6404. "Illegal rate phy errors",
  6405. pdev->illgl_rate_phy_err);
  6406. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6407. "Pdev continuous xretry", pdev->pdev_cont_xretry);
  6408. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6409. "TX timeout", pdev->pdev_tx_timeout);
  6410. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6411. "PDEV resets", pdev->pdev_resets);
  6412. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6413. "PHY underrun", pdev->phy_underrun);
  6414. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6415. "MPDU is more than txop limit", pdev->txop_ovf);
  6416. *length = len;
  6417. }
  6418. static void
  6419. ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6420. char *buf, u32 *length)
  6421. {
  6422. u32 len = *length;
  6423. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6424. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6425. "ath10k PDEV RX stats");
  6426. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6427. "=================");
  6428. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6429. "Mid PPDU route change",
  6430. pdev->mid_ppdu_route_change);
  6431. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6432. "Tot. number of statuses", pdev->status_rcvd);
  6433. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6434. "Extra frags on rings 0", pdev->r0_frags);
  6435. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6436. "Extra frags on rings 1", pdev->r1_frags);
  6437. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6438. "Extra frags on rings 2", pdev->r2_frags);
  6439. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6440. "Extra frags on rings 3", pdev->r3_frags);
  6441. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6442. "MSDUs delivered to HTT", pdev->htt_msdus);
  6443. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6444. "MPDUs delivered to HTT", pdev->htt_mpdus);
  6445. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6446. "MSDUs delivered to stack", pdev->loc_msdus);
  6447. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6448. "MPDUs delivered to stack", pdev->loc_mpdus);
  6449. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6450. "Oversized AMSUs", pdev->oversize_amsdu);
  6451. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6452. "PHY errors", pdev->phy_errs);
  6453. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6454. "PHY errors drops", pdev->phy_err_drop);
  6455. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6456. "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
  6457. *length = len;
  6458. }
  6459. static void
  6460. ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
  6461. char *buf, u32 *length)
  6462. {
  6463. u32 len = *length;
  6464. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6465. int i;
  6466. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6467. "vdev id", vdev->vdev_id);
  6468. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6469. "beacon snr", vdev->beacon_snr);
  6470. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6471. "data snr", vdev->data_snr);
  6472. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6473. "num rx frames", vdev->num_rx_frames);
  6474. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6475. "num rts fail", vdev->num_rts_fail);
  6476. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6477. "num rts success", vdev->num_rts_success);
  6478. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6479. "num rx err", vdev->num_rx_err);
  6480. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6481. "num rx discard", vdev->num_rx_discard);
  6482. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6483. "num tx not acked", vdev->num_tx_not_acked);
  6484. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
  6485. len += scnprintf(buf + len, buf_len - len,
  6486. "%25s [%02d] %u\n",
  6487. "num tx frames", i,
  6488. vdev->num_tx_frames[i]);
  6489. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
  6490. len += scnprintf(buf + len, buf_len - len,
  6491. "%25s [%02d] %u\n",
  6492. "num tx frames retries", i,
  6493. vdev->num_tx_frames_retries[i]);
  6494. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
  6495. len += scnprintf(buf + len, buf_len - len,
  6496. "%25s [%02d] %u\n",
  6497. "num tx frames failures", i,
  6498. vdev->num_tx_frames_failures[i]);
  6499. for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
  6500. len += scnprintf(buf + len, buf_len - len,
  6501. "%25s [%02d] 0x%08x\n",
  6502. "tx rate history", i,
  6503. vdev->tx_rate_history[i]);
  6504. for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
  6505. len += scnprintf(buf + len, buf_len - len,
  6506. "%25s [%02d] %u\n",
  6507. "beacon rssi history", i,
  6508. vdev->beacon_rssi_history[i]);
  6509. len += scnprintf(buf + len, buf_len - len, "\n");
  6510. *length = len;
  6511. }
  6512. static void
  6513. ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
  6514. char *buf, u32 *length)
  6515. {
  6516. u32 len = *length;
  6517. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6518. len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
  6519. "Peer MAC address", peer->peer_macaddr);
  6520. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6521. "Peer RSSI", peer->peer_rssi);
  6522. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6523. "Peer TX rate", peer->peer_tx_rate);
  6524. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6525. "Peer RX rate", peer->peer_rx_rate);
  6526. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6527. "Peer RX duration", peer->rx_duration);
  6528. len += scnprintf(buf + len, buf_len - len, "\n");
  6529. *length = len;
  6530. }
  6531. void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
  6532. struct ath10k_fw_stats *fw_stats,
  6533. char *buf)
  6534. {
  6535. u32 len = 0;
  6536. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6537. const struct ath10k_fw_stats_pdev *pdev;
  6538. const struct ath10k_fw_stats_vdev *vdev;
  6539. const struct ath10k_fw_stats_peer *peer;
  6540. size_t num_peers;
  6541. size_t num_vdevs;
  6542. spin_lock_bh(&ar->data_lock);
  6543. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6544. struct ath10k_fw_stats_pdev, list);
  6545. if (!pdev) {
  6546. ath10k_warn(ar, "failed to get pdev stats\n");
  6547. goto unlock;
  6548. }
  6549. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6550. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6551. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6552. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6553. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6554. len += scnprintf(buf + len, buf_len - len, "\n");
  6555. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6556. "ath10k VDEV stats", num_vdevs);
  6557. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6558. "=================");
  6559. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6560. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6561. }
  6562. len += scnprintf(buf + len, buf_len - len, "\n");
  6563. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6564. "ath10k PEER stats", num_peers);
  6565. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6566. "=================");
  6567. list_for_each_entry(peer, &fw_stats->peers, list) {
  6568. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6569. }
  6570. unlock:
  6571. spin_unlock_bh(&ar->data_lock);
  6572. if (len >= buf_len)
  6573. buf[len - 1] = 0;
  6574. else
  6575. buf[len] = 0;
  6576. }
  6577. void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
  6578. struct ath10k_fw_stats *fw_stats,
  6579. char *buf)
  6580. {
  6581. unsigned int len = 0;
  6582. unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6583. const struct ath10k_fw_stats_pdev *pdev;
  6584. const struct ath10k_fw_stats_vdev *vdev;
  6585. const struct ath10k_fw_stats_peer *peer;
  6586. size_t num_peers;
  6587. size_t num_vdevs;
  6588. spin_lock_bh(&ar->data_lock);
  6589. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6590. struct ath10k_fw_stats_pdev, list);
  6591. if (!pdev) {
  6592. ath10k_warn(ar, "failed to get pdev stats\n");
  6593. goto unlock;
  6594. }
  6595. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6596. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6597. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6598. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6599. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6600. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6601. len += scnprintf(buf + len, buf_len - len, "\n");
  6602. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6603. "ath10k VDEV stats", num_vdevs);
  6604. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6605. "=================");
  6606. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6607. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6608. }
  6609. len += scnprintf(buf + len, buf_len - len, "\n");
  6610. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6611. "ath10k PEER stats", num_peers);
  6612. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6613. "=================");
  6614. list_for_each_entry(peer, &fw_stats->peers, list) {
  6615. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6616. }
  6617. unlock:
  6618. spin_unlock_bh(&ar->data_lock);
  6619. if (len >= buf_len)
  6620. buf[len - 1] = 0;
  6621. else
  6622. buf[len] = 0;
  6623. }
  6624. static struct sk_buff *
  6625. ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
  6626. u32 detect_level, u32 detect_margin)
  6627. {
  6628. struct wmi_pdev_set_adaptive_cca_params *cmd;
  6629. struct sk_buff *skb;
  6630. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6631. if (!skb)
  6632. return ERR_PTR(-ENOMEM);
  6633. cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
  6634. cmd->enable = __cpu_to_le32(enable);
  6635. cmd->cca_detect_level = __cpu_to_le32(detect_level);
  6636. cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
  6637. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6638. "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
  6639. enable, detect_level, detect_margin);
  6640. return skb;
  6641. }
  6642. void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
  6643. struct ath10k_fw_stats *fw_stats,
  6644. char *buf)
  6645. {
  6646. u32 len = 0;
  6647. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6648. const struct ath10k_fw_stats_pdev *pdev;
  6649. const struct ath10k_fw_stats_vdev *vdev;
  6650. const struct ath10k_fw_stats_peer *peer;
  6651. size_t num_peers;
  6652. size_t num_vdevs;
  6653. spin_lock_bh(&ar->data_lock);
  6654. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6655. struct ath10k_fw_stats_pdev, list);
  6656. if (!pdev) {
  6657. ath10k_warn(ar, "failed to get pdev stats\n");
  6658. goto unlock;
  6659. }
  6660. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6661. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6662. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6663. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6664. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6665. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6666. "HW paused", pdev->hw_paused);
  6667. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6668. "Seqs posted", pdev->seq_posted);
  6669. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6670. "Seqs failed queueing", pdev->seq_failed_queueing);
  6671. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6672. "Seqs completed", pdev->seq_completed);
  6673. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6674. "Seqs restarted", pdev->seq_restarted);
  6675. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6676. "MU Seqs posted", pdev->mu_seq_posted);
  6677. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6678. "MPDUs SW flushed", pdev->mpdus_sw_flush);
  6679. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6680. "MPDUs HW filtered", pdev->mpdus_hw_filter);
  6681. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6682. "MPDUs truncated", pdev->mpdus_truncated);
  6683. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6684. "MPDUs receive no ACK", pdev->mpdus_ack_failed);
  6685. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6686. "MPDUs expired", pdev->mpdus_expired);
  6687. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6688. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6689. "Num Rx Overflow errors", pdev->rx_ovfl_errs);
  6690. len += scnprintf(buf + len, buf_len - len, "\n");
  6691. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6692. "ath10k VDEV stats", num_vdevs);
  6693. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6694. "=================");
  6695. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6696. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6697. }
  6698. len += scnprintf(buf + len, buf_len - len, "\n");
  6699. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6700. "ath10k PEER stats", num_peers);
  6701. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6702. "=================");
  6703. list_for_each_entry(peer, &fw_stats->peers, list) {
  6704. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6705. }
  6706. unlock:
  6707. spin_unlock_bh(&ar->data_lock);
  6708. if (len >= buf_len)
  6709. buf[len - 1] = 0;
  6710. else
  6711. buf[len] = 0;
  6712. }
  6713. int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
  6714. enum wmi_vdev_subtype subtype)
  6715. {
  6716. switch (subtype) {
  6717. case WMI_VDEV_SUBTYPE_NONE:
  6718. return WMI_VDEV_SUBTYPE_LEGACY_NONE;
  6719. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6720. return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
  6721. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6722. return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
  6723. case WMI_VDEV_SUBTYPE_P2P_GO:
  6724. return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
  6725. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6726. return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
  6727. case WMI_VDEV_SUBTYPE_MESH_11S:
  6728. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6729. return -ENOTSUPP;
  6730. }
  6731. return -ENOTSUPP;
  6732. }
  6733. static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
  6734. enum wmi_vdev_subtype subtype)
  6735. {
  6736. switch (subtype) {
  6737. case WMI_VDEV_SUBTYPE_NONE:
  6738. return WMI_VDEV_SUBTYPE_10_2_4_NONE;
  6739. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6740. return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
  6741. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6742. return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
  6743. case WMI_VDEV_SUBTYPE_P2P_GO:
  6744. return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
  6745. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6746. return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
  6747. case WMI_VDEV_SUBTYPE_MESH_11S:
  6748. return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
  6749. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6750. return -ENOTSUPP;
  6751. }
  6752. return -ENOTSUPP;
  6753. }
  6754. static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
  6755. enum wmi_vdev_subtype subtype)
  6756. {
  6757. switch (subtype) {
  6758. case WMI_VDEV_SUBTYPE_NONE:
  6759. return WMI_VDEV_SUBTYPE_10_4_NONE;
  6760. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6761. return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
  6762. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6763. return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
  6764. case WMI_VDEV_SUBTYPE_P2P_GO:
  6765. return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
  6766. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6767. return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
  6768. case WMI_VDEV_SUBTYPE_MESH_11S:
  6769. return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
  6770. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6771. return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
  6772. }
  6773. return -ENOTSUPP;
  6774. }
  6775. static struct sk_buff *
  6776. ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
  6777. enum wmi_host_platform_type type,
  6778. u32 fw_feature_bitmap)
  6779. {
  6780. struct wmi_ext_resource_config_10_4_cmd *cmd;
  6781. struct sk_buff *skb;
  6782. u32 num_tdls_sleep_sta = 0;
  6783. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6784. if (!skb)
  6785. return ERR_PTR(-ENOMEM);
  6786. if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
  6787. num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
  6788. cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
  6789. cmd->host_platform_config = __cpu_to_le32(type);
  6790. cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
  6791. cmd->wlan_gpio_priority = __cpu_to_le32(-1);
  6792. cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
  6793. cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
  6794. cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
  6795. cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
  6796. cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
  6797. cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
  6798. cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
  6799. cmd->max_tdls_concurrent_buffer_sta =
  6800. __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
  6801. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6802. "wmi ext resource config host type %d firmware feature bitmap %08x\n",
  6803. type, fw_feature_bitmap);
  6804. return skb;
  6805. }
  6806. static struct sk_buff *
  6807. ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
  6808. enum wmi_tdls_state state)
  6809. {
  6810. struct wmi_10_4_tdls_set_state_cmd *cmd;
  6811. struct sk_buff *skb;
  6812. u32 options = 0;
  6813. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6814. if (!skb)
  6815. return ERR_PTR(-ENOMEM);
  6816. if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map))
  6817. state = WMI_TDLS_ENABLE_PASSIVE;
  6818. if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
  6819. options |= WMI_TDLS_BUFFER_STA_EN;
  6820. cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
  6821. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6822. cmd->state = __cpu_to_le32(state);
  6823. cmd->notification_interval_ms = __cpu_to_le32(5000);
  6824. cmd->tx_discovery_threshold = __cpu_to_le32(100);
  6825. cmd->tx_teardown_threshold = __cpu_to_le32(5);
  6826. cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
  6827. cmd->rssi_delta = __cpu_to_le32(-20);
  6828. cmd->tdls_options = __cpu_to_le32(options);
  6829. cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
  6830. cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
  6831. cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
  6832. cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
  6833. cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
  6834. cmd->teardown_notification_ms = __cpu_to_le32(10);
  6835. cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
  6836. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
  6837. state, vdev_id);
  6838. return skb;
  6839. }
  6840. static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
  6841. {
  6842. u32 peer_qos = 0;
  6843. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
  6844. peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
  6845. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
  6846. peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
  6847. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
  6848. peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
  6849. if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
  6850. peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
  6851. peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
  6852. return peer_qos;
  6853. }
  6854. static struct sk_buff *
  6855. ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
  6856. const struct wmi_tdls_peer_update_cmd_arg *arg,
  6857. const struct wmi_tdls_peer_capab_arg *cap,
  6858. const struct wmi_channel_arg *chan_arg)
  6859. {
  6860. struct wmi_10_4_tdls_peer_update_cmd *cmd;
  6861. struct wmi_tdls_peer_capabilities *peer_cap;
  6862. struct wmi_channel *chan;
  6863. struct sk_buff *skb;
  6864. u32 peer_qos;
  6865. int len, chan_len;
  6866. int i;
  6867. /* tdls peer update cmd has place holder for one channel*/
  6868. chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
  6869. len = sizeof(*cmd) + chan_len * sizeof(*chan);
  6870. skb = ath10k_wmi_alloc_skb(ar, len);
  6871. if (!skb)
  6872. return ERR_PTR(-ENOMEM);
  6873. memset(skb->data, 0, sizeof(*cmd));
  6874. cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
  6875. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  6876. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  6877. cmd->peer_state = __cpu_to_le32(arg->peer_state);
  6878. peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
  6879. cap->peer_max_sp);
  6880. peer_cap = &cmd->peer_capab;
  6881. peer_cap->peer_qos = __cpu_to_le32(peer_qos);
  6882. peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
  6883. peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
  6884. peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
  6885. peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
  6886. peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
  6887. peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
  6888. for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
  6889. peer_cap->peer_operclass[i] = cap->peer_operclass[i];
  6890. peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
  6891. peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
  6892. peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
  6893. for (i = 0; i < cap->peer_chan_len; i++) {
  6894. chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
  6895. ath10k_wmi_put_wmi_channel(chan, &chan_arg[i]);
  6896. }
  6897. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6898. "wmi tdls peer update vdev %i state %d n_chans %u\n",
  6899. arg->vdev_id, arg->peer_state, cap->peer_chan_len);
  6900. return skb;
  6901. }
  6902. static struct sk_buff *
  6903. ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
  6904. {
  6905. struct wmi_echo_cmd *cmd;
  6906. struct sk_buff *skb;
  6907. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6908. if (!skb)
  6909. return ERR_PTR(-ENOMEM);
  6910. cmd = (struct wmi_echo_cmd *)skb->data;
  6911. cmd->value = cpu_to_le32(value);
  6912. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6913. "wmi echo value 0x%08x\n", value);
  6914. return skb;
  6915. }
  6916. int
  6917. ath10k_wmi_barrier(struct ath10k *ar)
  6918. {
  6919. int ret;
  6920. int time_left;
  6921. spin_lock_bh(&ar->data_lock);
  6922. reinit_completion(&ar->wmi.barrier);
  6923. spin_unlock_bh(&ar->data_lock);
  6924. ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
  6925. if (ret) {
  6926. ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
  6927. return ret;
  6928. }
  6929. time_left = wait_for_completion_timeout(&ar->wmi.barrier,
  6930. ATH10K_WMI_BARRIER_TIMEOUT_HZ);
  6931. if (!time_left)
  6932. return -ETIMEDOUT;
  6933. return 0;
  6934. }
  6935. static const struct wmi_ops wmi_ops = {
  6936. .rx = ath10k_wmi_op_rx,
  6937. .map_svc = wmi_main_svc_map,
  6938. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6939. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6940. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6941. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6942. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6943. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6944. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6945. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6946. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  6947. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6948. .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
  6949. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6950. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  6951. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6952. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6953. .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
  6954. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6955. .gen_init = ath10k_wmi_op_gen_init,
  6956. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  6957. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6958. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6959. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6960. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6961. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6962. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6963. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6964. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6965. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6966. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6967. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6968. /* .gen_vdev_wmm_conf not implemented */
  6969. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6970. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6971. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6972. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6973. .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
  6974. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6975. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6976. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6977. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6978. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6979. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6980. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6981. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6982. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6983. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6984. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6985. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6986. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6987. /* .gen_pdev_get_temperature not implemented */
  6988. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6989. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6990. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6991. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6992. .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  6993. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  6994. .gen_echo = ath10k_wmi_op_gen_echo,
  6995. /* .gen_bcn_tmpl not implemented */
  6996. /* .gen_prb_tmpl not implemented */
  6997. /* .gen_p2p_go_bcn_ie not implemented */
  6998. /* .gen_adaptive_qcs not implemented */
  6999. /* .gen_pdev_enable_adaptive_cca not implemented */
  7000. };
  7001. static const struct wmi_ops wmi_10_1_ops = {
  7002. .rx = ath10k_wmi_10_1_op_rx,
  7003. .map_svc = wmi_10x_svc_map,
  7004. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7005. .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
  7006. .gen_init = ath10k_wmi_10_1_op_gen_init,
  7007. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7008. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7009. .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
  7010. /* .gen_pdev_get_temperature not implemented */
  7011. /* shared with main branch */
  7012. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7013. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7014. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7015. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7016. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7017. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7018. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7019. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7020. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7021. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7022. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7023. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7024. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7025. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7026. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7027. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7028. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7029. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7030. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7031. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7032. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7033. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7034. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7035. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7036. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7037. /* .gen_vdev_wmm_conf not implemented */
  7038. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7039. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7040. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7041. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7042. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7043. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7044. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7045. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7046. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7047. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7048. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7049. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7050. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7051. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7052. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7053. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7054. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7055. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7056. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7057. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7058. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7059. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7060. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7061. .gen_echo = ath10k_wmi_op_gen_echo,
  7062. /* .gen_bcn_tmpl not implemented */
  7063. /* .gen_prb_tmpl not implemented */
  7064. /* .gen_p2p_go_bcn_ie not implemented */
  7065. /* .gen_adaptive_qcs not implemented */
  7066. /* .gen_pdev_enable_adaptive_cca not implemented */
  7067. };
  7068. static const struct wmi_ops wmi_10_2_ops = {
  7069. .rx = ath10k_wmi_10_2_op_rx,
  7070. .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
  7071. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7072. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7073. /* .gen_pdev_get_temperature not implemented */
  7074. /* shared with 10.1 */
  7075. .map_svc = wmi_10x_svc_map,
  7076. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7077. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7078. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7079. .gen_echo = ath10k_wmi_op_gen_echo,
  7080. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7081. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7082. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7083. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7084. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7085. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  7086. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7087. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7088. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7089. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7090. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7091. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7092. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7093. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7094. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7095. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7096. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7097. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7098. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7099. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7100. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7101. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7102. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7103. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7104. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7105. /* .gen_vdev_wmm_conf not implemented */
  7106. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7107. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7108. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7109. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7110. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7111. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7112. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7113. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7114. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7115. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7116. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7117. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7118. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7119. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7120. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7121. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7122. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7123. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7124. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7125. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7126. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7127. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7128. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7129. /* .gen_pdev_enable_adaptive_cca not implemented */
  7130. };
  7131. static const struct wmi_ops wmi_10_2_4_ops = {
  7132. .rx = ath10k_wmi_10_2_op_rx,
  7133. .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
  7134. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7135. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7136. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7137. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7138. /* shared with 10.1 */
  7139. .map_svc = wmi_10x_svc_map,
  7140. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7141. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7142. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7143. .gen_echo = ath10k_wmi_op_gen_echo,
  7144. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7145. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7146. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7147. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7148. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7149. .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
  7150. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7151. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7152. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7153. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7154. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7155. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7156. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7157. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7158. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7159. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7160. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7161. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7162. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7163. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7164. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7165. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7166. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7167. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7168. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7169. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7170. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7171. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7172. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7173. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7174. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7175. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7176. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7177. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7178. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7179. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7180. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7181. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7182. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7183. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7184. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7185. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7186. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7187. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7188. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7189. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7190. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7191. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7192. .gen_pdev_enable_adaptive_cca =
  7193. ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  7194. .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
  7195. /* .gen_bcn_tmpl not implemented */
  7196. /* .gen_prb_tmpl not implemented */
  7197. /* .gen_p2p_go_bcn_ie not implemented */
  7198. /* .gen_adaptive_qcs not implemented */
  7199. };
  7200. static const struct wmi_ops wmi_10_4_ops = {
  7201. .rx = ath10k_wmi_10_4_op_rx,
  7202. .map_svc = wmi_10_4_svc_map,
  7203. .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
  7204. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7205. .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
  7206. .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
  7207. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7208. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7209. .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
  7210. .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
  7211. .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
  7212. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7213. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7214. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7215. .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
  7216. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7217. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7218. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7219. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7220. .gen_init = ath10k_wmi_10_4_op_gen_init,
  7221. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7222. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7223. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7224. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7225. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7226. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7227. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7228. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7229. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7230. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7231. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7232. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7233. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7234. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7235. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7236. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7237. .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
  7238. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7239. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7240. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7241. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7242. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7243. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7244. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7245. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7246. .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
  7247. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7248. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7249. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7250. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7251. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7252. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7253. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7254. .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
  7255. .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
  7256. .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
  7257. .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
  7258. /* shared with 10.2 */
  7259. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7260. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7261. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7262. .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
  7263. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7264. .gen_echo = ath10k_wmi_op_gen_echo,
  7265. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7266. };
  7267. int ath10k_wmi_attach(struct ath10k *ar)
  7268. {
  7269. switch (ar->running_fw->fw_file.wmi_op_version) {
  7270. case ATH10K_FW_WMI_OP_VERSION_10_4:
  7271. ar->wmi.ops = &wmi_10_4_ops;
  7272. ar->wmi.cmd = &wmi_10_4_cmd_map;
  7273. ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
  7274. ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
  7275. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7276. break;
  7277. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  7278. ar->wmi.cmd = &wmi_10_2_4_cmd_map;
  7279. ar->wmi.ops = &wmi_10_2_4_ops;
  7280. ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
  7281. ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
  7282. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7283. break;
  7284. case ATH10K_FW_WMI_OP_VERSION_10_2:
  7285. ar->wmi.cmd = &wmi_10_2_cmd_map;
  7286. ar->wmi.ops = &wmi_10_2_ops;
  7287. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7288. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7289. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7290. break;
  7291. case ATH10K_FW_WMI_OP_VERSION_10_1:
  7292. ar->wmi.cmd = &wmi_10x_cmd_map;
  7293. ar->wmi.ops = &wmi_10_1_ops;
  7294. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7295. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7296. ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
  7297. break;
  7298. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  7299. ar->wmi.cmd = &wmi_cmd_map;
  7300. ar->wmi.ops = &wmi_ops;
  7301. ar->wmi.vdev_param = &wmi_vdev_param_map;
  7302. ar->wmi.pdev_param = &wmi_pdev_param_map;
  7303. ar->wmi.peer_flags = &wmi_peer_flags_map;
  7304. break;
  7305. case ATH10K_FW_WMI_OP_VERSION_TLV:
  7306. ath10k_wmi_tlv_attach(ar);
  7307. break;
  7308. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  7309. case ATH10K_FW_WMI_OP_VERSION_MAX:
  7310. ath10k_err(ar, "unsupported WMI op version: %d\n",
  7311. ar->running_fw->fw_file.wmi_op_version);
  7312. return -EINVAL;
  7313. }
  7314. init_completion(&ar->wmi.service_ready);
  7315. init_completion(&ar->wmi.unified_ready);
  7316. init_completion(&ar->wmi.barrier);
  7317. INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
  7318. return 0;
  7319. }
  7320. void ath10k_wmi_free_host_mem(struct ath10k *ar)
  7321. {
  7322. int i;
  7323. /* free the host memory chunks requested by firmware */
  7324. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  7325. dma_free_coherent(ar->dev,
  7326. ar->wmi.mem_chunks[i].len,
  7327. ar->wmi.mem_chunks[i].vaddr,
  7328. ar->wmi.mem_chunks[i].paddr);
  7329. }
  7330. ar->wmi.num_mem_chunks = 0;
  7331. }
  7332. void ath10k_wmi_detach(struct ath10k *ar)
  7333. {
  7334. cancel_work_sync(&ar->svc_rdy_work);
  7335. if (ar->svc_rdy_skb)
  7336. dev_kfree_skb(ar->svc_rdy_skb);
  7337. }