marvell.c 53 KB

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  1. /*
  2. * drivers/net/phy/marvell.c
  3. *
  4. * Driver for Marvell PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/string.h>
  20. #include <linux/ctype.h>
  21. #include <linux/errno.h>
  22. #include <linux/unistd.h>
  23. #include <linux/hwmon.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/init.h>
  26. #include <linux/delay.h>
  27. #include <linux/netdevice.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/mm.h>
  32. #include <linux/module.h>
  33. #include <linux/mii.h>
  34. #include <linux/ethtool.h>
  35. #include <linux/phy.h>
  36. #include <linux/marvell_phy.h>
  37. #include <linux/of.h>
  38. #include <linux/io.h>
  39. #include <asm/irq.h>
  40. #include <linux/uaccess.h>
  41. #define MII_MARVELL_PHY_PAGE 22
  42. #define MII_MARVELL_COPPER_PAGE 0x00
  43. #define MII_MARVELL_FIBER_PAGE 0x01
  44. #define MII_MARVELL_MSCR_PAGE 0x02
  45. #define MII_MARVELL_LED_PAGE 0x03
  46. #define MII_MARVELL_MISC_TEST_PAGE 0x06
  47. #define MII_MARVELL_WOL_PAGE 0x11
  48. #define MII_M1011_IEVENT 0x13
  49. #define MII_M1011_IEVENT_CLEAR 0x0000
  50. #define MII_M1011_IMASK 0x12
  51. #define MII_M1011_IMASK_INIT 0x6400
  52. #define MII_M1011_IMASK_CLEAR 0x0000
  53. #define MII_M1011_PHY_SCR 0x10
  54. #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
  55. #define MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT 12
  56. #define MII_M1011_PHY_SRC_DOWNSHIFT_MASK 0x7800
  57. #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
  58. #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
  59. #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
  60. #define MII_M1111_PHY_LED_CONTROL 0x18
  61. #define MII_M1111_PHY_LED_DIRECT 0x4100
  62. #define MII_M1111_PHY_LED_COMBINE 0x411c
  63. #define MII_M1111_PHY_EXT_CR 0x14
  64. #define MII_M1111_RGMII_RX_DELAY BIT(7)
  65. #define MII_M1111_RGMII_TX_DELAY BIT(1)
  66. #define MII_M1111_PHY_EXT_SR 0x1b
  67. #define MII_M1111_HWCFG_MODE_MASK 0xf
  68. #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
  69. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  70. #define MII_M1111_HWCFG_MODE_RTBI 0x7
  71. #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
  72. #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
  73. #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
  74. #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
  75. #define MII_88E1121_PHY_MSCR_REG 21
  76. #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
  77. #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
  78. #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(BIT(5) | BIT(4)))
  79. #define MII_88E1121_MISC_TEST 0x1a
  80. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
  81. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
  82. #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
  83. #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
  84. #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
  85. #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
  86. #define MII_88E1510_TEMP_SENSOR 0x1b
  87. #define MII_88E1510_TEMP_SENSOR_MASK 0xff
  88. #define MII_88E1318S_PHY_MSCR1_REG 16
  89. #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
  90. /* Copper Specific Interrupt Enable Register */
  91. #define MII_88E1318S_PHY_CSIER 0x12
  92. /* WOL Event Interrupt Enable */
  93. #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
  94. /* LED Timer Control Register */
  95. #define MII_88E1318S_PHY_LED_TCR 0x12
  96. #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
  97. #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
  98. #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
  99. /* Magic Packet MAC address registers */
  100. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
  101. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
  102. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
  103. #define MII_88E1318S_PHY_WOL_CTRL 0x10
  104. #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
  105. #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
  106. #define MII_88E1121_PHY_LED_CTRL 16
  107. #define MII_88E1121_PHY_LED_DEF 0x0030
  108. #define MII_M1011_PHY_STATUS 0x11
  109. #define MII_M1011_PHY_STATUS_1000 0x8000
  110. #define MII_M1011_PHY_STATUS_100 0x4000
  111. #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
  112. #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  113. #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
  114. #define MII_M1011_PHY_STATUS_LINK 0x0400
  115. #define MII_88E3016_PHY_SPEC_CTRL 0x10
  116. #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
  117. #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
  118. #define MII_88E1510_GEN_CTRL_REG_1 0x14
  119. #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
  120. #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
  121. #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
  122. #define LPA_FIBER_1000HALF 0x40
  123. #define LPA_FIBER_1000FULL 0x20
  124. #define LPA_PAUSE_FIBER 0x180
  125. #define LPA_PAUSE_ASYM_FIBER 0x100
  126. #define ADVERTISE_FIBER_1000HALF 0x40
  127. #define ADVERTISE_FIBER_1000FULL 0x20
  128. #define ADVERTISE_PAUSE_FIBER 0x180
  129. #define ADVERTISE_PAUSE_ASYM_FIBER 0x100
  130. #define REGISTER_LINK_STATUS 0x400
  131. #define NB_FIBER_STATS 1
  132. MODULE_DESCRIPTION("Marvell PHY driver");
  133. MODULE_AUTHOR("Andy Fleming");
  134. MODULE_LICENSE("GPL");
  135. struct marvell_hw_stat {
  136. const char *string;
  137. u8 page;
  138. u8 reg;
  139. u8 bits;
  140. };
  141. static struct marvell_hw_stat marvell_hw_stats[] = {
  142. { "phy_receive_errors_copper", 0, 21, 16},
  143. { "phy_idle_errors", 0, 10, 8 },
  144. { "phy_receive_errors_fiber", 1, 21, 16},
  145. };
  146. struct marvell_priv {
  147. u64 stats[ARRAY_SIZE(marvell_hw_stats)];
  148. char *hwmon_name;
  149. struct device *hwmon_dev;
  150. };
  151. static int marvell_get_page(struct phy_device *phydev)
  152. {
  153. return phy_read(phydev, MII_MARVELL_PHY_PAGE);
  154. }
  155. static int marvell_set_page(struct phy_device *phydev, int page)
  156. {
  157. return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  158. }
  159. static int marvell_get_set_page(struct phy_device *phydev, int page)
  160. {
  161. int oldpage = marvell_get_page(phydev);
  162. if (oldpage < 0)
  163. return oldpage;
  164. if (page != oldpage)
  165. return marvell_set_page(phydev, page);
  166. return 0;
  167. }
  168. static int marvell_ack_interrupt(struct phy_device *phydev)
  169. {
  170. int err;
  171. /* Clear the interrupts by reading the reg */
  172. err = phy_read(phydev, MII_M1011_IEVENT);
  173. if (err < 0)
  174. return err;
  175. return 0;
  176. }
  177. static int marvell_config_intr(struct phy_device *phydev)
  178. {
  179. int err;
  180. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  181. err = phy_write(phydev, MII_M1011_IMASK,
  182. MII_M1011_IMASK_INIT);
  183. else
  184. err = phy_write(phydev, MII_M1011_IMASK,
  185. MII_M1011_IMASK_CLEAR);
  186. return err;
  187. }
  188. static int marvell_set_polarity(struct phy_device *phydev, int polarity)
  189. {
  190. int reg;
  191. int err;
  192. int val;
  193. /* get the current settings */
  194. reg = phy_read(phydev, MII_M1011_PHY_SCR);
  195. if (reg < 0)
  196. return reg;
  197. val = reg;
  198. val &= ~MII_M1011_PHY_SCR_AUTO_CROSS;
  199. switch (polarity) {
  200. case ETH_TP_MDI:
  201. val |= MII_M1011_PHY_SCR_MDI;
  202. break;
  203. case ETH_TP_MDI_X:
  204. val |= MII_M1011_PHY_SCR_MDI_X;
  205. break;
  206. case ETH_TP_MDI_AUTO:
  207. case ETH_TP_MDI_INVALID:
  208. default:
  209. val |= MII_M1011_PHY_SCR_AUTO_CROSS;
  210. break;
  211. }
  212. if (val != reg) {
  213. /* Set the new polarity value in the register */
  214. err = phy_write(phydev, MII_M1011_PHY_SCR, val);
  215. if (err)
  216. return err;
  217. }
  218. return 0;
  219. }
  220. static int marvell_set_downshift(struct phy_device *phydev, bool enable,
  221. u8 retries)
  222. {
  223. int reg;
  224. reg = phy_read(phydev, MII_M1011_PHY_SCR);
  225. if (reg < 0)
  226. return reg;
  227. reg &= MII_M1011_PHY_SRC_DOWNSHIFT_MASK;
  228. reg |= ((retries - 1) << MII_M1011_PHY_SCR_DOWNSHIFT_SHIFT);
  229. if (enable)
  230. reg |= MII_M1011_PHY_SCR_DOWNSHIFT_EN;
  231. return phy_write(phydev, MII_M1011_PHY_SCR, reg);
  232. }
  233. static int marvell_config_aneg(struct phy_device *phydev)
  234. {
  235. int err;
  236. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  237. if (err < 0)
  238. return err;
  239. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  240. MII_M1111_PHY_LED_DIRECT);
  241. if (err < 0)
  242. return err;
  243. err = genphy_config_aneg(phydev);
  244. if (err < 0)
  245. return err;
  246. if (phydev->autoneg != AUTONEG_ENABLE) {
  247. /* A write to speed/duplex bits (that is performed by
  248. * genphy_config_aneg() call above) must be followed by
  249. * a software reset. Otherwise, the write has no effect.
  250. */
  251. err = genphy_soft_reset(phydev);
  252. if (err < 0)
  253. return err;
  254. }
  255. return 0;
  256. }
  257. static int m88e1101_config_aneg(struct phy_device *phydev)
  258. {
  259. int err;
  260. /* This Marvell PHY has an errata which requires
  261. * that certain registers get written in order
  262. * to restart autonegotiation
  263. */
  264. err = genphy_soft_reset(phydev);
  265. if (err < 0)
  266. return err;
  267. err = phy_write(phydev, 0x1d, 0x1f);
  268. if (err < 0)
  269. return err;
  270. err = phy_write(phydev, 0x1e, 0x200c);
  271. if (err < 0)
  272. return err;
  273. err = phy_write(phydev, 0x1d, 0x5);
  274. if (err < 0)
  275. return err;
  276. err = phy_write(phydev, 0x1e, 0);
  277. if (err < 0)
  278. return err;
  279. err = phy_write(phydev, 0x1e, 0x100);
  280. if (err < 0)
  281. return err;
  282. return marvell_config_aneg(phydev);
  283. }
  284. static int m88e1111_config_aneg(struct phy_device *phydev)
  285. {
  286. int err;
  287. /* The Marvell PHY has an errata which requires
  288. * that certain registers get written in order
  289. * to restart autonegotiation
  290. */
  291. err = genphy_soft_reset(phydev);
  292. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  293. if (err < 0)
  294. return err;
  295. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  296. MII_M1111_PHY_LED_DIRECT);
  297. if (err < 0)
  298. return err;
  299. err = genphy_config_aneg(phydev);
  300. if (err < 0)
  301. return err;
  302. if (phydev->autoneg != AUTONEG_ENABLE) {
  303. /* A write to speed/duplex bits (that is performed by
  304. * genphy_config_aneg() call above) must be followed by
  305. * a software reset. Otherwise, the write has no effect.
  306. */
  307. err = genphy_soft_reset(phydev);
  308. if (err < 0)
  309. return err;
  310. }
  311. return 0;
  312. }
  313. #ifdef CONFIG_OF_MDIO
  314. /* Set and/or override some configuration registers based on the
  315. * marvell,reg-init property stored in the of_node for the phydev.
  316. *
  317. * marvell,reg-init = <reg-page reg mask value>,...;
  318. *
  319. * There may be one or more sets of <reg-page reg mask value>:
  320. *
  321. * reg-page: which register bank to use.
  322. * reg: the register.
  323. * mask: if non-zero, ANDed with existing register value.
  324. * value: ORed with the masked value and written to the regiser.
  325. *
  326. */
  327. static int marvell_of_reg_init(struct phy_device *phydev)
  328. {
  329. const __be32 *paddr;
  330. int len, i, saved_page, current_page, ret;
  331. if (!phydev->mdio.dev.of_node)
  332. return 0;
  333. paddr = of_get_property(phydev->mdio.dev.of_node,
  334. "marvell,reg-init", &len);
  335. if (!paddr || len < (4 * sizeof(*paddr)))
  336. return 0;
  337. saved_page = marvell_get_page(phydev);
  338. if (saved_page < 0)
  339. return saved_page;
  340. current_page = saved_page;
  341. ret = 0;
  342. len /= sizeof(*paddr);
  343. for (i = 0; i < len - 3; i += 4) {
  344. u16 page = be32_to_cpup(paddr + i);
  345. u16 reg = be32_to_cpup(paddr + i + 1);
  346. u16 mask = be32_to_cpup(paddr + i + 2);
  347. u16 val_bits = be32_to_cpup(paddr + i + 3);
  348. int val;
  349. if (page != current_page) {
  350. current_page = page;
  351. ret = marvell_set_page(phydev, page);
  352. if (ret < 0)
  353. goto err;
  354. }
  355. val = 0;
  356. if (mask) {
  357. val = phy_read(phydev, reg);
  358. if (val < 0) {
  359. ret = val;
  360. goto err;
  361. }
  362. val &= mask;
  363. }
  364. val |= val_bits;
  365. ret = phy_write(phydev, reg, val);
  366. if (ret < 0)
  367. goto err;
  368. }
  369. err:
  370. if (current_page != saved_page) {
  371. i = marvell_set_page(phydev, saved_page);
  372. if (ret == 0)
  373. ret = i;
  374. }
  375. return ret;
  376. }
  377. #else
  378. static int marvell_of_reg_init(struct phy_device *phydev)
  379. {
  380. return 0;
  381. }
  382. #endif /* CONFIG_OF_MDIO */
  383. static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
  384. {
  385. int err, oldpage, mscr;
  386. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  387. if (oldpage < 0)
  388. return oldpage;
  389. mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG);
  390. if (mscr < 0) {
  391. err = mscr;
  392. goto out;
  393. }
  394. mscr &= MII_88E1121_PHY_MSCR_DELAY_MASK;
  395. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
  396. mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY |
  397. MII_88E1121_PHY_MSCR_TX_DELAY);
  398. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
  399. mscr |= MII_88E1121_PHY_MSCR_RX_DELAY;
  400. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
  401. mscr |= MII_88E1121_PHY_MSCR_TX_DELAY;
  402. err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr);
  403. out:
  404. marvell_set_page(phydev, oldpage);
  405. return err;
  406. }
  407. static int m88e1121_config_aneg(struct phy_device *phydev)
  408. {
  409. int err = 0;
  410. if (phy_interface_is_rgmii(phydev)) {
  411. err = m88e1121_config_aneg_rgmii_delays(phydev);
  412. if (err)
  413. return err;
  414. }
  415. err = genphy_soft_reset(phydev);
  416. if (err < 0)
  417. return err;
  418. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  419. if (err < 0)
  420. return err;
  421. return genphy_config_aneg(phydev);
  422. }
  423. static int m88e1318_config_aneg(struct phy_device *phydev)
  424. {
  425. int err, oldpage, mscr;
  426. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  427. if (oldpage < 0)
  428. return oldpage;
  429. mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG);
  430. mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD;
  431. err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr);
  432. if (err < 0)
  433. return err;
  434. err = marvell_set_page(phydev, oldpage);
  435. if (err < 0)
  436. return err;
  437. return m88e1121_config_aneg(phydev);
  438. }
  439. /**
  440. * ethtool_adv_to_fiber_adv_t
  441. * @ethadv: the ethtool advertisement settings
  442. *
  443. * A small helper function that translates ethtool advertisement
  444. * settings to phy autonegotiation advertisements for the
  445. * MII_ADV register for fiber link.
  446. */
  447. static inline u32 ethtool_adv_to_fiber_adv_t(u32 ethadv)
  448. {
  449. u32 result = 0;
  450. if (ethadv & ADVERTISED_1000baseT_Half)
  451. result |= ADVERTISE_FIBER_1000HALF;
  452. if (ethadv & ADVERTISED_1000baseT_Full)
  453. result |= ADVERTISE_FIBER_1000FULL;
  454. if ((ethadv & ADVERTISE_PAUSE_ASYM) && (ethadv & ADVERTISE_PAUSE_CAP))
  455. result |= LPA_PAUSE_ASYM_FIBER;
  456. else if (ethadv & ADVERTISE_PAUSE_CAP)
  457. result |= (ADVERTISE_PAUSE_FIBER
  458. & (~ADVERTISE_PAUSE_ASYM_FIBER));
  459. return result;
  460. }
  461. /**
  462. * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
  463. * @phydev: target phy_device struct
  464. *
  465. * Description: If auto-negotiation is enabled, we configure the
  466. * advertising, and then restart auto-negotiation. If it is not
  467. * enabled, then we write the BMCR. Adapted for fiber link in
  468. * some Marvell's devices.
  469. */
  470. static int marvell_config_aneg_fiber(struct phy_device *phydev)
  471. {
  472. int changed = 0;
  473. int err;
  474. int adv, oldadv;
  475. u32 advertise;
  476. if (phydev->autoneg != AUTONEG_ENABLE)
  477. return genphy_setup_forced(phydev);
  478. /* Only allow advertising what this PHY supports */
  479. phydev->advertising &= phydev->supported;
  480. advertise = phydev->advertising;
  481. /* Setup fiber advertisement */
  482. adv = phy_read(phydev, MII_ADVERTISE);
  483. if (adv < 0)
  484. return adv;
  485. oldadv = adv;
  486. adv &= ~(ADVERTISE_FIBER_1000HALF | ADVERTISE_FIBER_1000FULL
  487. | LPA_PAUSE_FIBER);
  488. adv |= ethtool_adv_to_fiber_adv_t(advertise);
  489. if (adv != oldadv) {
  490. err = phy_write(phydev, MII_ADVERTISE, adv);
  491. if (err < 0)
  492. return err;
  493. changed = 1;
  494. }
  495. if (changed == 0) {
  496. /* Advertisement hasn't changed, but maybe aneg was never on to
  497. * begin with? Or maybe phy was isolated?
  498. */
  499. int ctl = phy_read(phydev, MII_BMCR);
  500. if (ctl < 0)
  501. return ctl;
  502. if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
  503. changed = 1; /* do restart aneg */
  504. }
  505. /* Only restart aneg if we are advertising something different
  506. * than we were before.
  507. */
  508. if (changed > 0)
  509. changed = genphy_restart_aneg(phydev);
  510. return changed;
  511. }
  512. static int m88e1510_config_aneg(struct phy_device *phydev)
  513. {
  514. int err;
  515. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  516. if (err < 0)
  517. goto error;
  518. /* Configure the copper link first */
  519. err = m88e1318_config_aneg(phydev);
  520. if (err < 0)
  521. goto error;
  522. /* Then the fiber link */
  523. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  524. if (err < 0)
  525. goto error;
  526. err = marvell_config_aneg_fiber(phydev);
  527. if (err < 0)
  528. goto error;
  529. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  530. error:
  531. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  532. return err;
  533. }
  534. static int marvell_config_init(struct phy_device *phydev)
  535. {
  536. /* Set registers from marvell,reg-init DT property */
  537. return marvell_of_reg_init(phydev);
  538. }
  539. static int m88e1116r_config_init(struct phy_device *phydev)
  540. {
  541. int err;
  542. err = genphy_soft_reset(phydev);
  543. if (err < 0)
  544. return err;
  545. mdelay(500);
  546. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  547. if (err < 0)
  548. return err;
  549. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  550. if (err < 0)
  551. return err;
  552. err = marvell_set_downshift(phydev, true, 8);
  553. if (err < 0)
  554. return err;
  555. err = m88e1121_config_aneg_rgmii_delays(phydev);
  556. if (err < 0)
  557. return err;
  558. err = genphy_soft_reset(phydev);
  559. if (err < 0)
  560. return err;
  561. return marvell_config_init(phydev);
  562. }
  563. static int m88e3016_config_init(struct phy_device *phydev)
  564. {
  565. int reg;
  566. /* Enable Scrambler and Auto-Crossover */
  567. reg = phy_read(phydev, MII_88E3016_PHY_SPEC_CTRL);
  568. if (reg < 0)
  569. return reg;
  570. reg &= ~MII_88E3016_DISABLE_SCRAMBLER;
  571. reg |= MII_88E3016_AUTO_MDIX_CROSSOVER;
  572. reg = phy_write(phydev, MII_88E3016_PHY_SPEC_CTRL, reg);
  573. if (reg < 0)
  574. return reg;
  575. return marvell_config_init(phydev);
  576. }
  577. static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
  578. u16 mode,
  579. int fibre_copper_auto)
  580. {
  581. int temp;
  582. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  583. if (temp < 0)
  584. return temp;
  585. temp &= ~(MII_M1111_HWCFG_MODE_MASK |
  586. MII_M1111_HWCFG_FIBER_COPPER_AUTO |
  587. MII_M1111_HWCFG_FIBER_COPPER_RES);
  588. temp |= mode;
  589. if (fibre_copper_auto)
  590. temp |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
  591. return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  592. }
  593. static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
  594. {
  595. int temp;
  596. temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  597. if (temp < 0)
  598. return temp;
  599. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  600. temp |= (MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY);
  601. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
  602. temp &= ~MII_M1111_RGMII_TX_DELAY;
  603. temp |= MII_M1111_RGMII_RX_DELAY;
  604. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
  605. temp &= ~MII_M1111_RGMII_RX_DELAY;
  606. temp |= MII_M1111_RGMII_TX_DELAY;
  607. }
  608. return phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
  609. }
  610. static int m88e1111_config_init_rgmii(struct phy_device *phydev)
  611. {
  612. int temp;
  613. int err;
  614. err = m88e1111_config_init_rgmii_delays(phydev);
  615. if (err < 0)
  616. return err;
  617. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  618. if (temp < 0)
  619. return temp;
  620. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  621. if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
  622. temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
  623. else
  624. temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
  625. return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  626. }
  627. static int m88e1111_config_init_sgmii(struct phy_device *phydev)
  628. {
  629. int err;
  630. err = m88e1111_config_init_hwcfg_mode(
  631. phydev,
  632. MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  633. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  634. if (err < 0)
  635. return err;
  636. /* make sure copper is selected */
  637. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  638. }
  639. static int m88e1111_config_init_rtbi(struct phy_device *phydev)
  640. {
  641. int err;
  642. err = m88e1111_config_init_rgmii_delays(phydev);
  643. if (err)
  644. return err;
  645. err = m88e1111_config_init_hwcfg_mode(
  646. phydev,
  647. MII_M1111_HWCFG_MODE_RTBI,
  648. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  649. if (err < 0)
  650. return err;
  651. /* soft reset */
  652. err = genphy_soft_reset(phydev);
  653. if (err < 0)
  654. return err;
  655. return m88e1111_config_init_hwcfg_mode(
  656. phydev,
  657. MII_M1111_HWCFG_MODE_RTBI,
  658. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  659. }
  660. static int m88e1111_config_init(struct phy_device *phydev)
  661. {
  662. int err;
  663. if (phy_interface_is_rgmii(phydev)) {
  664. err = m88e1111_config_init_rgmii(phydev);
  665. if (err)
  666. return err;
  667. }
  668. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  669. err = m88e1111_config_init_sgmii(phydev);
  670. if (err < 0)
  671. return err;
  672. }
  673. if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
  674. err = m88e1111_config_init_rtbi(phydev);
  675. if (err < 0)
  676. return err;
  677. }
  678. err = marvell_of_reg_init(phydev);
  679. if (err < 0)
  680. return err;
  681. return genphy_soft_reset(phydev);
  682. }
  683. static int m88e1121_config_init(struct phy_device *phydev)
  684. {
  685. int err, oldpage;
  686. oldpage = marvell_get_set_page(phydev, MII_MARVELL_LED_PAGE);
  687. if (oldpage < 0)
  688. return oldpage;
  689. /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
  690. err = phy_write(phydev, MII_88E1121_PHY_LED_CTRL,
  691. MII_88E1121_PHY_LED_DEF);
  692. if (err < 0)
  693. return err;
  694. marvell_set_page(phydev, oldpage);
  695. /* Set marvell,reg-init configuration from device tree */
  696. return marvell_config_init(phydev);
  697. }
  698. static int m88e1510_config_init(struct phy_device *phydev)
  699. {
  700. int err;
  701. int temp;
  702. /* SGMII-to-Copper mode initialization */
  703. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  704. /* Select page 18 */
  705. err = marvell_set_page(phydev, 18);
  706. if (err < 0)
  707. return err;
  708. /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
  709. temp = phy_read(phydev, MII_88E1510_GEN_CTRL_REG_1);
  710. temp &= ~MII_88E1510_GEN_CTRL_REG_1_MODE_MASK;
  711. temp |= MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII;
  712. err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
  713. if (err < 0)
  714. return err;
  715. /* PHY reset is necessary after changing MODE[2:0] */
  716. temp |= MII_88E1510_GEN_CTRL_REG_1_RESET;
  717. err = phy_write(phydev, MII_88E1510_GEN_CTRL_REG_1, temp);
  718. if (err < 0)
  719. return err;
  720. /* Reset page selection */
  721. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  722. if (err < 0)
  723. return err;
  724. }
  725. return m88e1121_config_init(phydev);
  726. }
  727. static int m88e1118_config_aneg(struct phy_device *phydev)
  728. {
  729. int err;
  730. err = genphy_soft_reset(phydev);
  731. if (err < 0)
  732. return err;
  733. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  734. if (err < 0)
  735. return err;
  736. err = genphy_config_aneg(phydev);
  737. return 0;
  738. }
  739. static int m88e1118_config_init(struct phy_device *phydev)
  740. {
  741. int err;
  742. /* Change address */
  743. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  744. if (err < 0)
  745. return err;
  746. /* Enable 1000 Mbit */
  747. err = phy_write(phydev, 0x15, 0x1070);
  748. if (err < 0)
  749. return err;
  750. /* Change address */
  751. err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
  752. if (err < 0)
  753. return err;
  754. /* Adjust LED Control */
  755. if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
  756. err = phy_write(phydev, 0x10, 0x1100);
  757. else
  758. err = phy_write(phydev, 0x10, 0x021e);
  759. if (err < 0)
  760. return err;
  761. err = marvell_of_reg_init(phydev);
  762. if (err < 0)
  763. return err;
  764. /* Reset address */
  765. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  766. if (err < 0)
  767. return err;
  768. return genphy_soft_reset(phydev);
  769. }
  770. static int m88e1149_config_init(struct phy_device *phydev)
  771. {
  772. int err;
  773. /* Change address */
  774. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  775. if (err < 0)
  776. return err;
  777. /* Enable 1000 Mbit */
  778. err = phy_write(phydev, 0x15, 0x1048);
  779. if (err < 0)
  780. return err;
  781. err = marvell_of_reg_init(phydev);
  782. if (err < 0)
  783. return err;
  784. /* Reset address */
  785. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  786. if (err < 0)
  787. return err;
  788. return genphy_soft_reset(phydev);
  789. }
  790. static int m88e1145_config_init_rgmii(struct phy_device *phydev)
  791. {
  792. int temp;
  793. int err;
  794. err = m88e1111_config_init_rgmii_delays(phydev);
  795. if (err < 0)
  796. return err;
  797. if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
  798. err = phy_write(phydev, 0x1d, 0x0012);
  799. if (err < 0)
  800. return err;
  801. temp = phy_read(phydev, 0x1e);
  802. if (temp < 0)
  803. return temp;
  804. temp &= 0xf03f;
  805. temp |= 2 << 9; /* 36 ohm */
  806. temp |= 2 << 6; /* 39 ohm */
  807. err = phy_write(phydev, 0x1e, temp);
  808. if (err < 0)
  809. return err;
  810. err = phy_write(phydev, 0x1d, 0x3);
  811. if (err < 0)
  812. return err;
  813. err = phy_write(phydev, 0x1e, 0x8000);
  814. }
  815. return err;
  816. }
  817. static int m88e1145_config_init_sgmii(struct phy_device *phydev)
  818. {
  819. return m88e1111_config_init_hwcfg_mode(
  820. phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  821. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  822. }
  823. static int m88e1145_config_init(struct phy_device *phydev)
  824. {
  825. int err;
  826. /* Take care of errata E0 & E1 */
  827. err = phy_write(phydev, 0x1d, 0x001b);
  828. if (err < 0)
  829. return err;
  830. err = phy_write(phydev, 0x1e, 0x418f);
  831. if (err < 0)
  832. return err;
  833. err = phy_write(phydev, 0x1d, 0x0016);
  834. if (err < 0)
  835. return err;
  836. err = phy_write(phydev, 0x1e, 0xa2da);
  837. if (err < 0)
  838. return err;
  839. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  840. err = m88e1145_config_init_rgmii(phydev);
  841. if (err < 0)
  842. return err;
  843. }
  844. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  845. err = m88e1145_config_init_sgmii(phydev);
  846. if (err < 0)
  847. return err;
  848. }
  849. err = marvell_of_reg_init(phydev);
  850. if (err < 0)
  851. return err;
  852. return 0;
  853. }
  854. /**
  855. * fiber_lpa_to_ethtool_lpa_t
  856. * @lpa: value of the MII_LPA register for fiber link
  857. *
  858. * A small helper function that translates MII_LPA
  859. * bits to ethtool LP advertisement settings.
  860. */
  861. static u32 fiber_lpa_to_ethtool_lpa_t(u32 lpa)
  862. {
  863. u32 result = 0;
  864. if (lpa & LPA_FIBER_1000HALF)
  865. result |= ADVERTISED_1000baseT_Half;
  866. if (lpa & LPA_FIBER_1000FULL)
  867. result |= ADVERTISED_1000baseT_Full;
  868. return result;
  869. }
  870. /**
  871. * marvell_update_link - update link status in real time in @phydev
  872. * @phydev: target phy_device struct
  873. *
  874. * Description: Update the value in phydev->link to reflect the
  875. * current link value.
  876. */
  877. static int marvell_update_link(struct phy_device *phydev, int fiber)
  878. {
  879. int status;
  880. /* Use the generic register for copper link, or specific
  881. * register for fiber case
  882. */
  883. if (fiber) {
  884. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  885. if (status < 0)
  886. return status;
  887. if ((status & REGISTER_LINK_STATUS) == 0)
  888. phydev->link = 0;
  889. else
  890. phydev->link = 1;
  891. } else {
  892. return genphy_update_link(phydev);
  893. }
  894. return 0;
  895. }
  896. static int marvell_read_status_page_an(struct phy_device *phydev,
  897. int fiber)
  898. {
  899. int status;
  900. int lpa;
  901. int lpagb;
  902. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  903. if (status < 0)
  904. return status;
  905. lpa = phy_read(phydev, MII_LPA);
  906. if (lpa < 0)
  907. return lpa;
  908. lpagb = phy_read(phydev, MII_STAT1000);
  909. if (lpagb < 0)
  910. return lpagb;
  911. if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
  912. phydev->duplex = DUPLEX_FULL;
  913. else
  914. phydev->duplex = DUPLEX_HALF;
  915. status = status & MII_M1011_PHY_STATUS_SPD_MASK;
  916. phydev->pause = 0;
  917. phydev->asym_pause = 0;
  918. switch (status) {
  919. case MII_M1011_PHY_STATUS_1000:
  920. phydev->speed = SPEED_1000;
  921. break;
  922. case MII_M1011_PHY_STATUS_100:
  923. phydev->speed = SPEED_100;
  924. break;
  925. default:
  926. phydev->speed = SPEED_10;
  927. break;
  928. }
  929. if (!fiber) {
  930. phydev->lp_advertising =
  931. mii_stat1000_to_ethtool_lpa_t(lpagb) |
  932. mii_lpa_to_ethtool_lpa_t(lpa);
  933. if (phydev->duplex == DUPLEX_FULL) {
  934. phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
  935. phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
  936. }
  937. } else {
  938. /* The fiber link is only 1000M capable */
  939. phydev->lp_advertising = fiber_lpa_to_ethtool_lpa_t(lpa);
  940. if (phydev->duplex == DUPLEX_FULL) {
  941. if (!(lpa & LPA_PAUSE_FIBER)) {
  942. phydev->pause = 0;
  943. phydev->asym_pause = 0;
  944. } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
  945. phydev->pause = 1;
  946. phydev->asym_pause = 1;
  947. } else {
  948. phydev->pause = 1;
  949. phydev->asym_pause = 0;
  950. }
  951. }
  952. }
  953. return 0;
  954. }
  955. static int marvell_read_status_page_fixed(struct phy_device *phydev)
  956. {
  957. int bmcr = phy_read(phydev, MII_BMCR);
  958. if (bmcr < 0)
  959. return bmcr;
  960. if (bmcr & BMCR_FULLDPLX)
  961. phydev->duplex = DUPLEX_FULL;
  962. else
  963. phydev->duplex = DUPLEX_HALF;
  964. if (bmcr & BMCR_SPEED1000)
  965. phydev->speed = SPEED_1000;
  966. else if (bmcr & BMCR_SPEED100)
  967. phydev->speed = SPEED_100;
  968. else
  969. phydev->speed = SPEED_10;
  970. phydev->pause = 0;
  971. phydev->asym_pause = 0;
  972. phydev->lp_advertising = 0;
  973. return 0;
  974. }
  975. /* marvell_read_status_page
  976. *
  977. * Description:
  978. * Check the link, then figure out the current state
  979. * by comparing what we advertise with what the link partner
  980. * advertises. Start by checking the gigabit possibilities,
  981. * then move on to 10/100.
  982. */
  983. static int marvell_read_status_page(struct phy_device *phydev, int page)
  984. {
  985. int fiber;
  986. int err;
  987. /* Detect and update the link, but return if there
  988. * was an error
  989. */
  990. if (page == MII_MARVELL_FIBER_PAGE)
  991. fiber = 1;
  992. else
  993. fiber = 0;
  994. err = marvell_update_link(phydev, fiber);
  995. if (err)
  996. return err;
  997. if (phydev->autoneg == AUTONEG_ENABLE)
  998. err = marvell_read_status_page_an(phydev, fiber);
  999. else
  1000. err = marvell_read_status_page_fixed(phydev);
  1001. return err;
  1002. }
  1003. /* marvell_read_status
  1004. *
  1005. * Some Marvell's phys have two modes: fiber and copper.
  1006. * Both need status checked.
  1007. * Description:
  1008. * First, check the fiber link and status.
  1009. * If the fiber link is down, check the copper link and status which
  1010. * will be the default value if both link are down.
  1011. */
  1012. static int marvell_read_status(struct phy_device *phydev)
  1013. {
  1014. int err;
  1015. /* Check the fiber mode first */
  1016. if (phydev->supported & SUPPORTED_FIBRE &&
  1017. phydev->interface != PHY_INTERFACE_MODE_SGMII) {
  1018. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1019. if (err < 0)
  1020. goto error;
  1021. err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
  1022. if (err < 0)
  1023. goto error;
  1024. /* If the fiber link is up, it is the selected and
  1025. * used link. In this case, we need to stay in the
  1026. * fiber page. Please to be careful about that, avoid
  1027. * to restore Copper page in other functions which
  1028. * could break the behaviour for some fiber phy like
  1029. * 88E1512.
  1030. */
  1031. if (phydev->link)
  1032. return 0;
  1033. /* If fiber link is down, check and save copper mode state */
  1034. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1035. if (err < 0)
  1036. goto error;
  1037. }
  1038. return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
  1039. error:
  1040. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1041. return err;
  1042. }
  1043. /* marvell_suspend
  1044. *
  1045. * Some Marvell's phys have two modes: fiber and copper.
  1046. * Both need to be suspended
  1047. */
  1048. static int marvell_suspend(struct phy_device *phydev)
  1049. {
  1050. int err;
  1051. /* Suspend the fiber mode first */
  1052. if (!(phydev->supported & SUPPORTED_FIBRE)) {
  1053. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1054. if (err < 0)
  1055. goto error;
  1056. /* With the page set, use the generic suspend */
  1057. err = genphy_suspend(phydev);
  1058. if (err < 0)
  1059. goto error;
  1060. /* Then, the copper link */
  1061. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1062. if (err < 0)
  1063. goto error;
  1064. }
  1065. /* With the page set, use the generic suspend */
  1066. return genphy_suspend(phydev);
  1067. error:
  1068. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1069. return err;
  1070. }
  1071. /* marvell_resume
  1072. *
  1073. * Some Marvell's phys have two modes: fiber and copper.
  1074. * Both need to be resumed
  1075. */
  1076. static int marvell_resume(struct phy_device *phydev)
  1077. {
  1078. int err;
  1079. /* Resume the fiber mode first */
  1080. if (!(phydev->supported & SUPPORTED_FIBRE)) {
  1081. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1082. if (err < 0)
  1083. goto error;
  1084. /* With the page set, use the generic resume */
  1085. err = genphy_resume(phydev);
  1086. if (err < 0)
  1087. goto error;
  1088. /* Then, the copper link */
  1089. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1090. if (err < 0)
  1091. goto error;
  1092. }
  1093. /* With the page set, use the generic resume */
  1094. return genphy_resume(phydev);
  1095. error:
  1096. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1097. return err;
  1098. }
  1099. static int marvell_aneg_done(struct phy_device *phydev)
  1100. {
  1101. int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
  1102. return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
  1103. }
  1104. static int m88e1121_did_interrupt(struct phy_device *phydev)
  1105. {
  1106. int imask;
  1107. imask = phy_read(phydev, MII_M1011_IEVENT);
  1108. if (imask & MII_M1011_IMASK_INIT)
  1109. return 1;
  1110. return 0;
  1111. }
  1112. static void m88e1318_get_wol(struct phy_device *phydev,
  1113. struct ethtool_wolinfo *wol)
  1114. {
  1115. wol->supported = WAKE_MAGIC;
  1116. wol->wolopts = 0;
  1117. if (marvell_set_page(phydev, MII_MARVELL_WOL_PAGE) < 0)
  1118. return;
  1119. if (phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL) &
  1120. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
  1121. wol->wolopts |= WAKE_MAGIC;
  1122. if (marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE) < 0)
  1123. return;
  1124. }
  1125. static int m88e1318_set_wol(struct phy_device *phydev,
  1126. struct ethtool_wolinfo *wol)
  1127. {
  1128. int err, oldpage, temp;
  1129. oldpage = marvell_get_page(phydev);
  1130. if (wol->wolopts & WAKE_MAGIC) {
  1131. /* Explicitly switch to page 0x00, just to be sure */
  1132. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1133. if (err < 0)
  1134. return err;
  1135. /* Enable the WOL interrupt */
  1136. temp = phy_read(phydev, MII_88E1318S_PHY_CSIER);
  1137. temp |= MII_88E1318S_PHY_CSIER_WOL_EIE;
  1138. err = phy_write(phydev, MII_88E1318S_PHY_CSIER, temp);
  1139. if (err < 0)
  1140. return err;
  1141. err = marvell_set_page(phydev, MII_MARVELL_LED_PAGE);
  1142. if (err < 0)
  1143. return err;
  1144. /* Setup LED[2] as interrupt pin (active low) */
  1145. temp = phy_read(phydev, MII_88E1318S_PHY_LED_TCR);
  1146. temp &= ~MII_88E1318S_PHY_LED_TCR_FORCE_INT;
  1147. temp |= MII_88E1318S_PHY_LED_TCR_INTn_ENABLE;
  1148. temp |= MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW;
  1149. err = phy_write(phydev, MII_88E1318S_PHY_LED_TCR, temp);
  1150. if (err < 0)
  1151. return err;
  1152. err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
  1153. if (err < 0)
  1154. return err;
  1155. /* Store the device address for the magic packet */
  1156. err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
  1157. ((phydev->attached_dev->dev_addr[5] << 8) |
  1158. phydev->attached_dev->dev_addr[4]));
  1159. if (err < 0)
  1160. return err;
  1161. err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
  1162. ((phydev->attached_dev->dev_addr[3] << 8) |
  1163. phydev->attached_dev->dev_addr[2]));
  1164. if (err < 0)
  1165. return err;
  1166. err = phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
  1167. ((phydev->attached_dev->dev_addr[1] << 8) |
  1168. phydev->attached_dev->dev_addr[0]));
  1169. if (err < 0)
  1170. return err;
  1171. /* Clear WOL status and enable magic packet matching */
  1172. temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
  1173. temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
  1174. temp |= MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
  1175. err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
  1176. if (err < 0)
  1177. return err;
  1178. } else {
  1179. err = marvell_set_page(phydev, MII_MARVELL_WOL_PAGE);
  1180. if (err < 0)
  1181. return err;
  1182. /* Clear WOL status and disable magic packet matching */
  1183. temp = phy_read(phydev, MII_88E1318S_PHY_WOL_CTRL);
  1184. temp |= MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS;
  1185. temp &= ~MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE;
  1186. err = phy_write(phydev, MII_88E1318S_PHY_WOL_CTRL, temp);
  1187. if (err < 0)
  1188. return err;
  1189. }
  1190. err = marvell_set_page(phydev, oldpage);
  1191. if (err < 0)
  1192. return err;
  1193. return 0;
  1194. }
  1195. static int marvell_get_sset_count(struct phy_device *phydev)
  1196. {
  1197. if (phydev->supported & SUPPORTED_FIBRE)
  1198. return ARRAY_SIZE(marvell_hw_stats);
  1199. else
  1200. return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
  1201. }
  1202. static void marvell_get_strings(struct phy_device *phydev, u8 *data)
  1203. {
  1204. int i;
  1205. for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++) {
  1206. memcpy(data + i * ETH_GSTRING_LEN,
  1207. marvell_hw_stats[i].string, ETH_GSTRING_LEN);
  1208. }
  1209. }
  1210. #ifndef UINT64_MAX
  1211. #define UINT64_MAX (u64)(~((u64)0))
  1212. #endif
  1213. static u64 marvell_get_stat(struct phy_device *phydev, int i)
  1214. {
  1215. struct marvell_hw_stat stat = marvell_hw_stats[i];
  1216. struct marvell_priv *priv = phydev->priv;
  1217. int oldpage, val;
  1218. u64 ret;
  1219. oldpage = marvell_get_set_page(phydev, stat.page);
  1220. if (oldpage < 0)
  1221. return UINT64_MAX;
  1222. val = phy_read(phydev, stat.reg);
  1223. if (val < 0) {
  1224. ret = UINT64_MAX;
  1225. } else {
  1226. val = val & ((1 << stat.bits) - 1);
  1227. priv->stats[i] += val;
  1228. ret = priv->stats[i];
  1229. }
  1230. marvell_set_page(phydev, oldpage);
  1231. return ret;
  1232. }
  1233. static void marvell_get_stats(struct phy_device *phydev,
  1234. struct ethtool_stats *stats, u64 *data)
  1235. {
  1236. int i;
  1237. for (i = 0; i < ARRAY_SIZE(marvell_hw_stats); i++)
  1238. data[i] = marvell_get_stat(phydev, i);
  1239. }
  1240. #ifdef CONFIG_HWMON
  1241. static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
  1242. {
  1243. int oldpage;
  1244. int ret;
  1245. int val;
  1246. *temp = 0;
  1247. mutex_lock(&phydev->lock);
  1248. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1249. if (oldpage < 0) {
  1250. mutex_unlock(&phydev->lock);
  1251. return oldpage;
  1252. }
  1253. /* Enable temperature sensor */
  1254. ret = phy_read(phydev, MII_88E1121_MISC_TEST);
  1255. if (ret < 0)
  1256. goto error;
  1257. ret = phy_write(phydev, MII_88E1121_MISC_TEST,
  1258. ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  1259. if (ret < 0)
  1260. goto error;
  1261. /* Wait for temperature to stabilize */
  1262. usleep_range(10000, 12000);
  1263. val = phy_read(phydev, MII_88E1121_MISC_TEST);
  1264. if (val < 0) {
  1265. ret = val;
  1266. goto error;
  1267. }
  1268. /* Disable temperature sensor */
  1269. ret = phy_write(phydev, MII_88E1121_MISC_TEST,
  1270. ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  1271. if (ret < 0)
  1272. goto error;
  1273. *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
  1274. error:
  1275. marvell_set_page(phydev, oldpage);
  1276. mutex_unlock(&phydev->lock);
  1277. return ret;
  1278. }
  1279. static int m88e1121_hwmon_read(struct device *dev,
  1280. enum hwmon_sensor_types type,
  1281. u32 attr, int channel, long *temp)
  1282. {
  1283. struct phy_device *phydev = dev_get_drvdata(dev);
  1284. int err;
  1285. switch (attr) {
  1286. case hwmon_temp_input:
  1287. err = m88e1121_get_temp(phydev, temp);
  1288. break;
  1289. default:
  1290. return -EOPNOTSUPP;
  1291. }
  1292. return err;
  1293. }
  1294. static umode_t m88e1121_hwmon_is_visible(const void *data,
  1295. enum hwmon_sensor_types type,
  1296. u32 attr, int channel)
  1297. {
  1298. if (type != hwmon_temp)
  1299. return 0;
  1300. switch (attr) {
  1301. case hwmon_temp_input:
  1302. return 0444;
  1303. default:
  1304. return 0;
  1305. }
  1306. }
  1307. static u32 m88e1121_hwmon_chip_config[] = {
  1308. HWMON_C_REGISTER_TZ,
  1309. 0
  1310. };
  1311. static const struct hwmon_channel_info m88e1121_hwmon_chip = {
  1312. .type = hwmon_chip,
  1313. .config = m88e1121_hwmon_chip_config,
  1314. };
  1315. static u32 m88e1121_hwmon_temp_config[] = {
  1316. HWMON_T_INPUT,
  1317. 0
  1318. };
  1319. static const struct hwmon_channel_info m88e1121_hwmon_temp = {
  1320. .type = hwmon_temp,
  1321. .config = m88e1121_hwmon_temp_config,
  1322. };
  1323. static const struct hwmon_channel_info *m88e1121_hwmon_info[] = {
  1324. &m88e1121_hwmon_chip,
  1325. &m88e1121_hwmon_temp,
  1326. NULL
  1327. };
  1328. static const struct hwmon_ops m88e1121_hwmon_hwmon_ops = {
  1329. .is_visible = m88e1121_hwmon_is_visible,
  1330. .read = m88e1121_hwmon_read,
  1331. };
  1332. static const struct hwmon_chip_info m88e1121_hwmon_chip_info = {
  1333. .ops = &m88e1121_hwmon_hwmon_ops,
  1334. .info = m88e1121_hwmon_info,
  1335. };
  1336. static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
  1337. {
  1338. int oldpage;
  1339. int ret;
  1340. *temp = 0;
  1341. mutex_lock(&phydev->lock);
  1342. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1343. if (oldpage < 0) {
  1344. mutex_unlock(&phydev->lock);
  1345. return oldpage;
  1346. }
  1347. ret = phy_read(phydev, MII_88E1510_TEMP_SENSOR);
  1348. if (ret < 0)
  1349. goto error;
  1350. *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
  1351. error:
  1352. marvell_set_page(phydev, oldpage);
  1353. mutex_unlock(&phydev->lock);
  1354. return ret;
  1355. }
  1356. static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
  1357. {
  1358. int oldpage;
  1359. int ret;
  1360. *temp = 0;
  1361. mutex_lock(&phydev->lock);
  1362. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1363. if (oldpage < 0) {
  1364. mutex_unlock(&phydev->lock);
  1365. return oldpage;
  1366. }
  1367. ret = phy_read(phydev, MII_88E1121_MISC_TEST);
  1368. if (ret < 0)
  1369. goto error;
  1370. *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
  1371. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
  1372. /* convert to mC */
  1373. *temp *= 1000;
  1374. error:
  1375. marvell_set_page(phydev, oldpage);
  1376. mutex_unlock(&phydev->lock);
  1377. return ret;
  1378. }
  1379. static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
  1380. {
  1381. int oldpage;
  1382. int ret;
  1383. mutex_lock(&phydev->lock);
  1384. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1385. if (oldpage < 0) {
  1386. mutex_unlock(&phydev->lock);
  1387. return oldpage;
  1388. }
  1389. ret = phy_read(phydev, MII_88E1121_MISC_TEST);
  1390. if (ret < 0)
  1391. goto error;
  1392. temp = temp / 1000;
  1393. temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
  1394. ret = phy_write(phydev, MII_88E1121_MISC_TEST,
  1395. (ret & ~MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) |
  1396. (temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT));
  1397. error:
  1398. marvell_set_page(phydev, oldpage);
  1399. mutex_unlock(&phydev->lock);
  1400. return ret;
  1401. }
  1402. static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
  1403. {
  1404. int oldpage;
  1405. int ret;
  1406. *alarm = false;
  1407. mutex_lock(&phydev->lock);
  1408. oldpage = marvell_get_set_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  1409. if (oldpage < 0) {
  1410. mutex_unlock(&phydev->lock);
  1411. return oldpage;
  1412. }
  1413. ret = phy_read(phydev, MII_88E1121_MISC_TEST);
  1414. if (ret < 0)
  1415. goto error;
  1416. *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
  1417. error:
  1418. marvell_set_page(phydev, oldpage);
  1419. mutex_unlock(&phydev->lock);
  1420. return ret;
  1421. }
  1422. static int m88e1510_hwmon_read(struct device *dev,
  1423. enum hwmon_sensor_types type,
  1424. u32 attr, int channel, long *temp)
  1425. {
  1426. struct phy_device *phydev = dev_get_drvdata(dev);
  1427. int err;
  1428. switch (attr) {
  1429. case hwmon_temp_input:
  1430. err = m88e1510_get_temp(phydev, temp);
  1431. break;
  1432. case hwmon_temp_crit:
  1433. err = m88e1510_get_temp_critical(phydev, temp);
  1434. break;
  1435. case hwmon_temp_max_alarm:
  1436. err = m88e1510_get_temp_alarm(phydev, temp);
  1437. break;
  1438. default:
  1439. return -EOPNOTSUPP;
  1440. }
  1441. return err;
  1442. }
  1443. static int m88e1510_hwmon_write(struct device *dev,
  1444. enum hwmon_sensor_types type,
  1445. u32 attr, int channel, long temp)
  1446. {
  1447. struct phy_device *phydev = dev_get_drvdata(dev);
  1448. int err;
  1449. switch (attr) {
  1450. case hwmon_temp_crit:
  1451. err = m88e1510_set_temp_critical(phydev, temp);
  1452. break;
  1453. default:
  1454. return -EOPNOTSUPP;
  1455. }
  1456. return err;
  1457. }
  1458. static umode_t m88e1510_hwmon_is_visible(const void *data,
  1459. enum hwmon_sensor_types type,
  1460. u32 attr, int channel)
  1461. {
  1462. if (type != hwmon_temp)
  1463. return 0;
  1464. switch (attr) {
  1465. case hwmon_temp_input:
  1466. case hwmon_temp_max_alarm:
  1467. return 0444;
  1468. case hwmon_temp_crit:
  1469. return 0644;
  1470. default:
  1471. return 0;
  1472. }
  1473. }
  1474. static u32 m88e1510_hwmon_temp_config[] = {
  1475. HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM,
  1476. 0
  1477. };
  1478. static const struct hwmon_channel_info m88e1510_hwmon_temp = {
  1479. .type = hwmon_temp,
  1480. .config = m88e1510_hwmon_temp_config,
  1481. };
  1482. static const struct hwmon_channel_info *m88e1510_hwmon_info[] = {
  1483. &m88e1121_hwmon_chip,
  1484. &m88e1510_hwmon_temp,
  1485. NULL
  1486. };
  1487. static const struct hwmon_ops m88e1510_hwmon_hwmon_ops = {
  1488. .is_visible = m88e1510_hwmon_is_visible,
  1489. .read = m88e1510_hwmon_read,
  1490. .write = m88e1510_hwmon_write,
  1491. };
  1492. static const struct hwmon_chip_info m88e1510_hwmon_chip_info = {
  1493. .ops = &m88e1510_hwmon_hwmon_ops,
  1494. .info = m88e1510_hwmon_info,
  1495. };
  1496. static int marvell_hwmon_name(struct phy_device *phydev)
  1497. {
  1498. struct marvell_priv *priv = phydev->priv;
  1499. struct device *dev = &phydev->mdio.dev;
  1500. const char *devname = dev_name(dev);
  1501. size_t len = strlen(devname);
  1502. int i, j;
  1503. priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
  1504. if (!priv->hwmon_name)
  1505. return -ENOMEM;
  1506. for (i = j = 0; i < len && devname[i]; i++) {
  1507. if (isalnum(devname[i]))
  1508. priv->hwmon_name[j++] = devname[i];
  1509. }
  1510. return 0;
  1511. }
  1512. static int marvell_hwmon_probe(struct phy_device *phydev,
  1513. const struct hwmon_chip_info *chip)
  1514. {
  1515. struct marvell_priv *priv = phydev->priv;
  1516. struct device *dev = &phydev->mdio.dev;
  1517. int err;
  1518. err = marvell_hwmon_name(phydev);
  1519. if (err)
  1520. return err;
  1521. priv->hwmon_dev = devm_hwmon_device_register_with_info(
  1522. dev, priv->hwmon_name, phydev, chip, NULL);
  1523. return PTR_ERR_OR_ZERO(priv->hwmon_dev);
  1524. }
  1525. static int m88e1121_hwmon_probe(struct phy_device *phydev)
  1526. {
  1527. return marvell_hwmon_probe(phydev, &m88e1121_hwmon_chip_info);
  1528. }
  1529. static int m88e1510_hwmon_probe(struct phy_device *phydev)
  1530. {
  1531. return marvell_hwmon_probe(phydev, &m88e1510_hwmon_chip_info);
  1532. }
  1533. #else
  1534. static int m88e1121_hwmon_probe(struct phy_device *phydev)
  1535. {
  1536. return 0;
  1537. }
  1538. static int m88e1510_hwmon_probe(struct phy_device *phydev)
  1539. {
  1540. return 0;
  1541. }
  1542. #endif
  1543. static int marvell_probe(struct phy_device *phydev)
  1544. {
  1545. struct marvell_priv *priv;
  1546. priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
  1547. if (!priv)
  1548. return -ENOMEM;
  1549. phydev->priv = priv;
  1550. return 0;
  1551. }
  1552. static int m88e1121_probe(struct phy_device *phydev)
  1553. {
  1554. int err;
  1555. err = marvell_probe(phydev);
  1556. if (err)
  1557. return err;
  1558. return m88e1121_hwmon_probe(phydev);
  1559. }
  1560. static int m88e1510_probe(struct phy_device *phydev)
  1561. {
  1562. int err;
  1563. err = marvell_probe(phydev);
  1564. if (err)
  1565. return err;
  1566. return m88e1510_hwmon_probe(phydev);
  1567. }
  1568. static struct phy_driver marvell_drivers[] = {
  1569. {
  1570. .phy_id = MARVELL_PHY_ID_88E1101,
  1571. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1572. .name = "Marvell 88E1101",
  1573. .features = PHY_GBIT_FEATURES,
  1574. .flags = PHY_HAS_INTERRUPT,
  1575. .probe = marvell_probe,
  1576. .config_init = &marvell_config_init,
  1577. .config_aneg = &m88e1101_config_aneg,
  1578. .read_status = &genphy_read_status,
  1579. .ack_interrupt = &marvell_ack_interrupt,
  1580. .config_intr = &marvell_config_intr,
  1581. .resume = &genphy_resume,
  1582. .suspend = &genphy_suspend,
  1583. .get_sset_count = marvell_get_sset_count,
  1584. .get_strings = marvell_get_strings,
  1585. .get_stats = marvell_get_stats,
  1586. },
  1587. {
  1588. .phy_id = MARVELL_PHY_ID_88E1112,
  1589. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1590. .name = "Marvell 88E1112",
  1591. .features = PHY_GBIT_FEATURES,
  1592. .flags = PHY_HAS_INTERRUPT,
  1593. .probe = marvell_probe,
  1594. .config_init = &m88e1111_config_init,
  1595. .config_aneg = &marvell_config_aneg,
  1596. .read_status = &genphy_read_status,
  1597. .ack_interrupt = &marvell_ack_interrupt,
  1598. .config_intr = &marvell_config_intr,
  1599. .resume = &genphy_resume,
  1600. .suspend = &genphy_suspend,
  1601. .get_sset_count = marvell_get_sset_count,
  1602. .get_strings = marvell_get_strings,
  1603. .get_stats = marvell_get_stats,
  1604. },
  1605. {
  1606. .phy_id = MARVELL_PHY_ID_88E1111,
  1607. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1608. .name = "Marvell 88E1111",
  1609. .features = PHY_GBIT_FEATURES,
  1610. .flags = PHY_HAS_INTERRUPT,
  1611. .probe = marvell_probe,
  1612. .config_init = &m88e1111_config_init,
  1613. .config_aneg = &m88e1111_config_aneg,
  1614. .read_status = &marvell_read_status,
  1615. .ack_interrupt = &marvell_ack_interrupt,
  1616. .config_intr = &marvell_config_intr,
  1617. .resume = &genphy_resume,
  1618. .suspend = &genphy_suspend,
  1619. .get_sset_count = marvell_get_sset_count,
  1620. .get_strings = marvell_get_strings,
  1621. .get_stats = marvell_get_stats,
  1622. },
  1623. {
  1624. .phy_id = MARVELL_PHY_ID_88E1118,
  1625. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1626. .name = "Marvell 88E1118",
  1627. .features = PHY_GBIT_FEATURES,
  1628. .flags = PHY_HAS_INTERRUPT,
  1629. .probe = marvell_probe,
  1630. .config_init = &m88e1118_config_init,
  1631. .config_aneg = &m88e1118_config_aneg,
  1632. .read_status = &genphy_read_status,
  1633. .ack_interrupt = &marvell_ack_interrupt,
  1634. .config_intr = &marvell_config_intr,
  1635. .resume = &genphy_resume,
  1636. .suspend = &genphy_suspend,
  1637. .get_sset_count = marvell_get_sset_count,
  1638. .get_strings = marvell_get_strings,
  1639. .get_stats = marvell_get_stats,
  1640. },
  1641. {
  1642. .phy_id = MARVELL_PHY_ID_88E1121R,
  1643. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1644. .name = "Marvell 88E1121R",
  1645. .features = PHY_GBIT_FEATURES,
  1646. .flags = PHY_HAS_INTERRUPT,
  1647. .probe = &m88e1121_probe,
  1648. .config_init = &m88e1121_config_init,
  1649. .config_aneg = &m88e1121_config_aneg,
  1650. .read_status = &marvell_read_status,
  1651. .ack_interrupt = &marvell_ack_interrupt,
  1652. .config_intr = &marvell_config_intr,
  1653. .did_interrupt = &m88e1121_did_interrupt,
  1654. .resume = &genphy_resume,
  1655. .suspend = &genphy_suspend,
  1656. .get_sset_count = marvell_get_sset_count,
  1657. .get_strings = marvell_get_strings,
  1658. .get_stats = marvell_get_stats,
  1659. },
  1660. {
  1661. .phy_id = MARVELL_PHY_ID_88E1318S,
  1662. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1663. .name = "Marvell 88E1318S",
  1664. .features = PHY_GBIT_FEATURES,
  1665. .flags = PHY_HAS_INTERRUPT,
  1666. .probe = marvell_probe,
  1667. .config_init = &m88e1121_config_init,
  1668. .config_aneg = &m88e1318_config_aneg,
  1669. .read_status = &marvell_read_status,
  1670. .ack_interrupt = &marvell_ack_interrupt,
  1671. .config_intr = &marvell_config_intr,
  1672. .did_interrupt = &m88e1121_did_interrupt,
  1673. .get_wol = &m88e1318_get_wol,
  1674. .set_wol = &m88e1318_set_wol,
  1675. .resume = &genphy_resume,
  1676. .suspend = &genphy_suspend,
  1677. .get_sset_count = marvell_get_sset_count,
  1678. .get_strings = marvell_get_strings,
  1679. .get_stats = marvell_get_stats,
  1680. },
  1681. {
  1682. .phy_id = MARVELL_PHY_ID_88E1145,
  1683. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1684. .name = "Marvell 88E1145",
  1685. .features = PHY_GBIT_FEATURES,
  1686. .flags = PHY_HAS_INTERRUPT,
  1687. .probe = marvell_probe,
  1688. .config_init = &m88e1145_config_init,
  1689. .config_aneg = &marvell_config_aneg,
  1690. .read_status = &genphy_read_status,
  1691. .ack_interrupt = &marvell_ack_interrupt,
  1692. .config_intr = &marvell_config_intr,
  1693. .resume = &genphy_resume,
  1694. .suspend = &genphy_suspend,
  1695. .get_sset_count = marvell_get_sset_count,
  1696. .get_strings = marvell_get_strings,
  1697. .get_stats = marvell_get_stats,
  1698. },
  1699. {
  1700. .phy_id = MARVELL_PHY_ID_88E1149R,
  1701. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1702. .name = "Marvell 88E1149R",
  1703. .features = PHY_GBIT_FEATURES,
  1704. .flags = PHY_HAS_INTERRUPT,
  1705. .probe = marvell_probe,
  1706. .config_init = &m88e1149_config_init,
  1707. .config_aneg = &m88e1118_config_aneg,
  1708. .read_status = &genphy_read_status,
  1709. .ack_interrupt = &marvell_ack_interrupt,
  1710. .config_intr = &marvell_config_intr,
  1711. .resume = &genphy_resume,
  1712. .suspend = &genphy_suspend,
  1713. .get_sset_count = marvell_get_sset_count,
  1714. .get_strings = marvell_get_strings,
  1715. .get_stats = marvell_get_stats,
  1716. },
  1717. {
  1718. .phy_id = MARVELL_PHY_ID_88E1240,
  1719. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1720. .name = "Marvell 88E1240",
  1721. .features = PHY_GBIT_FEATURES,
  1722. .flags = PHY_HAS_INTERRUPT,
  1723. .probe = marvell_probe,
  1724. .config_init = &m88e1111_config_init,
  1725. .config_aneg = &marvell_config_aneg,
  1726. .read_status = &genphy_read_status,
  1727. .ack_interrupt = &marvell_ack_interrupt,
  1728. .config_intr = &marvell_config_intr,
  1729. .resume = &genphy_resume,
  1730. .suspend = &genphy_suspend,
  1731. .get_sset_count = marvell_get_sset_count,
  1732. .get_strings = marvell_get_strings,
  1733. .get_stats = marvell_get_stats,
  1734. },
  1735. {
  1736. .phy_id = MARVELL_PHY_ID_88E1116R,
  1737. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1738. .name = "Marvell 88E1116R",
  1739. .features = PHY_GBIT_FEATURES,
  1740. .flags = PHY_HAS_INTERRUPT,
  1741. .probe = marvell_probe,
  1742. .config_init = &m88e1116r_config_init,
  1743. .config_aneg = &genphy_config_aneg,
  1744. .read_status = &genphy_read_status,
  1745. .ack_interrupt = &marvell_ack_interrupt,
  1746. .config_intr = &marvell_config_intr,
  1747. .resume = &genphy_resume,
  1748. .suspend = &genphy_suspend,
  1749. .get_sset_count = marvell_get_sset_count,
  1750. .get_strings = marvell_get_strings,
  1751. .get_stats = marvell_get_stats,
  1752. },
  1753. {
  1754. .phy_id = MARVELL_PHY_ID_88E1510,
  1755. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1756. .name = "Marvell 88E1510",
  1757. .features = PHY_GBIT_FEATURES | SUPPORTED_FIBRE,
  1758. .flags = PHY_HAS_INTERRUPT,
  1759. .probe = &m88e1510_probe,
  1760. .config_init = &m88e1510_config_init,
  1761. .config_aneg = &m88e1510_config_aneg,
  1762. .read_status = &marvell_read_status,
  1763. .ack_interrupt = &marvell_ack_interrupt,
  1764. .config_intr = &marvell_config_intr,
  1765. .did_interrupt = &m88e1121_did_interrupt,
  1766. .get_wol = &m88e1318_get_wol,
  1767. .set_wol = &m88e1318_set_wol,
  1768. .resume = &marvell_resume,
  1769. .suspend = &marvell_suspend,
  1770. .get_sset_count = marvell_get_sset_count,
  1771. .get_strings = marvell_get_strings,
  1772. .get_stats = marvell_get_stats,
  1773. .set_loopback = genphy_loopback,
  1774. },
  1775. {
  1776. .phy_id = MARVELL_PHY_ID_88E1540,
  1777. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1778. .name = "Marvell 88E1540",
  1779. .features = PHY_GBIT_FEATURES,
  1780. .flags = PHY_HAS_INTERRUPT,
  1781. .probe = m88e1510_probe,
  1782. .config_init = &marvell_config_init,
  1783. .config_aneg = &m88e1510_config_aneg,
  1784. .read_status = &marvell_read_status,
  1785. .ack_interrupt = &marvell_ack_interrupt,
  1786. .config_intr = &marvell_config_intr,
  1787. .did_interrupt = &m88e1121_did_interrupt,
  1788. .resume = &genphy_resume,
  1789. .suspend = &genphy_suspend,
  1790. .get_sset_count = marvell_get_sset_count,
  1791. .get_strings = marvell_get_strings,
  1792. .get_stats = marvell_get_stats,
  1793. },
  1794. {
  1795. .phy_id = MARVELL_PHY_ID_88E1545,
  1796. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1797. .name = "Marvell 88E1545",
  1798. .probe = m88e1510_probe,
  1799. .features = PHY_GBIT_FEATURES,
  1800. .flags = PHY_HAS_INTERRUPT,
  1801. .config_init = &marvell_config_init,
  1802. .config_aneg = &m88e1510_config_aneg,
  1803. .read_status = &marvell_read_status,
  1804. .ack_interrupt = &marvell_ack_interrupt,
  1805. .config_intr = &marvell_config_intr,
  1806. .did_interrupt = &m88e1121_did_interrupt,
  1807. .resume = &genphy_resume,
  1808. .suspend = &genphy_suspend,
  1809. .get_sset_count = marvell_get_sset_count,
  1810. .get_strings = marvell_get_strings,
  1811. .get_stats = marvell_get_stats,
  1812. },
  1813. {
  1814. .phy_id = MARVELL_PHY_ID_88E3016,
  1815. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1816. .name = "Marvell 88E3016",
  1817. .features = PHY_BASIC_FEATURES,
  1818. .flags = PHY_HAS_INTERRUPT,
  1819. .probe = marvell_probe,
  1820. .config_aneg = &genphy_config_aneg,
  1821. .config_init = &m88e3016_config_init,
  1822. .aneg_done = &marvell_aneg_done,
  1823. .read_status = &marvell_read_status,
  1824. .ack_interrupt = &marvell_ack_interrupt,
  1825. .config_intr = &marvell_config_intr,
  1826. .did_interrupt = &m88e1121_did_interrupt,
  1827. .resume = &genphy_resume,
  1828. .suspend = &genphy_suspend,
  1829. .get_sset_count = marvell_get_sset_count,
  1830. .get_strings = marvell_get_strings,
  1831. .get_stats = marvell_get_stats,
  1832. },
  1833. {
  1834. .phy_id = MARVELL_PHY_ID_88E6390,
  1835. .phy_id_mask = MARVELL_PHY_ID_MASK,
  1836. .name = "Marvell 88E6390",
  1837. .features = PHY_GBIT_FEATURES,
  1838. .flags = PHY_HAS_INTERRUPT,
  1839. .probe = m88e1510_probe,
  1840. .config_init = &marvell_config_init,
  1841. .config_aneg = &m88e1510_config_aneg,
  1842. .read_status = &marvell_read_status,
  1843. .ack_interrupt = &marvell_ack_interrupt,
  1844. .config_intr = &marvell_config_intr,
  1845. .did_interrupt = &m88e1121_did_interrupt,
  1846. .resume = &genphy_resume,
  1847. .suspend = &genphy_suspend,
  1848. .get_sset_count = marvell_get_sset_count,
  1849. .get_strings = marvell_get_strings,
  1850. .get_stats = marvell_get_stats,
  1851. },
  1852. };
  1853. module_phy_driver(marvell_drivers);
  1854. static struct mdio_device_id __maybe_unused marvell_tbl[] = {
  1855. { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
  1856. { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
  1857. { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
  1858. { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
  1859. { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
  1860. { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
  1861. { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
  1862. { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
  1863. { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
  1864. { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
  1865. { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
  1866. { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
  1867. { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
  1868. { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
  1869. { MARVELL_PHY_ID_88E6390, MARVELL_PHY_ID_MASK },
  1870. { }
  1871. };
  1872. MODULE_DEVICE_TABLE(mdio, marvell_tbl);