baycom_epp.c 34 KB

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  1. /*****************************************************************************/
  2. /*
  3. * baycom_epp.c -- baycom epp radio modem driver.
  4. *
  5. * Copyright (C) 1998-2000
  6. * Thomas Sailer (sailer@ife.ee.ethz.ch)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. * Please note that the GPL allows you to use the driver, NOT the radio.
  23. * In order to use the radio, you need a license from the communications
  24. * authority of your country.
  25. *
  26. *
  27. * History:
  28. * 0.1 xx.xx.1998 Initial version by Matthias Welwarsky (dg2fef)
  29. * 0.2 21.04.1998 Massive rework by Thomas Sailer
  30. * Integrated FPGA EPP modem configuration routines
  31. * 0.3 11.05.1998 Took FPGA config out and moved it into a separate program
  32. * 0.4 26.07.1999 Adapted to new lowlevel parport driver interface
  33. * 0.5 03.08.1999 adapt to Linus' new __setup/__initcall
  34. * removed some pre-2.2 kernel compatibility cruft
  35. * 0.6 10.08.1999 Check if parport can do SPP and is safe to access during interrupt contexts
  36. * 0.7 12.02.2000 adapted to softnet driver interface
  37. *
  38. */
  39. /*****************************************************************************/
  40. #include <linux/crc-ccitt.h>
  41. #include <linux/module.h>
  42. #include <linux/kernel.h>
  43. #include <linux/init.h>
  44. #include <linux/sched.h>
  45. #include <linux/string.h>
  46. #include <linux/workqueue.h>
  47. #include <linux/fs.h>
  48. #include <linux/parport.h>
  49. #include <linux/if_arp.h>
  50. #include <linux/hdlcdrv.h>
  51. #include <linux/baycom.h>
  52. #include <linux/jiffies.h>
  53. #include <linux/random.h>
  54. #include <net/ax25.h>
  55. #include <linux/uaccess.h>
  56. /* --------------------------------------------------------------------- */
  57. #define BAYCOM_DEBUG
  58. #define BAYCOM_MAGIC 19730510
  59. /* --------------------------------------------------------------------- */
  60. static const char paranoia_str[] = KERN_ERR
  61. "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n";
  62. static const char bc_drvname[] = "baycom_epp";
  63. static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n"
  64. "baycom_epp: version 0.7\n";
  65. /* --------------------------------------------------------------------- */
  66. #define NR_PORTS 4
  67. static struct net_device *baycom_device[NR_PORTS];
  68. /* --------------------------------------------------------------------- */
  69. /* EPP status register */
  70. #define EPP_DCDBIT 0x80
  71. #define EPP_PTTBIT 0x08
  72. #define EPP_NREF 0x01
  73. #define EPP_NRAEF 0x02
  74. #define EPP_NRHF 0x04
  75. #define EPP_NTHF 0x20
  76. #define EPP_NTAEF 0x10
  77. #define EPP_NTEF EPP_PTTBIT
  78. /* EPP control register */
  79. #define EPP_TX_FIFO_ENABLE 0x10
  80. #define EPP_RX_FIFO_ENABLE 0x08
  81. #define EPP_MODEM_ENABLE 0x20
  82. #define EPP_LEDS 0xC0
  83. #define EPP_IRQ_ENABLE 0x10
  84. /* LPT registers */
  85. #define LPTREG_ECONTROL 0x402
  86. #define LPTREG_CONFIGB 0x401
  87. #define LPTREG_CONFIGA 0x400
  88. #define LPTREG_EPPDATA 0x004
  89. #define LPTREG_EPPADDR 0x003
  90. #define LPTREG_CONTROL 0x002
  91. #define LPTREG_STATUS 0x001
  92. #define LPTREG_DATA 0x000
  93. /* LPT control register */
  94. #define LPTCTRL_PROGRAM 0x04 /* 0 to reprogram */
  95. #define LPTCTRL_WRITE 0x01
  96. #define LPTCTRL_ADDRSTB 0x08
  97. #define LPTCTRL_DATASTB 0x02
  98. #define LPTCTRL_INTEN 0x10
  99. /* LPT status register */
  100. #define LPTSTAT_SHIFT_NINTR 6
  101. #define LPTSTAT_WAIT 0x80
  102. #define LPTSTAT_NINTR (1<<LPTSTAT_SHIFT_NINTR)
  103. #define LPTSTAT_PE 0x20
  104. #define LPTSTAT_DONE 0x10
  105. #define LPTSTAT_NERROR 0x08
  106. #define LPTSTAT_EPPTIMEOUT 0x01
  107. /* LPT data register */
  108. #define LPTDATA_SHIFT_TDI 0
  109. #define LPTDATA_SHIFT_TMS 2
  110. #define LPTDATA_TDI (1<<LPTDATA_SHIFT_TDI)
  111. #define LPTDATA_TCK 0x02
  112. #define LPTDATA_TMS (1<<LPTDATA_SHIFT_TMS)
  113. #define LPTDATA_INITBIAS 0x80
  114. /* EPP modem config/status bits */
  115. #define EPP_DCDBIT 0x80
  116. #define EPP_PTTBIT 0x08
  117. #define EPP_RXEBIT 0x01
  118. #define EPP_RXAEBIT 0x02
  119. #define EPP_RXHFULL 0x04
  120. #define EPP_NTHF 0x20
  121. #define EPP_NTAEF 0x10
  122. #define EPP_NTEF EPP_PTTBIT
  123. #define EPP_TX_FIFO_ENABLE 0x10
  124. #define EPP_RX_FIFO_ENABLE 0x08
  125. #define EPP_MODEM_ENABLE 0x20
  126. #define EPP_LEDS 0xC0
  127. #define EPP_IRQ_ENABLE 0x10
  128. /* Xilinx 4k JTAG instructions */
  129. #define XC4K_IRLENGTH 3
  130. #define XC4K_EXTEST 0
  131. #define XC4K_PRELOAD 1
  132. #define XC4K_CONFIGURE 5
  133. #define XC4K_BYPASS 7
  134. #define EPP_CONVENTIONAL 0
  135. #define EPP_FPGA 1
  136. #define EPP_FPGAEXTSTATUS 2
  137. #define TXBUFFER_SIZE ((HDLCDRV_MAXFLEN*6/5)+8)
  138. /* ---------------------------------------------------------------------- */
  139. /*
  140. * Information that need to be kept for each board.
  141. */
  142. struct baycom_state {
  143. int magic;
  144. struct pardevice *pdev;
  145. struct net_device *dev;
  146. unsigned int work_running;
  147. struct delayed_work run_work;
  148. unsigned int modem;
  149. unsigned int bitrate;
  150. unsigned char stat;
  151. struct {
  152. unsigned int intclk;
  153. unsigned int fclk;
  154. unsigned int bps;
  155. unsigned int extmodem;
  156. unsigned int loopback;
  157. } cfg;
  158. struct hdlcdrv_channel_params ch_params;
  159. struct {
  160. unsigned int bitbuf, bitstream, numbits, state;
  161. unsigned char *bufptr;
  162. int bufcnt;
  163. unsigned char buf[TXBUFFER_SIZE];
  164. } hdlcrx;
  165. struct {
  166. int calibrate;
  167. int slotcnt;
  168. int flags;
  169. enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state;
  170. unsigned char *bufptr;
  171. int bufcnt;
  172. unsigned char buf[TXBUFFER_SIZE];
  173. } hdlctx;
  174. unsigned int ptt_keyed;
  175. struct sk_buff *skb; /* next transmit packet */
  176. #ifdef BAYCOM_DEBUG
  177. struct debug_vals {
  178. unsigned long last_jiffies;
  179. unsigned cur_intcnt;
  180. unsigned last_intcnt;
  181. int cur_pllcorr;
  182. int last_pllcorr;
  183. unsigned int mod_cycles;
  184. unsigned int demod_cycles;
  185. } debug_vals;
  186. #endif /* BAYCOM_DEBUG */
  187. };
  188. /* --------------------------------------------------------------------- */
  189. #define KISS_VERBOSE
  190. /* --------------------------------------------------------------------- */
  191. #define PARAM_TXDELAY 1
  192. #define PARAM_PERSIST 2
  193. #define PARAM_SLOTTIME 3
  194. #define PARAM_TXTAIL 4
  195. #define PARAM_FULLDUP 5
  196. #define PARAM_HARDWARE 6
  197. #define PARAM_RETURN 255
  198. /* --------------------------------------------------------------------- */
  199. /*
  200. * the CRC routines are stolen from WAMPES
  201. * by Dieter Deyke
  202. */
  203. /*---------------------------------------------------------------------------*/
  204. #if 0
  205. static inline void append_crc_ccitt(unsigned char *buffer, int len)
  206. {
  207. unsigned int crc = 0xffff;
  208. for (;len>0;len--)
  209. crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff];
  210. crc ^= 0xffff;
  211. *buffer++ = crc;
  212. *buffer++ = crc >> 8;
  213. }
  214. #endif
  215. /*---------------------------------------------------------------------------*/
  216. static inline int check_crc_ccitt(const unsigned char *buf, int cnt)
  217. {
  218. return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8;
  219. }
  220. /*---------------------------------------------------------------------------*/
  221. static inline int calc_crc_ccitt(const unsigned char *buf, int cnt)
  222. {
  223. return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff;
  224. }
  225. /* ---------------------------------------------------------------------- */
  226. #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800)
  227. /* --------------------------------------------------------------------- */
  228. static inline void baycom_int_freq(struct baycom_state *bc)
  229. {
  230. #ifdef BAYCOM_DEBUG
  231. unsigned long cur_jiffies = jiffies;
  232. /*
  233. * measure the interrupt frequency
  234. */
  235. bc->debug_vals.cur_intcnt++;
  236. if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
  237. bc->debug_vals.last_jiffies = cur_jiffies;
  238. bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
  239. bc->debug_vals.cur_intcnt = 0;
  240. bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
  241. bc->debug_vals.cur_pllcorr = 0;
  242. }
  243. #endif /* BAYCOM_DEBUG */
  244. }
  245. /* ---------------------------------------------------------------------- */
  246. /*
  247. * eppconfig_path should be setable via /proc/sys.
  248. */
  249. static char const eppconfig_path[] = "/usr/sbin/eppfpga";
  250. static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL };
  251. /* eppconfig: called during ifconfig up to configure the modem */
  252. static int eppconfig(struct baycom_state *bc)
  253. {
  254. char modearg[256];
  255. char portarg[16];
  256. char *argv[] = {
  257. (char *)eppconfig_path,
  258. "-s",
  259. "-p", portarg,
  260. "-m", modearg,
  261. NULL };
  262. /* set up arguments */
  263. sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat",
  264. bc->cfg.intclk ? "int" : "ext",
  265. bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
  266. (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps),
  267. bc->cfg.loopback ? ",loopback" : "");
  268. sprintf(portarg, "%ld", bc->pdev->port->base);
  269. printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg);
  270. return call_usermodehelper(eppconfig_path, argv, envp, UMH_WAIT_PROC);
  271. }
  272. /* ---------------------------------------------------------------------- */
  273. static inline void do_kiss_params(struct baycom_state *bc,
  274. unsigned char *data, unsigned long len)
  275. {
  276. #ifdef KISS_VERBOSE
  277. #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b)
  278. #else /* KISS_VERBOSE */
  279. #define PKP(a,b)
  280. #endif /* KISS_VERBOSE */
  281. if (len < 2)
  282. return;
  283. switch(data[0]) {
  284. case PARAM_TXDELAY:
  285. bc->ch_params.tx_delay = data[1];
  286. PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay);
  287. break;
  288. case PARAM_PERSIST:
  289. bc->ch_params.ppersist = data[1];
  290. PKP("p persistence = %u", bc->ch_params.ppersist);
  291. break;
  292. case PARAM_SLOTTIME:
  293. bc->ch_params.slottime = data[1];
  294. PKP("slot time = %ums", bc->ch_params.slottime);
  295. break;
  296. case PARAM_TXTAIL:
  297. bc->ch_params.tx_tail = data[1];
  298. PKP("TX tail = %ums", bc->ch_params.tx_tail);
  299. break;
  300. case PARAM_FULLDUP:
  301. bc->ch_params.fulldup = !!data[1];
  302. PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half");
  303. break;
  304. default:
  305. break;
  306. }
  307. #undef PKP
  308. }
  309. /* --------------------------------------------------------------------- */
  310. static void encode_hdlc(struct baycom_state *bc)
  311. {
  312. struct sk_buff *skb;
  313. unsigned char *wp, *bp;
  314. int pkt_len;
  315. unsigned bitstream, notbitstream, bitbuf, numbit, crc;
  316. unsigned char crcarr[2];
  317. int j;
  318. if (bc->hdlctx.bufcnt > 0)
  319. return;
  320. skb = bc->skb;
  321. if (!skb)
  322. return;
  323. bc->skb = NULL;
  324. pkt_len = skb->len-1; /* strip KISS byte */
  325. wp = bc->hdlctx.buf;
  326. bp = skb->data+1;
  327. crc = calc_crc_ccitt(bp, pkt_len);
  328. crcarr[0] = crc;
  329. crcarr[1] = crc >> 8;
  330. *wp++ = 0x7e;
  331. bitstream = bitbuf = numbit = 0;
  332. while (pkt_len > -2) {
  333. bitstream >>= 8;
  334. bitstream |= ((unsigned int)*bp) << 8;
  335. bitbuf |= ((unsigned int)*bp) << numbit;
  336. notbitstream = ~bitstream;
  337. bp++;
  338. pkt_len--;
  339. if (!pkt_len)
  340. bp = crcarr;
  341. for (j = 0; j < 8; j++)
  342. if (unlikely(!(notbitstream & (0x1f0 << j)))) {
  343. bitstream &= ~(0x100 << j);
  344. bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) |
  345. ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1);
  346. numbit++;
  347. notbitstream = ~bitstream;
  348. }
  349. numbit += 8;
  350. while (numbit >= 8) {
  351. *wp++ = bitbuf;
  352. bitbuf >>= 8;
  353. numbit -= 8;
  354. }
  355. }
  356. bitbuf |= 0x7e7e << numbit;
  357. numbit += 16;
  358. while (numbit >= 8) {
  359. *wp++ = bitbuf;
  360. bitbuf >>= 8;
  361. numbit -= 8;
  362. }
  363. bc->hdlctx.bufptr = bc->hdlctx.buf;
  364. bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
  365. dev_kfree_skb(skb);
  366. bc->dev->stats.tx_packets++;
  367. }
  368. /* ---------------------------------------------------------------------- */
  369. static int transmit(struct baycom_state *bc, int cnt, unsigned char stat)
  370. {
  371. struct parport *pp = bc->pdev->port;
  372. unsigned char tmp[128];
  373. int i, j;
  374. if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
  375. bc->hdlctx.state = tx_idle;
  376. if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
  377. if (bc->hdlctx.bufcnt <= 0)
  378. encode_hdlc(bc);
  379. if (bc->hdlctx.bufcnt <= 0)
  380. return 0;
  381. if (!bc->ch_params.fulldup) {
  382. if (!(stat & EPP_DCDBIT)) {
  383. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  384. return 0;
  385. }
  386. if ((--bc->hdlctx.slotcnt) > 0)
  387. return 0;
  388. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  389. if ((prandom_u32() % 256) > bc->ch_params.ppersist)
  390. return 0;
  391. }
  392. }
  393. if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
  394. bc->hdlctx.state = tx_keyup;
  395. bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
  396. bc->ptt_keyed++;
  397. }
  398. while (cnt > 0) {
  399. switch (bc->hdlctx.state) {
  400. case tx_keyup:
  401. i = min_t(int, cnt, bc->hdlctx.flags);
  402. cnt -= i;
  403. bc->hdlctx.flags -= i;
  404. if (bc->hdlctx.flags <= 0)
  405. bc->hdlctx.state = tx_data;
  406. memset(tmp, 0x7e, sizeof(tmp));
  407. while (i > 0) {
  408. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  409. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  410. return -1;
  411. i -= j;
  412. }
  413. break;
  414. case tx_data:
  415. if (bc->hdlctx.bufcnt <= 0) {
  416. encode_hdlc(bc);
  417. if (bc->hdlctx.bufcnt <= 0) {
  418. bc->hdlctx.state = tx_tail;
  419. bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
  420. break;
  421. }
  422. }
  423. i = min_t(int, cnt, bc->hdlctx.bufcnt);
  424. bc->hdlctx.bufcnt -= i;
  425. cnt -= i;
  426. if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
  427. return -1;
  428. bc->hdlctx.bufptr += i;
  429. break;
  430. case tx_tail:
  431. encode_hdlc(bc);
  432. if (bc->hdlctx.bufcnt > 0) {
  433. bc->hdlctx.state = tx_data;
  434. break;
  435. }
  436. i = min_t(int, cnt, bc->hdlctx.flags);
  437. if (i) {
  438. cnt -= i;
  439. bc->hdlctx.flags -= i;
  440. memset(tmp, 0x7e, sizeof(tmp));
  441. while (i > 0) {
  442. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  443. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  444. return -1;
  445. i -= j;
  446. }
  447. break;
  448. }
  449. default: /* fall through */
  450. if (bc->hdlctx.calibrate <= 0)
  451. return 0;
  452. i = min_t(int, cnt, bc->hdlctx.calibrate);
  453. cnt -= i;
  454. bc->hdlctx.calibrate -= i;
  455. memset(tmp, 0, sizeof(tmp));
  456. while (i > 0) {
  457. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  458. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  459. return -1;
  460. i -= j;
  461. }
  462. break;
  463. }
  464. }
  465. return 0;
  466. }
  467. /* ---------------------------------------------------------------------- */
  468. static void do_rxpacket(struct net_device *dev)
  469. {
  470. struct baycom_state *bc = netdev_priv(dev);
  471. struct sk_buff *skb;
  472. unsigned char *cp;
  473. unsigned pktlen;
  474. if (bc->hdlcrx.bufcnt < 4)
  475. return;
  476. if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt))
  477. return;
  478. pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */
  479. if (!(skb = dev_alloc_skb(pktlen))) {
  480. printk("%s: memory squeeze, dropping packet\n", dev->name);
  481. dev->stats.rx_dropped++;
  482. return;
  483. }
  484. cp = skb_put(skb, pktlen);
  485. *cp++ = 0; /* KISS kludge */
  486. memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
  487. skb->protocol = ax25_type_trans(skb, dev);
  488. netif_rx(skb);
  489. dev->stats.rx_packets++;
  490. }
  491. static int receive(struct net_device *dev, int cnt)
  492. {
  493. struct baycom_state *bc = netdev_priv(dev);
  494. struct parport *pp = bc->pdev->port;
  495. unsigned int bitbuf, notbitstream, bitstream, numbits, state;
  496. unsigned char tmp[128];
  497. unsigned char *cp;
  498. int cnt2, ret = 0;
  499. int j;
  500. numbits = bc->hdlcrx.numbits;
  501. state = bc->hdlcrx.state;
  502. bitstream = bc->hdlcrx.bitstream;
  503. bitbuf = bc->hdlcrx.bitbuf;
  504. while (cnt > 0) {
  505. cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt;
  506. cnt -= cnt2;
  507. if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) {
  508. ret = -1;
  509. break;
  510. }
  511. cp = tmp;
  512. for (; cnt2 > 0; cnt2--, cp++) {
  513. bitstream >>= 8;
  514. bitstream |= (*cp) << 8;
  515. bitbuf >>= 8;
  516. bitbuf |= (*cp) << 8;
  517. numbits += 8;
  518. notbitstream = ~bitstream;
  519. for (j = 0; j < 8; j++) {
  520. /* flag or abort */
  521. if (unlikely(!(notbitstream & (0x0fc << j)))) {
  522. /* abort received */
  523. if (!(notbitstream & (0x1fc << j)))
  524. state = 0;
  525. /* flag received */
  526. else if ((bitstream & (0x1fe << j)) == (0x0fc << j)) {
  527. if (state)
  528. do_rxpacket(dev);
  529. bc->hdlcrx.bufcnt = 0;
  530. bc->hdlcrx.bufptr = bc->hdlcrx.buf;
  531. state = 1;
  532. numbits = 7-j;
  533. }
  534. }
  535. /* stuffed bit */
  536. else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) {
  537. numbits--;
  538. bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1);
  539. }
  540. }
  541. while (state && numbits >= 8) {
  542. if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) {
  543. state = 0;
  544. } else {
  545. *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits);
  546. bc->hdlcrx.bufcnt++;
  547. numbits -= 8;
  548. }
  549. }
  550. }
  551. }
  552. bc->hdlcrx.numbits = numbits;
  553. bc->hdlcrx.state = state;
  554. bc->hdlcrx.bitstream = bitstream;
  555. bc->hdlcrx.bitbuf = bitbuf;
  556. return ret;
  557. }
  558. /* --------------------------------------------------------------------- */
  559. #ifdef __i386__
  560. #include <asm/msr.h>
  561. #define GETTICK(x) \
  562. ({ \
  563. if (boot_cpu_has(X86_FEATURE_TSC)) \
  564. x = (unsigned int)rdtsc(); \
  565. })
  566. #else /* __i386__ */
  567. #define GETTICK(x)
  568. #endif /* __i386__ */
  569. static void epp_bh(struct work_struct *work)
  570. {
  571. struct net_device *dev;
  572. struct baycom_state *bc;
  573. struct parport *pp;
  574. unsigned char stat;
  575. unsigned char tmp[2];
  576. unsigned int time1 = 0, time2 = 0, time3 = 0;
  577. int cnt, cnt2;
  578. bc = container_of(work, struct baycom_state, run_work.work);
  579. dev = bc->dev;
  580. if (!bc->work_running)
  581. return;
  582. baycom_int_freq(bc);
  583. pp = bc->pdev->port;
  584. /* update status */
  585. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  586. goto epptimeout;
  587. bc->stat = stat;
  588. bc->debug_vals.last_pllcorr = stat;
  589. GETTICK(time1);
  590. if (bc->modem == EPP_FPGAEXTSTATUS) {
  591. /* get input count */
  592. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1;
  593. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  594. goto epptimeout;
  595. if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
  596. goto epptimeout;
  597. cnt = tmp[0] | (tmp[1] << 8);
  598. cnt &= 0x7fff;
  599. /* get output count */
  600. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2;
  601. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  602. goto epptimeout;
  603. if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
  604. goto epptimeout;
  605. cnt2 = tmp[0] | (tmp[1] << 8);
  606. cnt2 = 16384 - (cnt2 & 0x7fff);
  607. /* return to normal */
  608. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
  609. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  610. goto epptimeout;
  611. if (transmit(bc, cnt2, stat))
  612. goto epptimeout;
  613. GETTICK(time2);
  614. if (receive(dev, cnt))
  615. goto epptimeout;
  616. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  617. goto epptimeout;
  618. bc->stat = stat;
  619. } else {
  620. /* try to tx */
  621. switch (stat & (EPP_NTAEF|EPP_NTHF)) {
  622. case EPP_NTHF:
  623. cnt = 2048 - 256;
  624. break;
  625. case EPP_NTAEF:
  626. cnt = 2048 - 1793;
  627. break;
  628. case 0:
  629. cnt = 0;
  630. break;
  631. default:
  632. cnt = 2048 - 1025;
  633. break;
  634. }
  635. if (transmit(bc, cnt, stat))
  636. goto epptimeout;
  637. GETTICK(time2);
  638. /* do receiver */
  639. while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) {
  640. switch (stat & (EPP_NRAEF|EPP_NRHF)) {
  641. case EPP_NRAEF:
  642. cnt = 1025;
  643. break;
  644. case 0:
  645. cnt = 1793;
  646. break;
  647. default:
  648. cnt = 256;
  649. break;
  650. }
  651. if (receive(dev, cnt))
  652. goto epptimeout;
  653. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  654. goto epptimeout;
  655. }
  656. cnt = 0;
  657. if (bc->bitrate < 50000)
  658. cnt = 256;
  659. else if (bc->bitrate < 100000)
  660. cnt = 128;
  661. while (cnt > 0 && stat & EPP_NREF) {
  662. if (receive(dev, 1))
  663. goto epptimeout;
  664. cnt--;
  665. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  666. goto epptimeout;
  667. }
  668. }
  669. GETTICK(time3);
  670. #ifdef BAYCOM_DEBUG
  671. bc->debug_vals.mod_cycles = time2 - time1;
  672. bc->debug_vals.demod_cycles = time3 - time2;
  673. #endif /* BAYCOM_DEBUG */
  674. schedule_delayed_work(&bc->run_work, 1);
  675. if (!bc->skb)
  676. netif_wake_queue(dev);
  677. return;
  678. epptimeout:
  679. printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname);
  680. }
  681. /* ---------------------------------------------------------------------- */
  682. /*
  683. * ===================== network driver interface =========================
  684. */
  685. static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev)
  686. {
  687. struct baycom_state *bc = netdev_priv(dev);
  688. if (skb->protocol == htons(ETH_P_IP))
  689. return ax25_ip_xmit(skb);
  690. if (skb->data[0] != 0) {
  691. do_kiss_params(bc, skb->data, skb->len);
  692. dev_kfree_skb(skb);
  693. return NETDEV_TX_OK;
  694. }
  695. if (bc->skb) {
  696. dev_kfree_skb(skb);
  697. return NETDEV_TX_OK;
  698. }
  699. /* strip KISS byte */
  700. if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) {
  701. dev_kfree_skb(skb);
  702. return NETDEV_TX_OK;
  703. }
  704. netif_stop_queue(dev);
  705. bc->skb = skb;
  706. return NETDEV_TX_OK;
  707. }
  708. /* --------------------------------------------------------------------- */
  709. static int baycom_set_mac_address(struct net_device *dev, void *addr)
  710. {
  711. struct sockaddr *sa = (struct sockaddr *)addr;
  712. /* addr is an AX.25 shifted ASCII mac address */
  713. memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
  714. return 0;
  715. }
  716. /* --------------------------------------------------------------------- */
  717. static void epp_wakeup(void *handle)
  718. {
  719. struct net_device *dev = (struct net_device *)handle;
  720. struct baycom_state *bc = netdev_priv(dev);
  721. printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name);
  722. if (!parport_claim(bc->pdev))
  723. printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name);
  724. }
  725. /* --------------------------------------------------------------------- */
  726. /*
  727. * Open/initialize the board. This is called (in the current kernel)
  728. * sometime after booting when the 'ifconfig' program is run.
  729. *
  730. * This routine should set everything up anew at each open, even
  731. * registers that "should" only need to be set once at boot, so that
  732. * there is non-reboot way to recover if something goes wrong.
  733. */
  734. static int epp_open(struct net_device *dev)
  735. {
  736. struct baycom_state *bc = netdev_priv(dev);
  737. struct parport *pp = parport_find_base(dev->base_addr);
  738. unsigned int i, j;
  739. unsigned char tmp[128];
  740. unsigned char stat;
  741. unsigned long tstart;
  742. if (!pp) {
  743. printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr);
  744. return -ENXIO;
  745. }
  746. #if 0
  747. if (pp->irq < 0) {
  748. printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base);
  749. parport_put_port(pp);
  750. return -ENXIO;
  751. }
  752. #endif
  753. if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
  754. printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n",
  755. bc_drvname, pp->base);
  756. parport_put_port(pp);
  757. return -EIO;
  758. }
  759. memset(&bc->modem, 0, sizeof(bc->modem));
  760. bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup,
  761. NULL, PARPORT_DEV_EXCL, dev);
  762. parport_put_port(pp);
  763. if (!bc->pdev) {
  764. printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base);
  765. return -ENXIO;
  766. }
  767. if (parport_claim(bc->pdev)) {
  768. printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base);
  769. parport_unregister_device(bc->pdev);
  770. return -EBUSY;
  771. }
  772. dev->irq = /*pp->irq*/ 0;
  773. INIT_DELAYED_WORK(&bc->run_work, epp_bh);
  774. bc->work_running = 1;
  775. bc->modem = EPP_CONVENTIONAL;
  776. if (eppconfig(bc))
  777. printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname);
  778. else
  779. bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS;
  780. parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */
  781. /* reset the modem */
  782. tmp[0] = 0;
  783. tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
  784. if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2)
  785. goto epptimeout;
  786. /* autoprobe baud rate */
  787. tstart = jiffies;
  788. i = 0;
  789. while (time_before(jiffies, tstart + HZ/3)) {
  790. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  791. goto epptimeout;
  792. if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
  793. schedule();
  794. continue;
  795. }
  796. if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
  797. goto epptimeout;
  798. if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
  799. goto epptimeout;
  800. i += 256;
  801. }
  802. for (j = 0; j < 256; j++) {
  803. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  804. goto epptimeout;
  805. if (!(stat & EPP_NREF))
  806. break;
  807. if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1)
  808. goto epptimeout;
  809. i++;
  810. }
  811. tstart = jiffies - tstart;
  812. bc->bitrate = i * (8 * HZ) / tstart;
  813. j = 1;
  814. i = bc->bitrate >> 3;
  815. while (j < 7 && i > 150) {
  816. j++;
  817. i >>= 1;
  818. }
  819. printk(KERN_INFO "%s: autoprobed bitrate: %d int divider: %d int rate: %d\n",
  820. bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2));
  821. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/;
  822. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  823. goto epptimeout;
  824. /*
  825. * initialise hdlc variables
  826. */
  827. bc->hdlcrx.state = 0;
  828. bc->hdlcrx.numbits = 0;
  829. bc->hdlctx.state = tx_idle;
  830. bc->hdlctx.bufcnt = 0;
  831. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  832. bc->hdlctx.calibrate = 0;
  833. /* start the bottom half stuff */
  834. schedule_delayed_work(&bc->run_work, 1);
  835. netif_start_queue(dev);
  836. return 0;
  837. epptimeout:
  838. printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname);
  839. parport_write_control(pp, 0); /* reset the adapter */
  840. parport_release(bc->pdev);
  841. parport_unregister_device(bc->pdev);
  842. return -EIO;
  843. }
  844. /* --------------------------------------------------------------------- */
  845. static int epp_close(struct net_device *dev)
  846. {
  847. struct baycom_state *bc = netdev_priv(dev);
  848. struct parport *pp = bc->pdev->port;
  849. unsigned char tmp[1];
  850. bc->work_running = 0;
  851. cancel_delayed_work_sync(&bc->run_work);
  852. bc->stat = EPP_DCDBIT;
  853. tmp[0] = 0;
  854. pp->ops->epp_write_addr(pp, tmp, 1, 0);
  855. parport_write_control(pp, 0); /* reset the adapter */
  856. parport_release(bc->pdev);
  857. parport_unregister_device(bc->pdev);
  858. if (bc->skb)
  859. dev_kfree_skb(bc->skb);
  860. bc->skb = NULL;
  861. printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n",
  862. bc_drvname, dev->base_addr, dev->irq);
  863. return 0;
  864. }
  865. /* --------------------------------------------------------------------- */
  866. static int baycom_setmode(struct baycom_state *bc, const char *modestr)
  867. {
  868. const char *cp;
  869. if (strstr(modestr,"intclk"))
  870. bc->cfg.intclk = 1;
  871. if (strstr(modestr,"extclk"))
  872. bc->cfg.intclk = 0;
  873. if (strstr(modestr,"intmodem"))
  874. bc->cfg.extmodem = 0;
  875. if (strstr(modestr,"extmodem"))
  876. bc->cfg.extmodem = 1;
  877. if (strstr(modestr,"noloopback"))
  878. bc->cfg.loopback = 0;
  879. if (strstr(modestr,"loopback"))
  880. bc->cfg.loopback = 1;
  881. if ((cp = strstr(modestr,"fclk="))) {
  882. bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0);
  883. if (bc->cfg.fclk < 1000000)
  884. bc->cfg.fclk = 1000000;
  885. if (bc->cfg.fclk > 25000000)
  886. bc->cfg.fclk = 25000000;
  887. }
  888. if ((cp = strstr(modestr,"bps="))) {
  889. bc->cfg.bps = simple_strtoul(cp+4, NULL, 0);
  890. if (bc->cfg.bps < 1000)
  891. bc->cfg.bps = 1000;
  892. if (bc->cfg.bps > 1500000)
  893. bc->cfg.bps = 1500000;
  894. }
  895. return 0;
  896. }
  897. /* --------------------------------------------------------------------- */
  898. static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  899. {
  900. struct baycom_state *bc = netdev_priv(dev);
  901. struct hdlcdrv_ioctl hi;
  902. if (cmd != SIOCDEVPRIVATE)
  903. return -ENOIOCTLCMD;
  904. if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi)))
  905. return -EFAULT;
  906. switch (hi.cmd) {
  907. default:
  908. return -ENOIOCTLCMD;
  909. case HDLCDRVCTL_GETCHANNELPAR:
  910. hi.data.cp.tx_delay = bc->ch_params.tx_delay;
  911. hi.data.cp.tx_tail = bc->ch_params.tx_tail;
  912. hi.data.cp.slottime = bc->ch_params.slottime;
  913. hi.data.cp.ppersist = bc->ch_params.ppersist;
  914. hi.data.cp.fulldup = bc->ch_params.fulldup;
  915. break;
  916. case HDLCDRVCTL_SETCHANNELPAR:
  917. if (!capable(CAP_NET_ADMIN))
  918. return -EACCES;
  919. bc->ch_params.tx_delay = hi.data.cp.tx_delay;
  920. bc->ch_params.tx_tail = hi.data.cp.tx_tail;
  921. bc->ch_params.slottime = hi.data.cp.slottime;
  922. bc->ch_params.ppersist = hi.data.cp.ppersist;
  923. bc->ch_params.fulldup = hi.data.cp.fulldup;
  924. bc->hdlctx.slotcnt = 1;
  925. return 0;
  926. case HDLCDRVCTL_GETMODEMPAR:
  927. hi.data.mp.iobase = dev->base_addr;
  928. hi.data.mp.irq = dev->irq;
  929. hi.data.mp.dma = dev->dma;
  930. hi.data.mp.dma2 = 0;
  931. hi.data.mp.seriobase = 0;
  932. hi.data.mp.pariobase = 0;
  933. hi.data.mp.midiiobase = 0;
  934. break;
  935. case HDLCDRVCTL_SETMODEMPAR:
  936. if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev))
  937. return -EACCES;
  938. dev->base_addr = hi.data.mp.iobase;
  939. dev->irq = /*hi.data.mp.irq*/0;
  940. dev->dma = /*hi.data.mp.dma*/0;
  941. return 0;
  942. case HDLCDRVCTL_GETSTAT:
  943. hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT);
  944. hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT);
  945. hi.data.cs.ptt_keyed = bc->ptt_keyed;
  946. hi.data.cs.tx_packets = dev->stats.tx_packets;
  947. hi.data.cs.tx_errors = dev->stats.tx_errors;
  948. hi.data.cs.rx_packets = dev->stats.rx_packets;
  949. hi.data.cs.rx_errors = dev->stats.rx_errors;
  950. break;
  951. case HDLCDRVCTL_OLDGETSTAT:
  952. hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT);
  953. hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT);
  954. hi.data.ocs.ptt_keyed = bc->ptt_keyed;
  955. break;
  956. case HDLCDRVCTL_CALIBRATE:
  957. if (!capable(CAP_SYS_RAWIO))
  958. return -EACCES;
  959. bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;
  960. return 0;
  961. case HDLCDRVCTL_DRIVERNAME:
  962. strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));
  963. break;
  964. case HDLCDRVCTL_GETMODE:
  965. sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s",
  966. bc->cfg.intclk ? "int" : "ext",
  967. bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
  968. bc->cfg.loopback ? ",loopback" : "");
  969. break;
  970. case HDLCDRVCTL_SETMODE:
  971. if (!capable(CAP_NET_ADMIN) || netif_running(dev))
  972. return -EACCES;
  973. hi.data.modename[sizeof(hi.data.modename)-1] = '\0';
  974. return baycom_setmode(bc, hi.data.modename);
  975. case HDLCDRVCTL_MODELIST:
  976. strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",
  977. sizeof(hi.data.modename));
  978. break;
  979. case HDLCDRVCTL_MODEMPARMASK:
  980. return HDLCDRV_PARMASK_IOBASE;
  981. }
  982. if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi)))
  983. return -EFAULT;
  984. return 0;
  985. }
  986. /* --------------------------------------------------------------------- */
  987. static const struct net_device_ops baycom_netdev_ops = {
  988. .ndo_open = epp_open,
  989. .ndo_stop = epp_close,
  990. .ndo_do_ioctl = baycom_ioctl,
  991. .ndo_start_xmit = baycom_send_packet,
  992. .ndo_set_mac_address = baycom_set_mac_address,
  993. };
  994. /*
  995. * Check for a network adaptor of this type, and return '0' if one exists.
  996. * If dev->base_addr == 0, probe all likely locations.
  997. * If dev->base_addr == 1, always return failure.
  998. * If dev->base_addr == 2, allocate space for the device and return success
  999. * (detachable devices only).
  1000. */
  1001. static void baycom_probe(struct net_device *dev)
  1002. {
  1003. const struct hdlcdrv_channel_params dflt_ch_params = {
  1004. 20, 2, 10, 40, 0
  1005. };
  1006. struct baycom_state *bc;
  1007. /*
  1008. * not a real probe! only initialize data structures
  1009. */
  1010. bc = netdev_priv(dev);
  1011. /*
  1012. * initialize the baycom_state struct
  1013. */
  1014. bc->ch_params = dflt_ch_params;
  1015. bc->ptt_keyed = 0;
  1016. /*
  1017. * initialize the device struct
  1018. */
  1019. /* Fill in the fields of the device structure */
  1020. bc->skb = NULL;
  1021. dev->netdev_ops = &baycom_netdev_ops;
  1022. dev->header_ops = &ax25_header_ops;
  1023. dev->type = ARPHRD_AX25; /* AF_AX25 device */
  1024. dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
  1025. dev->mtu = AX25_DEF_PACLEN; /* eth_mtu is the default */
  1026. dev->addr_len = AX25_ADDR_LEN; /* sizeof an ax.25 address */
  1027. memcpy(dev->broadcast, &ax25_bcast, AX25_ADDR_LEN);
  1028. memcpy(dev->dev_addr, &null_ax25_address, AX25_ADDR_LEN);
  1029. dev->tx_queue_len = 16;
  1030. /* New style flags */
  1031. dev->flags = 0;
  1032. }
  1033. /* --------------------------------------------------------------------- */
  1034. /*
  1035. * command line settable parameters
  1036. */
  1037. static char *mode[NR_PORTS] = { "", };
  1038. static int iobase[NR_PORTS] = { 0x378, };
  1039. module_param_array(mode, charp, NULL, 0);
  1040. MODULE_PARM_DESC(mode, "baycom operating mode");
  1041. module_param_hw_array(iobase, int, ioport, NULL, 0);
  1042. MODULE_PARM_DESC(iobase, "baycom io base address");
  1043. MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
  1044. MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
  1045. MODULE_LICENSE("GPL");
  1046. /* --------------------------------------------------------------------- */
  1047. static void __init baycom_epp_dev_setup(struct net_device *dev)
  1048. {
  1049. struct baycom_state *bc = netdev_priv(dev);
  1050. /*
  1051. * initialize part of the baycom_state struct
  1052. */
  1053. bc->dev = dev;
  1054. bc->magic = BAYCOM_MAGIC;
  1055. bc->cfg.fclk = 19666600;
  1056. bc->cfg.bps = 9600;
  1057. /*
  1058. * initialize part of the device struct
  1059. */
  1060. baycom_probe(dev);
  1061. }
  1062. static int __init init_baycomepp(void)
  1063. {
  1064. int i, found = 0;
  1065. char set_hw = 1;
  1066. printk(bc_drvinfo);
  1067. /*
  1068. * register net devices
  1069. */
  1070. for (i = 0; i < NR_PORTS; i++) {
  1071. struct net_device *dev;
  1072. dev = alloc_netdev(sizeof(struct baycom_state), "bce%d",
  1073. NET_NAME_UNKNOWN, baycom_epp_dev_setup);
  1074. if (!dev) {
  1075. printk(KERN_WARNING "bce%d : out of memory\n", i);
  1076. return found ? 0 : -ENOMEM;
  1077. }
  1078. sprintf(dev->name, "bce%d", i);
  1079. dev->base_addr = iobase[i];
  1080. if (!mode[i])
  1081. set_hw = 0;
  1082. if (!set_hw)
  1083. iobase[i] = 0;
  1084. if (register_netdev(dev)) {
  1085. printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name);
  1086. free_netdev(dev);
  1087. break;
  1088. }
  1089. if (set_hw && baycom_setmode(netdev_priv(dev), mode[i]))
  1090. set_hw = 0;
  1091. baycom_device[i] = dev;
  1092. found++;
  1093. }
  1094. return found ? 0 : -ENXIO;
  1095. }
  1096. static void __exit cleanup_baycomepp(void)
  1097. {
  1098. int i;
  1099. for(i = 0; i < NR_PORTS; i++) {
  1100. struct net_device *dev = baycom_device[i];
  1101. if (dev) {
  1102. struct baycom_state *bc = netdev_priv(dev);
  1103. if (bc->magic == BAYCOM_MAGIC) {
  1104. unregister_netdev(dev);
  1105. free_netdev(dev);
  1106. } else
  1107. printk(paranoia_str, "cleanup_module");
  1108. }
  1109. }
  1110. }
  1111. module_init(init_baycomepp);
  1112. module_exit(cleanup_baycomepp);
  1113. /* --------------------------------------------------------------------- */
  1114. #ifndef MODULE
  1115. /*
  1116. * format: baycom_epp=io,mode
  1117. * mode: fpga config options
  1118. */
  1119. static int __init baycom_epp_setup(char *str)
  1120. {
  1121. static unsigned __initdata nr_dev = 0;
  1122. int ints[2];
  1123. if (nr_dev >= NR_PORTS)
  1124. return 0;
  1125. str = get_options(str, 2, ints);
  1126. if (ints[0] < 1)
  1127. return 0;
  1128. mode[nr_dev] = str;
  1129. iobase[nr_dev] = ints[1];
  1130. nr_dev++;
  1131. return 1;
  1132. }
  1133. __setup("baycom_epp=", baycom_epp_setup);
  1134. #endif /* MODULE */
  1135. /* --------------------------------------------------------------------- */