qede_main.c 57 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/module.h>
  33. #include <linux/pci.h>
  34. #include <linux/version.h>
  35. #include <linux/device.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/skbuff.h>
  39. #include <linux/errno.h>
  40. #include <linux/list.h>
  41. #include <linux/string.h>
  42. #include <linux/dma-mapping.h>
  43. #include <linux/interrupt.h>
  44. #include <asm/byteorder.h>
  45. #include <asm/param.h>
  46. #include <linux/io.h>
  47. #include <linux/netdev_features.h>
  48. #include <linux/udp.h>
  49. #include <linux/tcp.h>
  50. #include <net/udp_tunnel.h>
  51. #include <linux/ip.h>
  52. #include <net/ipv6.h>
  53. #include <net/tcp.h>
  54. #include <linux/if_ether.h>
  55. #include <linux/if_vlan.h>
  56. #include <linux/pkt_sched.h>
  57. #include <linux/ethtool.h>
  58. #include <linux/in.h>
  59. #include <linux/random.h>
  60. #include <net/ip6_checksum.h>
  61. #include <linux/bitops.h>
  62. #include <linux/vmalloc.h>
  63. #include "qede.h"
  64. #include "qede_ptp.h"
  65. static char version[] =
  66. "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
  67. MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
  68. MODULE_LICENSE("GPL");
  69. MODULE_VERSION(DRV_MODULE_VERSION);
  70. static uint debug;
  71. module_param(debug, uint, 0);
  72. MODULE_PARM_DESC(debug, " Default debug msglevel");
  73. static const struct qed_eth_ops *qed_ops;
  74. #define CHIP_NUM_57980S_40 0x1634
  75. #define CHIP_NUM_57980S_10 0x1666
  76. #define CHIP_NUM_57980S_MF 0x1636
  77. #define CHIP_NUM_57980S_100 0x1644
  78. #define CHIP_NUM_57980S_50 0x1654
  79. #define CHIP_NUM_57980S_25 0x1656
  80. #define CHIP_NUM_57980S_IOV 0x1664
  81. #define CHIP_NUM_AH 0x8070
  82. #define CHIP_NUM_AH_IOV 0x8090
  83. #ifndef PCI_DEVICE_ID_NX2_57980E
  84. #define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
  85. #define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
  86. #define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
  87. #define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
  88. #define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
  89. #define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
  90. #define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
  91. #define PCI_DEVICE_ID_AH CHIP_NUM_AH
  92. #define PCI_DEVICE_ID_AH_IOV CHIP_NUM_AH_IOV
  93. #endif
  94. enum qede_pci_private {
  95. QEDE_PRIVATE_PF,
  96. QEDE_PRIVATE_VF
  97. };
  98. static const struct pci_device_id qede_pci_tbl[] = {
  99. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
  100. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
  101. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
  102. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
  103. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
  104. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
  105. #ifdef CONFIG_QED_SRIOV
  106. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
  107. #endif
  108. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH), QEDE_PRIVATE_PF},
  109. #ifdef CONFIG_QED_SRIOV
  110. {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_AH_IOV), QEDE_PRIVATE_VF},
  111. #endif
  112. { 0 }
  113. };
  114. MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
  115. static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
  116. #define TX_TIMEOUT (5 * HZ)
  117. /* Utilize last protocol index for XDP */
  118. #define XDP_PI 11
  119. static void qede_remove(struct pci_dev *pdev);
  120. static void qede_shutdown(struct pci_dev *pdev);
  121. static void qede_link_update(void *dev, struct qed_link_output *link);
  122. /* The qede lock is used to protect driver state change and driver flows that
  123. * are not reentrant.
  124. */
  125. void __qede_lock(struct qede_dev *edev)
  126. {
  127. mutex_lock(&edev->qede_lock);
  128. }
  129. void __qede_unlock(struct qede_dev *edev)
  130. {
  131. mutex_unlock(&edev->qede_lock);
  132. }
  133. #ifdef CONFIG_QED_SRIOV
  134. static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos,
  135. __be16 vlan_proto)
  136. {
  137. struct qede_dev *edev = netdev_priv(ndev);
  138. if (vlan > 4095) {
  139. DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
  140. return -EINVAL;
  141. }
  142. if (vlan_proto != htons(ETH_P_8021Q))
  143. return -EPROTONOSUPPORT;
  144. DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
  145. vlan, vf);
  146. return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
  147. }
  148. static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
  149. {
  150. struct qede_dev *edev = netdev_priv(ndev);
  151. DP_VERBOSE(edev, QED_MSG_IOV,
  152. "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
  153. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
  154. if (!is_valid_ether_addr(mac)) {
  155. DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
  156. return -EINVAL;
  157. }
  158. return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
  159. }
  160. static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
  161. {
  162. struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
  163. struct qed_dev_info *qed_info = &edev->dev_info.common;
  164. struct qed_update_vport_params *vport_params;
  165. int rc;
  166. vport_params = vzalloc(sizeof(*vport_params));
  167. if (!vport_params)
  168. return -ENOMEM;
  169. DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
  170. rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
  171. /* Enable/Disable Tx switching for PF */
  172. if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
  173. qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
  174. vport_params->vport_id = 0;
  175. vport_params->update_tx_switching_flg = 1;
  176. vport_params->tx_switching_flg = num_vfs_param ? 1 : 0;
  177. edev->ops->vport_update(edev->cdev, vport_params);
  178. }
  179. vfree(vport_params);
  180. return rc;
  181. }
  182. #endif
  183. static struct pci_driver qede_pci_driver = {
  184. .name = "qede",
  185. .id_table = qede_pci_tbl,
  186. .probe = qede_probe,
  187. .remove = qede_remove,
  188. .shutdown = qede_shutdown,
  189. #ifdef CONFIG_QED_SRIOV
  190. .sriov_configure = qede_sriov_configure,
  191. #endif
  192. };
  193. static struct qed_eth_cb_ops qede_ll_ops = {
  194. {
  195. #ifdef CONFIG_RFS_ACCEL
  196. .arfs_filter_op = qede_arfs_filter_op,
  197. #endif
  198. .link_update = qede_link_update,
  199. },
  200. .force_mac = qede_force_mac,
  201. .ports_update = qede_udp_ports_update,
  202. };
  203. static int qede_netdev_event(struct notifier_block *this, unsigned long event,
  204. void *ptr)
  205. {
  206. struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
  207. struct ethtool_drvinfo drvinfo;
  208. struct qede_dev *edev;
  209. if (event != NETDEV_CHANGENAME && event != NETDEV_CHANGEADDR)
  210. goto done;
  211. /* Check whether this is a qede device */
  212. if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
  213. goto done;
  214. memset(&drvinfo, 0, sizeof(drvinfo));
  215. ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
  216. if (strcmp(drvinfo.driver, "qede"))
  217. goto done;
  218. edev = netdev_priv(ndev);
  219. switch (event) {
  220. case NETDEV_CHANGENAME:
  221. /* Notify qed of the name change */
  222. if (!edev->ops || !edev->ops->common)
  223. goto done;
  224. edev->ops->common->set_name(edev->cdev, edev->ndev->name);
  225. break;
  226. case NETDEV_CHANGEADDR:
  227. edev = netdev_priv(ndev);
  228. qede_rdma_event_changeaddr(edev);
  229. break;
  230. }
  231. done:
  232. return NOTIFY_DONE;
  233. }
  234. static struct notifier_block qede_netdev_notifier = {
  235. .notifier_call = qede_netdev_event,
  236. };
  237. static
  238. int __init qede_init(void)
  239. {
  240. int ret;
  241. pr_info("qede_init: %s\n", version);
  242. qed_ops = qed_get_eth_ops();
  243. if (!qed_ops) {
  244. pr_notice("Failed to get qed ethtool operations\n");
  245. return -EINVAL;
  246. }
  247. /* Must register notifier before pci ops, since we might miss
  248. * interface rename after pci probe and netdev registeration.
  249. */
  250. ret = register_netdevice_notifier(&qede_netdev_notifier);
  251. if (ret) {
  252. pr_notice("Failed to register netdevice_notifier\n");
  253. qed_put_eth_ops();
  254. return -EINVAL;
  255. }
  256. ret = pci_register_driver(&qede_pci_driver);
  257. if (ret) {
  258. pr_notice("Failed to register driver\n");
  259. unregister_netdevice_notifier(&qede_netdev_notifier);
  260. qed_put_eth_ops();
  261. return -EINVAL;
  262. }
  263. return 0;
  264. }
  265. static void __exit qede_cleanup(void)
  266. {
  267. if (debug & QED_LOG_INFO_MASK)
  268. pr_info("qede_cleanup called\n");
  269. unregister_netdevice_notifier(&qede_netdev_notifier);
  270. pci_unregister_driver(&qede_pci_driver);
  271. qed_put_eth_ops();
  272. }
  273. module_init(qede_init);
  274. module_exit(qede_cleanup);
  275. static int qede_open(struct net_device *ndev);
  276. static int qede_close(struct net_device *ndev);
  277. void qede_fill_by_demand_stats(struct qede_dev *edev)
  278. {
  279. struct qede_stats_common *p_common = &edev->stats.common;
  280. struct qed_eth_stats stats;
  281. edev->ops->get_vport_stats(edev->cdev, &stats);
  282. p_common->no_buff_discards = stats.common.no_buff_discards;
  283. p_common->packet_too_big_discard = stats.common.packet_too_big_discard;
  284. p_common->ttl0_discard = stats.common.ttl0_discard;
  285. p_common->rx_ucast_bytes = stats.common.rx_ucast_bytes;
  286. p_common->rx_mcast_bytes = stats.common.rx_mcast_bytes;
  287. p_common->rx_bcast_bytes = stats.common.rx_bcast_bytes;
  288. p_common->rx_ucast_pkts = stats.common.rx_ucast_pkts;
  289. p_common->rx_mcast_pkts = stats.common.rx_mcast_pkts;
  290. p_common->rx_bcast_pkts = stats.common.rx_bcast_pkts;
  291. p_common->mftag_filter_discards = stats.common.mftag_filter_discards;
  292. p_common->mac_filter_discards = stats.common.mac_filter_discards;
  293. p_common->tx_ucast_bytes = stats.common.tx_ucast_bytes;
  294. p_common->tx_mcast_bytes = stats.common.tx_mcast_bytes;
  295. p_common->tx_bcast_bytes = stats.common.tx_bcast_bytes;
  296. p_common->tx_ucast_pkts = stats.common.tx_ucast_pkts;
  297. p_common->tx_mcast_pkts = stats.common.tx_mcast_pkts;
  298. p_common->tx_bcast_pkts = stats.common.tx_bcast_pkts;
  299. p_common->tx_err_drop_pkts = stats.common.tx_err_drop_pkts;
  300. p_common->coalesced_pkts = stats.common.tpa_coalesced_pkts;
  301. p_common->coalesced_events = stats.common.tpa_coalesced_events;
  302. p_common->coalesced_aborts_num = stats.common.tpa_aborts_num;
  303. p_common->non_coalesced_pkts = stats.common.tpa_not_coalesced_pkts;
  304. p_common->coalesced_bytes = stats.common.tpa_coalesced_bytes;
  305. p_common->rx_64_byte_packets = stats.common.rx_64_byte_packets;
  306. p_common->rx_65_to_127_byte_packets =
  307. stats.common.rx_65_to_127_byte_packets;
  308. p_common->rx_128_to_255_byte_packets =
  309. stats.common.rx_128_to_255_byte_packets;
  310. p_common->rx_256_to_511_byte_packets =
  311. stats.common.rx_256_to_511_byte_packets;
  312. p_common->rx_512_to_1023_byte_packets =
  313. stats.common.rx_512_to_1023_byte_packets;
  314. p_common->rx_1024_to_1518_byte_packets =
  315. stats.common.rx_1024_to_1518_byte_packets;
  316. p_common->rx_crc_errors = stats.common.rx_crc_errors;
  317. p_common->rx_mac_crtl_frames = stats.common.rx_mac_crtl_frames;
  318. p_common->rx_pause_frames = stats.common.rx_pause_frames;
  319. p_common->rx_pfc_frames = stats.common.rx_pfc_frames;
  320. p_common->rx_align_errors = stats.common.rx_align_errors;
  321. p_common->rx_carrier_errors = stats.common.rx_carrier_errors;
  322. p_common->rx_oversize_packets = stats.common.rx_oversize_packets;
  323. p_common->rx_jabbers = stats.common.rx_jabbers;
  324. p_common->rx_undersize_packets = stats.common.rx_undersize_packets;
  325. p_common->rx_fragments = stats.common.rx_fragments;
  326. p_common->tx_64_byte_packets = stats.common.tx_64_byte_packets;
  327. p_common->tx_65_to_127_byte_packets =
  328. stats.common.tx_65_to_127_byte_packets;
  329. p_common->tx_128_to_255_byte_packets =
  330. stats.common.tx_128_to_255_byte_packets;
  331. p_common->tx_256_to_511_byte_packets =
  332. stats.common.tx_256_to_511_byte_packets;
  333. p_common->tx_512_to_1023_byte_packets =
  334. stats.common.tx_512_to_1023_byte_packets;
  335. p_common->tx_1024_to_1518_byte_packets =
  336. stats.common.tx_1024_to_1518_byte_packets;
  337. p_common->tx_pause_frames = stats.common.tx_pause_frames;
  338. p_common->tx_pfc_frames = stats.common.tx_pfc_frames;
  339. p_common->brb_truncates = stats.common.brb_truncates;
  340. p_common->brb_discards = stats.common.brb_discards;
  341. p_common->tx_mac_ctrl_frames = stats.common.tx_mac_ctrl_frames;
  342. if (QEDE_IS_BB(edev)) {
  343. struct qede_stats_bb *p_bb = &edev->stats.bb;
  344. p_bb->rx_1519_to_1522_byte_packets =
  345. stats.bb.rx_1519_to_1522_byte_packets;
  346. p_bb->rx_1519_to_2047_byte_packets =
  347. stats.bb.rx_1519_to_2047_byte_packets;
  348. p_bb->rx_2048_to_4095_byte_packets =
  349. stats.bb.rx_2048_to_4095_byte_packets;
  350. p_bb->rx_4096_to_9216_byte_packets =
  351. stats.bb.rx_4096_to_9216_byte_packets;
  352. p_bb->rx_9217_to_16383_byte_packets =
  353. stats.bb.rx_9217_to_16383_byte_packets;
  354. p_bb->tx_1519_to_2047_byte_packets =
  355. stats.bb.tx_1519_to_2047_byte_packets;
  356. p_bb->tx_2048_to_4095_byte_packets =
  357. stats.bb.tx_2048_to_4095_byte_packets;
  358. p_bb->tx_4096_to_9216_byte_packets =
  359. stats.bb.tx_4096_to_9216_byte_packets;
  360. p_bb->tx_9217_to_16383_byte_packets =
  361. stats.bb.tx_9217_to_16383_byte_packets;
  362. p_bb->tx_lpi_entry_count = stats.bb.tx_lpi_entry_count;
  363. p_bb->tx_total_collisions = stats.bb.tx_total_collisions;
  364. } else {
  365. struct qede_stats_ah *p_ah = &edev->stats.ah;
  366. p_ah->rx_1519_to_max_byte_packets =
  367. stats.ah.rx_1519_to_max_byte_packets;
  368. p_ah->tx_1519_to_max_byte_packets =
  369. stats.ah.tx_1519_to_max_byte_packets;
  370. }
  371. }
  372. static void qede_get_stats64(struct net_device *dev,
  373. struct rtnl_link_stats64 *stats)
  374. {
  375. struct qede_dev *edev = netdev_priv(dev);
  376. struct qede_stats_common *p_common;
  377. qede_fill_by_demand_stats(edev);
  378. p_common = &edev->stats.common;
  379. stats->rx_packets = p_common->rx_ucast_pkts + p_common->rx_mcast_pkts +
  380. p_common->rx_bcast_pkts;
  381. stats->tx_packets = p_common->tx_ucast_pkts + p_common->tx_mcast_pkts +
  382. p_common->tx_bcast_pkts;
  383. stats->rx_bytes = p_common->rx_ucast_bytes + p_common->rx_mcast_bytes +
  384. p_common->rx_bcast_bytes;
  385. stats->tx_bytes = p_common->tx_ucast_bytes + p_common->tx_mcast_bytes +
  386. p_common->tx_bcast_bytes;
  387. stats->tx_errors = p_common->tx_err_drop_pkts;
  388. stats->multicast = p_common->rx_mcast_pkts + p_common->rx_bcast_pkts;
  389. stats->rx_fifo_errors = p_common->no_buff_discards;
  390. if (QEDE_IS_BB(edev))
  391. stats->collisions = edev->stats.bb.tx_total_collisions;
  392. stats->rx_crc_errors = p_common->rx_crc_errors;
  393. stats->rx_frame_errors = p_common->rx_align_errors;
  394. }
  395. #ifdef CONFIG_QED_SRIOV
  396. static int qede_get_vf_config(struct net_device *dev, int vfidx,
  397. struct ifla_vf_info *ivi)
  398. {
  399. struct qede_dev *edev = netdev_priv(dev);
  400. if (!edev->ops)
  401. return -EINVAL;
  402. return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
  403. }
  404. static int qede_set_vf_rate(struct net_device *dev, int vfidx,
  405. int min_tx_rate, int max_tx_rate)
  406. {
  407. struct qede_dev *edev = netdev_priv(dev);
  408. return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
  409. max_tx_rate);
  410. }
  411. static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
  412. {
  413. struct qede_dev *edev = netdev_priv(dev);
  414. if (!edev->ops)
  415. return -EINVAL;
  416. return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
  417. }
  418. static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
  419. int link_state)
  420. {
  421. struct qede_dev *edev = netdev_priv(dev);
  422. if (!edev->ops)
  423. return -EINVAL;
  424. return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
  425. }
  426. static int qede_set_vf_trust(struct net_device *dev, int vfidx, bool setting)
  427. {
  428. struct qede_dev *edev = netdev_priv(dev);
  429. if (!edev->ops)
  430. return -EINVAL;
  431. return edev->ops->iov->set_trust(edev->cdev, vfidx, setting);
  432. }
  433. #endif
  434. static int qede_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  435. {
  436. struct qede_dev *edev = netdev_priv(dev);
  437. if (!netif_running(dev))
  438. return -EAGAIN;
  439. switch (cmd) {
  440. case SIOCSHWTSTAMP:
  441. return qede_ptp_hw_ts(edev, ifr);
  442. default:
  443. DP_VERBOSE(edev, QED_MSG_DEBUG,
  444. "default IOCTL cmd 0x%x\n", cmd);
  445. return -EOPNOTSUPP;
  446. }
  447. return 0;
  448. }
  449. static const struct net_device_ops qede_netdev_ops = {
  450. .ndo_open = qede_open,
  451. .ndo_stop = qede_close,
  452. .ndo_start_xmit = qede_start_xmit,
  453. .ndo_set_rx_mode = qede_set_rx_mode,
  454. .ndo_set_mac_address = qede_set_mac_addr,
  455. .ndo_validate_addr = eth_validate_addr,
  456. .ndo_change_mtu = qede_change_mtu,
  457. .ndo_do_ioctl = qede_ioctl,
  458. #ifdef CONFIG_QED_SRIOV
  459. .ndo_set_vf_mac = qede_set_vf_mac,
  460. .ndo_set_vf_vlan = qede_set_vf_vlan,
  461. .ndo_set_vf_trust = qede_set_vf_trust,
  462. #endif
  463. .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
  464. .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
  465. .ndo_set_features = qede_set_features,
  466. .ndo_get_stats64 = qede_get_stats64,
  467. #ifdef CONFIG_QED_SRIOV
  468. .ndo_set_vf_link_state = qede_set_vf_link_state,
  469. .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
  470. .ndo_get_vf_config = qede_get_vf_config,
  471. .ndo_set_vf_rate = qede_set_vf_rate,
  472. #endif
  473. .ndo_udp_tunnel_add = qede_udp_tunnel_add,
  474. .ndo_udp_tunnel_del = qede_udp_tunnel_del,
  475. .ndo_features_check = qede_features_check,
  476. .ndo_xdp = qede_xdp,
  477. #ifdef CONFIG_RFS_ACCEL
  478. .ndo_rx_flow_steer = qede_rx_flow_steer,
  479. #endif
  480. };
  481. static const struct net_device_ops qede_netdev_vf_ops = {
  482. .ndo_open = qede_open,
  483. .ndo_stop = qede_close,
  484. .ndo_start_xmit = qede_start_xmit,
  485. .ndo_set_rx_mode = qede_set_rx_mode,
  486. .ndo_set_mac_address = qede_set_mac_addr,
  487. .ndo_validate_addr = eth_validate_addr,
  488. .ndo_change_mtu = qede_change_mtu,
  489. .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
  490. .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
  491. .ndo_set_features = qede_set_features,
  492. .ndo_get_stats64 = qede_get_stats64,
  493. .ndo_udp_tunnel_add = qede_udp_tunnel_add,
  494. .ndo_udp_tunnel_del = qede_udp_tunnel_del,
  495. .ndo_features_check = qede_features_check,
  496. };
  497. static const struct net_device_ops qede_netdev_vf_xdp_ops = {
  498. .ndo_open = qede_open,
  499. .ndo_stop = qede_close,
  500. .ndo_start_xmit = qede_start_xmit,
  501. .ndo_set_rx_mode = qede_set_rx_mode,
  502. .ndo_set_mac_address = qede_set_mac_addr,
  503. .ndo_validate_addr = eth_validate_addr,
  504. .ndo_change_mtu = qede_change_mtu,
  505. .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
  506. .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
  507. .ndo_set_features = qede_set_features,
  508. .ndo_get_stats64 = qede_get_stats64,
  509. .ndo_udp_tunnel_add = qede_udp_tunnel_add,
  510. .ndo_udp_tunnel_del = qede_udp_tunnel_del,
  511. .ndo_features_check = qede_features_check,
  512. .ndo_xdp = qede_xdp,
  513. };
  514. /* -------------------------------------------------------------------------
  515. * START OF PROBE / REMOVE
  516. * -------------------------------------------------------------------------
  517. */
  518. static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
  519. struct pci_dev *pdev,
  520. struct qed_dev_eth_info *info,
  521. u32 dp_module, u8 dp_level)
  522. {
  523. struct net_device *ndev;
  524. struct qede_dev *edev;
  525. ndev = alloc_etherdev_mqs(sizeof(*edev),
  526. info->num_queues, info->num_queues);
  527. if (!ndev) {
  528. pr_err("etherdev allocation failed\n");
  529. return NULL;
  530. }
  531. edev = netdev_priv(ndev);
  532. edev->ndev = ndev;
  533. edev->cdev = cdev;
  534. edev->pdev = pdev;
  535. edev->dp_module = dp_module;
  536. edev->dp_level = dp_level;
  537. edev->ops = qed_ops;
  538. edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
  539. edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
  540. DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
  541. info->num_queues, info->num_queues);
  542. SET_NETDEV_DEV(ndev, &pdev->dev);
  543. memset(&edev->stats, 0, sizeof(edev->stats));
  544. memcpy(&edev->dev_info, info, sizeof(*info));
  545. /* As ethtool doesn't have the ability to show WoL behavior as
  546. * 'default', if device supports it declare it's enabled.
  547. */
  548. if (edev->dev_info.common.wol_support)
  549. edev->wol_enabled = true;
  550. INIT_LIST_HEAD(&edev->vlan_list);
  551. return edev;
  552. }
  553. static void qede_init_ndev(struct qede_dev *edev)
  554. {
  555. struct net_device *ndev = edev->ndev;
  556. struct pci_dev *pdev = edev->pdev;
  557. bool udp_tunnel_enable = false;
  558. netdev_features_t hw_features;
  559. pci_set_drvdata(pdev, ndev);
  560. ndev->mem_start = edev->dev_info.common.pci_mem_start;
  561. ndev->base_addr = ndev->mem_start;
  562. ndev->mem_end = edev->dev_info.common.pci_mem_end;
  563. ndev->irq = edev->dev_info.common.pci_irq;
  564. ndev->watchdog_timeo = TX_TIMEOUT;
  565. if (IS_VF(edev)) {
  566. if (edev->dev_info.xdp_supported)
  567. ndev->netdev_ops = &qede_netdev_vf_xdp_ops;
  568. else
  569. ndev->netdev_ops = &qede_netdev_vf_ops;
  570. } else {
  571. ndev->netdev_ops = &qede_netdev_ops;
  572. }
  573. qede_set_ethtool_ops(ndev);
  574. ndev->priv_flags |= IFF_UNICAST_FLT;
  575. /* user-changeble features */
  576. hw_features = NETIF_F_GRO | NETIF_F_SG |
  577. NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  578. NETIF_F_TSO | NETIF_F_TSO6;
  579. if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1)
  580. hw_features |= NETIF_F_NTUPLE;
  581. if (edev->dev_info.common.vxlan_enable ||
  582. edev->dev_info.common.geneve_enable)
  583. udp_tunnel_enable = true;
  584. if (udp_tunnel_enable || edev->dev_info.common.gre_enable) {
  585. hw_features |= NETIF_F_TSO_ECN;
  586. ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  587. NETIF_F_SG | NETIF_F_TSO |
  588. NETIF_F_TSO_ECN | NETIF_F_TSO6 |
  589. NETIF_F_RXCSUM;
  590. }
  591. if (udp_tunnel_enable) {
  592. hw_features |= (NETIF_F_GSO_UDP_TUNNEL |
  593. NETIF_F_GSO_UDP_TUNNEL_CSUM);
  594. ndev->hw_enc_features |= (NETIF_F_GSO_UDP_TUNNEL |
  595. NETIF_F_GSO_UDP_TUNNEL_CSUM);
  596. }
  597. if (edev->dev_info.common.gre_enable) {
  598. hw_features |= (NETIF_F_GSO_GRE | NETIF_F_GSO_GRE_CSUM);
  599. ndev->hw_enc_features |= (NETIF_F_GSO_GRE |
  600. NETIF_F_GSO_GRE_CSUM);
  601. }
  602. ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
  603. NETIF_F_HIGHDMA;
  604. ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
  605. NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
  606. NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
  607. ndev->hw_features = hw_features;
  608. /* MTU range: 46 - 9600 */
  609. ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
  610. ndev->max_mtu = QEDE_MAX_JUMBO_PACKET_SIZE;
  611. /* Set network device HW mac */
  612. ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
  613. ndev->mtu = edev->dev_info.common.mtu;
  614. }
  615. /* This function converts from 32b param to two params of level and module
  616. * Input 32b decoding:
  617. * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
  618. * 'happy' flow, e.g. memory allocation failed.
  619. * b30 - enable all INFO prints. INFO prints are for major steps in the flow
  620. * and provide important parameters.
  621. * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
  622. * module. VERBOSE prints are for tracking the specific flow in low level.
  623. *
  624. * Notice that the level should be that of the lowest required logs.
  625. */
  626. void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
  627. {
  628. *p_dp_level = QED_LEVEL_NOTICE;
  629. *p_dp_module = 0;
  630. if (debug & QED_LOG_VERBOSE_MASK) {
  631. *p_dp_level = QED_LEVEL_VERBOSE;
  632. *p_dp_module = (debug & 0x3FFFFFFF);
  633. } else if (debug & QED_LOG_INFO_MASK) {
  634. *p_dp_level = QED_LEVEL_INFO;
  635. } else if (debug & QED_LOG_NOTICE_MASK) {
  636. *p_dp_level = QED_LEVEL_NOTICE;
  637. }
  638. }
  639. static void qede_free_fp_array(struct qede_dev *edev)
  640. {
  641. if (edev->fp_array) {
  642. struct qede_fastpath *fp;
  643. int i;
  644. for_each_queue(i) {
  645. fp = &edev->fp_array[i];
  646. kfree(fp->sb_info);
  647. kfree(fp->rxq);
  648. kfree(fp->xdp_tx);
  649. kfree(fp->txq);
  650. }
  651. kfree(edev->fp_array);
  652. }
  653. edev->num_queues = 0;
  654. edev->fp_num_tx = 0;
  655. edev->fp_num_rx = 0;
  656. }
  657. static int qede_alloc_fp_array(struct qede_dev *edev)
  658. {
  659. u8 fp_combined, fp_rx = edev->fp_num_rx;
  660. struct qede_fastpath *fp;
  661. int i;
  662. edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
  663. sizeof(*edev->fp_array), GFP_KERNEL);
  664. if (!edev->fp_array) {
  665. DP_NOTICE(edev, "fp array allocation failed\n");
  666. goto err;
  667. }
  668. fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
  669. /* Allocate the FP elements for Rx queues followed by combined and then
  670. * the Tx. This ordering should be maintained so that the respective
  671. * queues (Rx or Tx) will be together in the fastpath array and the
  672. * associated ids will be sequential.
  673. */
  674. for_each_queue(i) {
  675. fp = &edev->fp_array[i];
  676. fp->sb_info = kzalloc(sizeof(*fp->sb_info), GFP_KERNEL);
  677. if (!fp->sb_info) {
  678. DP_NOTICE(edev, "sb info struct allocation failed\n");
  679. goto err;
  680. }
  681. if (fp_rx) {
  682. fp->type = QEDE_FASTPATH_RX;
  683. fp_rx--;
  684. } else if (fp_combined) {
  685. fp->type = QEDE_FASTPATH_COMBINED;
  686. fp_combined--;
  687. } else {
  688. fp->type = QEDE_FASTPATH_TX;
  689. }
  690. if (fp->type & QEDE_FASTPATH_TX) {
  691. fp->txq = kzalloc(sizeof(*fp->txq), GFP_KERNEL);
  692. if (!fp->txq)
  693. goto err;
  694. }
  695. if (fp->type & QEDE_FASTPATH_RX) {
  696. fp->rxq = kzalloc(sizeof(*fp->rxq), GFP_KERNEL);
  697. if (!fp->rxq)
  698. goto err;
  699. if (edev->xdp_prog) {
  700. fp->xdp_tx = kzalloc(sizeof(*fp->xdp_tx),
  701. GFP_KERNEL);
  702. if (!fp->xdp_tx)
  703. goto err;
  704. fp->type |= QEDE_FASTPATH_XDP;
  705. }
  706. }
  707. }
  708. return 0;
  709. err:
  710. qede_free_fp_array(edev);
  711. return -ENOMEM;
  712. }
  713. static void qede_sp_task(struct work_struct *work)
  714. {
  715. struct qede_dev *edev = container_of(work, struct qede_dev,
  716. sp_task.work);
  717. __qede_lock(edev);
  718. if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
  719. if (edev->state == QEDE_STATE_OPEN)
  720. qede_config_rx_mode(edev->ndev);
  721. #ifdef CONFIG_RFS_ACCEL
  722. if (test_and_clear_bit(QEDE_SP_ARFS_CONFIG, &edev->sp_flags)) {
  723. if (edev->state == QEDE_STATE_OPEN)
  724. qede_process_arfs_filters(edev, false);
  725. }
  726. #endif
  727. __qede_unlock(edev);
  728. }
  729. static void qede_update_pf_params(struct qed_dev *cdev)
  730. {
  731. struct qed_pf_params pf_params;
  732. /* 64 rx + 64 tx + 64 XDP */
  733. memset(&pf_params, 0, sizeof(struct qed_pf_params));
  734. pf_params.eth_pf_params.num_cons = (MAX_SB_PER_PF_MIMD - 1) * 3;
  735. /* Same for VFs - make sure they'll have sufficient connections
  736. * to support XDP Tx queues.
  737. */
  738. pf_params.eth_pf_params.num_vf_cons = 48;
  739. pf_params.eth_pf_params.num_arfs_filters = QEDE_RFS_MAX_FLTR;
  740. qed_ops->common->update_pf_params(cdev, &pf_params);
  741. }
  742. #define QEDE_FW_VER_STR_SIZE 80
  743. static void qede_log_probe(struct qede_dev *edev)
  744. {
  745. struct qed_dev_info *p_dev_info = &edev->dev_info.common;
  746. u8 buf[QEDE_FW_VER_STR_SIZE];
  747. size_t left_size;
  748. snprintf(buf, QEDE_FW_VER_STR_SIZE,
  749. "Storm FW %d.%d.%d.%d, Management FW %d.%d.%d.%d",
  750. p_dev_info->fw_major, p_dev_info->fw_minor, p_dev_info->fw_rev,
  751. p_dev_info->fw_eng,
  752. (p_dev_info->mfw_rev & QED_MFW_VERSION_3_MASK) >>
  753. QED_MFW_VERSION_3_OFFSET,
  754. (p_dev_info->mfw_rev & QED_MFW_VERSION_2_MASK) >>
  755. QED_MFW_VERSION_2_OFFSET,
  756. (p_dev_info->mfw_rev & QED_MFW_VERSION_1_MASK) >>
  757. QED_MFW_VERSION_1_OFFSET,
  758. (p_dev_info->mfw_rev & QED_MFW_VERSION_0_MASK) >>
  759. QED_MFW_VERSION_0_OFFSET);
  760. left_size = QEDE_FW_VER_STR_SIZE - strlen(buf);
  761. if (p_dev_info->mbi_version && left_size)
  762. snprintf(buf + strlen(buf), left_size,
  763. " [MBI %d.%d.%d]",
  764. (p_dev_info->mbi_version & QED_MBI_VERSION_2_MASK) >>
  765. QED_MBI_VERSION_2_OFFSET,
  766. (p_dev_info->mbi_version & QED_MBI_VERSION_1_MASK) >>
  767. QED_MBI_VERSION_1_OFFSET,
  768. (p_dev_info->mbi_version & QED_MBI_VERSION_0_MASK) >>
  769. QED_MBI_VERSION_0_OFFSET);
  770. pr_info("qede %02x:%02x.%02x: %s [%s]\n", edev->pdev->bus->number,
  771. PCI_SLOT(edev->pdev->devfn), PCI_FUNC(edev->pdev->devfn),
  772. buf, edev->ndev->name);
  773. }
  774. enum qede_probe_mode {
  775. QEDE_PROBE_NORMAL,
  776. };
  777. static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
  778. bool is_vf, enum qede_probe_mode mode)
  779. {
  780. struct qed_probe_params probe_params;
  781. struct qed_slowpath_params sp_params;
  782. struct qed_dev_eth_info dev_info;
  783. struct qede_dev *edev;
  784. struct qed_dev *cdev;
  785. int rc;
  786. if (unlikely(dp_level & QED_LEVEL_INFO))
  787. pr_notice("Starting qede probe\n");
  788. memset(&probe_params, 0, sizeof(probe_params));
  789. probe_params.protocol = QED_PROTOCOL_ETH;
  790. probe_params.dp_module = dp_module;
  791. probe_params.dp_level = dp_level;
  792. probe_params.is_vf = is_vf;
  793. cdev = qed_ops->common->probe(pdev, &probe_params);
  794. if (!cdev) {
  795. rc = -ENODEV;
  796. goto err0;
  797. }
  798. qede_update_pf_params(cdev);
  799. /* Start the Slowpath-process */
  800. memset(&sp_params, 0, sizeof(sp_params));
  801. sp_params.int_mode = QED_INT_MODE_MSIX;
  802. sp_params.drv_major = QEDE_MAJOR_VERSION;
  803. sp_params.drv_minor = QEDE_MINOR_VERSION;
  804. sp_params.drv_rev = QEDE_REVISION_VERSION;
  805. sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
  806. strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
  807. rc = qed_ops->common->slowpath_start(cdev, &sp_params);
  808. if (rc) {
  809. pr_notice("Cannot start slowpath\n");
  810. goto err1;
  811. }
  812. /* Learn information crucial for qede to progress */
  813. rc = qed_ops->fill_dev_info(cdev, &dev_info);
  814. if (rc)
  815. goto err2;
  816. edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
  817. dp_level);
  818. if (!edev) {
  819. rc = -ENOMEM;
  820. goto err2;
  821. }
  822. if (is_vf)
  823. edev->flags |= QEDE_FLAG_IS_VF;
  824. qede_init_ndev(edev);
  825. rc = qede_rdma_dev_add(edev);
  826. if (rc)
  827. goto err3;
  828. /* Prepare the lock prior to the registeration of the netdev,
  829. * as once it's registered we might reach flows requiring it
  830. * [it's even possible to reach a flow needing it directly
  831. * from there, although it's unlikely].
  832. */
  833. INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
  834. mutex_init(&edev->qede_lock);
  835. rc = register_netdev(edev->ndev);
  836. if (rc) {
  837. DP_NOTICE(edev, "Cannot register net-device\n");
  838. goto err4;
  839. }
  840. edev->ops->common->set_name(cdev, edev->ndev->name);
  841. /* PTP not supported on VFs */
  842. if (!is_vf)
  843. qede_ptp_enable(edev, true);
  844. edev->ops->register_ops(cdev, &qede_ll_ops, edev);
  845. #ifdef CONFIG_DCB
  846. if (!IS_VF(edev))
  847. qede_set_dcbnl_ops(edev->ndev);
  848. #endif
  849. edev->rx_copybreak = QEDE_RX_HDR_SIZE;
  850. qede_log_probe(edev);
  851. return 0;
  852. err4:
  853. qede_rdma_dev_remove(edev);
  854. err3:
  855. free_netdev(edev->ndev);
  856. err2:
  857. qed_ops->common->slowpath_stop(cdev);
  858. err1:
  859. qed_ops->common->remove(cdev);
  860. err0:
  861. return rc;
  862. }
  863. static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  864. {
  865. bool is_vf = false;
  866. u32 dp_module = 0;
  867. u8 dp_level = 0;
  868. switch ((enum qede_pci_private)id->driver_data) {
  869. case QEDE_PRIVATE_VF:
  870. if (debug & QED_LOG_VERBOSE_MASK)
  871. dev_err(&pdev->dev, "Probing a VF\n");
  872. is_vf = true;
  873. break;
  874. default:
  875. if (debug & QED_LOG_VERBOSE_MASK)
  876. dev_err(&pdev->dev, "Probing a PF\n");
  877. }
  878. qede_config_debug(debug, &dp_module, &dp_level);
  879. return __qede_probe(pdev, dp_module, dp_level, is_vf,
  880. QEDE_PROBE_NORMAL);
  881. }
  882. enum qede_remove_mode {
  883. QEDE_REMOVE_NORMAL,
  884. };
  885. static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
  886. {
  887. struct net_device *ndev = pci_get_drvdata(pdev);
  888. struct qede_dev *edev = netdev_priv(ndev);
  889. struct qed_dev *cdev = edev->cdev;
  890. DP_INFO(edev, "Starting qede_remove\n");
  891. unregister_netdev(ndev);
  892. cancel_delayed_work_sync(&edev->sp_task);
  893. qede_ptp_disable(edev);
  894. qede_rdma_dev_remove(edev);
  895. edev->ops->common->set_power_state(cdev, PCI_D0);
  896. pci_set_drvdata(pdev, NULL);
  897. /* Release edev's reference to XDP's bpf if such exist */
  898. if (edev->xdp_prog)
  899. bpf_prog_put(edev->xdp_prog);
  900. /* Use global ops since we've freed edev */
  901. qed_ops->common->slowpath_stop(cdev);
  902. if (system_state == SYSTEM_POWER_OFF)
  903. return;
  904. qed_ops->common->remove(cdev);
  905. /* Since this can happen out-of-sync with other flows,
  906. * don't release the netdevice until after slowpath stop
  907. * has been called to guarantee various other contexts
  908. * [e.g., QED register callbacks] won't break anything when
  909. * accessing the netdevice.
  910. */
  911. free_netdev(ndev);
  912. dev_info(&pdev->dev, "Ending qede_remove successfully\n");
  913. }
  914. static void qede_remove(struct pci_dev *pdev)
  915. {
  916. __qede_remove(pdev, QEDE_REMOVE_NORMAL);
  917. }
  918. static void qede_shutdown(struct pci_dev *pdev)
  919. {
  920. __qede_remove(pdev, QEDE_REMOVE_NORMAL);
  921. }
  922. /* -------------------------------------------------------------------------
  923. * START OF LOAD / UNLOAD
  924. * -------------------------------------------------------------------------
  925. */
  926. static int qede_set_num_queues(struct qede_dev *edev)
  927. {
  928. int rc;
  929. u16 rss_num;
  930. /* Setup queues according to possible resources*/
  931. if (edev->req_queues)
  932. rss_num = edev->req_queues;
  933. else
  934. rss_num = netif_get_num_default_rss_queues() *
  935. edev->dev_info.common.num_hwfns;
  936. rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
  937. rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
  938. if (rc > 0) {
  939. /* Managed to request interrupts for our queues */
  940. edev->num_queues = rc;
  941. DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
  942. QEDE_QUEUE_CNT(edev), rss_num);
  943. rc = 0;
  944. }
  945. edev->fp_num_tx = edev->req_num_tx;
  946. edev->fp_num_rx = edev->req_num_rx;
  947. return rc;
  948. }
  949. static void qede_free_mem_sb(struct qede_dev *edev, struct qed_sb_info *sb_info,
  950. u16 sb_id)
  951. {
  952. if (sb_info->sb_virt) {
  953. edev->ops->common->sb_release(edev->cdev, sb_info, sb_id);
  954. dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
  955. (void *)sb_info->sb_virt, sb_info->sb_phys);
  956. memset(sb_info, 0, sizeof(*sb_info));
  957. }
  958. }
  959. /* This function allocates fast-path status block memory */
  960. static int qede_alloc_mem_sb(struct qede_dev *edev,
  961. struct qed_sb_info *sb_info, u16 sb_id)
  962. {
  963. struct status_block *sb_virt;
  964. dma_addr_t sb_phys;
  965. int rc;
  966. sb_virt = dma_alloc_coherent(&edev->pdev->dev,
  967. sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
  968. if (!sb_virt) {
  969. DP_ERR(edev, "Status block allocation failed\n");
  970. return -ENOMEM;
  971. }
  972. rc = edev->ops->common->sb_init(edev->cdev, sb_info,
  973. sb_virt, sb_phys, sb_id,
  974. QED_SB_TYPE_L2_QUEUE);
  975. if (rc) {
  976. DP_ERR(edev, "Status block initialization failed\n");
  977. dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
  978. sb_virt, sb_phys);
  979. return rc;
  980. }
  981. return 0;
  982. }
  983. static void qede_free_rx_buffers(struct qede_dev *edev,
  984. struct qede_rx_queue *rxq)
  985. {
  986. u16 i;
  987. for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
  988. struct sw_rx_data *rx_buf;
  989. struct page *data;
  990. rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
  991. data = rx_buf->data;
  992. dma_unmap_page(&edev->pdev->dev,
  993. rx_buf->mapping, PAGE_SIZE, rxq->data_direction);
  994. rx_buf->data = NULL;
  995. __free_page(data);
  996. }
  997. }
  998. static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
  999. {
  1000. int i;
  1001. if (edev->gro_disable)
  1002. return;
  1003. for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
  1004. struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
  1005. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  1006. if (replace_buf->data) {
  1007. dma_unmap_page(&edev->pdev->dev,
  1008. replace_buf->mapping,
  1009. PAGE_SIZE, DMA_FROM_DEVICE);
  1010. __free_page(replace_buf->data);
  1011. }
  1012. }
  1013. }
  1014. static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
  1015. {
  1016. qede_free_sge_mem(edev, rxq);
  1017. /* Free rx buffers */
  1018. qede_free_rx_buffers(edev, rxq);
  1019. /* Free the parallel SW ring */
  1020. kfree(rxq->sw_rx_ring);
  1021. /* Free the real RQ ring used by FW */
  1022. edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
  1023. edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
  1024. }
  1025. static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
  1026. {
  1027. dma_addr_t mapping;
  1028. int i;
  1029. /* Don't perform FW aggregations in case of XDP */
  1030. if (edev->xdp_prog)
  1031. edev->gro_disable = 1;
  1032. if (edev->gro_disable)
  1033. return 0;
  1034. if (edev->ndev->mtu > PAGE_SIZE) {
  1035. edev->gro_disable = 1;
  1036. return 0;
  1037. }
  1038. for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
  1039. struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
  1040. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  1041. replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
  1042. if (unlikely(!replace_buf->data)) {
  1043. DP_NOTICE(edev,
  1044. "Failed to allocate TPA skb pool [replacement buffer]\n");
  1045. goto err;
  1046. }
  1047. mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
  1048. PAGE_SIZE, DMA_FROM_DEVICE);
  1049. if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
  1050. DP_NOTICE(edev,
  1051. "Failed to map TPA replacement buffer\n");
  1052. goto err;
  1053. }
  1054. replace_buf->mapping = mapping;
  1055. tpa_info->buffer.page_offset = 0;
  1056. tpa_info->buffer_mapping = mapping;
  1057. tpa_info->state = QEDE_AGG_STATE_NONE;
  1058. }
  1059. return 0;
  1060. err:
  1061. qede_free_sge_mem(edev, rxq);
  1062. edev->gro_disable = 1;
  1063. return -ENOMEM;
  1064. }
  1065. /* This function allocates all memory needed per Rx queue */
  1066. static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
  1067. {
  1068. int i, rc, size;
  1069. rxq->num_rx_buffers = edev->q_num_rx_buffers;
  1070. rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
  1071. rxq->rx_headroom = edev->xdp_prog ? XDP_PACKET_HEADROOM : 0;
  1072. /* Make sure that the headroom and payload fit in a single page */
  1073. if (rxq->rx_buf_size + rxq->rx_headroom > PAGE_SIZE)
  1074. rxq->rx_buf_size = PAGE_SIZE - rxq->rx_headroom;
  1075. /* Segment size to spilt a page in multiple equal parts,
  1076. * unless XDP is used in which case we'd use the entire page.
  1077. */
  1078. if (!edev->xdp_prog)
  1079. rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
  1080. else
  1081. rxq->rx_buf_seg_size = PAGE_SIZE;
  1082. /* Allocate the parallel driver ring for Rx buffers */
  1083. size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
  1084. rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
  1085. if (!rxq->sw_rx_ring) {
  1086. DP_ERR(edev, "Rx buffers ring allocation failed\n");
  1087. rc = -ENOMEM;
  1088. goto err;
  1089. }
  1090. /* Allocate FW Rx ring */
  1091. rc = edev->ops->common->chain_alloc(edev->cdev,
  1092. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  1093. QED_CHAIN_MODE_NEXT_PTR,
  1094. QED_CHAIN_CNT_TYPE_U16,
  1095. RX_RING_SIZE,
  1096. sizeof(struct eth_rx_bd),
  1097. &rxq->rx_bd_ring, NULL);
  1098. if (rc)
  1099. goto err;
  1100. /* Allocate FW completion ring */
  1101. rc = edev->ops->common->chain_alloc(edev->cdev,
  1102. QED_CHAIN_USE_TO_CONSUME,
  1103. QED_CHAIN_MODE_PBL,
  1104. QED_CHAIN_CNT_TYPE_U16,
  1105. RX_RING_SIZE,
  1106. sizeof(union eth_rx_cqe),
  1107. &rxq->rx_comp_ring, NULL);
  1108. if (rc)
  1109. goto err;
  1110. /* Allocate buffers for the Rx ring */
  1111. rxq->filled_buffers = 0;
  1112. for (i = 0; i < rxq->num_rx_buffers; i++) {
  1113. rc = qede_alloc_rx_buffer(rxq, false);
  1114. if (rc) {
  1115. DP_ERR(edev,
  1116. "Rx buffers allocation failed at index %d\n", i);
  1117. goto err;
  1118. }
  1119. }
  1120. rc = qede_alloc_sge_mem(edev, rxq);
  1121. err:
  1122. return rc;
  1123. }
  1124. static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
  1125. {
  1126. /* Free the parallel SW ring */
  1127. if (txq->is_xdp)
  1128. kfree(txq->sw_tx_ring.xdp);
  1129. else
  1130. kfree(txq->sw_tx_ring.skbs);
  1131. /* Free the real RQ ring used by FW */
  1132. edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
  1133. }
  1134. /* This function allocates all memory needed per Tx queue */
  1135. static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
  1136. {
  1137. union eth_tx_bd_types *p_virt;
  1138. int size, rc;
  1139. txq->num_tx_buffers = edev->q_num_tx_buffers;
  1140. /* Allocate the parallel driver ring for Tx buffers */
  1141. if (txq->is_xdp) {
  1142. size = sizeof(*txq->sw_tx_ring.xdp) * txq->num_tx_buffers;
  1143. txq->sw_tx_ring.xdp = kzalloc(size, GFP_KERNEL);
  1144. if (!txq->sw_tx_ring.xdp)
  1145. goto err;
  1146. } else {
  1147. size = sizeof(*txq->sw_tx_ring.skbs) * txq->num_tx_buffers;
  1148. txq->sw_tx_ring.skbs = kzalloc(size, GFP_KERNEL);
  1149. if (!txq->sw_tx_ring.skbs)
  1150. goto err;
  1151. }
  1152. rc = edev->ops->common->chain_alloc(edev->cdev,
  1153. QED_CHAIN_USE_TO_CONSUME_PRODUCE,
  1154. QED_CHAIN_MODE_PBL,
  1155. QED_CHAIN_CNT_TYPE_U16,
  1156. txq->num_tx_buffers,
  1157. sizeof(*p_virt),
  1158. &txq->tx_pbl, NULL);
  1159. if (rc)
  1160. goto err;
  1161. return 0;
  1162. err:
  1163. qede_free_mem_txq(edev, txq);
  1164. return -ENOMEM;
  1165. }
  1166. /* This function frees all memory of a single fp */
  1167. static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
  1168. {
  1169. qede_free_mem_sb(edev, fp->sb_info, fp->id);
  1170. if (fp->type & QEDE_FASTPATH_RX)
  1171. qede_free_mem_rxq(edev, fp->rxq);
  1172. if (fp->type & QEDE_FASTPATH_XDP)
  1173. qede_free_mem_txq(edev, fp->xdp_tx);
  1174. if (fp->type & QEDE_FASTPATH_TX)
  1175. qede_free_mem_txq(edev, fp->txq);
  1176. }
  1177. /* This function allocates all memory needed for a single fp (i.e. an entity
  1178. * which contains status block, one rx queue and/or multiple per-TC tx queues.
  1179. */
  1180. static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
  1181. {
  1182. int rc = 0;
  1183. rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
  1184. if (rc)
  1185. goto out;
  1186. if (fp->type & QEDE_FASTPATH_RX) {
  1187. rc = qede_alloc_mem_rxq(edev, fp->rxq);
  1188. if (rc)
  1189. goto out;
  1190. }
  1191. if (fp->type & QEDE_FASTPATH_XDP) {
  1192. rc = qede_alloc_mem_txq(edev, fp->xdp_tx);
  1193. if (rc)
  1194. goto out;
  1195. }
  1196. if (fp->type & QEDE_FASTPATH_TX) {
  1197. rc = qede_alloc_mem_txq(edev, fp->txq);
  1198. if (rc)
  1199. goto out;
  1200. }
  1201. out:
  1202. return rc;
  1203. }
  1204. static void qede_free_mem_load(struct qede_dev *edev)
  1205. {
  1206. int i;
  1207. for_each_queue(i) {
  1208. struct qede_fastpath *fp = &edev->fp_array[i];
  1209. qede_free_mem_fp(edev, fp);
  1210. }
  1211. }
  1212. /* This function allocates all qede memory at NIC load. */
  1213. static int qede_alloc_mem_load(struct qede_dev *edev)
  1214. {
  1215. int rc = 0, queue_id;
  1216. for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
  1217. struct qede_fastpath *fp = &edev->fp_array[queue_id];
  1218. rc = qede_alloc_mem_fp(edev, fp);
  1219. if (rc) {
  1220. DP_ERR(edev,
  1221. "Failed to allocate memory for fastpath - rss id = %d\n",
  1222. queue_id);
  1223. qede_free_mem_load(edev);
  1224. return rc;
  1225. }
  1226. }
  1227. return 0;
  1228. }
  1229. /* This function inits fp content and resets the SB, RXQ and TXQ structures */
  1230. static void qede_init_fp(struct qede_dev *edev)
  1231. {
  1232. int queue_id, rxq_index = 0, txq_index = 0;
  1233. struct qede_fastpath *fp;
  1234. for_each_queue(queue_id) {
  1235. fp = &edev->fp_array[queue_id];
  1236. fp->edev = edev;
  1237. fp->id = queue_id;
  1238. if (fp->type & QEDE_FASTPATH_XDP) {
  1239. fp->xdp_tx->index = QEDE_TXQ_IDX_TO_XDP(edev,
  1240. rxq_index);
  1241. fp->xdp_tx->is_xdp = 1;
  1242. }
  1243. if (fp->type & QEDE_FASTPATH_RX) {
  1244. fp->rxq->rxq_id = rxq_index++;
  1245. /* Determine how to map buffers for this queue */
  1246. if (fp->type & QEDE_FASTPATH_XDP)
  1247. fp->rxq->data_direction = DMA_BIDIRECTIONAL;
  1248. else
  1249. fp->rxq->data_direction = DMA_FROM_DEVICE;
  1250. fp->rxq->dev = &edev->pdev->dev;
  1251. }
  1252. if (fp->type & QEDE_FASTPATH_TX) {
  1253. fp->txq->index = txq_index++;
  1254. if (edev->dev_info.is_legacy)
  1255. fp->txq->is_legacy = 1;
  1256. fp->txq->dev = &edev->pdev->dev;
  1257. }
  1258. snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
  1259. edev->ndev->name, queue_id);
  1260. }
  1261. edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
  1262. }
  1263. static int qede_set_real_num_queues(struct qede_dev *edev)
  1264. {
  1265. int rc = 0;
  1266. rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev));
  1267. if (rc) {
  1268. DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
  1269. return rc;
  1270. }
  1271. rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
  1272. if (rc) {
  1273. DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
  1274. return rc;
  1275. }
  1276. return 0;
  1277. }
  1278. static void qede_napi_disable_remove(struct qede_dev *edev)
  1279. {
  1280. int i;
  1281. for_each_queue(i) {
  1282. napi_disable(&edev->fp_array[i].napi);
  1283. netif_napi_del(&edev->fp_array[i].napi);
  1284. }
  1285. }
  1286. static void qede_napi_add_enable(struct qede_dev *edev)
  1287. {
  1288. int i;
  1289. /* Add NAPI objects */
  1290. for_each_queue(i) {
  1291. netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
  1292. qede_poll, NAPI_POLL_WEIGHT);
  1293. napi_enable(&edev->fp_array[i].napi);
  1294. }
  1295. }
  1296. static void qede_sync_free_irqs(struct qede_dev *edev)
  1297. {
  1298. int i;
  1299. for (i = 0; i < edev->int_info.used_cnt; i++) {
  1300. if (edev->int_info.msix_cnt) {
  1301. synchronize_irq(edev->int_info.msix[i].vector);
  1302. free_irq(edev->int_info.msix[i].vector,
  1303. &edev->fp_array[i]);
  1304. } else {
  1305. edev->ops->common->simd_handler_clean(edev->cdev, i);
  1306. }
  1307. }
  1308. edev->int_info.used_cnt = 0;
  1309. }
  1310. static int qede_req_msix_irqs(struct qede_dev *edev)
  1311. {
  1312. int i, rc;
  1313. /* Sanitize number of interrupts == number of prepared RSS queues */
  1314. if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
  1315. DP_ERR(edev,
  1316. "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
  1317. QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
  1318. return -EINVAL;
  1319. }
  1320. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  1321. #ifdef CONFIG_RFS_ACCEL
  1322. struct qede_fastpath *fp = &edev->fp_array[i];
  1323. if (edev->ndev->rx_cpu_rmap && (fp->type & QEDE_FASTPATH_RX)) {
  1324. rc = irq_cpu_rmap_add(edev->ndev->rx_cpu_rmap,
  1325. edev->int_info.msix[i].vector);
  1326. if (rc) {
  1327. DP_ERR(edev, "Failed to add CPU rmap\n");
  1328. qede_free_arfs(edev);
  1329. }
  1330. }
  1331. #endif
  1332. rc = request_irq(edev->int_info.msix[i].vector,
  1333. qede_msix_fp_int, 0, edev->fp_array[i].name,
  1334. &edev->fp_array[i]);
  1335. if (rc) {
  1336. DP_ERR(edev, "Request fp %d irq failed\n", i);
  1337. qede_sync_free_irqs(edev);
  1338. return rc;
  1339. }
  1340. DP_VERBOSE(edev, NETIF_MSG_INTR,
  1341. "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
  1342. edev->fp_array[i].name, i,
  1343. &edev->fp_array[i]);
  1344. edev->int_info.used_cnt++;
  1345. }
  1346. return 0;
  1347. }
  1348. static void qede_simd_fp_handler(void *cookie)
  1349. {
  1350. struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
  1351. napi_schedule_irqoff(&fp->napi);
  1352. }
  1353. static int qede_setup_irqs(struct qede_dev *edev)
  1354. {
  1355. int i, rc = 0;
  1356. /* Learn Interrupt configuration */
  1357. rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
  1358. if (rc)
  1359. return rc;
  1360. if (edev->int_info.msix_cnt) {
  1361. rc = qede_req_msix_irqs(edev);
  1362. if (rc)
  1363. return rc;
  1364. edev->ndev->irq = edev->int_info.msix[0].vector;
  1365. } else {
  1366. const struct qed_common_ops *ops;
  1367. /* qed should learn receive the RSS ids and callbacks */
  1368. ops = edev->ops->common;
  1369. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
  1370. ops->simd_handler_config(edev->cdev,
  1371. &edev->fp_array[i], i,
  1372. qede_simd_fp_handler);
  1373. edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
  1374. }
  1375. return 0;
  1376. }
  1377. static int qede_drain_txq(struct qede_dev *edev,
  1378. struct qede_tx_queue *txq, bool allow_drain)
  1379. {
  1380. int rc, cnt = 1000;
  1381. while (txq->sw_tx_cons != txq->sw_tx_prod) {
  1382. if (!cnt) {
  1383. if (allow_drain) {
  1384. DP_NOTICE(edev,
  1385. "Tx queue[%d] is stuck, requesting MCP to drain\n",
  1386. txq->index);
  1387. rc = edev->ops->common->drain(edev->cdev);
  1388. if (rc)
  1389. return rc;
  1390. return qede_drain_txq(edev, txq, false);
  1391. }
  1392. DP_NOTICE(edev,
  1393. "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
  1394. txq->index, txq->sw_tx_prod,
  1395. txq->sw_tx_cons);
  1396. return -ENODEV;
  1397. }
  1398. cnt--;
  1399. usleep_range(1000, 2000);
  1400. barrier();
  1401. }
  1402. /* FW finished processing, wait for HW to transmit all tx packets */
  1403. usleep_range(1000, 2000);
  1404. return 0;
  1405. }
  1406. static int qede_stop_txq(struct qede_dev *edev,
  1407. struct qede_tx_queue *txq, int rss_id)
  1408. {
  1409. return edev->ops->q_tx_stop(edev->cdev, rss_id, txq->handle);
  1410. }
  1411. static int qede_stop_queues(struct qede_dev *edev)
  1412. {
  1413. struct qed_update_vport_params *vport_update_params;
  1414. struct qed_dev *cdev = edev->cdev;
  1415. struct qede_fastpath *fp;
  1416. int rc, i;
  1417. /* Disable the vport */
  1418. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1419. if (!vport_update_params)
  1420. return -ENOMEM;
  1421. vport_update_params->vport_id = 0;
  1422. vport_update_params->update_vport_active_flg = 1;
  1423. vport_update_params->vport_active_flg = 0;
  1424. vport_update_params->update_rss_flg = 0;
  1425. rc = edev->ops->vport_update(cdev, vport_update_params);
  1426. vfree(vport_update_params);
  1427. if (rc) {
  1428. DP_ERR(edev, "Failed to update vport\n");
  1429. return rc;
  1430. }
  1431. /* Flush Tx queues. If needed, request drain from MCP */
  1432. for_each_queue(i) {
  1433. fp = &edev->fp_array[i];
  1434. if (fp->type & QEDE_FASTPATH_TX) {
  1435. rc = qede_drain_txq(edev, fp->txq, true);
  1436. if (rc)
  1437. return rc;
  1438. }
  1439. if (fp->type & QEDE_FASTPATH_XDP) {
  1440. rc = qede_drain_txq(edev, fp->xdp_tx, true);
  1441. if (rc)
  1442. return rc;
  1443. }
  1444. }
  1445. /* Stop all Queues in reverse order */
  1446. for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
  1447. fp = &edev->fp_array[i];
  1448. /* Stop the Tx Queue(s) */
  1449. if (fp->type & QEDE_FASTPATH_TX) {
  1450. rc = qede_stop_txq(edev, fp->txq, i);
  1451. if (rc)
  1452. return rc;
  1453. }
  1454. /* Stop the Rx Queue */
  1455. if (fp->type & QEDE_FASTPATH_RX) {
  1456. rc = edev->ops->q_rx_stop(cdev, i, fp->rxq->handle);
  1457. if (rc) {
  1458. DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
  1459. return rc;
  1460. }
  1461. }
  1462. /* Stop the XDP forwarding queue */
  1463. if (fp->type & QEDE_FASTPATH_XDP) {
  1464. rc = qede_stop_txq(edev, fp->xdp_tx, i);
  1465. if (rc)
  1466. return rc;
  1467. bpf_prog_put(fp->rxq->xdp_prog);
  1468. }
  1469. }
  1470. /* Stop the vport */
  1471. rc = edev->ops->vport_stop(cdev, 0);
  1472. if (rc)
  1473. DP_ERR(edev, "Failed to stop VPORT\n");
  1474. return rc;
  1475. }
  1476. static int qede_start_txq(struct qede_dev *edev,
  1477. struct qede_fastpath *fp,
  1478. struct qede_tx_queue *txq, u8 rss_id, u16 sb_idx)
  1479. {
  1480. dma_addr_t phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
  1481. u32 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
  1482. struct qed_queue_start_common_params params;
  1483. struct qed_txq_start_ret_params ret_params;
  1484. int rc;
  1485. memset(&params, 0, sizeof(params));
  1486. memset(&ret_params, 0, sizeof(ret_params));
  1487. /* Let the XDP queue share the queue-zone with one of the regular txq.
  1488. * We don't really care about its coalescing.
  1489. */
  1490. if (txq->is_xdp)
  1491. params.queue_id = QEDE_TXQ_XDP_TO_IDX(edev, txq);
  1492. else
  1493. params.queue_id = txq->index;
  1494. params.p_sb = fp->sb_info;
  1495. params.sb_idx = sb_idx;
  1496. rc = edev->ops->q_tx_start(edev->cdev, rss_id, &params, phys_table,
  1497. page_cnt, &ret_params);
  1498. if (rc) {
  1499. DP_ERR(edev, "Start TXQ #%d failed %d\n", txq->index, rc);
  1500. return rc;
  1501. }
  1502. txq->doorbell_addr = ret_params.p_doorbell;
  1503. txq->handle = ret_params.p_handle;
  1504. /* Determine the FW consumer address associated */
  1505. txq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[sb_idx];
  1506. /* Prepare the doorbell parameters */
  1507. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_DEST, DB_DEST_XCM);
  1508. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
  1509. SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_VAL_SEL,
  1510. DQ_XCM_ETH_TX_BD_PROD_CMD);
  1511. txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
  1512. return rc;
  1513. }
  1514. static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
  1515. {
  1516. int vlan_removal_en = 1;
  1517. struct qed_dev *cdev = edev->cdev;
  1518. struct qed_dev_info *qed_info = &edev->dev_info.common;
  1519. struct qed_update_vport_params *vport_update_params;
  1520. struct qed_queue_start_common_params q_params;
  1521. struct qed_start_vport_params start = {0};
  1522. int rc, i;
  1523. if (!edev->num_queues) {
  1524. DP_ERR(edev,
  1525. "Cannot update V-VPORT as active as there are no Rx queues\n");
  1526. return -EINVAL;
  1527. }
  1528. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1529. if (!vport_update_params)
  1530. return -ENOMEM;
  1531. start.handle_ptp_pkts = !!(edev->ptp);
  1532. start.gro_enable = !edev->gro_disable;
  1533. start.mtu = edev->ndev->mtu;
  1534. start.vport_id = 0;
  1535. start.drop_ttl0 = true;
  1536. start.remove_inner_vlan = vlan_removal_en;
  1537. start.clear_stats = clear_stats;
  1538. rc = edev->ops->vport_start(cdev, &start);
  1539. if (rc) {
  1540. DP_ERR(edev, "Start V-PORT failed %d\n", rc);
  1541. goto out;
  1542. }
  1543. DP_VERBOSE(edev, NETIF_MSG_IFUP,
  1544. "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
  1545. start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
  1546. for_each_queue(i) {
  1547. struct qede_fastpath *fp = &edev->fp_array[i];
  1548. dma_addr_t p_phys_table;
  1549. u32 page_cnt;
  1550. if (fp->type & QEDE_FASTPATH_RX) {
  1551. struct qed_rxq_start_ret_params ret_params;
  1552. struct qede_rx_queue *rxq = fp->rxq;
  1553. __le16 *val;
  1554. memset(&ret_params, 0, sizeof(ret_params));
  1555. memset(&q_params, 0, sizeof(q_params));
  1556. q_params.queue_id = rxq->rxq_id;
  1557. q_params.vport_id = 0;
  1558. q_params.p_sb = fp->sb_info;
  1559. q_params.sb_idx = RX_PI;
  1560. p_phys_table =
  1561. qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
  1562. page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
  1563. rc = edev->ops->q_rx_start(cdev, i, &q_params,
  1564. rxq->rx_buf_size,
  1565. rxq->rx_bd_ring.p_phys_addr,
  1566. p_phys_table,
  1567. page_cnt, &ret_params);
  1568. if (rc) {
  1569. DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
  1570. rc);
  1571. goto out;
  1572. }
  1573. /* Use the return parameters */
  1574. rxq->hw_rxq_prod_addr = ret_params.p_prod;
  1575. rxq->handle = ret_params.p_handle;
  1576. val = &fp->sb_info->sb_virt->pi_array[RX_PI];
  1577. rxq->hw_cons_ptr = val;
  1578. qede_update_rx_prod(edev, rxq);
  1579. }
  1580. if (fp->type & QEDE_FASTPATH_XDP) {
  1581. rc = qede_start_txq(edev, fp, fp->xdp_tx, i, XDP_PI);
  1582. if (rc)
  1583. goto out;
  1584. fp->rxq->xdp_prog = bpf_prog_add(edev->xdp_prog, 1);
  1585. if (IS_ERR(fp->rxq->xdp_prog)) {
  1586. rc = PTR_ERR(fp->rxq->xdp_prog);
  1587. fp->rxq->xdp_prog = NULL;
  1588. goto out;
  1589. }
  1590. }
  1591. if (fp->type & QEDE_FASTPATH_TX) {
  1592. rc = qede_start_txq(edev, fp, fp->txq, i, TX_PI(0));
  1593. if (rc)
  1594. goto out;
  1595. }
  1596. }
  1597. /* Prepare and send the vport enable */
  1598. vport_update_params->vport_id = start.vport_id;
  1599. vport_update_params->update_vport_active_flg = 1;
  1600. vport_update_params->vport_active_flg = 1;
  1601. if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
  1602. qed_info->tx_switching) {
  1603. vport_update_params->update_tx_switching_flg = 1;
  1604. vport_update_params->tx_switching_flg = 1;
  1605. }
  1606. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  1607. &vport_update_params->update_rss_flg);
  1608. rc = edev->ops->vport_update(cdev, vport_update_params);
  1609. if (rc)
  1610. DP_ERR(edev, "Update V-PORT failed %d\n", rc);
  1611. out:
  1612. vfree(vport_update_params);
  1613. return rc;
  1614. }
  1615. enum qede_unload_mode {
  1616. QEDE_UNLOAD_NORMAL,
  1617. };
  1618. static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode,
  1619. bool is_locked)
  1620. {
  1621. struct qed_link_params link_params;
  1622. int rc;
  1623. DP_INFO(edev, "Starting qede unload\n");
  1624. if (!is_locked)
  1625. __qede_lock(edev);
  1626. edev->state = QEDE_STATE_CLOSED;
  1627. qede_rdma_dev_event_close(edev);
  1628. /* Close OS Tx */
  1629. netif_tx_disable(edev->ndev);
  1630. netif_carrier_off(edev->ndev);
  1631. /* Reset the link */
  1632. memset(&link_params, 0, sizeof(link_params));
  1633. link_params.link_up = false;
  1634. edev->ops->common->set_link(edev->cdev, &link_params);
  1635. rc = qede_stop_queues(edev);
  1636. if (rc) {
  1637. qede_sync_free_irqs(edev);
  1638. goto out;
  1639. }
  1640. DP_INFO(edev, "Stopped Queues\n");
  1641. qede_vlan_mark_nonconfigured(edev);
  1642. edev->ops->fastpath_stop(edev->cdev);
  1643. if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
  1644. qede_poll_for_freeing_arfs_filters(edev);
  1645. qede_free_arfs(edev);
  1646. }
  1647. /* Release the interrupts */
  1648. qede_sync_free_irqs(edev);
  1649. edev->ops->common->set_fp_int(edev->cdev, 0);
  1650. qede_napi_disable_remove(edev);
  1651. qede_free_mem_load(edev);
  1652. qede_free_fp_array(edev);
  1653. out:
  1654. if (!is_locked)
  1655. __qede_unlock(edev);
  1656. DP_INFO(edev, "Ending qede unload\n");
  1657. }
  1658. enum qede_load_mode {
  1659. QEDE_LOAD_NORMAL,
  1660. QEDE_LOAD_RELOAD,
  1661. };
  1662. static int qede_load(struct qede_dev *edev, enum qede_load_mode mode,
  1663. bool is_locked)
  1664. {
  1665. struct qed_link_params link_params;
  1666. int rc;
  1667. DP_INFO(edev, "Starting qede load\n");
  1668. if (!is_locked)
  1669. __qede_lock(edev);
  1670. rc = qede_set_num_queues(edev);
  1671. if (rc)
  1672. goto out;
  1673. rc = qede_alloc_fp_array(edev);
  1674. if (rc)
  1675. goto out;
  1676. qede_init_fp(edev);
  1677. rc = qede_alloc_mem_load(edev);
  1678. if (rc)
  1679. goto err1;
  1680. DP_INFO(edev, "Allocated %d Rx, %d Tx queues\n",
  1681. QEDE_RSS_COUNT(edev), QEDE_TSS_COUNT(edev));
  1682. rc = qede_set_real_num_queues(edev);
  1683. if (rc)
  1684. goto err2;
  1685. if (!IS_VF(edev) && edev->dev_info.common.num_hwfns == 1) {
  1686. rc = qede_alloc_arfs(edev);
  1687. if (rc)
  1688. DP_NOTICE(edev, "aRFS memory allocation failed\n");
  1689. }
  1690. qede_napi_add_enable(edev);
  1691. DP_INFO(edev, "Napi added and enabled\n");
  1692. rc = qede_setup_irqs(edev);
  1693. if (rc)
  1694. goto err3;
  1695. DP_INFO(edev, "Setup IRQs succeeded\n");
  1696. rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
  1697. if (rc)
  1698. goto err4;
  1699. DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
  1700. /* Program un-configured VLANs */
  1701. qede_configure_vlan_filters(edev);
  1702. /* Ask for link-up using current configuration */
  1703. memset(&link_params, 0, sizeof(link_params));
  1704. link_params.link_up = true;
  1705. edev->ops->common->set_link(edev->cdev, &link_params);
  1706. qede_rdma_dev_event_open(edev);
  1707. edev->state = QEDE_STATE_OPEN;
  1708. DP_INFO(edev, "Ending successfully qede load\n");
  1709. goto out;
  1710. err4:
  1711. qede_sync_free_irqs(edev);
  1712. memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
  1713. err3:
  1714. qede_napi_disable_remove(edev);
  1715. err2:
  1716. qede_free_mem_load(edev);
  1717. err1:
  1718. edev->ops->common->set_fp_int(edev->cdev, 0);
  1719. qede_free_fp_array(edev);
  1720. edev->num_queues = 0;
  1721. edev->fp_num_tx = 0;
  1722. edev->fp_num_rx = 0;
  1723. out:
  1724. if (!is_locked)
  1725. __qede_unlock(edev);
  1726. return rc;
  1727. }
  1728. /* 'func' should be able to run between unload and reload assuming interface
  1729. * is actually running, or afterwards in case it's currently DOWN.
  1730. */
  1731. void qede_reload(struct qede_dev *edev,
  1732. struct qede_reload_args *args, bool is_locked)
  1733. {
  1734. if (!is_locked)
  1735. __qede_lock(edev);
  1736. /* Since qede_lock is held, internal state wouldn't change even
  1737. * if netdev state would start transitioning. Check whether current
  1738. * internal configuration indicates device is up, then reload.
  1739. */
  1740. if (edev->state == QEDE_STATE_OPEN) {
  1741. qede_unload(edev, QEDE_UNLOAD_NORMAL, true);
  1742. if (args)
  1743. args->func(edev, args);
  1744. qede_load(edev, QEDE_LOAD_RELOAD, true);
  1745. /* Since no one is going to do it for us, re-configure */
  1746. qede_config_rx_mode(edev->ndev);
  1747. } else if (args) {
  1748. args->func(edev, args);
  1749. }
  1750. if (!is_locked)
  1751. __qede_unlock(edev);
  1752. }
  1753. /* called with rtnl_lock */
  1754. static int qede_open(struct net_device *ndev)
  1755. {
  1756. struct qede_dev *edev = netdev_priv(ndev);
  1757. int rc;
  1758. netif_carrier_off(ndev);
  1759. edev->ops->common->set_power_state(edev->cdev, PCI_D0);
  1760. rc = qede_load(edev, QEDE_LOAD_NORMAL, false);
  1761. if (rc)
  1762. return rc;
  1763. udp_tunnel_get_rx_info(ndev);
  1764. edev->ops->common->update_drv_state(edev->cdev, true);
  1765. return 0;
  1766. }
  1767. static int qede_close(struct net_device *ndev)
  1768. {
  1769. struct qede_dev *edev = netdev_priv(ndev);
  1770. qede_unload(edev, QEDE_UNLOAD_NORMAL, false);
  1771. edev->ops->common->update_drv_state(edev->cdev, false);
  1772. return 0;
  1773. }
  1774. static void qede_link_update(void *dev, struct qed_link_output *link)
  1775. {
  1776. struct qede_dev *edev = dev;
  1777. if (!netif_running(edev->ndev)) {
  1778. DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
  1779. return;
  1780. }
  1781. if (link->link_up) {
  1782. if (!netif_carrier_ok(edev->ndev)) {
  1783. DP_NOTICE(edev, "Link is up\n");
  1784. netif_tx_start_all_queues(edev->ndev);
  1785. netif_carrier_on(edev->ndev);
  1786. }
  1787. } else {
  1788. if (netif_carrier_ok(edev->ndev)) {
  1789. DP_NOTICE(edev, "Link is down\n");
  1790. netif_tx_disable(edev->ndev);
  1791. netif_carrier_off(edev->ndev);
  1792. }
  1793. }
  1794. }