qede_ethtool.c 50 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/version.h>
  33. #include <linux/types.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/etherdevice.h>
  36. #include <linux/ethtool.h>
  37. #include <linux/string.h>
  38. #include <linux/pci.h>
  39. #include <linux/capability.h>
  40. #include <linux/vmalloc.h>
  41. #include "qede.h"
  42. #include "qede_ptp.h"
  43. #define QEDE_RQSTAT_OFFSET(stat_name) \
  44. (offsetof(struct qede_rx_queue, stat_name))
  45. #define QEDE_RQSTAT_STRING(stat_name) (#stat_name)
  46. #define QEDE_RQSTAT(stat_name) \
  47. {QEDE_RQSTAT_OFFSET(stat_name), QEDE_RQSTAT_STRING(stat_name)}
  48. #define QEDE_SELFTEST_POLL_COUNT 100
  49. static const struct {
  50. u64 offset;
  51. char string[ETH_GSTRING_LEN];
  52. } qede_rqstats_arr[] = {
  53. QEDE_RQSTAT(rcv_pkts),
  54. QEDE_RQSTAT(rx_hw_errors),
  55. QEDE_RQSTAT(rx_alloc_errors),
  56. QEDE_RQSTAT(rx_ip_frags),
  57. QEDE_RQSTAT(xdp_no_pass),
  58. };
  59. #define QEDE_NUM_RQSTATS ARRAY_SIZE(qede_rqstats_arr)
  60. #define QEDE_TQSTAT_OFFSET(stat_name) \
  61. (offsetof(struct qede_tx_queue, stat_name))
  62. #define QEDE_TQSTAT_STRING(stat_name) (#stat_name)
  63. #define QEDE_TQSTAT(stat_name) \
  64. {QEDE_TQSTAT_OFFSET(stat_name), QEDE_TQSTAT_STRING(stat_name)}
  65. #define QEDE_NUM_TQSTATS ARRAY_SIZE(qede_tqstats_arr)
  66. static const struct {
  67. u64 offset;
  68. char string[ETH_GSTRING_LEN];
  69. } qede_tqstats_arr[] = {
  70. QEDE_TQSTAT(xmit_pkts),
  71. QEDE_TQSTAT(stopped_cnt),
  72. };
  73. #define QEDE_STAT_OFFSET(stat_name, type, base) \
  74. (offsetof(type, stat_name) + (base))
  75. #define QEDE_STAT_STRING(stat_name) (#stat_name)
  76. #define _QEDE_STAT(stat_name, type, base, attr) \
  77. {QEDE_STAT_OFFSET(stat_name, type, base), \
  78. QEDE_STAT_STRING(stat_name), \
  79. attr}
  80. #define QEDE_STAT(stat_name) \
  81. _QEDE_STAT(stat_name, struct qede_stats_common, 0, 0x0)
  82. #define QEDE_PF_STAT(stat_name) \
  83. _QEDE_STAT(stat_name, struct qede_stats_common, 0, \
  84. BIT(QEDE_STAT_PF_ONLY))
  85. #define QEDE_PF_BB_STAT(stat_name) \
  86. _QEDE_STAT(stat_name, struct qede_stats_bb, \
  87. offsetof(struct qede_stats, bb), \
  88. BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_BB_ONLY))
  89. #define QEDE_PF_AH_STAT(stat_name) \
  90. _QEDE_STAT(stat_name, struct qede_stats_ah, \
  91. offsetof(struct qede_stats, ah), \
  92. BIT(QEDE_STAT_PF_ONLY) | BIT(QEDE_STAT_AH_ONLY))
  93. static const struct {
  94. u64 offset;
  95. char string[ETH_GSTRING_LEN];
  96. unsigned long attr;
  97. #define QEDE_STAT_PF_ONLY 0
  98. #define QEDE_STAT_BB_ONLY 1
  99. #define QEDE_STAT_AH_ONLY 2
  100. } qede_stats_arr[] = {
  101. QEDE_STAT(rx_ucast_bytes),
  102. QEDE_STAT(rx_mcast_bytes),
  103. QEDE_STAT(rx_bcast_bytes),
  104. QEDE_STAT(rx_ucast_pkts),
  105. QEDE_STAT(rx_mcast_pkts),
  106. QEDE_STAT(rx_bcast_pkts),
  107. QEDE_STAT(tx_ucast_bytes),
  108. QEDE_STAT(tx_mcast_bytes),
  109. QEDE_STAT(tx_bcast_bytes),
  110. QEDE_STAT(tx_ucast_pkts),
  111. QEDE_STAT(tx_mcast_pkts),
  112. QEDE_STAT(tx_bcast_pkts),
  113. QEDE_PF_STAT(rx_64_byte_packets),
  114. QEDE_PF_STAT(rx_65_to_127_byte_packets),
  115. QEDE_PF_STAT(rx_128_to_255_byte_packets),
  116. QEDE_PF_STAT(rx_256_to_511_byte_packets),
  117. QEDE_PF_STAT(rx_512_to_1023_byte_packets),
  118. QEDE_PF_STAT(rx_1024_to_1518_byte_packets),
  119. QEDE_PF_BB_STAT(rx_1519_to_1522_byte_packets),
  120. QEDE_PF_BB_STAT(rx_1519_to_2047_byte_packets),
  121. QEDE_PF_BB_STAT(rx_2048_to_4095_byte_packets),
  122. QEDE_PF_BB_STAT(rx_4096_to_9216_byte_packets),
  123. QEDE_PF_BB_STAT(rx_9217_to_16383_byte_packets),
  124. QEDE_PF_AH_STAT(rx_1519_to_max_byte_packets),
  125. QEDE_PF_STAT(tx_64_byte_packets),
  126. QEDE_PF_STAT(tx_65_to_127_byte_packets),
  127. QEDE_PF_STAT(tx_128_to_255_byte_packets),
  128. QEDE_PF_STAT(tx_256_to_511_byte_packets),
  129. QEDE_PF_STAT(tx_512_to_1023_byte_packets),
  130. QEDE_PF_STAT(tx_1024_to_1518_byte_packets),
  131. QEDE_PF_BB_STAT(tx_1519_to_2047_byte_packets),
  132. QEDE_PF_BB_STAT(tx_2048_to_4095_byte_packets),
  133. QEDE_PF_BB_STAT(tx_4096_to_9216_byte_packets),
  134. QEDE_PF_BB_STAT(tx_9217_to_16383_byte_packets),
  135. QEDE_PF_AH_STAT(tx_1519_to_max_byte_packets),
  136. QEDE_PF_STAT(rx_mac_crtl_frames),
  137. QEDE_PF_STAT(tx_mac_ctrl_frames),
  138. QEDE_PF_STAT(rx_pause_frames),
  139. QEDE_PF_STAT(tx_pause_frames),
  140. QEDE_PF_STAT(rx_pfc_frames),
  141. QEDE_PF_STAT(tx_pfc_frames),
  142. QEDE_PF_STAT(rx_crc_errors),
  143. QEDE_PF_STAT(rx_align_errors),
  144. QEDE_PF_STAT(rx_carrier_errors),
  145. QEDE_PF_STAT(rx_oversize_packets),
  146. QEDE_PF_STAT(rx_jabbers),
  147. QEDE_PF_STAT(rx_undersize_packets),
  148. QEDE_PF_STAT(rx_fragments),
  149. QEDE_PF_BB_STAT(tx_lpi_entry_count),
  150. QEDE_PF_BB_STAT(tx_total_collisions),
  151. QEDE_PF_STAT(brb_truncates),
  152. QEDE_PF_STAT(brb_discards),
  153. QEDE_STAT(no_buff_discards),
  154. QEDE_PF_STAT(mftag_filter_discards),
  155. QEDE_PF_STAT(mac_filter_discards),
  156. QEDE_STAT(tx_err_drop_pkts),
  157. QEDE_STAT(ttl0_discard),
  158. QEDE_STAT(packet_too_big_discard),
  159. QEDE_STAT(coalesced_pkts),
  160. QEDE_STAT(coalesced_events),
  161. QEDE_STAT(coalesced_aborts_num),
  162. QEDE_STAT(non_coalesced_pkts),
  163. QEDE_STAT(coalesced_bytes),
  164. };
  165. #define QEDE_NUM_STATS ARRAY_SIZE(qede_stats_arr)
  166. #define QEDE_STAT_IS_PF_ONLY(i) \
  167. test_bit(QEDE_STAT_PF_ONLY, &qede_stats_arr[i].attr)
  168. #define QEDE_STAT_IS_BB_ONLY(i) \
  169. test_bit(QEDE_STAT_BB_ONLY, &qede_stats_arr[i].attr)
  170. #define QEDE_STAT_IS_AH_ONLY(i) \
  171. test_bit(QEDE_STAT_AH_ONLY, &qede_stats_arr[i].attr)
  172. enum {
  173. QEDE_PRI_FLAG_CMT,
  174. QEDE_PRI_FLAG_LEN,
  175. };
  176. static const char qede_private_arr[QEDE_PRI_FLAG_LEN][ETH_GSTRING_LEN] = {
  177. "Coupled-Function",
  178. };
  179. enum qede_ethtool_tests {
  180. QEDE_ETHTOOL_INT_LOOPBACK,
  181. QEDE_ETHTOOL_INTERRUPT_TEST,
  182. QEDE_ETHTOOL_MEMORY_TEST,
  183. QEDE_ETHTOOL_REGISTER_TEST,
  184. QEDE_ETHTOOL_CLOCK_TEST,
  185. QEDE_ETHTOOL_NVRAM_TEST,
  186. QEDE_ETHTOOL_TEST_MAX
  187. };
  188. static const char qede_tests_str_arr[QEDE_ETHTOOL_TEST_MAX][ETH_GSTRING_LEN] = {
  189. "Internal loopback (offline)",
  190. "Interrupt (online)\t",
  191. "Memory (online)\t\t",
  192. "Register (online)\t",
  193. "Clock (online)\t\t",
  194. "Nvram (online)\t\t",
  195. };
  196. static void qede_get_strings_stats_txq(struct qede_dev *edev,
  197. struct qede_tx_queue *txq, u8 **buf)
  198. {
  199. int i;
  200. for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
  201. if (txq->is_xdp)
  202. sprintf(*buf, "%d [XDP]: %s",
  203. QEDE_TXQ_XDP_TO_IDX(edev, txq),
  204. qede_tqstats_arr[i].string);
  205. else
  206. sprintf(*buf, "%d: %s", txq->index,
  207. qede_tqstats_arr[i].string);
  208. *buf += ETH_GSTRING_LEN;
  209. }
  210. }
  211. static void qede_get_strings_stats_rxq(struct qede_dev *edev,
  212. struct qede_rx_queue *rxq, u8 **buf)
  213. {
  214. int i;
  215. for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
  216. sprintf(*buf, "%d: %s", rxq->rxq_id,
  217. qede_rqstats_arr[i].string);
  218. *buf += ETH_GSTRING_LEN;
  219. }
  220. }
  221. static bool qede_is_irrelevant_stat(struct qede_dev *edev, int stat_index)
  222. {
  223. return (IS_VF(edev) && QEDE_STAT_IS_PF_ONLY(stat_index)) ||
  224. (QEDE_IS_BB(edev) && QEDE_STAT_IS_AH_ONLY(stat_index)) ||
  225. (QEDE_IS_AH(edev) && QEDE_STAT_IS_BB_ONLY(stat_index));
  226. }
  227. static void qede_get_strings_stats(struct qede_dev *edev, u8 *buf)
  228. {
  229. struct qede_fastpath *fp;
  230. int i;
  231. /* Account for queue statistics */
  232. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  233. fp = &edev->fp_array[i];
  234. if (fp->type & QEDE_FASTPATH_RX)
  235. qede_get_strings_stats_rxq(edev, fp->rxq, &buf);
  236. if (fp->type & QEDE_FASTPATH_XDP)
  237. qede_get_strings_stats_txq(edev, fp->xdp_tx, &buf);
  238. if (fp->type & QEDE_FASTPATH_TX)
  239. qede_get_strings_stats_txq(edev, fp->txq, &buf);
  240. }
  241. /* Account for non-queue statistics */
  242. for (i = 0; i < QEDE_NUM_STATS; i++) {
  243. if (qede_is_irrelevant_stat(edev, i))
  244. continue;
  245. strcpy(buf, qede_stats_arr[i].string);
  246. buf += ETH_GSTRING_LEN;
  247. }
  248. }
  249. static void qede_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  250. {
  251. struct qede_dev *edev = netdev_priv(dev);
  252. switch (stringset) {
  253. case ETH_SS_STATS:
  254. qede_get_strings_stats(edev, buf);
  255. break;
  256. case ETH_SS_PRIV_FLAGS:
  257. memcpy(buf, qede_private_arr,
  258. ETH_GSTRING_LEN * QEDE_PRI_FLAG_LEN);
  259. break;
  260. case ETH_SS_TEST:
  261. memcpy(buf, qede_tests_str_arr,
  262. ETH_GSTRING_LEN * QEDE_ETHTOOL_TEST_MAX);
  263. break;
  264. default:
  265. DP_VERBOSE(edev, QED_MSG_DEBUG,
  266. "Unsupported stringset 0x%08x\n", stringset);
  267. }
  268. }
  269. static void qede_get_ethtool_stats_txq(struct qede_tx_queue *txq, u64 **buf)
  270. {
  271. int i;
  272. for (i = 0; i < QEDE_NUM_TQSTATS; i++) {
  273. **buf = *((u64 *)(((void *)txq) + qede_tqstats_arr[i].offset));
  274. (*buf)++;
  275. }
  276. }
  277. static void qede_get_ethtool_stats_rxq(struct qede_rx_queue *rxq, u64 **buf)
  278. {
  279. int i;
  280. for (i = 0; i < QEDE_NUM_RQSTATS; i++) {
  281. **buf = *((u64 *)(((void *)rxq) + qede_rqstats_arr[i].offset));
  282. (*buf)++;
  283. }
  284. }
  285. static void qede_get_ethtool_stats(struct net_device *dev,
  286. struct ethtool_stats *stats, u64 *buf)
  287. {
  288. struct qede_dev *edev = netdev_priv(dev);
  289. struct qede_fastpath *fp;
  290. int i;
  291. qede_fill_by_demand_stats(edev);
  292. /* Need to protect the access to the fastpath array */
  293. __qede_lock(edev);
  294. for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
  295. fp = &edev->fp_array[i];
  296. if (fp->type & QEDE_FASTPATH_RX)
  297. qede_get_ethtool_stats_rxq(fp->rxq, &buf);
  298. if (fp->type & QEDE_FASTPATH_XDP)
  299. qede_get_ethtool_stats_txq(fp->xdp_tx, &buf);
  300. if (fp->type & QEDE_FASTPATH_TX)
  301. qede_get_ethtool_stats_txq(fp->txq, &buf);
  302. }
  303. for (i = 0; i < QEDE_NUM_STATS; i++) {
  304. if (qede_is_irrelevant_stat(edev, i))
  305. continue;
  306. *buf = *((u64 *)(((void *)&edev->stats) +
  307. qede_stats_arr[i].offset));
  308. buf++;
  309. }
  310. __qede_unlock(edev);
  311. }
  312. static int qede_get_sset_count(struct net_device *dev, int stringset)
  313. {
  314. struct qede_dev *edev = netdev_priv(dev);
  315. int num_stats = QEDE_NUM_STATS, i;
  316. switch (stringset) {
  317. case ETH_SS_STATS:
  318. for (i = 0; i < QEDE_NUM_STATS; i++)
  319. if (qede_is_irrelevant_stat(edev, i))
  320. num_stats--;
  321. /* Account for the Regular Tx statistics */
  322. num_stats += QEDE_TSS_COUNT(edev) * QEDE_NUM_TQSTATS;
  323. /* Account for the Regular Rx statistics */
  324. num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_RQSTATS;
  325. /* Account for XDP statistics [if needed] */
  326. if (edev->xdp_prog)
  327. num_stats += QEDE_RSS_COUNT(edev) * QEDE_NUM_TQSTATS;
  328. return num_stats;
  329. case ETH_SS_PRIV_FLAGS:
  330. return QEDE_PRI_FLAG_LEN;
  331. case ETH_SS_TEST:
  332. if (!IS_VF(edev))
  333. return QEDE_ETHTOOL_TEST_MAX;
  334. else
  335. return 0;
  336. default:
  337. DP_VERBOSE(edev, QED_MSG_DEBUG,
  338. "Unsupported stringset 0x%08x\n", stringset);
  339. return -EINVAL;
  340. }
  341. }
  342. static u32 qede_get_priv_flags(struct net_device *dev)
  343. {
  344. struct qede_dev *edev = netdev_priv(dev);
  345. return (!!(edev->dev_info.common.num_hwfns > 1)) << QEDE_PRI_FLAG_CMT;
  346. }
  347. struct qede_link_mode_mapping {
  348. u32 qed_link_mode;
  349. u32 ethtool_link_mode;
  350. };
  351. static const struct qede_link_mode_mapping qed_lm_map[] = {
  352. {QED_LM_FIBRE_BIT, ETHTOOL_LINK_MODE_FIBRE_BIT},
  353. {QED_LM_Autoneg_BIT, ETHTOOL_LINK_MODE_Autoneg_BIT},
  354. {QED_LM_Asym_Pause_BIT, ETHTOOL_LINK_MODE_Asym_Pause_BIT},
  355. {QED_LM_Pause_BIT, ETHTOOL_LINK_MODE_Pause_BIT},
  356. {QED_LM_1000baseT_Half_BIT, ETHTOOL_LINK_MODE_1000baseT_Half_BIT},
  357. {QED_LM_1000baseT_Full_BIT, ETHTOOL_LINK_MODE_1000baseT_Full_BIT},
  358. {QED_LM_10000baseKR_Full_BIT, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT},
  359. {QED_LM_25000baseKR_Full_BIT, ETHTOOL_LINK_MODE_25000baseKR_Full_BIT},
  360. {QED_LM_40000baseLR4_Full_BIT, ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT},
  361. {QED_LM_50000baseKR2_Full_BIT, ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT},
  362. {QED_LM_100000baseKR4_Full_BIT,
  363. ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT},
  364. };
  365. #define QEDE_DRV_TO_ETHTOOL_CAPS(caps, lk_ksettings, name) \
  366. { \
  367. int i; \
  368. \
  369. for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
  370. if ((caps) & (qed_lm_map[i].qed_link_mode)) \
  371. __set_bit(qed_lm_map[i].ethtool_link_mode,\
  372. lk_ksettings->link_modes.name); \
  373. } \
  374. }
  375. #define QEDE_ETHTOOL_TO_DRV_CAPS(caps, lk_ksettings, name) \
  376. { \
  377. int i; \
  378. \
  379. for (i = 0; i < ARRAY_SIZE(qed_lm_map); i++) { \
  380. if (test_bit(qed_lm_map[i].ethtool_link_mode, \
  381. lk_ksettings->link_modes.name)) \
  382. caps |= qed_lm_map[i].qed_link_mode; \
  383. } \
  384. }
  385. static int qede_get_link_ksettings(struct net_device *dev,
  386. struct ethtool_link_ksettings *cmd)
  387. {
  388. struct ethtool_link_settings *base = &cmd->base;
  389. struct qede_dev *edev = netdev_priv(dev);
  390. struct qed_link_output current_link;
  391. __qede_lock(edev);
  392. memset(&current_link, 0, sizeof(current_link));
  393. edev->ops->common->get_link(edev->cdev, &current_link);
  394. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  395. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.supported_caps, cmd, supported)
  396. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  397. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.advertised_caps, cmd, advertising)
  398. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  399. QEDE_DRV_TO_ETHTOOL_CAPS(current_link.lp_caps, cmd, lp_advertising)
  400. if ((edev->state == QEDE_STATE_OPEN) && (current_link.link_up)) {
  401. base->speed = current_link.speed;
  402. base->duplex = current_link.duplex;
  403. } else {
  404. base->speed = SPEED_UNKNOWN;
  405. base->duplex = DUPLEX_UNKNOWN;
  406. }
  407. __qede_unlock(edev);
  408. base->port = current_link.port;
  409. base->autoneg = (current_link.autoneg) ? AUTONEG_ENABLE :
  410. AUTONEG_DISABLE;
  411. return 0;
  412. }
  413. static int qede_set_link_ksettings(struct net_device *dev,
  414. const struct ethtool_link_ksettings *cmd)
  415. {
  416. const struct ethtool_link_settings *base = &cmd->base;
  417. struct qede_dev *edev = netdev_priv(dev);
  418. struct qed_link_output current_link;
  419. struct qed_link_params params;
  420. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  421. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  422. return -EOPNOTSUPP;
  423. }
  424. memset(&current_link, 0, sizeof(current_link));
  425. memset(&params, 0, sizeof(params));
  426. edev->ops->common->get_link(edev->cdev, &current_link);
  427. params.override_flags |= QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS;
  428. params.override_flags |= QED_LINK_OVERRIDE_SPEED_AUTONEG;
  429. if (base->autoneg == AUTONEG_ENABLE) {
  430. if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
  431. DP_INFO(edev, "Auto negotiation is not supported\n");
  432. return -EOPNOTSUPP;
  433. }
  434. params.autoneg = true;
  435. params.forced_speed = 0;
  436. QEDE_ETHTOOL_TO_DRV_CAPS(params.adv_speeds, cmd, advertising)
  437. } else { /* forced speed */
  438. params.override_flags |= QED_LINK_OVERRIDE_SPEED_FORCED_SPEED;
  439. params.autoneg = false;
  440. params.forced_speed = base->speed;
  441. switch (base->speed) {
  442. case SPEED_1000:
  443. if (!(current_link.supported_caps &
  444. QED_LM_1000baseT_Full_BIT)) {
  445. DP_INFO(edev, "1G speed not supported\n");
  446. return -EINVAL;
  447. }
  448. params.adv_speeds = QED_LM_1000baseT_Full_BIT;
  449. break;
  450. case SPEED_10000:
  451. if (!(current_link.supported_caps &
  452. QED_LM_10000baseKR_Full_BIT)) {
  453. DP_INFO(edev, "10G speed not supported\n");
  454. return -EINVAL;
  455. }
  456. params.adv_speeds = QED_LM_10000baseKR_Full_BIT;
  457. break;
  458. case SPEED_25000:
  459. if (!(current_link.supported_caps &
  460. QED_LM_25000baseKR_Full_BIT)) {
  461. DP_INFO(edev, "25G speed not supported\n");
  462. return -EINVAL;
  463. }
  464. params.adv_speeds = QED_LM_25000baseKR_Full_BIT;
  465. break;
  466. case SPEED_40000:
  467. if (!(current_link.supported_caps &
  468. QED_LM_40000baseLR4_Full_BIT)) {
  469. DP_INFO(edev, "40G speed not supported\n");
  470. return -EINVAL;
  471. }
  472. params.adv_speeds = QED_LM_40000baseLR4_Full_BIT;
  473. break;
  474. case SPEED_50000:
  475. if (!(current_link.supported_caps &
  476. QED_LM_50000baseKR2_Full_BIT)) {
  477. DP_INFO(edev, "50G speed not supported\n");
  478. return -EINVAL;
  479. }
  480. params.adv_speeds = QED_LM_50000baseKR2_Full_BIT;
  481. break;
  482. case SPEED_100000:
  483. if (!(current_link.supported_caps &
  484. QED_LM_100000baseKR4_Full_BIT)) {
  485. DP_INFO(edev, "100G speed not supported\n");
  486. return -EINVAL;
  487. }
  488. params.adv_speeds = QED_LM_100000baseKR4_Full_BIT;
  489. break;
  490. default:
  491. DP_INFO(edev, "Unsupported speed %u\n", base->speed);
  492. return -EINVAL;
  493. }
  494. }
  495. params.link_up = true;
  496. edev->ops->common->set_link(edev->cdev, &params);
  497. return 0;
  498. }
  499. static void qede_get_drvinfo(struct net_device *ndev,
  500. struct ethtool_drvinfo *info)
  501. {
  502. char mfw[ETHTOOL_FWVERS_LEN], storm[ETHTOOL_FWVERS_LEN];
  503. struct qede_dev *edev = netdev_priv(ndev);
  504. strlcpy(info->driver, "qede", sizeof(info->driver));
  505. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  506. snprintf(storm, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
  507. edev->dev_info.common.fw_major,
  508. edev->dev_info.common.fw_minor,
  509. edev->dev_info.common.fw_rev,
  510. edev->dev_info.common.fw_eng);
  511. snprintf(mfw, ETHTOOL_FWVERS_LEN, "%d.%d.%d.%d",
  512. (edev->dev_info.common.mfw_rev >> 24) & 0xFF,
  513. (edev->dev_info.common.mfw_rev >> 16) & 0xFF,
  514. (edev->dev_info.common.mfw_rev >> 8) & 0xFF,
  515. edev->dev_info.common.mfw_rev & 0xFF);
  516. if ((strlen(storm) + strlen(mfw) + strlen("mfw storm ")) <
  517. sizeof(info->fw_version)) {
  518. snprintf(info->fw_version, sizeof(info->fw_version),
  519. "mfw %s storm %s", mfw, storm);
  520. } else {
  521. snprintf(info->fw_version, sizeof(info->fw_version),
  522. "%s %s", mfw, storm);
  523. }
  524. strlcpy(info->bus_info, pci_name(edev->pdev), sizeof(info->bus_info));
  525. }
  526. static void qede_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
  527. {
  528. struct qede_dev *edev = netdev_priv(ndev);
  529. if (edev->dev_info.common.wol_support) {
  530. wol->supported = WAKE_MAGIC;
  531. wol->wolopts = edev->wol_enabled ? WAKE_MAGIC : 0;
  532. }
  533. }
  534. static int qede_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
  535. {
  536. struct qede_dev *edev = netdev_priv(ndev);
  537. bool wol_requested;
  538. int rc;
  539. if (wol->wolopts & ~WAKE_MAGIC) {
  540. DP_INFO(edev,
  541. "Can't support WoL options other than magic-packet\n");
  542. return -EINVAL;
  543. }
  544. wol_requested = !!(wol->wolopts & WAKE_MAGIC);
  545. if (wol_requested == edev->wol_enabled)
  546. return 0;
  547. /* Need to actually change configuration */
  548. if (!edev->dev_info.common.wol_support) {
  549. DP_INFO(edev, "Device doesn't support WoL\n");
  550. return -EINVAL;
  551. }
  552. rc = edev->ops->common->update_wol(edev->cdev, wol_requested);
  553. if (!rc)
  554. edev->wol_enabled = wol_requested;
  555. return rc;
  556. }
  557. static u32 qede_get_msglevel(struct net_device *ndev)
  558. {
  559. struct qede_dev *edev = netdev_priv(ndev);
  560. return ((u32)edev->dp_level << QED_LOG_LEVEL_SHIFT) | edev->dp_module;
  561. }
  562. static void qede_set_msglevel(struct net_device *ndev, u32 level)
  563. {
  564. struct qede_dev *edev = netdev_priv(ndev);
  565. u32 dp_module = 0;
  566. u8 dp_level = 0;
  567. qede_config_debug(level, &dp_module, &dp_level);
  568. edev->dp_level = dp_level;
  569. edev->dp_module = dp_module;
  570. edev->ops->common->update_msglvl(edev->cdev,
  571. dp_module, dp_level);
  572. }
  573. static int qede_nway_reset(struct net_device *dev)
  574. {
  575. struct qede_dev *edev = netdev_priv(dev);
  576. struct qed_link_output current_link;
  577. struct qed_link_params link_params;
  578. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  579. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  580. return -EOPNOTSUPP;
  581. }
  582. if (!netif_running(dev))
  583. return 0;
  584. memset(&current_link, 0, sizeof(current_link));
  585. edev->ops->common->get_link(edev->cdev, &current_link);
  586. if (!current_link.link_up)
  587. return 0;
  588. /* Toggle the link */
  589. memset(&link_params, 0, sizeof(link_params));
  590. link_params.link_up = false;
  591. edev->ops->common->set_link(edev->cdev, &link_params);
  592. link_params.link_up = true;
  593. edev->ops->common->set_link(edev->cdev, &link_params);
  594. return 0;
  595. }
  596. static u32 qede_get_link(struct net_device *dev)
  597. {
  598. struct qede_dev *edev = netdev_priv(dev);
  599. struct qed_link_output current_link;
  600. memset(&current_link, 0, sizeof(current_link));
  601. edev->ops->common->get_link(edev->cdev, &current_link);
  602. return current_link.link_up;
  603. }
  604. static int qede_get_coalesce(struct net_device *dev,
  605. struct ethtool_coalesce *coal)
  606. {
  607. void *rx_handle = NULL, *tx_handle = NULL;
  608. struct qede_dev *edev = netdev_priv(dev);
  609. u16 rx_coal, tx_coal, i, rc = 0;
  610. struct qede_fastpath *fp;
  611. rx_coal = QED_DEFAULT_RX_USECS;
  612. tx_coal = QED_DEFAULT_TX_USECS;
  613. memset(coal, 0, sizeof(struct ethtool_coalesce));
  614. __qede_lock(edev);
  615. if (edev->state == QEDE_STATE_OPEN) {
  616. for_each_queue(i) {
  617. fp = &edev->fp_array[i];
  618. if (fp->type & QEDE_FASTPATH_RX) {
  619. rx_handle = fp->rxq->handle;
  620. break;
  621. }
  622. }
  623. rc = edev->ops->get_coalesce(edev->cdev, &rx_coal, rx_handle);
  624. if (rc) {
  625. DP_INFO(edev, "Read Rx coalesce error\n");
  626. goto out;
  627. }
  628. for_each_queue(i) {
  629. fp = &edev->fp_array[i];
  630. if (fp->type & QEDE_FASTPATH_TX) {
  631. tx_handle = fp->txq->handle;
  632. break;
  633. }
  634. }
  635. rc = edev->ops->get_coalesce(edev->cdev, &tx_coal, tx_handle);
  636. if (rc)
  637. DP_INFO(edev, "Read Tx coalesce error\n");
  638. }
  639. out:
  640. __qede_unlock(edev);
  641. coal->rx_coalesce_usecs = rx_coal;
  642. coal->tx_coalesce_usecs = tx_coal;
  643. return rc;
  644. }
  645. static int qede_set_coalesce(struct net_device *dev,
  646. struct ethtool_coalesce *coal)
  647. {
  648. struct qede_dev *edev = netdev_priv(dev);
  649. struct qede_fastpath *fp;
  650. int i, rc = 0;
  651. u16 rxc, txc;
  652. if (!netif_running(dev)) {
  653. DP_INFO(edev, "Interface is down\n");
  654. return -EINVAL;
  655. }
  656. if (coal->rx_coalesce_usecs > QED_COALESCE_MAX ||
  657. coal->tx_coalesce_usecs > QED_COALESCE_MAX) {
  658. DP_INFO(edev,
  659. "Can't support requested %s coalesce value [max supported value %d]\n",
  660. coal->rx_coalesce_usecs > QED_COALESCE_MAX ? "rx" :
  661. "tx", QED_COALESCE_MAX);
  662. return -EINVAL;
  663. }
  664. rxc = (u16)coal->rx_coalesce_usecs;
  665. txc = (u16)coal->tx_coalesce_usecs;
  666. for_each_queue(i) {
  667. fp = &edev->fp_array[i];
  668. if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
  669. rc = edev->ops->common->set_coalesce(edev->cdev,
  670. rxc, 0,
  671. fp->rxq->handle);
  672. if (rc) {
  673. DP_INFO(edev,
  674. "Set RX coalesce error, rc = %d\n", rc);
  675. return rc;
  676. }
  677. }
  678. if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
  679. rc = edev->ops->common->set_coalesce(edev->cdev,
  680. 0, txc,
  681. fp->txq->handle);
  682. if (rc) {
  683. DP_INFO(edev,
  684. "Set TX coalesce error, rc = %d\n", rc);
  685. return rc;
  686. }
  687. }
  688. }
  689. return rc;
  690. }
  691. static void qede_get_ringparam(struct net_device *dev,
  692. struct ethtool_ringparam *ering)
  693. {
  694. struct qede_dev *edev = netdev_priv(dev);
  695. ering->rx_max_pending = NUM_RX_BDS_MAX;
  696. ering->rx_pending = edev->q_num_rx_buffers;
  697. ering->tx_max_pending = NUM_TX_BDS_MAX;
  698. ering->tx_pending = edev->q_num_tx_buffers;
  699. }
  700. static int qede_set_ringparam(struct net_device *dev,
  701. struct ethtool_ringparam *ering)
  702. {
  703. struct qede_dev *edev = netdev_priv(dev);
  704. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  705. "Set ring params command parameters: rx_pending = %d, tx_pending = %d\n",
  706. ering->rx_pending, ering->tx_pending);
  707. /* Validate legality of configuration */
  708. if (ering->rx_pending > NUM_RX_BDS_MAX ||
  709. ering->rx_pending < NUM_RX_BDS_MIN ||
  710. ering->tx_pending > NUM_TX_BDS_MAX ||
  711. ering->tx_pending < NUM_TX_BDS_MIN) {
  712. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  713. "Can only support Rx Buffer size [0%08x,...,0x%08x] and Tx Buffer size [0x%08x,...,0x%08x]\n",
  714. NUM_RX_BDS_MIN, NUM_RX_BDS_MAX,
  715. NUM_TX_BDS_MIN, NUM_TX_BDS_MAX);
  716. return -EINVAL;
  717. }
  718. /* Change ring size and re-load */
  719. edev->q_num_rx_buffers = ering->rx_pending;
  720. edev->q_num_tx_buffers = ering->tx_pending;
  721. qede_reload(edev, NULL, false);
  722. return 0;
  723. }
  724. static void qede_get_pauseparam(struct net_device *dev,
  725. struct ethtool_pauseparam *epause)
  726. {
  727. struct qede_dev *edev = netdev_priv(dev);
  728. struct qed_link_output current_link;
  729. memset(&current_link, 0, sizeof(current_link));
  730. edev->ops->common->get_link(edev->cdev, &current_link);
  731. if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
  732. epause->autoneg = true;
  733. if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
  734. epause->rx_pause = true;
  735. if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
  736. epause->tx_pause = true;
  737. DP_VERBOSE(edev, QED_MSG_DEBUG,
  738. "ethtool_pauseparam: cmd %d autoneg %d rx_pause %d tx_pause %d\n",
  739. epause->cmd, epause->autoneg, epause->rx_pause,
  740. epause->tx_pause);
  741. }
  742. static int qede_set_pauseparam(struct net_device *dev,
  743. struct ethtool_pauseparam *epause)
  744. {
  745. struct qede_dev *edev = netdev_priv(dev);
  746. struct qed_link_params params;
  747. struct qed_link_output current_link;
  748. if (!edev->ops || !edev->ops->common->can_link_change(edev->cdev)) {
  749. DP_INFO(edev,
  750. "Pause settings are not allowed to be changed\n");
  751. return -EOPNOTSUPP;
  752. }
  753. memset(&current_link, 0, sizeof(current_link));
  754. edev->ops->common->get_link(edev->cdev, &current_link);
  755. memset(&params, 0, sizeof(params));
  756. params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
  757. if (epause->autoneg) {
  758. if (!(current_link.supported_caps & QED_LM_Autoneg_BIT)) {
  759. DP_INFO(edev, "autoneg not supported\n");
  760. return -EINVAL;
  761. }
  762. params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
  763. }
  764. if (epause->rx_pause)
  765. params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
  766. if (epause->tx_pause)
  767. params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
  768. params.link_up = true;
  769. edev->ops->common->set_link(edev->cdev, &params);
  770. return 0;
  771. }
  772. static void qede_get_regs(struct net_device *ndev,
  773. struct ethtool_regs *regs, void *buffer)
  774. {
  775. struct qede_dev *edev = netdev_priv(ndev);
  776. regs->version = 0;
  777. memset(buffer, 0, regs->len);
  778. if (edev->ops && edev->ops->common)
  779. edev->ops->common->dbg_all_data(edev->cdev, buffer);
  780. }
  781. static int qede_get_regs_len(struct net_device *ndev)
  782. {
  783. struct qede_dev *edev = netdev_priv(ndev);
  784. if (edev->ops && edev->ops->common)
  785. return edev->ops->common->dbg_all_data_size(edev->cdev);
  786. else
  787. return -EINVAL;
  788. }
  789. static void qede_update_mtu(struct qede_dev *edev,
  790. struct qede_reload_args *args)
  791. {
  792. edev->ndev->mtu = args->u.mtu;
  793. }
  794. /* Netdevice NDOs */
  795. int qede_change_mtu(struct net_device *ndev, int new_mtu)
  796. {
  797. struct qede_dev *edev = netdev_priv(ndev);
  798. struct qede_reload_args args;
  799. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  800. "Configuring MTU size of %d\n", new_mtu);
  801. /* Set the mtu field and re-start the interface if needed */
  802. args.u.mtu = new_mtu;
  803. args.func = &qede_update_mtu;
  804. qede_reload(edev, &args, false);
  805. edev->ops->common->update_mtu(edev->cdev, new_mtu);
  806. return 0;
  807. }
  808. static void qede_get_channels(struct net_device *dev,
  809. struct ethtool_channels *channels)
  810. {
  811. struct qede_dev *edev = netdev_priv(dev);
  812. channels->max_combined = QEDE_MAX_RSS_CNT(edev);
  813. channels->max_rx = QEDE_MAX_RSS_CNT(edev);
  814. channels->max_tx = QEDE_MAX_RSS_CNT(edev);
  815. channels->combined_count = QEDE_QUEUE_CNT(edev) - edev->fp_num_tx -
  816. edev->fp_num_rx;
  817. channels->tx_count = edev->fp_num_tx;
  818. channels->rx_count = edev->fp_num_rx;
  819. }
  820. static int qede_set_channels(struct net_device *dev,
  821. struct ethtool_channels *channels)
  822. {
  823. struct qede_dev *edev = netdev_priv(dev);
  824. u32 count;
  825. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  826. "set-channels command parameters: rx = %d, tx = %d, other = %d, combined = %d\n",
  827. channels->rx_count, channels->tx_count,
  828. channels->other_count, channels->combined_count);
  829. count = channels->rx_count + channels->tx_count +
  830. channels->combined_count;
  831. /* We don't support `other' channels */
  832. if (channels->other_count) {
  833. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  834. "command parameters not supported\n");
  835. return -EINVAL;
  836. }
  837. if (!(channels->combined_count || (channels->rx_count &&
  838. channels->tx_count))) {
  839. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  840. "need to request at least one transmit and one receive channel\n");
  841. return -EINVAL;
  842. }
  843. if (count > QEDE_MAX_RSS_CNT(edev)) {
  844. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  845. "requested channels = %d max supported channels = %d\n",
  846. count, QEDE_MAX_RSS_CNT(edev));
  847. return -EINVAL;
  848. }
  849. /* Check if there was a change in the active parameters */
  850. if ((count == QEDE_QUEUE_CNT(edev)) &&
  851. (channels->tx_count == edev->fp_num_tx) &&
  852. (channels->rx_count == edev->fp_num_rx)) {
  853. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  854. "No change in active parameters\n");
  855. return 0;
  856. }
  857. /* We need the number of queues to be divisible between the hwfns */
  858. if ((count % edev->dev_info.common.num_hwfns) ||
  859. (channels->tx_count % edev->dev_info.common.num_hwfns) ||
  860. (channels->rx_count % edev->dev_info.common.num_hwfns)) {
  861. DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
  862. "Number of channels must be divisible by %04x\n",
  863. edev->dev_info.common.num_hwfns);
  864. return -EINVAL;
  865. }
  866. /* Set number of queues and reload if necessary */
  867. edev->req_queues = count;
  868. edev->req_num_tx = channels->tx_count;
  869. edev->req_num_rx = channels->rx_count;
  870. /* Reset the indirection table if rx queue count is updated */
  871. if ((edev->req_queues - edev->req_num_tx) != QEDE_RSS_COUNT(edev)) {
  872. edev->rss_params_inited &= ~QEDE_RSS_INDIR_INITED;
  873. memset(edev->rss_ind_table, 0, sizeof(edev->rss_ind_table));
  874. }
  875. qede_reload(edev, NULL, false);
  876. return 0;
  877. }
  878. static int qede_get_ts_info(struct net_device *dev,
  879. struct ethtool_ts_info *info)
  880. {
  881. struct qede_dev *edev = netdev_priv(dev);
  882. return qede_ptp_get_ts_info(edev, info);
  883. }
  884. static int qede_set_phys_id(struct net_device *dev,
  885. enum ethtool_phys_id_state state)
  886. {
  887. struct qede_dev *edev = netdev_priv(dev);
  888. u8 led_state = 0;
  889. switch (state) {
  890. case ETHTOOL_ID_ACTIVE:
  891. return 1; /* cycle on/off once per second */
  892. case ETHTOOL_ID_ON:
  893. led_state = QED_LED_MODE_ON;
  894. break;
  895. case ETHTOOL_ID_OFF:
  896. led_state = QED_LED_MODE_OFF;
  897. break;
  898. case ETHTOOL_ID_INACTIVE:
  899. led_state = QED_LED_MODE_RESTORE;
  900. break;
  901. }
  902. edev->ops->common->set_led(edev->cdev, led_state);
  903. return 0;
  904. }
  905. static int qede_get_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
  906. {
  907. info->data = RXH_IP_SRC | RXH_IP_DST;
  908. switch (info->flow_type) {
  909. case TCP_V4_FLOW:
  910. case TCP_V6_FLOW:
  911. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  912. break;
  913. case UDP_V4_FLOW:
  914. if (edev->rss_caps & QED_RSS_IPV4_UDP)
  915. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  916. break;
  917. case UDP_V6_FLOW:
  918. if (edev->rss_caps & QED_RSS_IPV6_UDP)
  919. info->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
  920. break;
  921. case IPV4_FLOW:
  922. case IPV6_FLOW:
  923. break;
  924. default:
  925. info->data = 0;
  926. break;
  927. }
  928. return 0;
  929. }
  930. static int qede_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info,
  931. u32 *rule_locs)
  932. {
  933. struct qede_dev *edev = netdev_priv(dev);
  934. int rc = 0;
  935. switch (info->cmd) {
  936. case ETHTOOL_GRXRINGS:
  937. info->data = QEDE_RSS_COUNT(edev);
  938. break;
  939. case ETHTOOL_GRXFH:
  940. rc = qede_get_rss_flags(edev, info);
  941. break;
  942. case ETHTOOL_GRXCLSRLCNT:
  943. info->rule_cnt = qede_get_arfs_filter_count(edev);
  944. info->data = QEDE_RFS_MAX_FLTR;
  945. break;
  946. case ETHTOOL_GRXCLSRULE:
  947. rc = qede_get_cls_rule_entry(edev, info);
  948. break;
  949. case ETHTOOL_GRXCLSRLALL:
  950. rc = qede_get_cls_rule_all(edev, info, rule_locs);
  951. break;
  952. default:
  953. DP_ERR(edev, "Command parameters not supported\n");
  954. rc = -EOPNOTSUPP;
  955. }
  956. return rc;
  957. }
  958. static int qede_set_rss_flags(struct qede_dev *edev, struct ethtool_rxnfc *info)
  959. {
  960. struct qed_update_vport_params *vport_update_params;
  961. u8 set_caps = 0, clr_caps = 0;
  962. int rc = 0;
  963. DP_VERBOSE(edev, QED_MSG_DEBUG,
  964. "Set rss flags command parameters: flow type = %d, data = %llu\n",
  965. info->flow_type, info->data);
  966. switch (info->flow_type) {
  967. case TCP_V4_FLOW:
  968. case TCP_V6_FLOW:
  969. /* For TCP only 4-tuple hash is supported */
  970. if (info->data ^ (RXH_IP_SRC | RXH_IP_DST |
  971. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  972. DP_INFO(edev, "Command parameters not supported\n");
  973. return -EINVAL;
  974. }
  975. return 0;
  976. case UDP_V4_FLOW:
  977. /* For UDP either 2-tuple hash or 4-tuple hash is supported */
  978. if (info->data == (RXH_IP_SRC | RXH_IP_DST |
  979. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  980. set_caps = QED_RSS_IPV4_UDP;
  981. DP_VERBOSE(edev, QED_MSG_DEBUG,
  982. "UDP 4-tuple enabled\n");
  983. } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
  984. clr_caps = QED_RSS_IPV4_UDP;
  985. DP_VERBOSE(edev, QED_MSG_DEBUG,
  986. "UDP 4-tuple disabled\n");
  987. } else {
  988. return -EINVAL;
  989. }
  990. break;
  991. case UDP_V6_FLOW:
  992. /* For UDP either 2-tuple hash or 4-tuple hash is supported */
  993. if (info->data == (RXH_IP_SRC | RXH_IP_DST |
  994. RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
  995. set_caps = QED_RSS_IPV6_UDP;
  996. DP_VERBOSE(edev, QED_MSG_DEBUG,
  997. "UDP 4-tuple enabled\n");
  998. } else if (info->data == (RXH_IP_SRC | RXH_IP_DST)) {
  999. clr_caps = QED_RSS_IPV6_UDP;
  1000. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1001. "UDP 4-tuple disabled\n");
  1002. } else {
  1003. return -EINVAL;
  1004. }
  1005. break;
  1006. case IPV4_FLOW:
  1007. case IPV6_FLOW:
  1008. /* For IP only 2-tuple hash is supported */
  1009. if (info->data ^ (RXH_IP_SRC | RXH_IP_DST)) {
  1010. DP_INFO(edev, "Command parameters not supported\n");
  1011. return -EINVAL;
  1012. }
  1013. return 0;
  1014. case SCTP_V4_FLOW:
  1015. case AH_ESP_V4_FLOW:
  1016. case AH_V4_FLOW:
  1017. case ESP_V4_FLOW:
  1018. case SCTP_V6_FLOW:
  1019. case AH_ESP_V6_FLOW:
  1020. case AH_V6_FLOW:
  1021. case ESP_V6_FLOW:
  1022. case IP_USER_FLOW:
  1023. case ETHER_FLOW:
  1024. /* RSS is not supported for these protocols */
  1025. if (info->data) {
  1026. DP_INFO(edev, "Command parameters not supported\n");
  1027. return -EINVAL;
  1028. }
  1029. return 0;
  1030. default:
  1031. return -EINVAL;
  1032. }
  1033. /* No action is needed if there is no change in the rss capability */
  1034. if (edev->rss_caps == ((edev->rss_caps & ~clr_caps) | set_caps))
  1035. return 0;
  1036. /* Update internal configuration */
  1037. edev->rss_caps = ((edev->rss_caps & ~clr_caps) | set_caps);
  1038. edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
  1039. /* Re-configure if possible */
  1040. __qede_lock(edev);
  1041. if (edev->state == QEDE_STATE_OPEN) {
  1042. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1043. if (!vport_update_params) {
  1044. __qede_unlock(edev);
  1045. return -ENOMEM;
  1046. }
  1047. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  1048. &vport_update_params->update_rss_flg);
  1049. rc = edev->ops->vport_update(edev->cdev, vport_update_params);
  1050. vfree(vport_update_params);
  1051. }
  1052. __qede_unlock(edev);
  1053. return rc;
  1054. }
  1055. static int qede_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *info)
  1056. {
  1057. struct qede_dev *edev = netdev_priv(dev);
  1058. int rc;
  1059. switch (info->cmd) {
  1060. case ETHTOOL_SRXFH:
  1061. rc = qede_set_rss_flags(edev, info);
  1062. break;
  1063. case ETHTOOL_SRXCLSRLINS:
  1064. rc = qede_add_cls_rule(edev, info);
  1065. break;
  1066. case ETHTOOL_SRXCLSRLDEL:
  1067. rc = qede_del_cls_rule(edev, info);
  1068. break;
  1069. default:
  1070. DP_INFO(edev, "Command parameters not supported\n");
  1071. rc = -EOPNOTSUPP;
  1072. }
  1073. return rc;
  1074. }
  1075. static u32 qede_get_rxfh_indir_size(struct net_device *dev)
  1076. {
  1077. return QED_RSS_IND_TABLE_SIZE;
  1078. }
  1079. static u32 qede_get_rxfh_key_size(struct net_device *dev)
  1080. {
  1081. struct qede_dev *edev = netdev_priv(dev);
  1082. return sizeof(edev->rss_key);
  1083. }
  1084. static int qede_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, u8 *hfunc)
  1085. {
  1086. struct qede_dev *edev = netdev_priv(dev);
  1087. int i;
  1088. if (hfunc)
  1089. *hfunc = ETH_RSS_HASH_TOP;
  1090. if (!indir)
  1091. return 0;
  1092. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
  1093. indir[i] = edev->rss_ind_table[i];
  1094. if (key)
  1095. memcpy(key, edev->rss_key, qede_get_rxfh_key_size(dev));
  1096. return 0;
  1097. }
  1098. static int qede_set_rxfh(struct net_device *dev, const u32 *indir,
  1099. const u8 *key, const u8 hfunc)
  1100. {
  1101. struct qed_update_vport_params *vport_update_params;
  1102. struct qede_dev *edev = netdev_priv(dev);
  1103. int i, rc = 0;
  1104. if (edev->dev_info.common.num_hwfns > 1) {
  1105. DP_INFO(edev,
  1106. "RSS configuration is not supported for 100G devices\n");
  1107. return -EOPNOTSUPP;
  1108. }
  1109. if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
  1110. return -EOPNOTSUPP;
  1111. if (!indir && !key)
  1112. return 0;
  1113. if (indir) {
  1114. for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++)
  1115. edev->rss_ind_table[i] = indir[i];
  1116. edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
  1117. }
  1118. if (key) {
  1119. memcpy(&edev->rss_key, key, qede_get_rxfh_key_size(dev));
  1120. edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
  1121. }
  1122. __qede_lock(edev);
  1123. if (edev->state == QEDE_STATE_OPEN) {
  1124. vport_update_params = vzalloc(sizeof(*vport_update_params));
  1125. if (!vport_update_params) {
  1126. __qede_unlock(edev);
  1127. return -ENOMEM;
  1128. }
  1129. qede_fill_rss_params(edev, &vport_update_params->rss_params,
  1130. &vport_update_params->update_rss_flg);
  1131. rc = edev->ops->vport_update(edev->cdev, vport_update_params);
  1132. vfree(vport_update_params);
  1133. }
  1134. __qede_unlock(edev);
  1135. return rc;
  1136. }
  1137. /* This function enables the interrupt generation and the NAPI on the device */
  1138. static void qede_netif_start(struct qede_dev *edev)
  1139. {
  1140. int i;
  1141. if (!netif_running(edev->ndev))
  1142. return;
  1143. for_each_queue(i) {
  1144. /* Update and reenable interrupts */
  1145. qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_ENABLE, 1);
  1146. napi_enable(&edev->fp_array[i].napi);
  1147. }
  1148. }
  1149. /* This function disables the NAPI and the interrupt generation on the device */
  1150. static void qede_netif_stop(struct qede_dev *edev)
  1151. {
  1152. int i;
  1153. for_each_queue(i) {
  1154. napi_disable(&edev->fp_array[i].napi);
  1155. /* Disable interrupts */
  1156. qed_sb_ack(edev->fp_array[i].sb_info, IGU_INT_DISABLE, 0);
  1157. }
  1158. }
  1159. static int qede_selftest_transmit_traffic(struct qede_dev *edev,
  1160. struct sk_buff *skb)
  1161. {
  1162. struct qede_tx_queue *txq = NULL;
  1163. struct eth_tx_1st_bd *first_bd;
  1164. dma_addr_t mapping;
  1165. int i, idx;
  1166. u16 val;
  1167. for_each_queue(i) {
  1168. if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
  1169. txq = edev->fp_array[i].txq;
  1170. break;
  1171. }
  1172. }
  1173. if (!txq) {
  1174. DP_NOTICE(edev, "Tx path is not available\n");
  1175. return -1;
  1176. }
  1177. /* Fill the entry in the SW ring and the BDs in the FW ring */
  1178. idx = txq->sw_tx_prod;
  1179. txq->sw_tx_ring.skbs[idx].skb = skb;
  1180. first_bd = qed_chain_produce(&txq->tx_pbl);
  1181. memset(first_bd, 0, sizeof(*first_bd));
  1182. val = 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
  1183. first_bd->data.bd_flags.bitfields = val;
  1184. val = skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK;
  1185. val = val << ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
  1186. first_bd->data.bitfields |= cpu_to_le16(val);
  1187. /* Map skb linear data for DMA and set in the first BD */
  1188. mapping = dma_map_single(&edev->pdev->dev, skb->data,
  1189. skb_headlen(skb), DMA_TO_DEVICE);
  1190. if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
  1191. DP_NOTICE(edev, "SKB mapping failed\n");
  1192. return -ENOMEM;
  1193. }
  1194. BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
  1195. /* update the first BD with the actual num BDs */
  1196. first_bd->data.nbds = 1;
  1197. txq->sw_tx_prod = (txq->sw_tx_prod + 1) % txq->num_tx_buffers;
  1198. /* 'next page' entries are counted in the producer value */
  1199. val = qed_chain_get_prod_idx(&txq->tx_pbl);
  1200. txq->tx_db.data.bd_prod = cpu_to_le16(val);
  1201. /* wmb makes sure that the BDs data is updated before updating the
  1202. * producer, otherwise FW may read old data from the BDs.
  1203. */
  1204. wmb();
  1205. barrier();
  1206. writel(txq->tx_db.raw, txq->doorbell_addr);
  1207. /* mmiowb is needed to synchronize doorbell writes from more than one
  1208. * processor. It guarantees that the write arrives to the device before
  1209. * the queue lock is released and another start_xmit is called (possibly
  1210. * on another CPU). Without this barrier, the next doorbell can bypass
  1211. * this doorbell. This is applicable to IA64/Altix systems.
  1212. */
  1213. mmiowb();
  1214. for (i = 0; i < QEDE_SELFTEST_POLL_COUNT; i++) {
  1215. if (qede_txq_has_work(txq))
  1216. break;
  1217. usleep_range(100, 200);
  1218. }
  1219. if (!qede_txq_has_work(txq)) {
  1220. DP_NOTICE(edev, "Tx completion didn't happen\n");
  1221. return -1;
  1222. }
  1223. first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  1224. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
  1225. BD_UNMAP_LEN(first_bd), DMA_TO_DEVICE);
  1226. txq->sw_tx_cons = (txq->sw_tx_cons + 1) % txq->num_tx_buffers;
  1227. txq->sw_tx_ring.skbs[idx].skb = NULL;
  1228. return 0;
  1229. }
  1230. static int qede_selftest_receive_traffic(struct qede_dev *edev)
  1231. {
  1232. u16 hw_comp_cons, sw_comp_cons, sw_rx_index, len;
  1233. struct eth_fast_path_rx_reg_cqe *fp_cqe;
  1234. struct qede_rx_queue *rxq = NULL;
  1235. struct sw_rx_data *sw_rx_data;
  1236. union eth_rx_cqe *cqe;
  1237. int i, iter, rc = 0;
  1238. u8 *data_ptr;
  1239. for_each_queue(i) {
  1240. if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
  1241. rxq = edev->fp_array[i].rxq;
  1242. break;
  1243. }
  1244. }
  1245. if (!rxq) {
  1246. DP_NOTICE(edev, "Rx path is not available\n");
  1247. return -1;
  1248. }
  1249. /* The packet is expected to receive on rx-queue 0 even though RSS is
  1250. * enabled. This is because the queue 0 is configured as the default
  1251. * queue and that the loopback traffic is not IP.
  1252. */
  1253. for (iter = 0; iter < QEDE_SELFTEST_POLL_COUNT; iter++) {
  1254. if (!qede_has_rx_work(rxq)) {
  1255. usleep_range(100, 200);
  1256. continue;
  1257. }
  1258. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  1259. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1260. /* Memory barrier to prevent the CPU from doing speculative
  1261. * reads of CQE/BD before reading hw_comp_cons. If the CQE is
  1262. * read before it is written by FW, then FW writes CQE and SB,
  1263. * and then the CPU reads the hw_comp_cons, it will use an old
  1264. * CQE.
  1265. */
  1266. rmb();
  1267. /* Get the CQE from the completion ring */
  1268. cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
  1269. /* Get the data from the SW ring */
  1270. sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1271. sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
  1272. fp_cqe = &cqe->fast_path_regular;
  1273. len = le16_to_cpu(fp_cqe->len_on_first_bd);
  1274. data_ptr = (u8 *)(page_address(sw_rx_data->data) +
  1275. fp_cqe->placement_offset +
  1276. sw_rx_data->page_offset);
  1277. if (ether_addr_equal(data_ptr, edev->ndev->dev_addr) &&
  1278. ether_addr_equal(data_ptr + ETH_ALEN,
  1279. edev->ndev->dev_addr)) {
  1280. for (i = ETH_HLEN; i < len; i++)
  1281. if (data_ptr[i] != (unsigned char)(i & 0xff)) {
  1282. rc = -1;
  1283. break;
  1284. }
  1285. qede_recycle_rx_bd_ring(rxq, 1);
  1286. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1287. break;
  1288. }
  1289. DP_INFO(edev, "Not the transmitted packet\n");
  1290. qede_recycle_rx_bd_ring(rxq, 1);
  1291. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1292. }
  1293. if (iter == QEDE_SELFTEST_POLL_COUNT) {
  1294. DP_NOTICE(edev, "Failed to receive the traffic\n");
  1295. return -1;
  1296. }
  1297. qede_update_rx_prod(edev, rxq);
  1298. return rc;
  1299. }
  1300. static int qede_selftest_run_loopback(struct qede_dev *edev, u32 loopback_mode)
  1301. {
  1302. struct qed_link_params link_params;
  1303. struct sk_buff *skb = NULL;
  1304. int rc = 0, i;
  1305. u32 pkt_size;
  1306. u8 *packet;
  1307. if (!netif_running(edev->ndev)) {
  1308. DP_NOTICE(edev, "Interface is down\n");
  1309. return -EINVAL;
  1310. }
  1311. qede_netif_stop(edev);
  1312. /* Bring up the link in Loopback mode */
  1313. memset(&link_params, 0, sizeof(link_params));
  1314. link_params.link_up = true;
  1315. link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
  1316. link_params.loopback_mode = loopback_mode;
  1317. edev->ops->common->set_link(edev->cdev, &link_params);
  1318. /* Wait for loopback configuration to apply */
  1319. msleep_interruptible(500);
  1320. /* prepare the loopback packet */
  1321. pkt_size = edev->ndev->mtu + ETH_HLEN;
  1322. skb = netdev_alloc_skb(edev->ndev, pkt_size);
  1323. if (!skb) {
  1324. DP_INFO(edev, "Can't allocate skb\n");
  1325. rc = -ENOMEM;
  1326. goto test_loopback_exit;
  1327. }
  1328. packet = skb_put(skb, pkt_size);
  1329. ether_addr_copy(packet, edev->ndev->dev_addr);
  1330. ether_addr_copy(packet + ETH_ALEN, edev->ndev->dev_addr);
  1331. memset(packet + (2 * ETH_ALEN), 0x77, (ETH_HLEN - (2 * ETH_ALEN)));
  1332. for (i = ETH_HLEN; i < pkt_size; i++)
  1333. packet[i] = (unsigned char)(i & 0xff);
  1334. rc = qede_selftest_transmit_traffic(edev, skb);
  1335. if (rc)
  1336. goto test_loopback_exit;
  1337. rc = qede_selftest_receive_traffic(edev);
  1338. if (rc)
  1339. goto test_loopback_exit;
  1340. DP_VERBOSE(edev, NETIF_MSG_RX_STATUS, "Loopback test successful\n");
  1341. test_loopback_exit:
  1342. dev_kfree_skb(skb);
  1343. /* Bring up the link in Normal mode */
  1344. memset(&link_params, 0, sizeof(link_params));
  1345. link_params.link_up = true;
  1346. link_params.override_flags = QED_LINK_OVERRIDE_LOOPBACK_MODE;
  1347. link_params.loopback_mode = QED_LINK_LOOPBACK_NONE;
  1348. edev->ops->common->set_link(edev->cdev, &link_params);
  1349. /* Wait for loopback configuration to apply */
  1350. msleep_interruptible(500);
  1351. qede_netif_start(edev);
  1352. return rc;
  1353. }
  1354. static void qede_self_test(struct net_device *dev,
  1355. struct ethtool_test *etest, u64 *buf)
  1356. {
  1357. struct qede_dev *edev = netdev_priv(dev);
  1358. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1359. "Self-test command parameters: offline = %d, external_lb = %d\n",
  1360. (etest->flags & ETH_TEST_FL_OFFLINE),
  1361. (etest->flags & ETH_TEST_FL_EXTERNAL_LB) >> 2);
  1362. memset(buf, 0, sizeof(u64) * QEDE_ETHTOOL_TEST_MAX);
  1363. if (etest->flags & ETH_TEST_FL_OFFLINE) {
  1364. if (qede_selftest_run_loopback(edev,
  1365. QED_LINK_LOOPBACK_INT_PHY)) {
  1366. buf[QEDE_ETHTOOL_INT_LOOPBACK] = 1;
  1367. etest->flags |= ETH_TEST_FL_FAILED;
  1368. }
  1369. }
  1370. if (edev->ops->common->selftest->selftest_interrupt(edev->cdev)) {
  1371. buf[QEDE_ETHTOOL_INTERRUPT_TEST] = 1;
  1372. etest->flags |= ETH_TEST_FL_FAILED;
  1373. }
  1374. if (edev->ops->common->selftest->selftest_memory(edev->cdev)) {
  1375. buf[QEDE_ETHTOOL_MEMORY_TEST] = 1;
  1376. etest->flags |= ETH_TEST_FL_FAILED;
  1377. }
  1378. if (edev->ops->common->selftest->selftest_register(edev->cdev)) {
  1379. buf[QEDE_ETHTOOL_REGISTER_TEST] = 1;
  1380. etest->flags |= ETH_TEST_FL_FAILED;
  1381. }
  1382. if (edev->ops->common->selftest->selftest_clock(edev->cdev)) {
  1383. buf[QEDE_ETHTOOL_CLOCK_TEST] = 1;
  1384. etest->flags |= ETH_TEST_FL_FAILED;
  1385. }
  1386. if (edev->ops->common->selftest->selftest_nvram(edev->cdev)) {
  1387. buf[QEDE_ETHTOOL_NVRAM_TEST] = 1;
  1388. etest->flags |= ETH_TEST_FL_FAILED;
  1389. }
  1390. }
  1391. static int qede_set_tunable(struct net_device *dev,
  1392. const struct ethtool_tunable *tuna,
  1393. const void *data)
  1394. {
  1395. struct qede_dev *edev = netdev_priv(dev);
  1396. u32 val;
  1397. switch (tuna->id) {
  1398. case ETHTOOL_RX_COPYBREAK:
  1399. val = *(u32 *)data;
  1400. if (val < QEDE_MIN_PKT_LEN || val > QEDE_RX_HDR_SIZE) {
  1401. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1402. "Invalid rx copy break value, range is [%u, %u]",
  1403. QEDE_MIN_PKT_LEN, QEDE_RX_HDR_SIZE);
  1404. return -EINVAL;
  1405. }
  1406. edev->rx_copybreak = *(u32 *)data;
  1407. break;
  1408. default:
  1409. return -EOPNOTSUPP;
  1410. }
  1411. return 0;
  1412. }
  1413. static int qede_get_tunable(struct net_device *dev,
  1414. const struct ethtool_tunable *tuna, void *data)
  1415. {
  1416. struct qede_dev *edev = netdev_priv(dev);
  1417. switch (tuna->id) {
  1418. case ETHTOOL_RX_COPYBREAK:
  1419. *(u32 *)data = edev->rx_copybreak;
  1420. break;
  1421. default:
  1422. return -EOPNOTSUPP;
  1423. }
  1424. return 0;
  1425. }
  1426. static int qede_get_eee(struct net_device *dev, struct ethtool_eee *edata)
  1427. {
  1428. struct qede_dev *edev = netdev_priv(dev);
  1429. struct qed_link_output current_link;
  1430. memset(&current_link, 0, sizeof(current_link));
  1431. edev->ops->common->get_link(edev->cdev, &current_link);
  1432. if (!current_link.eee_supported) {
  1433. DP_INFO(edev, "EEE is not supported\n");
  1434. return -EOPNOTSUPP;
  1435. }
  1436. if (current_link.eee.adv_caps & QED_EEE_1G_ADV)
  1437. edata->advertised = ADVERTISED_1000baseT_Full;
  1438. if (current_link.eee.adv_caps & QED_EEE_10G_ADV)
  1439. edata->advertised |= ADVERTISED_10000baseT_Full;
  1440. if (current_link.sup_caps & QED_EEE_1G_ADV)
  1441. edata->supported = ADVERTISED_1000baseT_Full;
  1442. if (current_link.sup_caps & QED_EEE_10G_ADV)
  1443. edata->supported |= ADVERTISED_10000baseT_Full;
  1444. if (current_link.eee.lp_adv_caps & QED_EEE_1G_ADV)
  1445. edata->lp_advertised = ADVERTISED_1000baseT_Full;
  1446. if (current_link.eee.lp_adv_caps & QED_EEE_10G_ADV)
  1447. edata->lp_advertised |= ADVERTISED_10000baseT_Full;
  1448. edata->tx_lpi_timer = current_link.eee.tx_lpi_timer;
  1449. edata->eee_enabled = current_link.eee.enable;
  1450. edata->tx_lpi_enabled = current_link.eee.tx_lpi_enable;
  1451. edata->eee_active = current_link.eee_active;
  1452. return 0;
  1453. }
  1454. static int qede_set_eee(struct net_device *dev, struct ethtool_eee *edata)
  1455. {
  1456. struct qede_dev *edev = netdev_priv(dev);
  1457. struct qed_link_output current_link;
  1458. struct qed_link_params params;
  1459. if (!edev->ops->common->can_link_change(edev->cdev)) {
  1460. DP_INFO(edev, "Link settings are not allowed to be changed\n");
  1461. return -EOPNOTSUPP;
  1462. }
  1463. memset(&current_link, 0, sizeof(current_link));
  1464. edev->ops->common->get_link(edev->cdev, &current_link);
  1465. if (!current_link.eee_supported) {
  1466. DP_INFO(edev, "EEE is not supported\n");
  1467. return -EOPNOTSUPP;
  1468. }
  1469. memset(&params, 0, sizeof(params));
  1470. params.override_flags |= QED_LINK_OVERRIDE_EEE_CONFIG;
  1471. if (!(edata->advertised & (ADVERTISED_1000baseT_Full |
  1472. ADVERTISED_10000baseT_Full)) ||
  1473. ((edata->advertised & (ADVERTISED_1000baseT_Full |
  1474. ADVERTISED_10000baseT_Full)) !=
  1475. edata->advertised)) {
  1476. DP_VERBOSE(edev, QED_MSG_DEBUG,
  1477. "Invalid advertised capabilities %d\n",
  1478. edata->advertised);
  1479. return -EINVAL;
  1480. }
  1481. if (edata->advertised & ADVERTISED_1000baseT_Full)
  1482. params.eee.adv_caps = QED_EEE_1G_ADV;
  1483. if (edata->advertised & ADVERTISED_10000baseT_Full)
  1484. params.eee.adv_caps |= QED_EEE_10G_ADV;
  1485. params.eee.enable = edata->eee_enabled;
  1486. params.eee.tx_lpi_enable = edata->tx_lpi_enabled;
  1487. params.eee.tx_lpi_timer = edata->tx_lpi_timer;
  1488. params.link_up = true;
  1489. edev->ops->common->set_link(edev->cdev, &params);
  1490. return 0;
  1491. }
  1492. static const struct ethtool_ops qede_ethtool_ops = {
  1493. .get_link_ksettings = qede_get_link_ksettings,
  1494. .set_link_ksettings = qede_set_link_ksettings,
  1495. .get_drvinfo = qede_get_drvinfo,
  1496. .get_regs_len = qede_get_regs_len,
  1497. .get_regs = qede_get_regs,
  1498. .get_wol = qede_get_wol,
  1499. .set_wol = qede_set_wol,
  1500. .get_msglevel = qede_get_msglevel,
  1501. .set_msglevel = qede_set_msglevel,
  1502. .nway_reset = qede_nway_reset,
  1503. .get_link = qede_get_link,
  1504. .get_coalesce = qede_get_coalesce,
  1505. .set_coalesce = qede_set_coalesce,
  1506. .get_ringparam = qede_get_ringparam,
  1507. .set_ringparam = qede_set_ringparam,
  1508. .get_pauseparam = qede_get_pauseparam,
  1509. .set_pauseparam = qede_set_pauseparam,
  1510. .get_strings = qede_get_strings,
  1511. .set_phys_id = qede_set_phys_id,
  1512. .get_ethtool_stats = qede_get_ethtool_stats,
  1513. .get_priv_flags = qede_get_priv_flags,
  1514. .get_sset_count = qede_get_sset_count,
  1515. .get_rxnfc = qede_get_rxnfc,
  1516. .set_rxnfc = qede_set_rxnfc,
  1517. .get_rxfh_indir_size = qede_get_rxfh_indir_size,
  1518. .get_rxfh_key_size = qede_get_rxfh_key_size,
  1519. .get_rxfh = qede_get_rxfh,
  1520. .set_rxfh = qede_set_rxfh,
  1521. .get_ts_info = qede_get_ts_info,
  1522. .get_channels = qede_get_channels,
  1523. .set_channels = qede_set_channels,
  1524. .self_test = qede_self_test,
  1525. .get_eee = qede_get_eee,
  1526. .set_eee = qede_set_eee,
  1527. .get_tunable = qede_get_tunable,
  1528. .set_tunable = qede_set_tunable,
  1529. };
  1530. static const struct ethtool_ops qede_vf_ethtool_ops = {
  1531. .get_link_ksettings = qede_get_link_ksettings,
  1532. .get_drvinfo = qede_get_drvinfo,
  1533. .get_msglevel = qede_get_msglevel,
  1534. .set_msglevel = qede_set_msglevel,
  1535. .get_link = qede_get_link,
  1536. .get_coalesce = qede_get_coalesce,
  1537. .set_coalesce = qede_set_coalesce,
  1538. .get_ringparam = qede_get_ringparam,
  1539. .set_ringparam = qede_set_ringparam,
  1540. .get_strings = qede_get_strings,
  1541. .get_ethtool_stats = qede_get_ethtool_stats,
  1542. .get_priv_flags = qede_get_priv_flags,
  1543. .get_sset_count = qede_get_sset_count,
  1544. .get_rxnfc = qede_get_rxnfc,
  1545. .set_rxnfc = qede_set_rxnfc,
  1546. .get_rxfh_indir_size = qede_get_rxfh_indir_size,
  1547. .get_rxfh_key_size = qede_get_rxfh_key_size,
  1548. .get_rxfh = qede_get_rxfh,
  1549. .set_rxfh = qede_set_rxfh,
  1550. .get_channels = qede_get_channels,
  1551. .set_channels = qede_set_channels,
  1552. .get_tunable = qede_get_tunable,
  1553. .set_tunable = qede_set_tunable,
  1554. };
  1555. void qede_set_ethtool_ops(struct net_device *dev)
  1556. {
  1557. struct qede_dev *edev = netdev_priv(dev);
  1558. if (IS_VF(edev))
  1559. dev->ethtool_ops = &qede_vf_ethtool_ops;
  1560. else
  1561. dev->ethtool_ops = &qede_ethtool_ops;
  1562. }