qed_spq.c 25 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/types.h>
  33. #include <asm/byteorder.h>
  34. #include <linux/io.h>
  35. #include <linux/delay.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/errno.h>
  38. #include <linux/kernel.h>
  39. #include <linux/list.h>
  40. #include <linux/pci.h>
  41. #include <linux/slab.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/string.h>
  44. #include "qed.h"
  45. #include "qed_cxt.h"
  46. #include "qed_dev_api.h"
  47. #include "qed_hsi.h"
  48. #include "qed_hw.h"
  49. #include "qed_int.h"
  50. #include "qed_iscsi.h"
  51. #include "qed_mcp.h"
  52. #include "qed_ooo.h"
  53. #include "qed_reg_addr.h"
  54. #include "qed_sp.h"
  55. #include "qed_sriov.h"
  56. #include "qed_rdma.h"
  57. /***************************************************************************
  58. * Structures & Definitions
  59. ***************************************************************************/
  60. #define SPQ_HIGH_PRI_RESERVE_DEFAULT (1)
  61. #define SPQ_BLOCK_DELAY_MAX_ITER (10)
  62. #define SPQ_BLOCK_DELAY_US (10)
  63. #define SPQ_BLOCK_SLEEP_MAX_ITER (1000)
  64. #define SPQ_BLOCK_SLEEP_MS (5)
  65. /***************************************************************************
  66. * Blocking Imp. (BLOCK/EBLOCK mode)
  67. ***************************************************************************/
  68. static void qed_spq_blocking_cb(struct qed_hwfn *p_hwfn,
  69. void *cookie,
  70. union event_ring_data *data, u8 fw_return_code)
  71. {
  72. struct qed_spq_comp_done *comp_done;
  73. comp_done = (struct qed_spq_comp_done *)cookie;
  74. comp_done->fw_return_code = fw_return_code;
  75. /* Make sure completion done is visible on waiting thread */
  76. smp_store_release(&comp_done->done, 0x1);
  77. }
  78. static int __qed_spq_block(struct qed_hwfn *p_hwfn,
  79. struct qed_spq_entry *p_ent,
  80. u8 *p_fw_ret, bool sleep_between_iter)
  81. {
  82. struct qed_spq_comp_done *comp_done;
  83. u32 iter_cnt;
  84. comp_done = (struct qed_spq_comp_done *)p_ent->comp_cb.cookie;
  85. iter_cnt = sleep_between_iter ? SPQ_BLOCK_SLEEP_MAX_ITER
  86. : SPQ_BLOCK_DELAY_MAX_ITER;
  87. while (iter_cnt--) {
  88. /* Validate we receive completion update */
  89. if (READ_ONCE(comp_done->done) == 1) {
  90. /* Read updated FW return value */
  91. smp_read_barrier_depends();
  92. if (p_fw_ret)
  93. *p_fw_ret = comp_done->fw_return_code;
  94. return 0;
  95. }
  96. if (sleep_between_iter)
  97. msleep(SPQ_BLOCK_SLEEP_MS);
  98. else
  99. udelay(SPQ_BLOCK_DELAY_US);
  100. }
  101. return -EBUSY;
  102. }
  103. static int qed_spq_block(struct qed_hwfn *p_hwfn,
  104. struct qed_spq_entry *p_ent,
  105. u8 *p_fw_ret, bool skip_quick_poll)
  106. {
  107. struct qed_spq_comp_done *comp_done;
  108. struct qed_ptt *p_ptt;
  109. int rc;
  110. /* A relatively short polling period w/o sleeping, to allow the FW to
  111. * complete the ramrod and thus possibly to avoid the following sleeps.
  112. */
  113. if (!skip_quick_poll) {
  114. rc = __qed_spq_block(p_hwfn, p_ent, p_fw_ret, false);
  115. if (!rc)
  116. return 0;
  117. }
  118. /* Move to polling with a sleeping period between iterations */
  119. rc = __qed_spq_block(p_hwfn, p_ent, p_fw_ret, true);
  120. if (!rc)
  121. return 0;
  122. p_ptt = qed_ptt_acquire(p_hwfn);
  123. if (!p_ptt) {
  124. DP_NOTICE(p_hwfn, "ptt, failed to acquire\n");
  125. return -EAGAIN;
  126. }
  127. DP_INFO(p_hwfn, "Ramrod is stuck, requesting MCP drain\n");
  128. rc = qed_mcp_drain(p_hwfn, p_ptt);
  129. if (rc) {
  130. DP_NOTICE(p_hwfn, "MCP drain failed\n");
  131. goto err;
  132. }
  133. /* Retry after drain */
  134. rc = __qed_spq_block(p_hwfn, p_ent, p_fw_ret, true);
  135. if (!rc)
  136. goto out;
  137. comp_done = (struct qed_spq_comp_done *)p_ent->comp_cb.cookie;
  138. if (comp_done->done == 1)
  139. if (p_fw_ret)
  140. *p_fw_ret = comp_done->fw_return_code;
  141. out:
  142. qed_ptt_release(p_hwfn, p_ptt);
  143. return 0;
  144. err:
  145. qed_ptt_release(p_hwfn, p_ptt);
  146. DP_NOTICE(p_hwfn,
  147. "Ramrod is stuck [CID %08x cmd %02x protocol %02x echo %04x]\n",
  148. le32_to_cpu(p_ent->elem.hdr.cid),
  149. p_ent->elem.hdr.cmd_id,
  150. p_ent->elem.hdr.protocol_id,
  151. le16_to_cpu(p_ent->elem.hdr.echo));
  152. return -EBUSY;
  153. }
  154. /***************************************************************************
  155. * SPQ entries inner API
  156. ***************************************************************************/
  157. static int qed_spq_fill_entry(struct qed_hwfn *p_hwfn,
  158. struct qed_spq_entry *p_ent)
  159. {
  160. p_ent->flags = 0;
  161. switch (p_ent->comp_mode) {
  162. case QED_SPQ_MODE_EBLOCK:
  163. case QED_SPQ_MODE_BLOCK:
  164. p_ent->comp_cb.function = qed_spq_blocking_cb;
  165. break;
  166. case QED_SPQ_MODE_CB:
  167. break;
  168. default:
  169. DP_NOTICE(p_hwfn, "Unknown SPQE completion mode %d\n",
  170. p_ent->comp_mode);
  171. return -EINVAL;
  172. }
  173. DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
  174. "Ramrod header: [CID 0x%08x CMD 0x%02x protocol 0x%02x] Data pointer: [%08x:%08x] Completion Mode: %s\n",
  175. p_ent->elem.hdr.cid,
  176. p_ent->elem.hdr.cmd_id,
  177. p_ent->elem.hdr.protocol_id,
  178. p_ent->elem.data_ptr.hi,
  179. p_ent->elem.data_ptr.lo,
  180. D_TRINE(p_ent->comp_mode, QED_SPQ_MODE_EBLOCK,
  181. QED_SPQ_MODE_BLOCK, "MODE_EBLOCK", "MODE_BLOCK",
  182. "MODE_CB"));
  183. return 0;
  184. }
  185. /***************************************************************************
  186. * HSI access
  187. ***************************************************************************/
  188. static void qed_spq_hw_initialize(struct qed_hwfn *p_hwfn,
  189. struct qed_spq *p_spq)
  190. {
  191. struct core_conn_context *p_cxt;
  192. struct qed_cxt_info cxt_info;
  193. u16 physical_q;
  194. int rc;
  195. cxt_info.iid = p_spq->cid;
  196. rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
  197. if (rc < 0) {
  198. DP_NOTICE(p_hwfn, "Cannot find context info for cid=%d\n",
  199. p_spq->cid);
  200. return;
  201. }
  202. p_cxt = cxt_info.p_cxt;
  203. SET_FIELD(p_cxt->xstorm_ag_context.flags10,
  204. XSTORM_CORE_CONN_AG_CTX_DQ_CF_EN, 1);
  205. SET_FIELD(p_cxt->xstorm_ag_context.flags1,
  206. XSTORM_CORE_CONN_AG_CTX_DQ_CF_ACTIVE, 1);
  207. SET_FIELD(p_cxt->xstorm_ag_context.flags9,
  208. XSTORM_CORE_CONN_AG_CTX_CONSOLID_PROD_CF_EN, 1);
  209. /* QM physical queue */
  210. physical_q = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
  211. p_cxt->xstorm_ag_context.physical_q0 = cpu_to_le16(physical_q);
  212. p_cxt->xstorm_st_context.spq_base_lo =
  213. DMA_LO_LE(p_spq->chain.p_phys_addr);
  214. p_cxt->xstorm_st_context.spq_base_hi =
  215. DMA_HI_LE(p_spq->chain.p_phys_addr);
  216. DMA_REGPAIR_LE(p_cxt->xstorm_st_context.consolid_base_addr,
  217. p_hwfn->p_consq->chain.p_phys_addr);
  218. }
  219. static int qed_spq_hw_post(struct qed_hwfn *p_hwfn,
  220. struct qed_spq *p_spq, struct qed_spq_entry *p_ent)
  221. {
  222. struct qed_chain *p_chain = &p_hwfn->p_spq->chain;
  223. u16 echo = qed_chain_get_prod_idx(p_chain);
  224. struct slow_path_element *elem;
  225. struct core_db_data db;
  226. p_ent->elem.hdr.echo = cpu_to_le16(echo);
  227. elem = qed_chain_produce(p_chain);
  228. if (!elem) {
  229. DP_NOTICE(p_hwfn, "Failed to produce from SPQ chain\n");
  230. return -EINVAL;
  231. }
  232. *elem = p_ent->elem; /* struct assignment */
  233. /* send a doorbell on the slow hwfn session */
  234. memset(&db, 0, sizeof(db));
  235. SET_FIELD(db.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
  236. SET_FIELD(db.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
  237. SET_FIELD(db.params, CORE_DB_DATA_AGG_VAL_SEL,
  238. DQ_XCM_CORE_SPQ_PROD_CMD);
  239. db.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
  240. db.spq_prod = cpu_to_le16(qed_chain_get_prod_idx(p_chain));
  241. /* make sure the SPQE is updated before the doorbell */
  242. wmb();
  243. DOORBELL(p_hwfn, qed_db_addr(p_spq->cid, DQ_DEMS_LEGACY), *(u32 *)&db);
  244. /* make sure doorbell is rang */
  245. wmb();
  246. DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
  247. "Doorbelled [0x%08x, CID 0x%08x] with Flags: %02x agg_params: %02x, prod: %04x\n",
  248. qed_db_addr(p_spq->cid, DQ_DEMS_LEGACY),
  249. p_spq->cid, db.params, db.agg_flags,
  250. qed_chain_get_prod_idx(p_chain));
  251. return 0;
  252. }
  253. /***************************************************************************
  254. * Asynchronous events
  255. ***************************************************************************/
  256. static int
  257. qed_async_event_completion(struct qed_hwfn *p_hwfn,
  258. struct event_ring_entry *p_eqe)
  259. {
  260. qed_spq_async_comp_cb cb;
  261. if (!p_hwfn->p_spq || (p_eqe->protocol_id >= MAX_PROTOCOL_TYPE))
  262. return -EINVAL;
  263. cb = p_hwfn->p_spq->async_comp_cb[p_eqe->protocol_id];
  264. if (cb) {
  265. return cb(p_hwfn, p_eqe->opcode, p_eqe->echo,
  266. &p_eqe->data, p_eqe->fw_return_code);
  267. } else {
  268. DP_NOTICE(p_hwfn,
  269. "Unknown Async completion for protocol: %d\n",
  270. p_eqe->protocol_id);
  271. return -EINVAL;
  272. }
  273. }
  274. int
  275. qed_spq_register_async_cb(struct qed_hwfn *p_hwfn,
  276. enum protocol_type protocol_id,
  277. qed_spq_async_comp_cb cb)
  278. {
  279. if (!p_hwfn->p_spq || (protocol_id >= MAX_PROTOCOL_TYPE))
  280. return -EINVAL;
  281. p_hwfn->p_spq->async_comp_cb[protocol_id] = cb;
  282. return 0;
  283. }
  284. void
  285. qed_spq_unregister_async_cb(struct qed_hwfn *p_hwfn,
  286. enum protocol_type protocol_id)
  287. {
  288. if (!p_hwfn->p_spq || (protocol_id >= MAX_PROTOCOL_TYPE))
  289. return;
  290. p_hwfn->p_spq->async_comp_cb[protocol_id] = NULL;
  291. }
  292. /***************************************************************************
  293. * EQ API
  294. ***************************************************************************/
  295. void qed_eq_prod_update(struct qed_hwfn *p_hwfn, u16 prod)
  296. {
  297. u32 addr = GTT_BAR0_MAP_REG_USDM_RAM +
  298. USTORM_EQE_CONS_OFFSET(p_hwfn->rel_pf_id);
  299. REG_WR16(p_hwfn, addr, prod);
  300. /* keep prod updates ordered */
  301. mmiowb();
  302. }
  303. int qed_eq_completion(struct qed_hwfn *p_hwfn, void *cookie)
  304. {
  305. struct qed_eq *p_eq = cookie;
  306. struct qed_chain *p_chain = &p_eq->chain;
  307. int rc = 0;
  308. /* take a snapshot of the FW consumer */
  309. u16 fw_cons_idx = le16_to_cpu(*p_eq->p_fw_cons);
  310. DP_VERBOSE(p_hwfn, QED_MSG_SPQ, "fw_cons_idx %x\n", fw_cons_idx);
  311. /* Need to guarantee the fw_cons index we use points to a usuable
  312. * element (to comply with our chain), so our macros would comply
  313. */
  314. if ((fw_cons_idx & qed_chain_get_usable_per_page(p_chain)) ==
  315. qed_chain_get_usable_per_page(p_chain))
  316. fw_cons_idx += qed_chain_get_unusable_per_page(p_chain);
  317. /* Complete current segment of eq entries */
  318. while (fw_cons_idx != qed_chain_get_cons_idx(p_chain)) {
  319. struct event_ring_entry *p_eqe = qed_chain_consume(p_chain);
  320. if (!p_eqe) {
  321. rc = -EINVAL;
  322. break;
  323. }
  324. DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
  325. "op %x prot %x res0 %x echo %x fwret %x flags %x\n",
  326. p_eqe->opcode,
  327. p_eqe->protocol_id,
  328. p_eqe->reserved0,
  329. le16_to_cpu(p_eqe->echo),
  330. p_eqe->fw_return_code,
  331. p_eqe->flags);
  332. if (GET_FIELD(p_eqe->flags, EVENT_RING_ENTRY_ASYNC)) {
  333. if (qed_async_event_completion(p_hwfn, p_eqe))
  334. rc = -EINVAL;
  335. } else if (qed_spq_completion(p_hwfn,
  336. p_eqe->echo,
  337. p_eqe->fw_return_code,
  338. &p_eqe->data)) {
  339. rc = -EINVAL;
  340. }
  341. qed_chain_recycle_consumed(p_chain);
  342. }
  343. qed_eq_prod_update(p_hwfn, qed_chain_get_prod_idx(p_chain));
  344. return rc;
  345. }
  346. int qed_eq_alloc(struct qed_hwfn *p_hwfn, u16 num_elem)
  347. {
  348. struct qed_eq *p_eq;
  349. /* Allocate EQ struct */
  350. p_eq = kzalloc(sizeof(*p_eq), GFP_KERNEL);
  351. if (!p_eq)
  352. return -ENOMEM;
  353. /* Allocate and initialize EQ chain*/
  354. if (qed_chain_alloc(p_hwfn->cdev,
  355. QED_CHAIN_USE_TO_PRODUCE,
  356. QED_CHAIN_MODE_PBL,
  357. QED_CHAIN_CNT_TYPE_U16,
  358. num_elem,
  359. sizeof(union event_ring_element),
  360. &p_eq->chain, NULL))
  361. goto eq_allocate_fail;
  362. /* register EQ completion on the SP SB */
  363. qed_int_register_cb(p_hwfn, qed_eq_completion,
  364. p_eq, &p_eq->eq_sb_index, &p_eq->p_fw_cons);
  365. p_hwfn->p_eq = p_eq;
  366. return 0;
  367. eq_allocate_fail:
  368. kfree(p_eq);
  369. return -ENOMEM;
  370. }
  371. void qed_eq_setup(struct qed_hwfn *p_hwfn)
  372. {
  373. qed_chain_reset(&p_hwfn->p_eq->chain);
  374. }
  375. void qed_eq_free(struct qed_hwfn *p_hwfn)
  376. {
  377. if (!p_hwfn->p_eq)
  378. return;
  379. qed_chain_free(p_hwfn->cdev, &p_hwfn->p_eq->chain);
  380. kfree(p_hwfn->p_eq);
  381. p_hwfn->p_eq = NULL;
  382. }
  383. /***************************************************************************
  384. * CQE API - manipulate EQ functionality
  385. ***************************************************************************/
  386. static int qed_cqe_completion(struct qed_hwfn *p_hwfn,
  387. struct eth_slow_path_rx_cqe *cqe,
  388. enum protocol_type protocol)
  389. {
  390. if (IS_VF(p_hwfn->cdev))
  391. return 0;
  392. /* @@@tmp - it's possible we'll eventually want to handle some
  393. * actual commands that can arrive here, but for now this is only
  394. * used to complete the ramrod using the echo value on the cqe
  395. */
  396. return qed_spq_completion(p_hwfn, cqe->echo, 0, NULL);
  397. }
  398. int qed_eth_cqe_completion(struct qed_hwfn *p_hwfn,
  399. struct eth_slow_path_rx_cqe *cqe)
  400. {
  401. int rc;
  402. rc = qed_cqe_completion(p_hwfn, cqe, PROTOCOLID_ETH);
  403. if (rc)
  404. DP_NOTICE(p_hwfn,
  405. "Failed to handle RXQ CQE [cmd 0x%02x]\n",
  406. cqe->ramrod_cmd_id);
  407. return rc;
  408. }
  409. /***************************************************************************
  410. * Slow hwfn Queue (spq)
  411. ***************************************************************************/
  412. void qed_spq_setup(struct qed_hwfn *p_hwfn)
  413. {
  414. struct qed_spq *p_spq = p_hwfn->p_spq;
  415. struct qed_spq_entry *p_virt = NULL;
  416. dma_addr_t p_phys = 0;
  417. u32 i, capacity;
  418. INIT_LIST_HEAD(&p_spq->pending);
  419. INIT_LIST_HEAD(&p_spq->completion_pending);
  420. INIT_LIST_HEAD(&p_spq->free_pool);
  421. INIT_LIST_HEAD(&p_spq->unlimited_pending);
  422. spin_lock_init(&p_spq->lock);
  423. /* SPQ empty pool */
  424. p_phys = p_spq->p_phys + offsetof(struct qed_spq_entry, ramrod);
  425. p_virt = p_spq->p_virt;
  426. capacity = qed_chain_get_capacity(&p_spq->chain);
  427. for (i = 0; i < capacity; i++) {
  428. DMA_REGPAIR_LE(p_virt->elem.data_ptr, p_phys);
  429. list_add_tail(&p_virt->list, &p_spq->free_pool);
  430. p_virt++;
  431. p_phys += sizeof(struct qed_spq_entry);
  432. }
  433. /* Statistics */
  434. p_spq->normal_count = 0;
  435. p_spq->comp_count = 0;
  436. p_spq->comp_sent_count = 0;
  437. p_spq->unlimited_pending_count = 0;
  438. bitmap_zero(p_spq->p_comp_bitmap, SPQ_RING_SIZE);
  439. p_spq->comp_bitmap_idx = 0;
  440. /* SPQ cid, cannot fail */
  441. qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_spq->cid);
  442. qed_spq_hw_initialize(p_hwfn, p_spq);
  443. /* reset the chain itself */
  444. qed_chain_reset(&p_spq->chain);
  445. }
  446. int qed_spq_alloc(struct qed_hwfn *p_hwfn)
  447. {
  448. struct qed_spq_entry *p_virt = NULL;
  449. struct qed_spq *p_spq = NULL;
  450. dma_addr_t p_phys = 0;
  451. u32 capacity;
  452. /* SPQ struct */
  453. p_spq = kzalloc(sizeof(struct qed_spq), GFP_KERNEL);
  454. if (!p_spq)
  455. return -ENOMEM;
  456. /* SPQ ring */
  457. if (qed_chain_alloc(p_hwfn->cdev,
  458. QED_CHAIN_USE_TO_PRODUCE,
  459. QED_CHAIN_MODE_SINGLE,
  460. QED_CHAIN_CNT_TYPE_U16,
  461. 0, /* N/A when the mode is SINGLE */
  462. sizeof(struct slow_path_element),
  463. &p_spq->chain, NULL))
  464. goto spq_allocate_fail;
  465. /* allocate and fill the SPQ elements (incl. ramrod data list) */
  466. capacity = qed_chain_get_capacity(&p_spq->chain);
  467. p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  468. capacity * sizeof(struct qed_spq_entry),
  469. &p_phys, GFP_KERNEL);
  470. if (!p_virt)
  471. goto spq_allocate_fail;
  472. p_spq->p_virt = p_virt;
  473. p_spq->p_phys = p_phys;
  474. p_hwfn->p_spq = p_spq;
  475. return 0;
  476. spq_allocate_fail:
  477. qed_chain_free(p_hwfn->cdev, &p_spq->chain);
  478. kfree(p_spq);
  479. return -ENOMEM;
  480. }
  481. void qed_spq_free(struct qed_hwfn *p_hwfn)
  482. {
  483. struct qed_spq *p_spq = p_hwfn->p_spq;
  484. u32 capacity;
  485. if (!p_spq)
  486. return;
  487. if (p_spq->p_virt) {
  488. capacity = qed_chain_get_capacity(&p_spq->chain);
  489. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  490. capacity *
  491. sizeof(struct qed_spq_entry),
  492. p_spq->p_virt, p_spq->p_phys);
  493. }
  494. qed_chain_free(p_hwfn->cdev, &p_spq->chain);
  495. kfree(p_spq);
  496. p_hwfn->p_spq = NULL;
  497. }
  498. int qed_spq_get_entry(struct qed_hwfn *p_hwfn, struct qed_spq_entry **pp_ent)
  499. {
  500. struct qed_spq *p_spq = p_hwfn->p_spq;
  501. struct qed_spq_entry *p_ent = NULL;
  502. int rc = 0;
  503. spin_lock_bh(&p_spq->lock);
  504. if (list_empty(&p_spq->free_pool)) {
  505. p_ent = kzalloc(sizeof(*p_ent), GFP_ATOMIC);
  506. if (!p_ent) {
  507. DP_NOTICE(p_hwfn,
  508. "Failed to allocate an SPQ entry for a pending ramrod\n");
  509. rc = -ENOMEM;
  510. goto out_unlock;
  511. }
  512. p_ent->queue = &p_spq->unlimited_pending;
  513. } else {
  514. p_ent = list_first_entry(&p_spq->free_pool,
  515. struct qed_spq_entry, list);
  516. list_del(&p_ent->list);
  517. p_ent->queue = &p_spq->pending;
  518. }
  519. *pp_ent = p_ent;
  520. out_unlock:
  521. spin_unlock_bh(&p_spq->lock);
  522. return rc;
  523. }
  524. /* Locked variant; Should be called while the SPQ lock is taken */
  525. static void __qed_spq_return_entry(struct qed_hwfn *p_hwfn,
  526. struct qed_spq_entry *p_ent)
  527. {
  528. list_add_tail(&p_ent->list, &p_hwfn->p_spq->free_pool);
  529. }
  530. void qed_spq_return_entry(struct qed_hwfn *p_hwfn, struct qed_spq_entry *p_ent)
  531. {
  532. spin_lock_bh(&p_hwfn->p_spq->lock);
  533. __qed_spq_return_entry(p_hwfn, p_ent);
  534. spin_unlock_bh(&p_hwfn->p_spq->lock);
  535. }
  536. /**
  537. * @brief qed_spq_add_entry - adds a new entry to the pending
  538. * list. Should be used while lock is being held.
  539. *
  540. * Addes an entry to the pending list is there is room (en empty
  541. * element is available in the free_pool), or else places the
  542. * entry in the unlimited_pending pool.
  543. *
  544. * @param p_hwfn
  545. * @param p_ent
  546. * @param priority
  547. *
  548. * @return int
  549. */
  550. static int qed_spq_add_entry(struct qed_hwfn *p_hwfn,
  551. struct qed_spq_entry *p_ent,
  552. enum spq_priority priority)
  553. {
  554. struct qed_spq *p_spq = p_hwfn->p_spq;
  555. if (p_ent->queue == &p_spq->unlimited_pending) {
  556. if (list_empty(&p_spq->free_pool)) {
  557. list_add_tail(&p_ent->list, &p_spq->unlimited_pending);
  558. p_spq->unlimited_pending_count++;
  559. return 0;
  560. } else {
  561. struct qed_spq_entry *p_en2;
  562. p_en2 = list_first_entry(&p_spq->free_pool,
  563. struct qed_spq_entry, list);
  564. list_del(&p_en2->list);
  565. /* Copy the ring element physical pointer to the new
  566. * entry, since we are about to override the entire ring
  567. * entry and don't want to lose the pointer.
  568. */
  569. p_ent->elem.data_ptr = p_en2->elem.data_ptr;
  570. *p_en2 = *p_ent;
  571. /* EBLOCK responsible to free the allocated p_ent */
  572. if (p_ent->comp_mode != QED_SPQ_MODE_EBLOCK)
  573. kfree(p_ent);
  574. p_ent = p_en2;
  575. }
  576. }
  577. /* entry is to be placed in 'pending' queue */
  578. switch (priority) {
  579. case QED_SPQ_PRIORITY_NORMAL:
  580. list_add_tail(&p_ent->list, &p_spq->pending);
  581. p_spq->normal_count++;
  582. break;
  583. case QED_SPQ_PRIORITY_HIGH:
  584. list_add(&p_ent->list, &p_spq->pending);
  585. p_spq->high_count++;
  586. break;
  587. default:
  588. return -EINVAL;
  589. }
  590. return 0;
  591. }
  592. /***************************************************************************
  593. * Accessor
  594. ***************************************************************************/
  595. u32 qed_spq_get_cid(struct qed_hwfn *p_hwfn)
  596. {
  597. if (!p_hwfn->p_spq)
  598. return 0xffffffff; /* illegal */
  599. return p_hwfn->p_spq->cid;
  600. }
  601. /***************************************************************************
  602. * Posting new Ramrods
  603. ***************************************************************************/
  604. static int qed_spq_post_list(struct qed_hwfn *p_hwfn,
  605. struct list_head *head, u32 keep_reserve)
  606. {
  607. struct qed_spq *p_spq = p_hwfn->p_spq;
  608. int rc;
  609. while (qed_chain_get_elem_left(&p_spq->chain) > keep_reserve &&
  610. !list_empty(head)) {
  611. struct qed_spq_entry *p_ent =
  612. list_first_entry(head, struct qed_spq_entry, list);
  613. list_del(&p_ent->list);
  614. list_add_tail(&p_ent->list, &p_spq->completion_pending);
  615. p_spq->comp_sent_count++;
  616. rc = qed_spq_hw_post(p_hwfn, p_spq, p_ent);
  617. if (rc) {
  618. list_del(&p_ent->list);
  619. __qed_spq_return_entry(p_hwfn, p_ent);
  620. return rc;
  621. }
  622. }
  623. return 0;
  624. }
  625. static int qed_spq_pend_post(struct qed_hwfn *p_hwfn)
  626. {
  627. struct qed_spq *p_spq = p_hwfn->p_spq;
  628. struct qed_spq_entry *p_ent = NULL;
  629. while (!list_empty(&p_spq->free_pool)) {
  630. if (list_empty(&p_spq->unlimited_pending))
  631. break;
  632. p_ent = list_first_entry(&p_spq->unlimited_pending,
  633. struct qed_spq_entry, list);
  634. if (!p_ent)
  635. return -EINVAL;
  636. list_del(&p_ent->list);
  637. qed_spq_add_entry(p_hwfn, p_ent, p_ent->priority);
  638. }
  639. return qed_spq_post_list(p_hwfn, &p_spq->pending,
  640. SPQ_HIGH_PRI_RESERVE_DEFAULT);
  641. }
  642. int qed_spq_post(struct qed_hwfn *p_hwfn,
  643. struct qed_spq_entry *p_ent, u8 *fw_return_code)
  644. {
  645. int rc = 0;
  646. struct qed_spq *p_spq = p_hwfn ? p_hwfn->p_spq : NULL;
  647. bool b_ret_ent = true;
  648. if (!p_hwfn)
  649. return -EINVAL;
  650. if (!p_ent) {
  651. DP_NOTICE(p_hwfn, "Got a NULL pointer\n");
  652. return -EINVAL;
  653. }
  654. /* Complete the entry */
  655. rc = qed_spq_fill_entry(p_hwfn, p_ent);
  656. spin_lock_bh(&p_spq->lock);
  657. /* Check return value after LOCK is taken for cleaner error flow */
  658. if (rc)
  659. goto spq_post_fail;
  660. /* Add the request to the pending queue */
  661. rc = qed_spq_add_entry(p_hwfn, p_ent, p_ent->priority);
  662. if (rc)
  663. goto spq_post_fail;
  664. rc = qed_spq_pend_post(p_hwfn);
  665. if (rc) {
  666. /* Since it's possible that pending failed for a different
  667. * entry [although unlikely], the failed entry was already
  668. * dealt with; No need to return it here.
  669. */
  670. b_ret_ent = false;
  671. goto spq_post_fail;
  672. }
  673. spin_unlock_bh(&p_spq->lock);
  674. if (p_ent->comp_mode == QED_SPQ_MODE_EBLOCK) {
  675. /* For entries in QED BLOCK mode, the completion code cannot
  676. * perform the necessary cleanup - if it did, we couldn't
  677. * access p_ent here to see whether it's successful or not.
  678. * Thus, after gaining the answer perform the cleanup here.
  679. */
  680. rc = qed_spq_block(p_hwfn, p_ent, fw_return_code,
  681. p_ent->queue == &p_spq->unlimited_pending);
  682. if (p_ent->queue == &p_spq->unlimited_pending) {
  683. /* This is an allocated p_ent which does not need to
  684. * return to pool.
  685. */
  686. kfree(p_ent);
  687. return rc;
  688. }
  689. if (rc)
  690. goto spq_post_fail2;
  691. /* return to pool */
  692. qed_spq_return_entry(p_hwfn, p_ent);
  693. }
  694. return rc;
  695. spq_post_fail2:
  696. spin_lock_bh(&p_spq->lock);
  697. list_del(&p_ent->list);
  698. qed_chain_return_produced(&p_spq->chain);
  699. spq_post_fail:
  700. /* return to the free pool */
  701. if (b_ret_ent)
  702. __qed_spq_return_entry(p_hwfn, p_ent);
  703. spin_unlock_bh(&p_spq->lock);
  704. return rc;
  705. }
  706. int qed_spq_completion(struct qed_hwfn *p_hwfn,
  707. __le16 echo,
  708. u8 fw_return_code,
  709. union event_ring_data *p_data)
  710. {
  711. struct qed_spq *p_spq;
  712. struct qed_spq_entry *p_ent = NULL;
  713. struct qed_spq_entry *tmp;
  714. struct qed_spq_entry *found = NULL;
  715. int rc;
  716. if (!p_hwfn)
  717. return -EINVAL;
  718. p_spq = p_hwfn->p_spq;
  719. if (!p_spq)
  720. return -EINVAL;
  721. spin_lock_bh(&p_spq->lock);
  722. list_for_each_entry_safe(p_ent, tmp, &p_spq->completion_pending, list) {
  723. if (p_ent->elem.hdr.echo == echo) {
  724. u16 pos = le16_to_cpu(echo) % SPQ_RING_SIZE;
  725. list_del(&p_ent->list);
  726. /* Avoid overriding of SPQ entries when getting
  727. * out-of-order completions, by marking the completions
  728. * in a bitmap and increasing the chain consumer only
  729. * for the first successive completed entries.
  730. */
  731. __set_bit(pos, p_spq->p_comp_bitmap);
  732. while (test_bit(p_spq->comp_bitmap_idx,
  733. p_spq->p_comp_bitmap)) {
  734. __clear_bit(p_spq->comp_bitmap_idx,
  735. p_spq->p_comp_bitmap);
  736. p_spq->comp_bitmap_idx++;
  737. qed_chain_return_produced(&p_spq->chain);
  738. }
  739. p_spq->comp_count++;
  740. found = p_ent;
  741. break;
  742. }
  743. /* This is relatively uncommon - depends on scenarios
  744. * which have mutliple per-PF sent ramrods.
  745. */
  746. DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
  747. "Got completion for echo %04x - doesn't match echo %04x in completion pending list\n",
  748. le16_to_cpu(echo),
  749. le16_to_cpu(p_ent->elem.hdr.echo));
  750. }
  751. /* Release lock before callback, as callback may post
  752. * an additional ramrod.
  753. */
  754. spin_unlock_bh(&p_spq->lock);
  755. if (!found) {
  756. DP_NOTICE(p_hwfn,
  757. "Failed to find an entry this EQE [echo %04x] completes\n",
  758. le16_to_cpu(echo));
  759. return -EEXIST;
  760. }
  761. DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
  762. "Complete EQE [echo %04x]: func %p cookie %p)\n",
  763. le16_to_cpu(echo),
  764. p_ent->comp_cb.function, p_ent->comp_cb.cookie);
  765. if (found->comp_cb.function)
  766. found->comp_cb.function(p_hwfn, found->comp_cb.cookie, p_data,
  767. fw_return_code);
  768. else
  769. DP_VERBOSE(p_hwfn,
  770. QED_MSG_SPQ,
  771. "Got a completion without a callback function\n");
  772. if ((found->comp_mode != QED_SPQ_MODE_EBLOCK) ||
  773. (found->queue == &p_spq->unlimited_pending))
  774. /* EBLOCK is responsible for returning its own entry into the
  775. * free list, unless it originally added the entry into the
  776. * unlimited pending list.
  777. */
  778. qed_spq_return_entry(p_hwfn, found);
  779. /* Attempt to post pending requests */
  780. spin_lock_bh(&p_spq->lock);
  781. rc = qed_spq_pend_post(p_hwfn);
  782. spin_unlock_bh(&p_spq->lock);
  783. return rc;
  784. }
  785. int qed_consq_alloc(struct qed_hwfn *p_hwfn)
  786. {
  787. struct qed_consq *p_consq;
  788. /* Allocate ConsQ struct */
  789. p_consq = kzalloc(sizeof(*p_consq), GFP_KERNEL);
  790. if (!p_consq)
  791. return -ENOMEM;
  792. /* Allocate and initialize EQ chain*/
  793. if (qed_chain_alloc(p_hwfn->cdev,
  794. QED_CHAIN_USE_TO_PRODUCE,
  795. QED_CHAIN_MODE_PBL,
  796. QED_CHAIN_CNT_TYPE_U16,
  797. QED_CHAIN_PAGE_SIZE / 0x80,
  798. 0x80, &p_consq->chain, NULL))
  799. goto consq_allocate_fail;
  800. p_hwfn->p_consq = p_consq;
  801. return 0;
  802. consq_allocate_fail:
  803. kfree(p_consq);
  804. return -ENOMEM;
  805. }
  806. void qed_consq_setup(struct qed_hwfn *p_hwfn)
  807. {
  808. qed_chain_reset(&p_hwfn->p_consq->chain);
  809. }
  810. void qed_consq_free(struct qed_hwfn *p_hwfn)
  811. {
  812. if (!p_hwfn->p_consq)
  813. return;
  814. qed_chain_free(p_hwfn->cdev, &p_hwfn->p_consq->chain);
  815. kfree(p_hwfn->p_consq);
  816. p_hwfn->p_consq = NULL;
  817. }