qed_fcoe.c 30 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/types.h>
  33. #include <asm/byteorder.h>
  34. #include <asm/param.h>
  35. #include <linux/delay.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/kernel.h>
  39. #include <linux/log2.h>
  40. #include <linux/module.h>
  41. #include <linux/pci.h>
  42. #include <linux/slab.h>
  43. #include <linux/stddef.h>
  44. #include <linux/string.h>
  45. #include <linux/workqueue.h>
  46. #include <linux/errno.h>
  47. #include <linux/list.h>
  48. #include <linux/spinlock.h>
  49. #define __PREVENT_DUMP_MEM_ARR__
  50. #define __PREVENT_PXP_GLOBAL_WIN__
  51. #include "qed.h"
  52. #include "qed_cxt.h"
  53. #include "qed_dev_api.h"
  54. #include "qed_fcoe.h"
  55. #include "qed_hsi.h"
  56. #include "qed_hw.h"
  57. #include "qed_int.h"
  58. #include "qed_ll2.h"
  59. #include "qed_mcp.h"
  60. #include "qed_reg_addr.h"
  61. #include "qed_sp.h"
  62. #include "qed_sriov.h"
  63. #include <linux/qed/qed_fcoe_if.h>
  64. struct qed_fcoe_conn {
  65. struct list_head list_entry;
  66. bool free_on_delete;
  67. u16 conn_id;
  68. u32 icid;
  69. u32 fw_cid;
  70. u8 layer_code;
  71. dma_addr_t sq_pbl_addr;
  72. dma_addr_t sq_curr_page_addr;
  73. dma_addr_t sq_next_page_addr;
  74. dma_addr_t xferq_pbl_addr;
  75. void *xferq_pbl_addr_virt_addr;
  76. dma_addr_t xferq_addr[4];
  77. void *xferq_addr_virt_addr[4];
  78. dma_addr_t confq_pbl_addr;
  79. void *confq_pbl_addr_virt_addr;
  80. dma_addr_t confq_addr[2];
  81. void *confq_addr_virt_addr[2];
  82. dma_addr_t terminate_params;
  83. u16 dst_mac_addr_lo;
  84. u16 dst_mac_addr_mid;
  85. u16 dst_mac_addr_hi;
  86. u16 src_mac_addr_lo;
  87. u16 src_mac_addr_mid;
  88. u16 src_mac_addr_hi;
  89. u16 tx_max_fc_pay_len;
  90. u16 e_d_tov_timer_val;
  91. u16 rec_tov_timer_val;
  92. u16 rx_max_fc_pay_len;
  93. u16 vlan_tag;
  94. u16 physical_q0;
  95. struct fc_addr_nw s_id;
  96. u8 max_conc_seqs_c3;
  97. struct fc_addr_nw d_id;
  98. u8 flags;
  99. u8 def_q_idx;
  100. };
  101. static int
  102. qed_sp_fcoe_func_start(struct qed_hwfn *p_hwfn,
  103. enum spq_mode comp_mode,
  104. struct qed_spq_comp_cb *p_comp_addr)
  105. {
  106. struct qed_fcoe_pf_params *fcoe_pf_params = NULL;
  107. struct fcoe_init_ramrod_params *p_ramrod = NULL;
  108. struct fcoe_init_func_ramrod_data *p_data;
  109. struct fcoe_conn_context *p_cxt = NULL;
  110. struct qed_spq_entry *p_ent = NULL;
  111. struct qed_sp_init_data init_data;
  112. struct qed_cxt_info cxt_info;
  113. u32 dummy_cid;
  114. int rc = 0;
  115. u16 tmp;
  116. u8 i;
  117. /* Get SPQ entry */
  118. memset(&init_data, 0, sizeof(init_data));
  119. init_data.cid = qed_spq_get_cid(p_hwfn);
  120. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  121. init_data.comp_mode = comp_mode;
  122. init_data.p_comp_data = p_comp_addr;
  123. rc = qed_sp_init_request(p_hwfn, &p_ent,
  124. FCOE_RAMROD_CMD_ID_INIT_FUNC,
  125. PROTOCOLID_FCOE, &init_data);
  126. if (rc)
  127. return rc;
  128. p_ramrod = &p_ent->ramrod.fcoe_init;
  129. p_data = &p_ramrod->init_ramrod_data;
  130. fcoe_pf_params = &p_hwfn->pf_params.fcoe_pf_params;
  131. /* Sanity */
  132. if (fcoe_pf_params->num_cqs > p_hwfn->hw_info.feat_num[QED_FCOE_CQ]) {
  133. DP_ERR(p_hwfn,
  134. "Cannot satisfy CQ amount. CQs requested %d, CQs available %d. Aborting function start\n",
  135. fcoe_pf_params->num_cqs,
  136. p_hwfn->hw_info.feat_num[QED_FCOE_CQ]);
  137. return -EINVAL;
  138. }
  139. p_data->mtu = cpu_to_le16(fcoe_pf_params->mtu);
  140. tmp = cpu_to_le16(fcoe_pf_params->sq_num_pbl_pages);
  141. p_data->sq_num_pages_in_pbl = tmp;
  142. rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_FCOE, &dummy_cid);
  143. if (rc)
  144. return rc;
  145. cxt_info.iid = dummy_cid;
  146. rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
  147. if (rc) {
  148. DP_NOTICE(p_hwfn, "Cannot find context info for dummy cid=%d\n",
  149. dummy_cid);
  150. return rc;
  151. }
  152. p_cxt = cxt_info.p_cxt;
  153. SET_FIELD(p_cxt->tstorm_ag_context.flags3,
  154. TSTORM_FCOE_CONN_AG_CTX_DUMMY_TIMER_CF_EN, 1);
  155. fcoe_pf_params->dummy_icid = (u16)dummy_cid;
  156. tmp = cpu_to_le16(fcoe_pf_params->num_tasks);
  157. p_data->func_params.num_tasks = tmp;
  158. p_data->func_params.log_page_size = fcoe_pf_params->log_page_size;
  159. p_data->func_params.debug_mode = fcoe_pf_params->debug_mode;
  160. DMA_REGPAIR_LE(p_data->q_params.glbl_q_params_addr,
  161. fcoe_pf_params->glbl_q_params_addr);
  162. tmp = cpu_to_le16(fcoe_pf_params->cq_num_entries);
  163. p_data->q_params.cq_num_entries = tmp;
  164. tmp = cpu_to_le16(fcoe_pf_params->cmdq_num_entries);
  165. p_data->q_params.cmdq_num_entries = tmp;
  166. tmp = fcoe_pf_params->num_cqs;
  167. p_data->q_params.num_queues = (u8)tmp;
  168. tmp = (u16)p_hwfn->hw_info.resc_start[QED_CMDQS_CQS];
  169. p_data->q_params.queue_relative_offset = (u8)tmp;
  170. for (i = 0; i < fcoe_pf_params->num_cqs; i++) {
  171. u16 igu_sb_id;
  172. igu_sb_id = qed_get_igu_sb_id(p_hwfn, i);
  173. tmp = cpu_to_le16(igu_sb_id);
  174. p_data->q_params.cq_cmdq_sb_num_arr[i] = tmp;
  175. }
  176. p_data->q_params.cq_sb_pi = fcoe_pf_params->gl_rq_pi;
  177. p_data->q_params.cmdq_sb_pi = fcoe_pf_params->gl_cmd_pi;
  178. p_data->q_params.bdq_resource_id = (u8)RESC_START(p_hwfn, QED_BDQ);
  179. DMA_REGPAIR_LE(p_data->q_params.bdq_pbl_base_address[BDQ_ID_RQ],
  180. fcoe_pf_params->bdq_pbl_base_addr[BDQ_ID_RQ]);
  181. p_data->q_params.bdq_pbl_num_entries[BDQ_ID_RQ] =
  182. fcoe_pf_params->bdq_pbl_num_entries[BDQ_ID_RQ];
  183. tmp = fcoe_pf_params->bdq_xoff_threshold[BDQ_ID_RQ];
  184. p_data->q_params.bdq_xoff_threshold[BDQ_ID_RQ] = cpu_to_le16(tmp);
  185. tmp = fcoe_pf_params->bdq_xon_threshold[BDQ_ID_RQ];
  186. p_data->q_params.bdq_xon_threshold[BDQ_ID_RQ] = cpu_to_le16(tmp);
  187. DMA_REGPAIR_LE(p_data->q_params.bdq_pbl_base_address[BDQ_ID_IMM_DATA],
  188. fcoe_pf_params->bdq_pbl_base_addr[BDQ_ID_IMM_DATA]);
  189. p_data->q_params.bdq_pbl_num_entries[BDQ_ID_IMM_DATA] =
  190. fcoe_pf_params->bdq_pbl_num_entries[BDQ_ID_IMM_DATA];
  191. tmp = fcoe_pf_params->bdq_xoff_threshold[BDQ_ID_IMM_DATA];
  192. p_data->q_params.bdq_xoff_threshold[BDQ_ID_IMM_DATA] = cpu_to_le16(tmp);
  193. tmp = fcoe_pf_params->bdq_xon_threshold[BDQ_ID_IMM_DATA];
  194. p_data->q_params.bdq_xon_threshold[BDQ_ID_IMM_DATA] = cpu_to_le16(tmp);
  195. tmp = fcoe_pf_params->rq_buffer_size;
  196. p_data->q_params.rq_buffer_size = cpu_to_le16(tmp);
  197. if (fcoe_pf_params->is_target) {
  198. SET_FIELD(p_data->q_params.q_validity,
  199. SCSI_INIT_FUNC_QUEUES_RQ_VALID, 1);
  200. if (p_data->q_params.bdq_pbl_num_entries[BDQ_ID_IMM_DATA])
  201. SET_FIELD(p_data->q_params.q_validity,
  202. SCSI_INIT_FUNC_QUEUES_IMM_DATA_VALID, 1);
  203. SET_FIELD(p_data->q_params.q_validity,
  204. SCSI_INIT_FUNC_QUEUES_CMD_VALID, 1);
  205. } else {
  206. SET_FIELD(p_data->q_params.q_validity,
  207. SCSI_INIT_FUNC_QUEUES_RQ_VALID, 1);
  208. }
  209. rc = qed_spq_post(p_hwfn, p_ent, NULL);
  210. return rc;
  211. }
  212. static int
  213. qed_sp_fcoe_conn_offload(struct qed_hwfn *p_hwfn,
  214. struct qed_fcoe_conn *p_conn,
  215. enum spq_mode comp_mode,
  216. struct qed_spq_comp_cb *p_comp_addr)
  217. {
  218. struct fcoe_conn_offload_ramrod_params *p_ramrod = NULL;
  219. struct fcoe_conn_offload_ramrod_data *p_data;
  220. struct qed_spq_entry *p_ent = NULL;
  221. struct qed_sp_init_data init_data;
  222. u16 physical_q0, tmp;
  223. int rc;
  224. /* Get SPQ entry */
  225. memset(&init_data, 0, sizeof(init_data));
  226. init_data.cid = p_conn->icid;
  227. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  228. init_data.comp_mode = comp_mode;
  229. init_data.p_comp_data = p_comp_addr;
  230. rc = qed_sp_init_request(p_hwfn, &p_ent,
  231. FCOE_RAMROD_CMD_ID_OFFLOAD_CONN,
  232. PROTOCOLID_FCOE, &init_data);
  233. if (rc)
  234. return rc;
  235. p_ramrod = &p_ent->ramrod.fcoe_conn_ofld;
  236. p_data = &p_ramrod->offload_ramrod_data;
  237. /* Transmission PQ is the first of the PF */
  238. physical_q0 = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
  239. p_conn->physical_q0 = cpu_to_le16(physical_q0);
  240. p_data->physical_q0 = cpu_to_le16(physical_q0);
  241. p_data->conn_id = cpu_to_le16(p_conn->conn_id);
  242. DMA_REGPAIR_LE(p_data->sq_pbl_addr, p_conn->sq_pbl_addr);
  243. DMA_REGPAIR_LE(p_data->sq_curr_page_addr, p_conn->sq_curr_page_addr);
  244. DMA_REGPAIR_LE(p_data->sq_next_page_addr, p_conn->sq_next_page_addr);
  245. DMA_REGPAIR_LE(p_data->xferq_pbl_addr, p_conn->xferq_pbl_addr);
  246. DMA_REGPAIR_LE(p_data->xferq_curr_page_addr, p_conn->xferq_addr[0]);
  247. DMA_REGPAIR_LE(p_data->xferq_next_page_addr, p_conn->xferq_addr[1]);
  248. DMA_REGPAIR_LE(p_data->respq_pbl_addr, p_conn->confq_pbl_addr);
  249. DMA_REGPAIR_LE(p_data->respq_curr_page_addr, p_conn->confq_addr[0]);
  250. DMA_REGPAIR_LE(p_data->respq_next_page_addr, p_conn->confq_addr[1]);
  251. p_data->dst_mac_addr_lo = cpu_to_le16(p_conn->dst_mac_addr_lo);
  252. p_data->dst_mac_addr_mid = cpu_to_le16(p_conn->dst_mac_addr_mid);
  253. p_data->dst_mac_addr_hi = cpu_to_le16(p_conn->dst_mac_addr_hi);
  254. p_data->src_mac_addr_lo = cpu_to_le16(p_conn->src_mac_addr_lo);
  255. p_data->src_mac_addr_mid = cpu_to_le16(p_conn->src_mac_addr_mid);
  256. p_data->src_mac_addr_hi = cpu_to_le16(p_conn->src_mac_addr_hi);
  257. tmp = cpu_to_le16(p_conn->tx_max_fc_pay_len);
  258. p_data->tx_max_fc_pay_len = tmp;
  259. tmp = cpu_to_le16(p_conn->e_d_tov_timer_val);
  260. p_data->e_d_tov_timer_val = tmp;
  261. tmp = cpu_to_le16(p_conn->rec_tov_timer_val);
  262. p_data->rec_rr_tov_timer_val = tmp;
  263. tmp = cpu_to_le16(p_conn->rx_max_fc_pay_len);
  264. p_data->rx_max_fc_pay_len = tmp;
  265. p_data->vlan_tag = cpu_to_le16(p_conn->vlan_tag);
  266. p_data->s_id.addr_hi = p_conn->s_id.addr_hi;
  267. p_data->s_id.addr_mid = p_conn->s_id.addr_mid;
  268. p_data->s_id.addr_lo = p_conn->s_id.addr_lo;
  269. p_data->max_conc_seqs_c3 = p_conn->max_conc_seqs_c3;
  270. p_data->d_id.addr_hi = p_conn->d_id.addr_hi;
  271. p_data->d_id.addr_mid = p_conn->d_id.addr_mid;
  272. p_data->d_id.addr_lo = p_conn->d_id.addr_lo;
  273. p_data->flags = p_conn->flags;
  274. p_data->def_q_idx = p_conn->def_q_idx;
  275. return qed_spq_post(p_hwfn, p_ent, NULL);
  276. }
  277. static int
  278. qed_sp_fcoe_conn_destroy(struct qed_hwfn *p_hwfn,
  279. struct qed_fcoe_conn *p_conn,
  280. enum spq_mode comp_mode,
  281. struct qed_spq_comp_cb *p_comp_addr)
  282. {
  283. struct fcoe_conn_terminate_ramrod_params *p_ramrod = NULL;
  284. struct qed_spq_entry *p_ent = NULL;
  285. struct qed_sp_init_data init_data;
  286. int rc = 0;
  287. /* Get SPQ entry */
  288. memset(&init_data, 0, sizeof(init_data));
  289. init_data.cid = p_conn->icid;
  290. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  291. init_data.comp_mode = comp_mode;
  292. init_data.p_comp_data = p_comp_addr;
  293. rc = qed_sp_init_request(p_hwfn, &p_ent,
  294. FCOE_RAMROD_CMD_ID_TERMINATE_CONN,
  295. PROTOCOLID_FCOE, &init_data);
  296. if (rc)
  297. return rc;
  298. p_ramrod = &p_ent->ramrod.fcoe_conn_terminate;
  299. DMA_REGPAIR_LE(p_ramrod->terminate_ramrod_data.terminate_params_addr,
  300. p_conn->terminate_params);
  301. return qed_spq_post(p_hwfn, p_ent, NULL);
  302. }
  303. static int
  304. qed_sp_fcoe_func_stop(struct qed_hwfn *p_hwfn,
  305. struct qed_ptt *p_ptt,
  306. enum spq_mode comp_mode,
  307. struct qed_spq_comp_cb *p_comp_addr)
  308. {
  309. struct qed_spq_entry *p_ent = NULL;
  310. struct qed_sp_init_data init_data;
  311. u32 active_segs = 0;
  312. int rc = 0;
  313. /* Get SPQ entry */
  314. memset(&init_data, 0, sizeof(init_data));
  315. init_data.cid = p_hwfn->pf_params.fcoe_pf_params.dummy_icid;
  316. init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
  317. init_data.comp_mode = comp_mode;
  318. init_data.p_comp_data = p_comp_addr;
  319. rc = qed_sp_init_request(p_hwfn, &p_ent,
  320. FCOE_RAMROD_CMD_ID_DESTROY_FUNC,
  321. PROTOCOLID_FCOE, &init_data);
  322. if (rc)
  323. return rc;
  324. active_segs = qed_rd(p_hwfn, p_ptt, TM_REG_PF_ENABLE_TASK);
  325. active_segs &= ~BIT(QED_CXT_FCOE_TID_SEG);
  326. qed_wr(p_hwfn, p_ptt, TM_REG_PF_ENABLE_TASK, active_segs);
  327. return qed_spq_post(p_hwfn, p_ent, NULL);
  328. }
  329. static int
  330. qed_fcoe_allocate_connection(struct qed_hwfn *p_hwfn,
  331. struct qed_fcoe_conn **p_out_conn)
  332. {
  333. struct qed_fcoe_conn *p_conn = NULL;
  334. void *p_addr;
  335. u32 i;
  336. spin_lock_bh(&p_hwfn->p_fcoe_info->lock);
  337. if (!list_empty(&p_hwfn->p_fcoe_info->free_list))
  338. p_conn =
  339. list_first_entry(&p_hwfn->p_fcoe_info->free_list,
  340. struct qed_fcoe_conn, list_entry);
  341. if (p_conn) {
  342. list_del(&p_conn->list_entry);
  343. spin_unlock_bh(&p_hwfn->p_fcoe_info->lock);
  344. *p_out_conn = p_conn;
  345. return 0;
  346. }
  347. spin_unlock_bh(&p_hwfn->p_fcoe_info->lock);
  348. p_conn = kzalloc(sizeof(*p_conn), GFP_KERNEL);
  349. if (!p_conn)
  350. return -ENOMEM;
  351. p_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  352. QED_CHAIN_PAGE_SIZE,
  353. &p_conn->xferq_pbl_addr, GFP_KERNEL);
  354. if (!p_addr)
  355. goto nomem_pbl_xferq;
  356. p_conn->xferq_pbl_addr_virt_addr = p_addr;
  357. for (i = 0; i < ARRAY_SIZE(p_conn->xferq_addr); i++) {
  358. p_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  359. QED_CHAIN_PAGE_SIZE,
  360. &p_conn->xferq_addr[i], GFP_KERNEL);
  361. if (!p_addr)
  362. goto nomem_xferq;
  363. p_conn->xferq_addr_virt_addr[i] = p_addr;
  364. p_addr = p_conn->xferq_pbl_addr_virt_addr;
  365. ((dma_addr_t *)p_addr)[i] = p_conn->xferq_addr[i];
  366. }
  367. p_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  368. QED_CHAIN_PAGE_SIZE,
  369. &p_conn->confq_pbl_addr, GFP_KERNEL);
  370. if (!p_addr)
  371. goto nomem_xferq;
  372. p_conn->confq_pbl_addr_virt_addr = p_addr;
  373. for (i = 0; i < ARRAY_SIZE(p_conn->confq_addr); i++) {
  374. p_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  375. QED_CHAIN_PAGE_SIZE,
  376. &p_conn->confq_addr[i], GFP_KERNEL);
  377. if (!p_addr)
  378. goto nomem_confq;
  379. p_conn->confq_addr_virt_addr[i] = p_addr;
  380. p_addr = p_conn->confq_pbl_addr_virt_addr;
  381. ((dma_addr_t *)p_addr)[i] = p_conn->confq_addr[i];
  382. }
  383. p_conn->free_on_delete = true;
  384. *p_out_conn = p_conn;
  385. return 0;
  386. nomem_confq:
  387. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  388. QED_CHAIN_PAGE_SIZE,
  389. p_conn->confq_pbl_addr_virt_addr,
  390. p_conn->confq_pbl_addr);
  391. for (i = 0; i < ARRAY_SIZE(p_conn->confq_addr); i++)
  392. if (p_conn->confq_addr_virt_addr[i])
  393. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  394. QED_CHAIN_PAGE_SIZE,
  395. p_conn->confq_addr_virt_addr[i],
  396. p_conn->confq_addr[i]);
  397. nomem_xferq:
  398. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  399. QED_CHAIN_PAGE_SIZE,
  400. p_conn->xferq_pbl_addr_virt_addr,
  401. p_conn->xferq_pbl_addr);
  402. for (i = 0; i < ARRAY_SIZE(p_conn->xferq_addr); i++)
  403. if (p_conn->xferq_addr_virt_addr[i])
  404. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  405. QED_CHAIN_PAGE_SIZE,
  406. p_conn->xferq_addr_virt_addr[i],
  407. p_conn->xferq_addr[i]);
  408. nomem_pbl_xferq:
  409. kfree(p_conn);
  410. return -ENOMEM;
  411. }
  412. static void qed_fcoe_free_connection(struct qed_hwfn *p_hwfn,
  413. struct qed_fcoe_conn *p_conn)
  414. {
  415. u32 i;
  416. if (!p_conn)
  417. return;
  418. if (p_conn->confq_pbl_addr_virt_addr)
  419. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  420. QED_CHAIN_PAGE_SIZE,
  421. p_conn->confq_pbl_addr_virt_addr,
  422. p_conn->confq_pbl_addr);
  423. for (i = 0; i < ARRAY_SIZE(p_conn->confq_addr); i++) {
  424. if (!p_conn->confq_addr_virt_addr[i])
  425. continue;
  426. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  427. QED_CHAIN_PAGE_SIZE,
  428. p_conn->confq_addr_virt_addr[i],
  429. p_conn->confq_addr[i]);
  430. }
  431. if (p_conn->xferq_pbl_addr_virt_addr)
  432. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  433. QED_CHAIN_PAGE_SIZE,
  434. p_conn->xferq_pbl_addr_virt_addr,
  435. p_conn->xferq_pbl_addr);
  436. for (i = 0; i < ARRAY_SIZE(p_conn->xferq_addr); i++) {
  437. if (!p_conn->xferq_addr_virt_addr[i])
  438. continue;
  439. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  440. QED_CHAIN_PAGE_SIZE,
  441. p_conn->xferq_addr_virt_addr[i],
  442. p_conn->xferq_addr[i]);
  443. }
  444. kfree(p_conn);
  445. }
  446. static void __iomem *qed_fcoe_get_db_addr(struct qed_hwfn *p_hwfn, u32 cid)
  447. {
  448. return (u8 __iomem *)p_hwfn->doorbells +
  449. qed_db_addr(cid, DQ_DEMS_LEGACY);
  450. }
  451. static void __iomem *qed_fcoe_get_primary_bdq_prod(struct qed_hwfn *p_hwfn,
  452. u8 bdq_id)
  453. {
  454. if (RESC_NUM(p_hwfn, QED_BDQ)) {
  455. return (u8 __iomem *)p_hwfn->regview +
  456. GTT_BAR0_MAP_REG_MSDM_RAM +
  457. MSTORM_SCSI_BDQ_EXT_PROD_OFFSET(RESC_START(p_hwfn,
  458. QED_BDQ),
  459. bdq_id);
  460. } else {
  461. DP_NOTICE(p_hwfn, "BDQ is not allocated!\n");
  462. return NULL;
  463. }
  464. }
  465. static void __iomem *qed_fcoe_get_secondary_bdq_prod(struct qed_hwfn *p_hwfn,
  466. u8 bdq_id)
  467. {
  468. if (RESC_NUM(p_hwfn, QED_BDQ)) {
  469. return (u8 __iomem *)p_hwfn->regview +
  470. GTT_BAR0_MAP_REG_TSDM_RAM +
  471. TSTORM_SCSI_BDQ_EXT_PROD_OFFSET(RESC_START(p_hwfn,
  472. QED_BDQ),
  473. bdq_id);
  474. } else {
  475. DP_NOTICE(p_hwfn, "BDQ is not allocated!\n");
  476. return NULL;
  477. }
  478. }
  479. int qed_fcoe_alloc(struct qed_hwfn *p_hwfn)
  480. {
  481. struct qed_fcoe_info *p_fcoe_info;
  482. /* Allocate LL2's set struct */
  483. p_fcoe_info = kzalloc(sizeof(*p_fcoe_info), GFP_KERNEL);
  484. if (!p_fcoe_info) {
  485. DP_NOTICE(p_hwfn, "Failed to allocate qed_fcoe_info'\n");
  486. return -ENOMEM;
  487. }
  488. INIT_LIST_HEAD(&p_fcoe_info->free_list);
  489. p_hwfn->p_fcoe_info = p_fcoe_info;
  490. return 0;
  491. }
  492. void qed_fcoe_setup(struct qed_hwfn *p_hwfn)
  493. {
  494. struct fcoe_task_context *p_task_ctx = NULL;
  495. int rc;
  496. u32 i;
  497. spin_lock_init(&p_hwfn->p_fcoe_info->lock);
  498. for (i = 0; i < p_hwfn->pf_params.fcoe_pf_params.num_tasks; i++) {
  499. rc = qed_cxt_get_task_ctx(p_hwfn, i,
  500. QED_CTX_WORKING_MEM,
  501. (void **)&p_task_ctx);
  502. if (rc)
  503. continue;
  504. memset(p_task_ctx, 0, sizeof(struct fcoe_task_context));
  505. SET_FIELD(p_task_ctx->timer_context.logical_client_0,
  506. TIMERS_CONTEXT_VALIDLC0, 1);
  507. SET_FIELD(p_task_ctx->timer_context.logical_client_1,
  508. TIMERS_CONTEXT_VALIDLC1, 1);
  509. SET_FIELD(p_task_ctx->tstorm_ag_context.flags0,
  510. TSTORM_FCOE_TASK_AG_CTX_CONNECTION_TYPE, 1);
  511. }
  512. }
  513. void qed_fcoe_free(struct qed_hwfn *p_hwfn)
  514. {
  515. struct qed_fcoe_conn *p_conn = NULL;
  516. if (!p_hwfn->p_fcoe_info)
  517. return;
  518. while (!list_empty(&p_hwfn->p_fcoe_info->free_list)) {
  519. p_conn = list_first_entry(&p_hwfn->p_fcoe_info->free_list,
  520. struct qed_fcoe_conn, list_entry);
  521. if (!p_conn)
  522. break;
  523. list_del(&p_conn->list_entry);
  524. qed_fcoe_free_connection(p_hwfn, p_conn);
  525. }
  526. kfree(p_hwfn->p_fcoe_info);
  527. p_hwfn->p_fcoe_info = NULL;
  528. }
  529. static int
  530. qed_fcoe_acquire_connection(struct qed_hwfn *p_hwfn,
  531. struct qed_fcoe_conn *p_in_conn,
  532. struct qed_fcoe_conn **p_out_conn)
  533. {
  534. struct qed_fcoe_conn *p_conn = NULL;
  535. int rc = 0;
  536. u32 icid;
  537. spin_lock_bh(&p_hwfn->p_fcoe_info->lock);
  538. rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_FCOE, &icid);
  539. spin_unlock_bh(&p_hwfn->p_fcoe_info->lock);
  540. if (rc)
  541. return rc;
  542. /* Use input connection [if provided] or allocate a new one */
  543. if (p_in_conn) {
  544. p_conn = p_in_conn;
  545. } else {
  546. rc = qed_fcoe_allocate_connection(p_hwfn, &p_conn);
  547. if (rc) {
  548. spin_lock_bh(&p_hwfn->p_fcoe_info->lock);
  549. qed_cxt_release_cid(p_hwfn, icid);
  550. spin_unlock_bh(&p_hwfn->p_fcoe_info->lock);
  551. return rc;
  552. }
  553. }
  554. p_conn->icid = icid;
  555. p_conn->fw_cid = (p_hwfn->hw_info.opaque_fid << 16) | icid;
  556. *p_out_conn = p_conn;
  557. return rc;
  558. }
  559. static void qed_fcoe_release_connection(struct qed_hwfn *p_hwfn,
  560. struct qed_fcoe_conn *p_conn)
  561. {
  562. spin_lock_bh(&p_hwfn->p_fcoe_info->lock);
  563. list_add_tail(&p_conn->list_entry, &p_hwfn->p_fcoe_info->free_list);
  564. qed_cxt_release_cid(p_hwfn, p_conn->icid);
  565. spin_unlock_bh(&p_hwfn->p_fcoe_info->lock);
  566. }
  567. static void _qed_fcoe_get_tstats(struct qed_hwfn *p_hwfn,
  568. struct qed_ptt *p_ptt,
  569. struct qed_fcoe_stats *p_stats)
  570. {
  571. struct fcoe_rx_stat tstats;
  572. u32 tstats_addr;
  573. memset(&tstats, 0, sizeof(tstats));
  574. tstats_addr = BAR0_MAP_REG_TSDM_RAM +
  575. TSTORM_FCOE_RX_STATS_OFFSET(p_hwfn->rel_pf_id);
  576. qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
  577. p_stats->fcoe_rx_byte_cnt = HILO_64_REGPAIR(tstats.fcoe_rx_byte_cnt);
  578. p_stats->fcoe_rx_data_pkt_cnt =
  579. HILO_64_REGPAIR(tstats.fcoe_rx_data_pkt_cnt);
  580. p_stats->fcoe_rx_xfer_pkt_cnt =
  581. HILO_64_REGPAIR(tstats.fcoe_rx_xfer_pkt_cnt);
  582. p_stats->fcoe_rx_other_pkt_cnt =
  583. HILO_64_REGPAIR(tstats.fcoe_rx_other_pkt_cnt);
  584. p_stats->fcoe_silent_drop_pkt_cmdq_full_cnt =
  585. le32_to_cpu(tstats.fcoe_silent_drop_pkt_cmdq_full_cnt);
  586. p_stats->fcoe_silent_drop_pkt_rq_full_cnt =
  587. le32_to_cpu(tstats.fcoe_silent_drop_pkt_rq_full_cnt);
  588. p_stats->fcoe_silent_drop_pkt_crc_error_cnt =
  589. le32_to_cpu(tstats.fcoe_silent_drop_pkt_crc_error_cnt);
  590. p_stats->fcoe_silent_drop_pkt_task_invalid_cnt =
  591. le32_to_cpu(tstats.fcoe_silent_drop_pkt_task_invalid_cnt);
  592. p_stats->fcoe_silent_drop_total_pkt_cnt =
  593. le32_to_cpu(tstats.fcoe_silent_drop_total_pkt_cnt);
  594. }
  595. static void _qed_fcoe_get_pstats(struct qed_hwfn *p_hwfn,
  596. struct qed_ptt *p_ptt,
  597. struct qed_fcoe_stats *p_stats)
  598. {
  599. struct fcoe_tx_stat pstats;
  600. u32 pstats_addr;
  601. memset(&pstats, 0, sizeof(pstats));
  602. pstats_addr = BAR0_MAP_REG_PSDM_RAM +
  603. PSTORM_FCOE_TX_STATS_OFFSET(p_hwfn->rel_pf_id);
  604. qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
  605. p_stats->fcoe_tx_byte_cnt = HILO_64_REGPAIR(pstats.fcoe_tx_byte_cnt);
  606. p_stats->fcoe_tx_data_pkt_cnt =
  607. HILO_64_REGPAIR(pstats.fcoe_tx_data_pkt_cnt);
  608. p_stats->fcoe_tx_xfer_pkt_cnt =
  609. HILO_64_REGPAIR(pstats.fcoe_tx_xfer_pkt_cnt);
  610. p_stats->fcoe_tx_other_pkt_cnt =
  611. HILO_64_REGPAIR(pstats.fcoe_tx_other_pkt_cnt);
  612. }
  613. static int qed_fcoe_get_stats(struct qed_hwfn *p_hwfn,
  614. struct qed_fcoe_stats *p_stats)
  615. {
  616. struct qed_ptt *p_ptt;
  617. memset(p_stats, 0, sizeof(*p_stats));
  618. p_ptt = qed_ptt_acquire(p_hwfn);
  619. if (!p_ptt) {
  620. DP_ERR(p_hwfn, "Failed to acquire ptt\n");
  621. return -EINVAL;
  622. }
  623. _qed_fcoe_get_tstats(p_hwfn, p_ptt, p_stats);
  624. _qed_fcoe_get_pstats(p_hwfn, p_ptt, p_stats);
  625. qed_ptt_release(p_hwfn, p_ptt);
  626. return 0;
  627. }
  628. struct qed_hash_fcoe_con {
  629. struct hlist_node node;
  630. struct qed_fcoe_conn *con;
  631. };
  632. static int qed_fill_fcoe_dev_info(struct qed_dev *cdev,
  633. struct qed_dev_fcoe_info *info)
  634. {
  635. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  636. int rc;
  637. memset(info, 0, sizeof(*info));
  638. rc = qed_fill_dev_info(cdev, &info->common);
  639. info->primary_dbq_rq_addr =
  640. qed_fcoe_get_primary_bdq_prod(hwfn, BDQ_ID_RQ);
  641. info->secondary_bdq_rq_addr =
  642. qed_fcoe_get_secondary_bdq_prod(hwfn, BDQ_ID_RQ);
  643. info->wwpn = hwfn->mcp_info->func_info.wwn_port;
  644. info->wwnn = hwfn->mcp_info->func_info.wwn_node;
  645. info->num_cqs = FEAT_NUM(hwfn, QED_FCOE_CQ);
  646. return rc;
  647. }
  648. static void qed_register_fcoe_ops(struct qed_dev *cdev,
  649. struct qed_fcoe_cb_ops *ops, void *cookie)
  650. {
  651. cdev->protocol_ops.fcoe = ops;
  652. cdev->ops_cookie = cookie;
  653. }
  654. static struct qed_hash_fcoe_con *qed_fcoe_get_hash(struct qed_dev *cdev,
  655. u32 handle)
  656. {
  657. struct qed_hash_fcoe_con *hash_con = NULL;
  658. if (!(cdev->flags & QED_FLAG_STORAGE_STARTED))
  659. return NULL;
  660. hash_for_each_possible(cdev->connections, hash_con, node, handle) {
  661. if (hash_con->con->icid == handle)
  662. break;
  663. }
  664. if (!hash_con || (hash_con->con->icid != handle))
  665. return NULL;
  666. return hash_con;
  667. }
  668. static int qed_fcoe_stop(struct qed_dev *cdev)
  669. {
  670. struct qed_ptt *p_ptt;
  671. int rc;
  672. if (!(cdev->flags & QED_FLAG_STORAGE_STARTED)) {
  673. DP_NOTICE(cdev, "fcoe already stopped\n");
  674. return 0;
  675. }
  676. if (!hash_empty(cdev->connections)) {
  677. DP_NOTICE(cdev,
  678. "Can't stop fcoe - not all connections were returned\n");
  679. return -EINVAL;
  680. }
  681. p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
  682. if (!p_ptt)
  683. return -EAGAIN;
  684. /* Stop the fcoe */
  685. rc = qed_sp_fcoe_func_stop(QED_LEADING_HWFN(cdev), p_ptt,
  686. QED_SPQ_MODE_EBLOCK, NULL);
  687. cdev->flags &= ~QED_FLAG_STORAGE_STARTED;
  688. qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
  689. return rc;
  690. }
  691. static int qed_fcoe_start(struct qed_dev *cdev, struct qed_fcoe_tid *tasks)
  692. {
  693. int rc;
  694. if (cdev->flags & QED_FLAG_STORAGE_STARTED) {
  695. DP_NOTICE(cdev, "fcoe already started;\n");
  696. return 0;
  697. }
  698. rc = qed_sp_fcoe_func_start(QED_LEADING_HWFN(cdev),
  699. QED_SPQ_MODE_EBLOCK, NULL);
  700. if (rc) {
  701. DP_NOTICE(cdev, "Failed to start fcoe\n");
  702. return rc;
  703. }
  704. cdev->flags |= QED_FLAG_STORAGE_STARTED;
  705. hash_init(cdev->connections);
  706. if (tasks) {
  707. struct qed_tid_mem *tid_info = kzalloc(sizeof(*tid_info),
  708. GFP_ATOMIC);
  709. if (!tid_info) {
  710. DP_NOTICE(cdev,
  711. "Failed to allocate tasks information\n");
  712. qed_fcoe_stop(cdev);
  713. return -ENOMEM;
  714. }
  715. rc = qed_cxt_get_tid_mem_info(QED_LEADING_HWFN(cdev), tid_info);
  716. if (rc) {
  717. DP_NOTICE(cdev, "Failed to gather task information\n");
  718. qed_fcoe_stop(cdev);
  719. kfree(tid_info);
  720. return rc;
  721. }
  722. /* Fill task information */
  723. tasks->size = tid_info->tid_size;
  724. tasks->num_tids_per_block = tid_info->num_tids_per_block;
  725. memcpy(tasks->blocks, tid_info->blocks,
  726. MAX_TID_BLOCKS_FCOE * sizeof(u8 *));
  727. kfree(tid_info);
  728. }
  729. return 0;
  730. }
  731. static int qed_fcoe_acquire_conn(struct qed_dev *cdev,
  732. u32 *handle,
  733. u32 *fw_cid, void __iomem **p_doorbell)
  734. {
  735. struct qed_hash_fcoe_con *hash_con;
  736. int rc;
  737. /* Allocate a hashed connection */
  738. hash_con = kzalloc(sizeof(*hash_con), GFP_KERNEL);
  739. if (!hash_con) {
  740. DP_NOTICE(cdev, "Failed to allocate hashed connection\n");
  741. return -ENOMEM;
  742. }
  743. /* Acquire the connection */
  744. rc = qed_fcoe_acquire_connection(QED_LEADING_HWFN(cdev), NULL,
  745. &hash_con->con);
  746. if (rc) {
  747. DP_NOTICE(cdev, "Failed to acquire Connection\n");
  748. kfree(hash_con);
  749. return rc;
  750. }
  751. /* Added the connection to hash table */
  752. *handle = hash_con->con->icid;
  753. *fw_cid = hash_con->con->fw_cid;
  754. hash_add(cdev->connections, &hash_con->node, *handle);
  755. if (p_doorbell)
  756. *p_doorbell = qed_fcoe_get_db_addr(QED_LEADING_HWFN(cdev),
  757. *handle);
  758. return 0;
  759. }
  760. static int qed_fcoe_release_conn(struct qed_dev *cdev, u32 handle)
  761. {
  762. struct qed_hash_fcoe_con *hash_con;
  763. hash_con = qed_fcoe_get_hash(cdev, handle);
  764. if (!hash_con) {
  765. DP_NOTICE(cdev, "Failed to find connection for handle %d\n",
  766. handle);
  767. return -EINVAL;
  768. }
  769. hlist_del(&hash_con->node);
  770. qed_fcoe_release_connection(QED_LEADING_HWFN(cdev), hash_con->con);
  771. kfree(hash_con);
  772. return 0;
  773. }
  774. static int qed_fcoe_offload_conn(struct qed_dev *cdev,
  775. u32 handle,
  776. struct qed_fcoe_params_offload *conn_info)
  777. {
  778. struct qed_hash_fcoe_con *hash_con;
  779. struct qed_fcoe_conn *con;
  780. hash_con = qed_fcoe_get_hash(cdev, handle);
  781. if (!hash_con) {
  782. DP_NOTICE(cdev, "Failed to find connection for handle %d\n",
  783. handle);
  784. return -EINVAL;
  785. }
  786. /* Update the connection with information from the params */
  787. con = hash_con->con;
  788. con->sq_pbl_addr = conn_info->sq_pbl_addr;
  789. con->sq_curr_page_addr = conn_info->sq_curr_page_addr;
  790. con->sq_next_page_addr = conn_info->sq_next_page_addr;
  791. con->tx_max_fc_pay_len = conn_info->tx_max_fc_pay_len;
  792. con->e_d_tov_timer_val = conn_info->e_d_tov_timer_val;
  793. con->rec_tov_timer_val = conn_info->rec_tov_timer_val;
  794. con->rx_max_fc_pay_len = conn_info->rx_max_fc_pay_len;
  795. con->vlan_tag = conn_info->vlan_tag;
  796. con->max_conc_seqs_c3 = conn_info->max_conc_seqs_c3;
  797. con->flags = conn_info->flags;
  798. con->def_q_idx = conn_info->def_q_idx;
  799. con->src_mac_addr_hi = (conn_info->src_mac[5] << 8) |
  800. conn_info->src_mac[4];
  801. con->src_mac_addr_mid = (conn_info->src_mac[3] << 8) |
  802. conn_info->src_mac[2];
  803. con->src_mac_addr_lo = (conn_info->src_mac[1] << 8) |
  804. conn_info->src_mac[0];
  805. con->dst_mac_addr_hi = (conn_info->dst_mac[5] << 8) |
  806. conn_info->dst_mac[4];
  807. con->dst_mac_addr_mid = (conn_info->dst_mac[3] << 8) |
  808. conn_info->dst_mac[2];
  809. con->dst_mac_addr_lo = (conn_info->dst_mac[1] << 8) |
  810. conn_info->dst_mac[0];
  811. con->s_id.addr_hi = conn_info->s_id.addr_hi;
  812. con->s_id.addr_mid = conn_info->s_id.addr_mid;
  813. con->s_id.addr_lo = conn_info->s_id.addr_lo;
  814. con->d_id.addr_hi = conn_info->d_id.addr_hi;
  815. con->d_id.addr_mid = conn_info->d_id.addr_mid;
  816. con->d_id.addr_lo = conn_info->d_id.addr_lo;
  817. return qed_sp_fcoe_conn_offload(QED_LEADING_HWFN(cdev), con,
  818. QED_SPQ_MODE_EBLOCK, NULL);
  819. }
  820. static int qed_fcoe_destroy_conn(struct qed_dev *cdev,
  821. u32 handle, dma_addr_t terminate_params)
  822. {
  823. struct qed_hash_fcoe_con *hash_con;
  824. struct qed_fcoe_conn *con;
  825. hash_con = qed_fcoe_get_hash(cdev, handle);
  826. if (!hash_con) {
  827. DP_NOTICE(cdev, "Failed to find connection for handle %d\n",
  828. handle);
  829. return -EINVAL;
  830. }
  831. /* Update the connection with information from the params */
  832. con = hash_con->con;
  833. con->terminate_params = terminate_params;
  834. return qed_sp_fcoe_conn_destroy(QED_LEADING_HWFN(cdev), con,
  835. QED_SPQ_MODE_EBLOCK, NULL);
  836. }
  837. static int qed_fcoe_stats(struct qed_dev *cdev, struct qed_fcoe_stats *stats)
  838. {
  839. return qed_fcoe_get_stats(QED_LEADING_HWFN(cdev), stats);
  840. }
  841. void qed_get_protocol_stats_fcoe(struct qed_dev *cdev,
  842. struct qed_mcp_fcoe_stats *stats)
  843. {
  844. struct qed_fcoe_stats proto_stats;
  845. /* Retrieve FW statistics */
  846. memset(&proto_stats, 0, sizeof(proto_stats));
  847. if (qed_fcoe_stats(cdev, &proto_stats)) {
  848. DP_VERBOSE(cdev, QED_MSG_STORAGE,
  849. "Failed to collect FCoE statistics\n");
  850. return;
  851. }
  852. /* Translate FW statistics into struct */
  853. stats->rx_pkts = proto_stats.fcoe_rx_data_pkt_cnt +
  854. proto_stats.fcoe_rx_xfer_pkt_cnt +
  855. proto_stats.fcoe_rx_other_pkt_cnt;
  856. stats->tx_pkts = proto_stats.fcoe_tx_data_pkt_cnt +
  857. proto_stats.fcoe_tx_xfer_pkt_cnt +
  858. proto_stats.fcoe_tx_other_pkt_cnt;
  859. stats->fcs_err = proto_stats.fcoe_silent_drop_pkt_crc_error_cnt;
  860. /* Request protocol driver to fill-in the rest */
  861. if (cdev->protocol_ops.fcoe && cdev->ops_cookie) {
  862. struct qed_fcoe_cb_ops *ops = cdev->protocol_ops.fcoe;
  863. void *cookie = cdev->ops_cookie;
  864. if (ops->get_login_failures)
  865. stats->login_failure = ops->get_login_failures(cookie);
  866. }
  867. }
  868. static const struct qed_fcoe_ops qed_fcoe_ops_pass = {
  869. .common = &qed_common_ops_pass,
  870. .ll2 = &qed_ll2_ops_pass,
  871. .fill_dev_info = &qed_fill_fcoe_dev_info,
  872. .start = &qed_fcoe_start,
  873. .stop = &qed_fcoe_stop,
  874. .register_ops = &qed_register_fcoe_ops,
  875. .acquire_conn = &qed_fcoe_acquire_conn,
  876. .release_conn = &qed_fcoe_release_conn,
  877. .offload_conn = &qed_fcoe_offload_conn,
  878. .destroy_conn = &qed_fcoe_destroy_conn,
  879. .get_stats = &qed_fcoe_stats,
  880. };
  881. const struct qed_fcoe_ops *qed_get_fcoe_ops(void)
  882. {
  883. return &qed_fcoe_ops_pass;
  884. }
  885. EXPORT_SYMBOL(qed_get_fcoe_ops);
  886. void qed_put_fcoe_ops(void)
  887. {
  888. }
  889. EXPORT_SYMBOL(qed_put_fcoe_ops);