bnxt_ethtool.c 70 KB

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  1. /* Broadcom NetXtreme-C/E network driver.
  2. *
  3. * Copyright (c) 2014-2016 Broadcom Corporation
  4. * Copyright (c) 2016-2017 Broadcom Limited
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation.
  9. */
  10. #include <linux/ctype.h>
  11. #include <linux/stringify.h>
  12. #include <linux/ethtool.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/pci.h>
  15. #include <linux/etherdevice.h>
  16. #include <linux/crc32.h>
  17. #include <linux/firmware.h>
  18. #include "bnxt_hsi.h"
  19. #include "bnxt.h"
  20. #include "bnxt_xdp.h"
  21. #include "bnxt_ethtool.h"
  22. #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
  23. #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
  24. #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
  25. #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  26. #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  27. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen);
  28. static u32 bnxt_get_msglevel(struct net_device *dev)
  29. {
  30. struct bnxt *bp = netdev_priv(dev);
  31. return bp->msg_enable;
  32. }
  33. static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  34. {
  35. struct bnxt *bp = netdev_priv(dev);
  36. bp->msg_enable = value;
  37. }
  38. static int bnxt_get_coalesce(struct net_device *dev,
  39. struct ethtool_coalesce *coal)
  40. {
  41. struct bnxt *bp = netdev_priv(dev);
  42. memset(coal, 0, sizeof(*coal));
  43. coal->rx_coalesce_usecs = bp->rx_coal_ticks;
  44. /* 2 completion records per rx packet */
  45. coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2;
  46. coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
  47. coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
  48. coal->tx_coalesce_usecs = bp->tx_coal_ticks;
  49. coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
  50. coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
  51. coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
  52. coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  53. return 0;
  54. }
  55. static int bnxt_set_coalesce(struct net_device *dev,
  56. struct ethtool_coalesce *coal)
  57. {
  58. struct bnxt *bp = netdev_priv(dev);
  59. bool update_stats = false;
  60. int rc = 0;
  61. bp->rx_coal_ticks = coal->rx_coalesce_usecs;
  62. /* 2 completion records per rx packet */
  63. bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2;
  64. bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  65. bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
  66. bp->tx_coal_ticks = coal->tx_coalesce_usecs;
  67. bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
  68. bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
  69. bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
  70. if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
  71. u32 stats_ticks = coal->stats_block_coalesce_usecs;
  72. /* Allow 0, which means disable. */
  73. if (stats_ticks)
  74. stats_ticks = clamp_t(u32, stats_ticks,
  75. BNXT_MIN_STATS_COAL_TICKS,
  76. BNXT_MAX_STATS_COAL_TICKS);
  77. stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
  78. bp->stats_coal_ticks = stats_ticks;
  79. update_stats = true;
  80. }
  81. if (netif_running(dev)) {
  82. if (update_stats) {
  83. rc = bnxt_close_nic(bp, true, false);
  84. if (!rc)
  85. rc = bnxt_open_nic(bp, true, false);
  86. } else {
  87. rc = bnxt_hwrm_set_coal(bp);
  88. }
  89. }
  90. return rc;
  91. }
  92. #define BNXT_NUM_STATS 21
  93. #define BNXT_RX_STATS_ENTRY(counter) \
  94. { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
  95. #define BNXT_TX_STATS_ENTRY(counter) \
  96. { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
  97. static const struct {
  98. long offset;
  99. char string[ETH_GSTRING_LEN];
  100. } bnxt_port_stats_arr[] = {
  101. BNXT_RX_STATS_ENTRY(rx_64b_frames),
  102. BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
  103. BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
  104. BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
  105. BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
  106. BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
  107. BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
  108. BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
  109. BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
  110. BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
  111. BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
  112. BNXT_RX_STATS_ENTRY(rx_total_frames),
  113. BNXT_RX_STATS_ENTRY(rx_ucast_frames),
  114. BNXT_RX_STATS_ENTRY(rx_mcast_frames),
  115. BNXT_RX_STATS_ENTRY(rx_bcast_frames),
  116. BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
  117. BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
  118. BNXT_RX_STATS_ENTRY(rx_pause_frames),
  119. BNXT_RX_STATS_ENTRY(rx_pfc_frames),
  120. BNXT_RX_STATS_ENTRY(rx_align_err_frames),
  121. BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
  122. BNXT_RX_STATS_ENTRY(rx_jbr_frames),
  123. BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
  124. BNXT_RX_STATS_ENTRY(rx_tagged_frames),
  125. BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
  126. BNXT_RX_STATS_ENTRY(rx_good_frames),
  127. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
  128. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
  129. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
  130. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
  131. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
  132. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
  133. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
  134. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
  135. BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
  136. BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
  137. BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
  138. BNXT_RX_STATS_ENTRY(rx_bytes),
  139. BNXT_RX_STATS_ENTRY(rx_runt_bytes),
  140. BNXT_RX_STATS_ENTRY(rx_runt_frames),
  141. BNXT_TX_STATS_ENTRY(tx_64b_frames),
  142. BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
  143. BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
  144. BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
  145. BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
  146. BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
  147. BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
  148. BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
  149. BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
  150. BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
  151. BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
  152. BNXT_TX_STATS_ENTRY(tx_good_frames),
  153. BNXT_TX_STATS_ENTRY(tx_total_frames),
  154. BNXT_TX_STATS_ENTRY(tx_ucast_frames),
  155. BNXT_TX_STATS_ENTRY(tx_mcast_frames),
  156. BNXT_TX_STATS_ENTRY(tx_bcast_frames),
  157. BNXT_TX_STATS_ENTRY(tx_pause_frames),
  158. BNXT_TX_STATS_ENTRY(tx_pfc_frames),
  159. BNXT_TX_STATS_ENTRY(tx_jabber_frames),
  160. BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
  161. BNXT_TX_STATS_ENTRY(tx_err),
  162. BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
  163. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
  164. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
  165. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
  166. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
  167. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
  168. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
  169. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
  170. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
  171. BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
  172. BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
  173. BNXT_TX_STATS_ENTRY(tx_total_collisions),
  174. BNXT_TX_STATS_ENTRY(tx_bytes),
  175. };
  176. #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
  177. static int bnxt_get_num_stats(struct bnxt *bp)
  178. {
  179. int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  180. if (bp->flags & BNXT_FLAG_PORT_STATS)
  181. num_stats += BNXT_NUM_PORT_STATS;
  182. return num_stats;
  183. }
  184. static int bnxt_get_sset_count(struct net_device *dev, int sset)
  185. {
  186. struct bnxt *bp = netdev_priv(dev);
  187. switch (sset) {
  188. case ETH_SS_STATS:
  189. return bnxt_get_num_stats(bp);
  190. case ETH_SS_TEST:
  191. if (!bp->num_tests)
  192. return -EOPNOTSUPP;
  193. return bp->num_tests;
  194. default:
  195. return -EOPNOTSUPP;
  196. }
  197. }
  198. static void bnxt_get_ethtool_stats(struct net_device *dev,
  199. struct ethtool_stats *stats, u64 *buf)
  200. {
  201. u32 i, j = 0;
  202. struct bnxt *bp = netdev_priv(dev);
  203. u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
  204. if (!bp->bnapi)
  205. return;
  206. for (i = 0; i < bp->cp_nr_rings; i++) {
  207. struct bnxt_napi *bnapi = bp->bnapi[i];
  208. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  209. __le64 *hw_stats = (__le64 *)cpr->hw_stats;
  210. int k;
  211. for (k = 0; k < stat_fields; j++, k++)
  212. buf[j] = le64_to_cpu(hw_stats[k]);
  213. buf[j++] = cpr->rx_l4_csum_errors;
  214. }
  215. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  216. __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
  217. for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
  218. buf[j] = le64_to_cpu(*(port_stats +
  219. bnxt_port_stats_arr[i].offset));
  220. }
  221. }
  222. }
  223. static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  224. {
  225. struct bnxt *bp = netdev_priv(dev);
  226. u32 i;
  227. switch (stringset) {
  228. /* The number of strings must match BNXT_NUM_STATS defined above. */
  229. case ETH_SS_STATS:
  230. for (i = 0; i < bp->cp_nr_rings; i++) {
  231. sprintf(buf, "[%d]: rx_ucast_packets", i);
  232. buf += ETH_GSTRING_LEN;
  233. sprintf(buf, "[%d]: rx_mcast_packets", i);
  234. buf += ETH_GSTRING_LEN;
  235. sprintf(buf, "[%d]: rx_bcast_packets", i);
  236. buf += ETH_GSTRING_LEN;
  237. sprintf(buf, "[%d]: rx_discards", i);
  238. buf += ETH_GSTRING_LEN;
  239. sprintf(buf, "[%d]: rx_drops", i);
  240. buf += ETH_GSTRING_LEN;
  241. sprintf(buf, "[%d]: rx_ucast_bytes", i);
  242. buf += ETH_GSTRING_LEN;
  243. sprintf(buf, "[%d]: rx_mcast_bytes", i);
  244. buf += ETH_GSTRING_LEN;
  245. sprintf(buf, "[%d]: rx_bcast_bytes", i);
  246. buf += ETH_GSTRING_LEN;
  247. sprintf(buf, "[%d]: tx_ucast_packets", i);
  248. buf += ETH_GSTRING_LEN;
  249. sprintf(buf, "[%d]: tx_mcast_packets", i);
  250. buf += ETH_GSTRING_LEN;
  251. sprintf(buf, "[%d]: tx_bcast_packets", i);
  252. buf += ETH_GSTRING_LEN;
  253. sprintf(buf, "[%d]: tx_discards", i);
  254. buf += ETH_GSTRING_LEN;
  255. sprintf(buf, "[%d]: tx_drops", i);
  256. buf += ETH_GSTRING_LEN;
  257. sprintf(buf, "[%d]: tx_ucast_bytes", i);
  258. buf += ETH_GSTRING_LEN;
  259. sprintf(buf, "[%d]: tx_mcast_bytes", i);
  260. buf += ETH_GSTRING_LEN;
  261. sprintf(buf, "[%d]: tx_bcast_bytes", i);
  262. buf += ETH_GSTRING_LEN;
  263. sprintf(buf, "[%d]: tpa_packets", i);
  264. buf += ETH_GSTRING_LEN;
  265. sprintf(buf, "[%d]: tpa_bytes", i);
  266. buf += ETH_GSTRING_LEN;
  267. sprintf(buf, "[%d]: tpa_events", i);
  268. buf += ETH_GSTRING_LEN;
  269. sprintf(buf, "[%d]: tpa_aborts", i);
  270. buf += ETH_GSTRING_LEN;
  271. sprintf(buf, "[%d]: rx_l4_csum_errors", i);
  272. buf += ETH_GSTRING_LEN;
  273. }
  274. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  275. for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
  276. strcpy(buf, bnxt_port_stats_arr[i].string);
  277. buf += ETH_GSTRING_LEN;
  278. }
  279. }
  280. break;
  281. case ETH_SS_TEST:
  282. if (bp->num_tests)
  283. memcpy(buf, bp->test_info->string,
  284. bp->num_tests * ETH_GSTRING_LEN);
  285. break;
  286. default:
  287. netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
  288. stringset);
  289. break;
  290. }
  291. }
  292. static void bnxt_get_ringparam(struct net_device *dev,
  293. struct ethtool_ringparam *ering)
  294. {
  295. struct bnxt *bp = netdev_priv(dev);
  296. ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
  297. ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
  298. ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
  299. ering->rx_pending = bp->rx_ring_size;
  300. ering->rx_jumbo_pending = bp->rx_agg_ring_size;
  301. ering->tx_pending = bp->tx_ring_size;
  302. }
  303. static int bnxt_set_ringparam(struct net_device *dev,
  304. struct ethtool_ringparam *ering)
  305. {
  306. struct bnxt *bp = netdev_priv(dev);
  307. if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
  308. (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
  309. (ering->tx_pending <= MAX_SKB_FRAGS))
  310. return -EINVAL;
  311. if (netif_running(dev))
  312. bnxt_close_nic(bp, false, false);
  313. bp->rx_ring_size = ering->rx_pending;
  314. bp->tx_ring_size = ering->tx_pending;
  315. bnxt_set_ring_params(bp);
  316. if (netif_running(dev))
  317. return bnxt_open_nic(bp, false, false);
  318. return 0;
  319. }
  320. static void bnxt_get_channels(struct net_device *dev,
  321. struct ethtool_channels *channel)
  322. {
  323. struct bnxt *bp = netdev_priv(dev);
  324. int max_rx_rings, max_tx_rings, tcs;
  325. bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
  326. channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
  327. if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
  328. max_rx_rings = 0;
  329. max_tx_rings = 0;
  330. }
  331. tcs = netdev_get_num_tc(dev);
  332. if (tcs > 1)
  333. max_tx_rings /= tcs;
  334. channel->max_rx = max_rx_rings;
  335. channel->max_tx = max_tx_rings;
  336. channel->max_other = 0;
  337. if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
  338. channel->combined_count = bp->rx_nr_rings;
  339. if (BNXT_CHIP_TYPE_NITRO_A0(bp))
  340. channel->combined_count--;
  341. } else {
  342. if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
  343. channel->rx_count = bp->rx_nr_rings;
  344. channel->tx_count = bp->tx_nr_rings_per_tc;
  345. }
  346. }
  347. }
  348. static int bnxt_set_channels(struct net_device *dev,
  349. struct ethtool_channels *channel)
  350. {
  351. struct bnxt *bp = netdev_priv(dev);
  352. int req_tx_rings, req_rx_rings, tcs;
  353. bool sh = false;
  354. int tx_xdp = 0;
  355. int rc = 0;
  356. if (channel->other_count)
  357. return -EINVAL;
  358. if (!channel->combined_count &&
  359. (!channel->rx_count || !channel->tx_count))
  360. return -EINVAL;
  361. if (channel->combined_count &&
  362. (channel->rx_count || channel->tx_count))
  363. return -EINVAL;
  364. if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
  365. channel->tx_count))
  366. return -EINVAL;
  367. if (channel->combined_count)
  368. sh = true;
  369. tcs = netdev_get_num_tc(dev);
  370. req_tx_rings = sh ? channel->combined_count : channel->tx_count;
  371. req_rx_rings = sh ? channel->combined_count : channel->rx_count;
  372. if (bp->tx_nr_rings_xdp) {
  373. if (!sh) {
  374. netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
  375. return -EINVAL;
  376. }
  377. tx_xdp = req_rx_rings;
  378. }
  379. rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
  380. if (rc) {
  381. netdev_warn(dev, "Unable to allocate the requested rings\n");
  382. return rc;
  383. }
  384. if (netif_running(dev)) {
  385. if (BNXT_PF(bp)) {
  386. /* TODO CHIMP_FW: Send message to all VF's
  387. * before PF unload
  388. */
  389. }
  390. rc = bnxt_close_nic(bp, true, false);
  391. if (rc) {
  392. netdev_err(bp->dev, "Set channel failure rc :%x\n",
  393. rc);
  394. return rc;
  395. }
  396. }
  397. if (sh) {
  398. bp->flags |= BNXT_FLAG_SHARED_RINGS;
  399. bp->rx_nr_rings = channel->combined_count;
  400. bp->tx_nr_rings_per_tc = channel->combined_count;
  401. } else {
  402. bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
  403. bp->rx_nr_rings = channel->rx_count;
  404. bp->tx_nr_rings_per_tc = channel->tx_count;
  405. }
  406. bp->tx_nr_rings_xdp = tx_xdp;
  407. bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
  408. if (tcs > 1)
  409. bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
  410. bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
  411. bp->tx_nr_rings + bp->rx_nr_rings;
  412. bp->num_stat_ctxs = bp->cp_nr_rings;
  413. /* After changing number of rx channels, update NTUPLE feature. */
  414. netdev_update_features(dev);
  415. if (netif_running(dev)) {
  416. rc = bnxt_open_nic(bp, true, false);
  417. if ((!rc) && BNXT_PF(bp)) {
  418. /* TODO CHIMP_FW: Send message to all VF's
  419. * to renable
  420. */
  421. }
  422. }
  423. return rc;
  424. }
  425. #ifdef CONFIG_RFS_ACCEL
  426. static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
  427. u32 *rule_locs)
  428. {
  429. int i, j = 0;
  430. cmd->data = bp->ntp_fltr_count;
  431. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  432. struct hlist_head *head;
  433. struct bnxt_ntuple_filter *fltr;
  434. head = &bp->ntp_fltr_hash_tbl[i];
  435. rcu_read_lock();
  436. hlist_for_each_entry_rcu(fltr, head, hash) {
  437. if (j == cmd->rule_cnt)
  438. break;
  439. rule_locs[j++] = fltr->sw_id;
  440. }
  441. rcu_read_unlock();
  442. if (j == cmd->rule_cnt)
  443. break;
  444. }
  445. cmd->rule_cnt = j;
  446. return 0;
  447. }
  448. static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  449. {
  450. struct ethtool_rx_flow_spec *fs =
  451. (struct ethtool_rx_flow_spec *)&cmd->fs;
  452. struct bnxt_ntuple_filter *fltr;
  453. struct flow_keys *fkeys;
  454. int i, rc = -EINVAL;
  455. if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
  456. return rc;
  457. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  458. struct hlist_head *head;
  459. head = &bp->ntp_fltr_hash_tbl[i];
  460. rcu_read_lock();
  461. hlist_for_each_entry_rcu(fltr, head, hash) {
  462. if (fltr->sw_id == fs->location)
  463. goto fltr_found;
  464. }
  465. rcu_read_unlock();
  466. }
  467. return rc;
  468. fltr_found:
  469. fkeys = &fltr->fkeys;
  470. if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
  471. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  472. fs->flow_type = TCP_V4_FLOW;
  473. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  474. fs->flow_type = UDP_V4_FLOW;
  475. else
  476. goto fltr_err;
  477. fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
  478. fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
  479. fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
  480. fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
  481. fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
  482. fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
  483. fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
  484. fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
  485. } else {
  486. int i;
  487. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  488. fs->flow_type = TCP_V6_FLOW;
  489. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  490. fs->flow_type = UDP_V6_FLOW;
  491. else
  492. goto fltr_err;
  493. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
  494. fkeys->addrs.v6addrs.src;
  495. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
  496. fkeys->addrs.v6addrs.dst;
  497. for (i = 0; i < 4; i++) {
  498. fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
  499. fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
  500. }
  501. fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
  502. fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
  503. fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
  504. fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
  505. }
  506. fs->ring_cookie = fltr->rxq;
  507. rc = 0;
  508. fltr_err:
  509. rcu_read_unlock();
  510. return rc;
  511. }
  512. #endif
  513. static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
  514. {
  515. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
  516. return RXH_IP_SRC | RXH_IP_DST;
  517. return 0;
  518. }
  519. static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
  520. {
  521. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
  522. return RXH_IP_SRC | RXH_IP_DST;
  523. return 0;
  524. }
  525. static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  526. {
  527. cmd->data = 0;
  528. switch (cmd->flow_type) {
  529. case TCP_V4_FLOW:
  530. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
  531. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  532. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  533. cmd->data |= get_ethtool_ipv4_rss(bp);
  534. break;
  535. case UDP_V4_FLOW:
  536. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
  537. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  538. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  539. /* fall through */
  540. case SCTP_V4_FLOW:
  541. case AH_ESP_V4_FLOW:
  542. case AH_V4_FLOW:
  543. case ESP_V4_FLOW:
  544. case IPV4_FLOW:
  545. cmd->data |= get_ethtool_ipv4_rss(bp);
  546. break;
  547. case TCP_V6_FLOW:
  548. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
  549. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  550. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  551. cmd->data |= get_ethtool_ipv6_rss(bp);
  552. break;
  553. case UDP_V6_FLOW:
  554. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
  555. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  556. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  557. /* fall through */
  558. case SCTP_V6_FLOW:
  559. case AH_ESP_V6_FLOW:
  560. case AH_V6_FLOW:
  561. case ESP_V6_FLOW:
  562. case IPV6_FLOW:
  563. cmd->data |= get_ethtool_ipv6_rss(bp);
  564. break;
  565. }
  566. return 0;
  567. }
  568. #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
  569. #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
  570. static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  571. {
  572. u32 rss_hash_cfg = bp->rss_hash_cfg;
  573. int tuple, rc = 0;
  574. if (cmd->data == RXH_4TUPLE)
  575. tuple = 4;
  576. else if (cmd->data == RXH_2TUPLE)
  577. tuple = 2;
  578. else if (!cmd->data)
  579. tuple = 0;
  580. else
  581. return -EINVAL;
  582. if (cmd->flow_type == TCP_V4_FLOW) {
  583. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  584. if (tuple == 4)
  585. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  586. } else if (cmd->flow_type == UDP_V4_FLOW) {
  587. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  588. return -EINVAL;
  589. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  590. if (tuple == 4)
  591. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  592. } else if (cmd->flow_type == TCP_V6_FLOW) {
  593. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  594. if (tuple == 4)
  595. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  596. } else if (cmd->flow_type == UDP_V6_FLOW) {
  597. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  598. return -EINVAL;
  599. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  600. if (tuple == 4)
  601. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  602. } else if (tuple == 4) {
  603. return -EINVAL;
  604. }
  605. switch (cmd->flow_type) {
  606. case TCP_V4_FLOW:
  607. case UDP_V4_FLOW:
  608. case SCTP_V4_FLOW:
  609. case AH_ESP_V4_FLOW:
  610. case AH_V4_FLOW:
  611. case ESP_V4_FLOW:
  612. case IPV4_FLOW:
  613. if (tuple == 2)
  614. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  615. else if (!tuple)
  616. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  617. break;
  618. case TCP_V6_FLOW:
  619. case UDP_V6_FLOW:
  620. case SCTP_V6_FLOW:
  621. case AH_ESP_V6_FLOW:
  622. case AH_V6_FLOW:
  623. case ESP_V6_FLOW:
  624. case IPV6_FLOW:
  625. if (tuple == 2)
  626. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  627. else if (!tuple)
  628. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  629. break;
  630. }
  631. if (bp->rss_hash_cfg == rss_hash_cfg)
  632. return 0;
  633. bp->rss_hash_cfg = rss_hash_cfg;
  634. if (netif_running(bp->dev)) {
  635. bnxt_close_nic(bp, false, false);
  636. rc = bnxt_open_nic(bp, false, false);
  637. }
  638. return rc;
  639. }
  640. static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
  641. u32 *rule_locs)
  642. {
  643. struct bnxt *bp = netdev_priv(dev);
  644. int rc = 0;
  645. switch (cmd->cmd) {
  646. #ifdef CONFIG_RFS_ACCEL
  647. case ETHTOOL_GRXRINGS:
  648. cmd->data = bp->rx_nr_rings;
  649. break;
  650. case ETHTOOL_GRXCLSRLCNT:
  651. cmd->rule_cnt = bp->ntp_fltr_count;
  652. cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
  653. break;
  654. case ETHTOOL_GRXCLSRLALL:
  655. rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
  656. break;
  657. case ETHTOOL_GRXCLSRULE:
  658. rc = bnxt_grxclsrule(bp, cmd);
  659. break;
  660. #endif
  661. case ETHTOOL_GRXFH:
  662. rc = bnxt_grxfh(bp, cmd);
  663. break;
  664. default:
  665. rc = -EOPNOTSUPP;
  666. break;
  667. }
  668. return rc;
  669. }
  670. static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
  671. {
  672. struct bnxt *bp = netdev_priv(dev);
  673. int rc;
  674. switch (cmd->cmd) {
  675. case ETHTOOL_SRXFH:
  676. rc = bnxt_srxfh(bp, cmd);
  677. break;
  678. default:
  679. rc = -EOPNOTSUPP;
  680. break;
  681. }
  682. return rc;
  683. }
  684. static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
  685. {
  686. return HW_HASH_INDEX_SIZE;
  687. }
  688. static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
  689. {
  690. return HW_HASH_KEY_SIZE;
  691. }
  692. static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
  693. u8 *hfunc)
  694. {
  695. struct bnxt *bp = netdev_priv(dev);
  696. struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
  697. int i = 0;
  698. if (hfunc)
  699. *hfunc = ETH_RSS_HASH_TOP;
  700. if (indir)
  701. for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
  702. indir[i] = le16_to_cpu(vnic->rss_table[i]);
  703. if (key)
  704. memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
  705. return 0;
  706. }
  707. static void bnxt_get_drvinfo(struct net_device *dev,
  708. struct ethtool_drvinfo *info)
  709. {
  710. struct bnxt *bp = netdev_priv(dev);
  711. char *pkglog;
  712. char *pkgver = NULL;
  713. pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
  714. if (pkglog)
  715. pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
  716. strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
  717. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  718. if (pkgver && *pkgver != 0 && isdigit(*pkgver))
  719. snprintf(info->fw_version, sizeof(info->fw_version) - 1,
  720. "%s pkg %s", bp->fw_ver_str, pkgver);
  721. else
  722. strlcpy(info->fw_version, bp->fw_ver_str,
  723. sizeof(info->fw_version));
  724. strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
  725. info->n_stats = bnxt_get_num_stats(bp);
  726. info->testinfo_len = bp->num_tests;
  727. /* TODO CHIMP_FW: eeprom dump details */
  728. info->eedump_len = 0;
  729. /* TODO CHIMP FW: reg dump details */
  730. info->regdump_len = 0;
  731. kfree(pkglog);
  732. }
  733. static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  734. {
  735. struct bnxt *bp = netdev_priv(dev);
  736. wol->supported = 0;
  737. wol->wolopts = 0;
  738. memset(&wol->sopass, 0, sizeof(wol->sopass));
  739. if (bp->flags & BNXT_FLAG_WOL_CAP) {
  740. wol->supported = WAKE_MAGIC;
  741. if (bp->wol)
  742. wol->wolopts = WAKE_MAGIC;
  743. }
  744. }
  745. static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  746. {
  747. struct bnxt *bp = netdev_priv(dev);
  748. if (wol->wolopts & ~WAKE_MAGIC)
  749. return -EINVAL;
  750. if (wol->wolopts & WAKE_MAGIC) {
  751. if (!(bp->flags & BNXT_FLAG_WOL_CAP))
  752. return -EINVAL;
  753. if (!bp->wol) {
  754. if (bnxt_hwrm_alloc_wol_fltr(bp))
  755. return -EBUSY;
  756. bp->wol = 1;
  757. }
  758. } else {
  759. if (bp->wol) {
  760. if (bnxt_hwrm_free_wol_fltr(bp))
  761. return -EBUSY;
  762. bp->wol = 0;
  763. }
  764. }
  765. return 0;
  766. }
  767. u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
  768. {
  769. u32 speed_mask = 0;
  770. /* TODO: support 25GB, 40GB, 50GB with different cable type */
  771. /* set the advertised speeds */
  772. if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
  773. speed_mask |= ADVERTISED_100baseT_Full;
  774. if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
  775. speed_mask |= ADVERTISED_1000baseT_Full;
  776. if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
  777. speed_mask |= ADVERTISED_2500baseX_Full;
  778. if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
  779. speed_mask |= ADVERTISED_10000baseT_Full;
  780. if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
  781. speed_mask |= ADVERTISED_40000baseCR4_Full;
  782. if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
  783. speed_mask |= ADVERTISED_Pause;
  784. else if (fw_pause & BNXT_LINK_PAUSE_TX)
  785. speed_mask |= ADVERTISED_Asym_Pause;
  786. else if (fw_pause & BNXT_LINK_PAUSE_RX)
  787. speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
  788. return speed_mask;
  789. }
  790. #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
  791. { \
  792. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
  793. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  794. 100baseT_Full); \
  795. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
  796. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  797. 1000baseT_Full); \
  798. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
  799. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  800. 10000baseT_Full); \
  801. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
  802. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  803. 25000baseCR_Full); \
  804. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
  805. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  806. 40000baseCR4_Full);\
  807. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
  808. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  809. 50000baseCR2_Full);\
  810. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \
  811. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  812. 100000baseCR4_Full);\
  813. if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
  814. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  815. Pause); \
  816. if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
  817. ethtool_link_ksettings_add_link_mode( \
  818. lk_ksettings, name, Asym_Pause);\
  819. } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
  820. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  821. Asym_Pause); \
  822. } \
  823. }
  824. #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
  825. { \
  826. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  827. 100baseT_Full) || \
  828. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  829. 100baseT_Half)) \
  830. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
  831. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  832. 1000baseT_Full) || \
  833. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  834. 1000baseT_Half)) \
  835. (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
  836. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  837. 10000baseT_Full)) \
  838. (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
  839. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  840. 25000baseCR_Full)) \
  841. (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
  842. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  843. 40000baseCR4_Full)) \
  844. (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
  845. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  846. 50000baseCR2_Full)) \
  847. (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
  848. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  849. 100000baseCR4_Full)) \
  850. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \
  851. }
  852. static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
  853. struct ethtool_link_ksettings *lk_ksettings)
  854. {
  855. u16 fw_speeds = link_info->advertising;
  856. u8 fw_pause = 0;
  857. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  858. fw_pause = link_info->auto_pause_setting;
  859. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
  860. }
  861. static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
  862. struct ethtool_link_ksettings *lk_ksettings)
  863. {
  864. u16 fw_speeds = link_info->lp_auto_link_speeds;
  865. u8 fw_pause = 0;
  866. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  867. fw_pause = link_info->lp_pause;
  868. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
  869. lp_advertising);
  870. }
  871. static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
  872. struct ethtool_link_ksettings *lk_ksettings)
  873. {
  874. u16 fw_speeds = link_info->support_speeds;
  875. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
  876. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
  877. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  878. Asym_Pause);
  879. if (link_info->support_auto_speeds)
  880. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  881. Autoneg);
  882. }
  883. u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
  884. {
  885. switch (fw_link_speed) {
  886. case BNXT_LINK_SPEED_100MB:
  887. return SPEED_100;
  888. case BNXT_LINK_SPEED_1GB:
  889. return SPEED_1000;
  890. case BNXT_LINK_SPEED_2_5GB:
  891. return SPEED_2500;
  892. case BNXT_LINK_SPEED_10GB:
  893. return SPEED_10000;
  894. case BNXT_LINK_SPEED_20GB:
  895. return SPEED_20000;
  896. case BNXT_LINK_SPEED_25GB:
  897. return SPEED_25000;
  898. case BNXT_LINK_SPEED_40GB:
  899. return SPEED_40000;
  900. case BNXT_LINK_SPEED_50GB:
  901. return SPEED_50000;
  902. case BNXT_LINK_SPEED_100GB:
  903. return SPEED_100000;
  904. default:
  905. return SPEED_UNKNOWN;
  906. }
  907. }
  908. static int bnxt_get_link_ksettings(struct net_device *dev,
  909. struct ethtool_link_ksettings *lk_ksettings)
  910. {
  911. struct bnxt *bp = netdev_priv(dev);
  912. struct bnxt_link_info *link_info = &bp->link_info;
  913. struct ethtool_link_settings *base = &lk_ksettings->base;
  914. u32 ethtool_speed;
  915. ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
  916. bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
  917. ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
  918. if (link_info->autoneg) {
  919. bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
  920. ethtool_link_ksettings_add_link_mode(lk_ksettings,
  921. advertising, Autoneg);
  922. base->autoneg = AUTONEG_ENABLE;
  923. if (link_info->phy_link_status == BNXT_LINK_LINK)
  924. bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
  925. ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
  926. if (!netif_carrier_ok(dev))
  927. base->duplex = DUPLEX_UNKNOWN;
  928. else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
  929. base->duplex = DUPLEX_FULL;
  930. else
  931. base->duplex = DUPLEX_HALF;
  932. } else {
  933. base->autoneg = AUTONEG_DISABLE;
  934. ethtool_speed =
  935. bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
  936. base->duplex = DUPLEX_HALF;
  937. if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
  938. base->duplex = DUPLEX_FULL;
  939. }
  940. base->speed = ethtool_speed;
  941. base->port = PORT_NONE;
  942. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  943. base->port = PORT_TP;
  944. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  945. TP);
  946. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  947. TP);
  948. } else {
  949. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  950. FIBRE);
  951. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  952. FIBRE);
  953. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
  954. base->port = PORT_DA;
  955. else if (link_info->media_type ==
  956. PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
  957. base->port = PORT_FIBRE;
  958. }
  959. base->phy_address = link_info->phy_addr;
  960. return 0;
  961. }
  962. static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
  963. {
  964. struct bnxt *bp = netdev_priv(dev);
  965. struct bnxt_link_info *link_info = &bp->link_info;
  966. u16 support_spds = link_info->support_speeds;
  967. u32 fw_speed = 0;
  968. switch (ethtool_speed) {
  969. case SPEED_100:
  970. if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
  971. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
  972. break;
  973. case SPEED_1000:
  974. if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
  975. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
  976. break;
  977. case SPEED_2500:
  978. if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
  979. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
  980. break;
  981. case SPEED_10000:
  982. if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
  983. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
  984. break;
  985. case SPEED_20000:
  986. if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
  987. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
  988. break;
  989. case SPEED_25000:
  990. if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
  991. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
  992. break;
  993. case SPEED_40000:
  994. if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
  995. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
  996. break;
  997. case SPEED_50000:
  998. if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
  999. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
  1000. break;
  1001. case SPEED_100000:
  1002. if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
  1003. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
  1004. break;
  1005. default:
  1006. netdev_err(dev, "unsupported speed!\n");
  1007. break;
  1008. }
  1009. return fw_speed;
  1010. }
  1011. u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
  1012. {
  1013. u16 fw_speed_mask = 0;
  1014. /* only support autoneg at speed 100, 1000, and 10000 */
  1015. if (advertising & (ADVERTISED_100baseT_Full |
  1016. ADVERTISED_100baseT_Half)) {
  1017. fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
  1018. }
  1019. if (advertising & (ADVERTISED_1000baseT_Full |
  1020. ADVERTISED_1000baseT_Half)) {
  1021. fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
  1022. }
  1023. if (advertising & ADVERTISED_10000baseT_Full)
  1024. fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
  1025. if (advertising & ADVERTISED_40000baseCR4_Full)
  1026. fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
  1027. return fw_speed_mask;
  1028. }
  1029. static int bnxt_set_link_ksettings(struct net_device *dev,
  1030. const struct ethtool_link_ksettings *lk_ksettings)
  1031. {
  1032. struct bnxt *bp = netdev_priv(dev);
  1033. struct bnxt_link_info *link_info = &bp->link_info;
  1034. const struct ethtool_link_settings *base = &lk_ksettings->base;
  1035. bool set_pause = false;
  1036. u16 fw_advertising = 0;
  1037. u32 speed;
  1038. int rc = 0;
  1039. if (!BNXT_SINGLE_PF(bp))
  1040. return -EOPNOTSUPP;
  1041. if (base->autoneg == AUTONEG_ENABLE) {
  1042. BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
  1043. advertising);
  1044. link_info->autoneg |= BNXT_AUTONEG_SPEED;
  1045. if (!fw_advertising)
  1046. link_info->advertising = link_info->support_auto_speeds;
  1047. else
  1048. link_info->advertising = fw_advertising;
  1049. /* any change to autoneg will cause link change, therefore the
  1050. * driver should put back the original pause setting in autoneg
  1051. */
  1052. set_pause = true;
  1053. } else {
  1054. u16 fw_speed;
  1055. u8 phy_type = link_info->phy_type;
  1056. if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
  1057. phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
  1058. link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  1059. netdev_err(dev, "10GBase-T devices must autoneg\n");
  1060. rc = -EINVAL;
  1061. goto set_setting_exit;
  1062. }
  1063. if (base->duplex == DUPLEX_HALF) {
  1064. netdev_err(dev, "HALF DUPLEX is not supported!\n");
  1065. rc = -EINVAL;
  1066. goto set_setting_exit;
  1067. }
  1068. speed = base->speed;
  1069. fw_speed = bnxt_get_fw_speed(dev, speed);
  1070. if (!fw_speed) {
  1071. rc = -EINVAL;
  1072. goto set_setting_exit;
  1073. }
  1074. link_info->req_link_speed = fw_speed;
  1075. link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
  1076. link_info->autoneg = 0;
  1077. link_info->advertising = 0;
  1078. }
  1079. if (netif_running(dev))
  1080. rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
  1081. set_setting_exit:
  1082. return rc;
  1083. }
  1084. static void bnxt_get_pauseparam(struct net_device *dev,
  1085. struct ethtool_pauseparam *epause)
  1086. {
  1087. struct bnxt *bp = netdev_priv(dev);
  1088. struct bnxt_link_info *link_info = &bp->link_info;
  1089. if (BNXT_VF(bp))
  1090. return;
  1091. epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
  1092. epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
  1093. epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
  1094. }
  1095. static int bnxt_set_pauseparam(struct net_device *dev,
  1096. struct ethtool_pauseparam *epause)
  1097. {
  1098. int rc = 0;
  1099. struct bnxt *bp = netdev_priv(dev);
  1100. struct bnxt_link_info *link_info = &bp->link_info;
  1101. if (!BNXT_SINGLE_PF(bp))
  1102. return -EOPNOTSUPP;
  1103. if (epause->autoneg) {
  1104. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1105. return -EINVAL;
  1106. link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
  1107. if (bp->hwrm_spec_code >= 0x10201)
  1108. link_info->req_flow_ctrl =
  1109. PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
  1110. } else {
  1111. /* when transition from auto pause to force pause,
  1112. * force a link change
  1113. */
  1114. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  1115. link_info->force_link_chng = true;
  1116. link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
  1117. link_info->req_flow_ctrl = 0;
  1118. }
  1119. if (epause->rx_pause)
  1120. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
  1121. if (epause->tx_pause)
  1122. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
  1123. if (netif_running(dev))
  1124. rc = bnxt_hwrm_set_pause(bp);
  1125. return rc;
  1126. }
  1127. static u32 bnxt_get_link(struct net_device *dev)
  1128. {
  1129. struct bnxt *bp = netdev_priv(dev);
  1130. /* TODO: handle MF, VF, driver close case */
  1131. return bp->link_info.link_up;
  1132. }
  1133. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1134. u16 ext, u16 *index, u32 *item_length,
  1135. u32 *data_length);
  1136. static int bnxt_flash_nvram(struct net_device *dev,
  1137. u16 dir_type,
  1138. u16 dir_ordinal,
  1139. u16 dir_ext,
  1140. u16 dir_attr,
  1141. const u8 *data,
  1142. size_t data_len)
  1143. {
  1144. struct bnxt *bp = netdev_priv(dev);
  1145. int rc;
  1146. struct hwrm_nvm_write_input req = {0};
  1147. dma_addr_t dma_handle;
  1148. u8 *kmem;
  1149. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
  1150. req.dir_type = cpu_to_le16(dir_type);
  1151. req.dir_ordinal = cpu_to_le16(dir_ordinal);
  1152. req.dir_ext = cpu_to_le16(dir_ext);
  1153. req.dir_attr = cpu_to_le16(dir_attr);
  1154. req.dir_data_length = cpu_to_le32(data_len);
  1155. kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
  1156. GFP_KERNEL);
  1157. if (!kmem) {
  1158. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1159. (unsigned)data_len);
  1160. return -ENOMEM;
  1161. }
  1162. memcpy(kmem, data, data_len);
  1163. req.host_src_addr = cpu_to_le64(dma_handle);
  1164. rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
  1165. dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
  1166. return rc;
  1167. }
  1168. static int bnxt_firmware_reset(struct net_device *dev,
  1169. u16 dir_type)
  1170. {
  1171. struct bnxt *bp = netdev_priv(dev);
  1172. struct hwrm_fw_reset_input req = {0};
  1173. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
  1174. /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */
  1175. /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
  1176. /* (e.g. when firmware isn't already running) */
  1177. switch (dir_type) {
  1178. case BNX_DIR_TYPE_CHIMP_PATCH:
  1179. case BNX_DIR_TYPE_BOOTCODE:
  1180. case BNX_DIR_TYPE_BOOTCODE_2:
  1181. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
  1182. /* Self-reset ChiMP upon next PCIe reset: */
  1183. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1184. break;
  1185. case BNX_DIR_TYPE_APE_FW:
  1186. case BNX_DIR_TYPE_APE_PATCH:
  1187. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
  1188. /* Self-reset APE upon next PCIe reset: */
  1189. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1190. break;
  1191. case BNX_DIR_TYPE_KONG_FW:
  1192. case BNX_DIR_TYPE_KONG_PATCH:
  1193. req.embedded_proc_type =
  1194. FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
  1195. break;
  1196. case BNX_DIR_TYPE_BONO_FW:
  1197. case BNX_DIR_TYPE_BONO_PATCH:
  1198. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
  1199. break;
  1200. default:
  1201. return -EINVAL;
  1202. }
  1203. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1204. }
  1205. static int bnxt_flash_firmware(struct net_device *dev,
  1206. u16 dir_type,
  1207. const u8 *fw_data,
  1208. size_t fw_size)
  1209. {
  1210. int rc = 0;
  1211. u16 code_type;
  1212. u32 stored_crc;
  1213. u32 calculated_crc;
  1214. struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
  1215. switch (dir_type) {
  1216. case BNX_DIR_TYPE_BOOTCODE:
  1217. case BNX_DIR_TYPE_BOOTCODE_2:
  1218. code_type = CODE_BOOT;
  1219. break;
  1220. case BNX_DIR_TYPE_CHIMP_PATCH:
  1221. code_type = CODE_CHIMP_PATCH;
  1222. break;
  1223. case BNX_DIR_TYPE_APE_FW:
  1224. code_type = CODE_MCTP_PASSTHRU;
  1225. break;
  1226. case BNX_DIR_TYPE_APE_PATCH:
  1227. code_type = CODE_APE_PATCH;
  1228. break;
  1229. case BNX_DIR_TYPE_KONG_FW:
  1230. code_type = CODE_KONG_FW;
  1231. break;
  1232. case BNX_DIR_TYPE_KONG_PATCH:
  1233. code_type = CODE_KONG_PATCH;
  1234. break;
  1235. case BNX_DIR_TYPE_BONO_FW:
  1236. code_type = CODE_BONO_FW;
  1237. break;
  1238. case BNX_DIR_TYPE_BONO_PATCH:
  1239. code_type = CODE_BONO_PATCH;
  1240. break;
  1241. default:
  1242. netdev_err(dev, "Unsupported directory entry type: %u\n",
  1243. dir_type);
  1244. return -EINVAL;
  1245. }
  1246. if (fw_size < sizeof(struct bnxt_fw_header)) {
  1247. netdev_err(dev, "Invalid firmware file size: %u\n",
  1248. (unsigned int)fw_size);
  1249. return -EINVAL;
  1250. }
  1251. if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
  1252. netdev_err(dev, "Invalid firmware signature: %08X\n",
  1253. le32_to_cpu(header->signature));
  1254. return -EINVAL;
  1255. }
  1256. if (header->code_type != code_type) {
  1257. netdev_err(dev, "Expected firmware type: %d, read: %d\n",
  1258. code_type, header->code_type);
  1259. return -EINVAL;
  1260. }
  1261. if (header->device != DEVICE_CUMULUS_FAMILY) {
  1262. netdev_err(dev, "Expected firmware device family %d, read: %d\n",
  1263. DEVICE_CUMULUS_FAMILY, header->device);
  1264. return -EINVAL;
  1265. }
  1266. /* Confirm the CRC32 checksum of the file: */
  1267. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1268. sizeof(stored_crc)));
  1269. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1270. if (calculated_crc != stored_crc) {
  1271. netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
  1272. (unsigned long)stored_crc,
  1273. (unsigned long)calculated_crc);
  1274. return -EINVAL;
  1275. }
  1276. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1277. 0, 0, fw_data, fw_size);
  1278. if (rc == 0) /* Firmware update successful */
  1279. rc = bnxt_firmware_reset(dev, dir_type);
  1280. return rc;
  1281. }
  1282. static int bnxt_flash_microcode(struct net_device *dev,
  1283. u16 dir_type,
  1284. const u8 *fw_data,
  1285. size_t fw_size)
  1286. {
  1287. struct bnxt_ucode_trailer *trailer;
  1288. u32 calculated_crc;
  1289. u32 stored_crc;
  1290. int rc = 0;
  1291. if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
  1292. netdev_err(dev, "Invalid microcode file size: %u\n",
  1293. (unsigned int)fw_size);
  1294. return -EINVAL;
  1295. }
  1296. trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
  1297. sizeof(*trailer)));
  1298. if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
  1299. netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
  1300. le32_to_cpu(trailer->sig));
  1301. return -EINVAL;
  1302. }
  1303. if (le16_to_cpu(trailer->dir_type) != dir_type) {
  1304. netdev_err(dev, "Expected microcode type: %d, read: %d\n",
  1305. dir_type, le16_to_cpu(trailer->dir_type));
  1306. return -EINVAL;
  1307. }
  1308. if (le16_to_cpu(trailer->trailer_length) <
  1309. sizeof(struct bnxt_ucode_trailer)) {
  1310. netdev_err(dev, "Invalid microcode trailer length: %d\n",
  1311. le16_to_cpu(trailer->trailer_length));
  1312. return -EINVAL;
  1313. }
  1314. /* Confirm the CRC32 checksum of the file: */
  1315. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1316. sizeof(stored_crc)));
  1317. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1318. if (calculated_crc != stored_crc) {
  1319. netdev_err(dev,
  1320. "CRC32 (%08lX) does not match calculated: %08lX\n",
  1321. (unsigned long)stored_crc,
  1322. (unsigned long)calculated_crc);
  1323. return -EINVAL;
  1324. }
  1325. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1326. 0, 0, fw_data, fw_size);
  1327. return rc;
  1328. }
  1329. static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
  1330. {
  1331. switch (dir_type) {
  1332. case BNX_DIR_TYPE_CHIMP_PATCH:
  1333. case BNX_DIR_TYPE_BOOTCODE:
  1334. case BNX_DIR_TYPE_BOOTCODE_2:
  1335. case BNX_DIR_TYPE_APE_FW:
  1336. case BNX_DIR_TYPE_APE_PATCH:
  1337. case BNX_DIR_TYPE_KONG_FW:
  1338. case BNX_DIR_TYPE_KONG_PATCH:
  1339. case BNX_DIR_TYPE_BONO_FW:
  1340. case BNX_DIR_TYPE_BONO_PATCH:
  1341. return true;
  1342. }
  1343. return false;
  1344. }
  1345. static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
  1346. {
  1347. switch (dir_type) {
  1348. case BNX_DIR_TYPE_AVS:
  1349. case BNX_DIR_TYPE_EXP_ROM_MBA:
  1350. case BNX_DIR_TYPE_PCIE:
  1351. case BNX_DIR_TYPE_TSCF_UCODE:
  1352. case BNX_DIR_TYPE_EXT_PHY:
  1353. case BNX_DIR_TYPE_CCM:
  1354. case BNX_DIR_TYPE_ISCSI_BOOT:
  1355. case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
  1356. case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
  1357. return true;
  1358. }
  1359. return false;
  1360. }
  1361. static bool bnxt_dir_type_is_executable(u16 dir_type)
  1362. {
  1363. return bnxt_dir_type_is_ape_bin_format(dir_type) ||
  1364. bnxt_dir_type_is_other_exec_format(dir_type);
  1365. }
  1366. static int bnxt_flash_firmware_from_file(struct net_device *dev,
  1367. u16 dir_type,
  1368. const char *filename)
  1369. {
  1370. const struct firmware *fw;
  1371. int rc;
  1372. rc = request_firmware(&fw, filename, &dev->dev);
  1373. if (rc != 0) {
  1374. netdev_err(dev, "Error %d requesting firmware file: %s\n",
  1375. rc, filename);
  1376. return rc;
  1377. }
  1378. if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
  1379. rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
  1380. else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
  1381. rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
  1382. else
  1383. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1384. 0, 0, fw->data, fw->size);
  1385. release_firmware(fw);
  1386. return rc;
  1387. }
  1388. static int bnxt_flash_package_from_file(struct net_device *dev,
  1389. char *filename, u32 install_type)
  1390. {
  1391. struct bnxt *bp = netdev_priv(dev);
  1392. struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
  1393. struct hwrm_nvm_install_update_input install = {0};
  1394. const struct firmware *fw;
  1395. u32 item_len;
  1396. u16 index;
  1397. int rc;
  1398. bnxt_hwrm_fw_set_time(bp);
  1399. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
  1400. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1401. &index, &item_len, NULL) != 0) {
  1402. netdev_err(dev, "PKG update area not created in nvram\n");
  1403. return -ENOBUFS;
  1404. }
  1405. rc = request_firmware(&fw, filename, &dev->dev);
  1406. if (rc != 0) {
  1407. netdev_err(dev, "PKG error %d requesting file: %s\n",
  1408. rc, filename);
  1409. return rc;
  1410. }
  1411. if (fw->size > item_len) {
  1412. netdev_err(dev, "PKG insufficient update area in nvram: %lu",
  1413. (unsigned long)fw->size);
  1414. rc = -EFBIG;
  1415. } else {
  1416. dma_addr_t dma_handle;
  1417. u8 *kmem;
  1418. struct hwrm_nvm_modify_input modify = {0};
  1419. bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
  1420. modify.dir_idx = cpu_to_le16(index);
  1421. modify.len = cpu_to_le32(fw->size);
  1422. kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
  1423. &dma_handle, GFP_KERNEL);
  1424. if (!kmem) {
  1425. netdev_err(dev,
  1426. "dma_alloc_coherent failure, length = %u\n",
  1427. (unsigned int)fw->size);
  1428. rc = -ENOMEM;
  1429. } else {
  1430. memcpy(kmem, fw->data, fw->size);
  1431. modify.host_src_addr = cpu_to_le64(dma_handle);
  1432. rc = hwrm_send_message(bp, &modify, sizeof(modify),
  1433. FLASH_PACKAGE_TIMEOUT);
  1434. dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
  1435. dma_handle);
  1436. }
  1437. }
  1438. release_firmware(fw);
  1439. if (rc)
  1440. return rc;
  1441. if ((install_type & 0xffff) == 0)
  1442. install_type >>= 16;
  1443. bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
  1444. install.install_type = cpu_to_le32(install_type);
  1445. mutex_lock(&bp->hwrm_cmd_lock);
  1446. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1447. INSTALL_PACKAGE_TIMEOUT);
  1448. if (rc) {
  1449. rc = -EOPNOTSUPP;
  1450. goto flash_pkg_exit;
  1451. }
  1452. if (resp->error_code) {
  1453. u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
  1454. if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
  1455. install.flags |= cpu_to_le16(
  1456. NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
  1457. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1458. INSTALL_PACKAGE_TIMEOUT);
  1459. if (rc) {
  1460. rc = -EOPNOTSUPP;
  1461. goto flash_pkg_exit;
  1462. }
  1463. }
  1464. }
  1465. if (resp->result) {
  1466. netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
  1467. (s8)resp->result, (int)resp->problem_item);
  1468. rc = -ENOPKG;
  1469. }
  1470. flash_pkg_exit:
  1471. mutex_unlock(&bp->hwrm_cmd_lock);
  1472. return rc;
  1473. }
  1474. static int bnxt_flash_device(struct net_device *dev,
  1475. struct ethtool_flash *flash)
  1476. {
  1477. if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
  1478. netdev_err(dev, "flashdev not supported from a virtual function\n");
  1479. return -EINVAL;
  1480. }
  1481. if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
  1482. flash->region > 0xffff)
  1483. return bnxt_flash_package_from_file(dev, flash->data,
  1484. flash->region);
  1485. return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
  1486. }
  1487. static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
  1488. {
  1489. struct bnxt *bp = netdev_priv(dev);
  1490. int rc;
  1491. struct hwrm_nvm_get_dir_info_input req = {0};
  1492. struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
  1493. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
  1494. mutex_lock(&bp->hwrm_cmd_lock);
  1495. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1496. if (!rc) {
  1497. *entries = le32_to_cpu(output->entries);
  1498. *length = le32_to_cpu(output->entry_length);
  1499. }
  1500. mutex_unlock(&bp->hwrm_cmd_lock);
  1501. return rc;
  1502. }
  1503. static int bnxt_get_eeprom_len(struct net_device *dev)
  1504. {
  1505. /* The -1 return value allows the entire 32-bit range of offsets to be
  1506. * passed via the ethtool command-line utility.
  1507. */
  1508. return -1;
  1509. }
  1510. static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
  1511. {
  1512. struct bnxt *bp = netdev_priv(dev);
  1513. int rc;
  1514. u32 dir_entries;
  1515. u32 entry_length;
  1516. u8 *buf;
  1517. size_t buflen;
  1518. dma_addr_t dma_handle;
  1519. struct hwrm_nvm_get_dir_entries_input req = {0};
  1520. rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
  1521. if (rc != 0)
  1522. return rc;
  1523. /* Insert 2 bytes of directory info (count and size of entries) */
  1524. if (len < 2)
  1525. return -EINVAL;
  1526. *data++ = dir_entries;
  1527. *data++ = entry_length;
  1528. len -= 2;
  1529. memset(data, 0xff, len);
  1530. buflen = dir_entries * entry_length;
  1531. buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
  1532. GFP_KERNEL);
  1533. if (!buf) {
  1534. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1535. (unsigned)buflen);
  1536. return -ENOMEM;
  1537. }
  1538. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
  1539. req.host_dest_addr = cpu_to_le64(dma_handle);
  1540. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1541. if (rc == 0)
  1542. memcpy(data, buf, len > buflen ? buflen : len);
  1543. dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
  1544. return rc;
  1545. }
  1546. static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
  1547. u32 length, u8 *data)
  1548. {
  1549. struct bnxt *bp = netdev_priv(dev);
  1550. int rc;
  1551. u8 *buf;
  1552. dma_addr_t dma_handle;
  1553. struct hwrm_nvm_read_input req = {0};
  1554. buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
  1555. GFP_KERNEL);
  1556. if (!buf) {
  1557. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1558. (unsigned)length);
  1559. return -ENOMEM;
  1560. }
  1561. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
  1562. req.host_dest_addr = cpu_to_le64(dma_handle);
  1563. req.dir_idx = cpu_to_le16(index);
  1564. req.offset = cpu_to_le32(offset);
  1565. req.len = cpu_to_le32(length);
  1566. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1567. if (rc == 0)
  1568. memcpy(data, buf, length);
  1569. dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
  1570. return rc;
  1571. }
  1572. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1573. u16 ext, u16 *index, u32 *item_length,
  1574. u32 *data_length)
  1575. {
  1576. struct bnxt *bp = netdev_priv(dev);
  1577. int rc;
  1578. struct hwrm_nvm_find_dir_entry_input req = {0};
  1579. struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
  1580. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
  1581. req.enables = 0;
  1582. req.dir_idx = 0;
  1583. req.dir_type = cpu_to_le16(type);
  1584. req.dir_ordinal = cpu_to_le16(ordinal);
  1585. req.dir_ext = cpu_to_le16(ext);
  1586. req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
  1587. rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1588. if (rc == 0) {
  1589. if (index)
  1590. *index = le16_to_cpu(output->dir_idx);
  1591. if (item_length)
  1592. *item_length = le32_to_cpu(output->dir_item_length);
  1593. if (data_length)
  1594. *data_length = le32_to_cpu(output->dir_data_length);
  1595. }
  1596. return rc;
  1597. }
  1598. static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
  1599. {
  1600. char *retval = NULL;
  1601. char *p;
  1602. char *value;
  1603. int field = 0;
  1604. if (datalen < 1)
  1605. return NULL;
  1606. /* null-terminate the log data (removing last '\n'): */
  1607. data[datalen - 1] = 0;
  1608. for (p = data; *p != 0; p++) {
  1609. field = 0;
  1610. retval = NULL;
  1611. while (*p != 0 && *p != '\n') {
  1612. value = p;
  1613. while (*p != 0 && *p != '\t' && *p != '\n')
  1614. p++;
  1615. if (field == desired_field)
  1616. retval = value;
  1617. if (*p != '\t')
  1618. break;
  1619. *p = 0;
  1620. field++;
  1621. p++;
  1622. }
  1623. if (*p == 0)
  1624. break;
  1625. *p = 0;
  1626. }
  1627. return retval;
  1628. }
  1629. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
  1630. {
  1631. u16 index = 0;
  1632. u32 datalen;
  1633. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
  1634. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1635. &index, NULL, &datalen) != 0)
  1636. return NULL;
  1637. memset(buf, 0, buflen);
  1638. if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
  1639. return NULL;
  1640. return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
  1641. datalen);
  1642. }
  1643. static int bnxt_get_eeprom(struct net_device *dev,
  1644. struct ethtool_eeprom *eeprom,
  1645. u8 *data)
  1646. {
  1647. u32 index;
  1648. u32 offset;
  1649. if (eeprom->offset == 0) /* special offset value to get directory */
  1650. return bnxt_get_nvram_directory(dev, eeprom->len, data);
  1651. index = eeprom->offset >> 24;
  1652. offset = eeprom->offset & 0xffffff;
  1653. if (index == 0) {
  1654. netdev_err(dev, "unsupported index value: %d\n", index);
  1655. return -EINVAL;
  1656. }
  1657. return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
  1658. }
  1659. static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
  1660. {
  1661. struct bnxt *bp = netdev_priv(dev);
  1662. struct hwrm_nvm_erase_dir_entry_input req = {0};
  1663. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
  1664. req.dir_idx = cpu_to_le16(index);
  1665. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1666. }
  1667. static int bnxt_set_eeprom(struct net_device *dev,
  1668. struct ethtool_eeprom *eeprom,
  1669. u8 *data)
  1670. {
  1671. struct bnxt *bp = netdev_priv(dev);
  1672. u8 index, dir_op;
  1673. u16 type, ext, ordinal, attr;
  1674. if (!BNXT_PF(bp)) {
  1675. netdev_err(dev, "NVM write not supported from a virtual function\n");
  1676. return -EINVAL;
  1677. }
  1678. type = eeprom->magic >> 16;
  1679. if (type == 0xffff) { /* special value for directory operations */
  1680. index = eeprom->magic & 0xff;
  1681. dir_op = eeprom->magic >> 8;
  1682. if (index == 0)
  1683. return -EINVAL;
  1684. switch (dir_op) {
  1685. case 0x0e: /* erase */
  1686. if (eeprom->offset != ~eeprom->magic)
  1687. return -EINVAL;
  1688. return bnxt_erase_nvram_directory(dev, index - 1);
  1689. default:
  1690. return -EINVAL;
  1691. }
  1692. }
  1693. /* Create or re-write an NVM item: */
  1694. if (bnxt_dir_type_is_executable(type) == true)
  1695. return -EOPNOTSUPP;
  1696. ext = eeprom->magic & 0xffff;
  1697. ordinal = eeprom->offset >> 16;
  1698. attr = eeprom->offset & 0xffff;
  1699. return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
  1700. eeprom->len);
  1701. }
  1702. static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
  1703. {
  1704. struct bnxt *bp = netdev_priv(dev);
  1705. struct ethtool_eee *eee = &bp->eee;
  1706. struct bnxt_link_info *link_info = &bp->link_info;
  1707. u32 advertising =
  1708. _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
  1709. int rc = 0;
  1710. if (!BNXT_SINGLE_PF(bp))
  1711. return -EOPNOTSUPP;
  1712. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1713. return -EOPNOTSUPP;
  1714. if (!edata->eee_enabled)
  1715. goto eee_ok;
  1716. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
  1717. netdev_warn(dev, "EEE requires autoneg\n");
  1718. return -EINVAL;
  1719. }
  1720. if (edata->tx_lpi_enabled) {
  1721. if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
  1722. edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
  1723. netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
  1724. bp->lpi_tmr_lo, bp->lpi_tmr_hi);
  1725. return -EINVAL;
  1726. } else if (!bp->lpi_tmr_hi) {
  1727. edata->tx_lpi_timer = eee->tx_lpi_timer;
  1728. }
  1729. }
  1730. if (!edata->advertised) {
  1731. edata->advertised = advertising & eee->supported;
  1732. } else if (edata->advertised & ~advertising) {
  1733. netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
  1734. edata->advertised, advertising);
  1735. return -EINVAL;
  1736. }
  1737. eee->advertised = edata->advertised;
  1738. eee->tx_lpi_enabled = edata->tx_lpi_enabled;
  1739. eee->tx_lpi_timer = edata->tx_lpi_timer;
  1740. eee_ok:
  1741. eee->eee_enabled = edata->eee_enabled;
  1742. if (netif_running(dev))
  1743. rc = bnxt_hwrm_set_link_setting(bp, false, true);
  1744. return rc;
  1745. }
  1746. static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
  1747. {
  1748. struct bnxt *bp = netdev_priv(dev);
  1749. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1750. return -EOPNOTSUPP;
  1751. *edata = bp->eee;
  1752. if (!bp->eee.eee_enabled) {
  1753. /* Preserve tx_lpi_timer so that the last value will be used
  1754. * by default when it is re-enabled.
  1755. */
  1756. edata->advertised = 0;
  1757. edata->tx_lpi_enabled = 0;
  1758. }
  1759. if (!bp->eee.eee_active)
  1760. edata->lp_advertised = 0;
  1761. return 0;
  1762. }
  1763. static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
  1764. u16 page_number, u16 start_addr,
  1765. u16 data_length, u8 *buf)
  1766. {
  1767. struct hwrm_port_phy_i2c_read_input req = {0};
  1768. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1769. int rc, byte_offset = 0;
  1770. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1771. req.i2c_slave_addr = i2c_addr;
  1772. req.page_number = cpu_to_le16(page_number);
  1773. req.port_id = cpu_to_le16(bp->pf.port_id);
  1774. do {
  1775. u16 xfer_size;
  1776. xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
  1777. data_length -= xfer_size;
  1778. req.page_offset = cpu_to_le16(start_addr + byte_offset);
  1779. req.data_length = xfer_size;
  1780. req.enables = cpu_to_le32(start_addr + byte_offset ?
  1781. PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
  1782. mutex_lock(&bp->hwrm_cmd_lock);
  1783. rc = _hwrm_send_message(bp, &req, sizeof(req),
  1784. HWRM_CMD_TIMEOUT);
  1785. if (!rc)
  1786. memcpy(buf + byte_offset, output->data, xfer_size);
  1787. mutex_unlock(&bp->hwrm_cmd_lock);
  1788. byte_offset += xfer_size;
  1789. } while (!rc && data_length > 0);
  1790. return rc;
  1791. }
  1792. static int bnxt_get_module_info(struct net_device *dev,
  1793. struct ethtool_modinfo *modinfo)
  1794. {
  1795. struct bnxt *bp = netdev_priv(dev);
  1796. struct hwrm_port_phy_i2c_read_input req = {0};
  1797. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1798. int rc;
  1799. /* No point in going further if phy status indicates
  1800. * module is not inserted or if it is powered down or
  1801. * if it is of type 10GBase-T
  1802. */
  1803. if (bp->link_info.module_status >
  1804. PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
  1805. return -EOPNOTSUPP;
  1806. /* This feature is not supported in older firmware versions */
  1807. if (bp->hwrm_spec_code < 0x10202)
  1808. return -EOPNOTSUPP;
  1809. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1810. req.i2c_slave_addr = I2C_DEV_ADDR_A0;
  1811. req.page_number = 0;
  1812. req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
  1813. req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
  1814. req.port_id = cpu_to_le16(bp->pf.port_id);
  1815. mutex_lock(&bp->hwrm_cmd_lock);
  1816. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1817. if (!rc) {
  1818. u32 module_id = le32_to_cpu(output->data[0]);
  1819. switch (module_id) {
  1820. case SFF_MODULE_ID_SFP:
  1821. modinfo->type = ETH_MODULE_SFF_8472;
  1822. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  1823. break;
  1824. case SFF_MODULE_ID_QSFP:
  1825. case SFF_MODULE_ID_QSFP_PLUS:
  1826. modinfo->type = ETH_MODULE_SFF_8436;
  1827. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  1828. break;
  1829. case SFF_MODULE_ID_QSFP28:
  1830. modinfo->type = ETH_MODULE_SFF_8636;
  1831. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  1832. break;
  1833. default:
  1834. rc = -EOPNOTSUPP;
  1835. break;
  1836. }
  1837. }
  1838. mutex_unlock(&bp->hwrm_cmd_lock);
  1839. return rc;
  1840. }
  1841. static int bnxt_get_module_eeprom(struct net_device *dev,
  1842. struct ethtool_eeprom *eeprom,
  1843. u8 *data)
  1844. {
  1845. struct bnxt *bp = netdev_priv(dev);
  1846. u16 start = eeprom->offset, length = eeprom->len;
  1847. int rc = 0;
  1848. memset(data, 0, eeprom->len);
  1849. /* Read A0 portion of the EEPROM */
  1850. if (start < ETH_MODULE_SFF_8436_LEN) {
  1851. if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
  1852. length = ETH_MODULE_SFF_8436_LEN - start;
  1853. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
  1854. start, length, data);
  1855. if (rc)
  1856. return rc;
  1857. start += length;
  1858. data += length;
  1859. length = eeprom->len - length;
  1860. }
  1861. /* Read A2 portion of the EEPROM */
  1862. if (length) {
  1863. start -= ETH_MODULE_SFF_8436_LEN;
  1864. bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start,
  1865. length, data);
  1866. }
  1867. return rc;
  1868. }
  1869. static int bnxt_nway_reset(struct net_device *dev)
  1870. {
  1871. int rc = 0;
  1872. struct bnxt *bp = netdev_priv(dev);
  1873. struct bnxt_link_info *link_info = &bp->link_info;
  1874. if (!BNXT_SINGLE_PF(bp))
  1875. return -EOPNOTSUPP;
  1876. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1877. return -EINVAL;
  1878. if (netif_running(dev))
  1879. rc = bnxt_hwrm_set_link_setting(bp, true, false);
  1880. return rc;
  1881. }
  1882. static int bnxt_set_phys_id(struct net_device *dev,
  1883. enum ethtool_phys_id_state state)
  1884. {
  1885. struct hwrm_port_led_cfg_input req = {0};
  1886. struct bnxt *bp = netdev_priv(dev);
  1887. struct bnxt_pf_info *pf = &bp->pf;
  1888. struct bnxt_led_cfg *led_cfg;
  1889. u8 led_state;
  1890. __le16 duration;
  1891. int i, rc;
  1892. if (!bp->num_leds || BNXT_VF(bp))
  1893. return -EOPNOTSUPP;
  1894. if (state == ETHTOOL_ID_ACTIVE) {
  1895. led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
  1896. duration = cpu_to_le16(500);
  1897. } else if (state == ETHTOOL_ID_INACTIVE) {
  1898. led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
  1899. duration = cpu_to_le16(0);
  1900. } else {
  1901. return -EINVAL;
  1902. }
  1903. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
  1904. req.port_id = cpu_to_le16(pf->port_id);
  1905. req.num_leds = bp->num_leds;
  1906. led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
  1907. for (i = 0; i < bp->num_leds; i++, led_cfg++) {
  1908. req.enables |= BNXT_LED_DFLT_ENABLES(i);
  1909. led_cfg->led_id = bp->leds[i].led_id;
  1910. led_cfg->led_state = led_state;
  1911. led_cfg->led_blink_on = duration;
  1912. led_cfg->led_blink_off = duration;
  1913. led_cfg->led_group_id = bp->leds[i].led_group_id;
  1914. }
  1915. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1916. if (rc)
  1917. rc = -EIO;
  1918. return rc;
  1919. }
  1920. static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
  1921. {
  1922. struct hwrm_selftest_irq_input req = {0};
  1923. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
  1924. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1925. }
  1926. static int bnxt_test_irq(struct bnxt *bp)
  1927. {
  1928. int i;
  1929. for (i = 0; i < bp->cp_nr_rings; i++) {
  1930. u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
  1931. int rc;
  1932. rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
  1933. if (rc)
  1934. return rc;
  1935. }
  1936. return 0;
  1937. }
  1938. static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
  1939. {
  1940. struct hwrm_port_mac_cfg_input req = {0};
  1941. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
  1942. req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
  1943. if (enable)
  1944. req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
  1945. else
  1946. req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
  1947. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1948. }
  1949. static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
  1950. struct hwrm_port_phy_cfg_input *req)
  1951. {
  1952. struct bnxt_link_info *link_info = &bp->link_info;
  1953. u16 fw_advertising = link_info->advertising;
  1954. u16 fw_speed;
  1955. int rc;
  1956. if (!link_info->autoneg)
  1957. return 0;
  1958. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
  1959. if (netif_carrier_ok(bp->dev))
  1960. fw_speed = bp->link_info.link_speed;
  1961. else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
  1962. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
  1963. else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
  1964. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
  1965. else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
  1966. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
  1967. else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
  1968. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
  1969. req->force_link_speed = cpu_to_le16(fw_speed);
  1970. req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
  1971. PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
  1972. rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
  1973. req->flags = 0;
  1974. req->force_link_speed = cpu_to_le16(0);
  1975. return rc;
  1976. }
  1977. static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable)
  1978. {
  1979. struct hwrm_port_phy_cfg_input req = {0};
  1980. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
  1981. if (enable) {
  1982. bnxt_disable_an_for_lpbk(bp, &req);
  1983. req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
  1984. } else {
  1985. req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
  1986. }
  1987. req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
  1988. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1989. }
  1990. static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi,
  1991. u32 raw_cons, int pkt_size)
  1992. {
  1993. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  1994. struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
  1995. struct bnxt_sw_rx_bd *rx_buf;
  1996. struct rx_cmp *rxcmp;
  1997. u16 cp_cons, cons;
  1998. u8 *data;
  1999. u32 len;
  2000. int i;
  2001. cp_cons = RING_CMP(raw_cons);
  2002. rxcmp = (struct rx_cmp *)
  2003. &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
  2004. cons = rxcmp->rx_cmp_opaque;
  2005. rx_buf = &rxr->rx_buf_ring[cons];
  2006. data = rx_buf->data_ptr;
  2007. len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
  2008. if (len != pkt_size)
  2009. return -EIO;
  2010. i = ETH_ALEN;
  2011. if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
  2012. return -EIO;
  2013. i += ETH_ALEN;
  2014. for ( ; i < pkt_size; i++) {
  2015. if (data[i] != (u8)(i & 0xff))
  2016. return -EIO;
  2017. }
  2018. return 0;
  2019. }
  2020. static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
  2021. {
  2022. struct bnxt_napi *bnapi = bp->bnapi[0];
  2023. struct bnxt_cp_ring_info *cpr;
  2024. struct tx_cmp *txcmp;
  2025. int rc = -EIO;
  2026. u32 raw_cons;
  2027. u32 cons;
  2028. int i;
  2029. cpr = &bnapi->cp_ring;
  2030. raw_cons = cpr->cp_raw_cons;
  2031. for (i = 0; i < 200; i++) {
  2032. cons = RING_CMP(raw_cons);
  2033. txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
  2034. if (!TX_CMP_VALID(txcmp, raw_cons)) {
  2035. udelay(5);
  2036. continue;
  2037. }
  2038. /* The valid test of the entry must be done first before
  2039. * reading any further.
  2040. */
  2041. dma_rmb();
  2042. if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
  2043. rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
  2044. raw_cons = NEXT_RAW_CMP(raw_cons);
  2045. raw_cons = NEXT_RAW_CMP(raw_cons);
  2046. break;
  2047. }
  2048. raw_cons = NEXT_RAW_CMP(raw_cons);
  2049. }
  2050. cpr->cp_raw_cons = raw_cons;
  2051. return rc;
  2052. }
  2053. static int bnxt_run_loopback(struct bnxt *bp)
  2054. {
  2055. struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
  2056. int pkt_size, i = 0;
  2057. struct sk_buff *skb;
  2058. dma_addr_t map;
  2059. u8 *data;
  2060. int rc;
  2061. pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
  2062. skb = netdev_alloc_skb(bp->dev, pkt_size);
  2063. if (!skb)
  2064. return -ENOMEM;
  2065. data = skb_put(skb, pkt_size);
  2066. eth_broadcast_addr(data);
  2067. i += ETH_ALEN;
  2068. ether_addr_copy(&data[i], bp->dev->dev_addr);
  2069. i += ETH_ALEN;
  2070. for ( ; i < pkt_size; i++)
  2071. data[i] = (u8)(i & 0xff);
  2072. map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
  2073. PCI_DMA_TODEVICE);
  2074. if (dma_mapping_error(&bp->pdev->dev, map)) {
  2075. dev_kfree_skb(skb);
  2076. return -EIO;
  2077. }
  2078. bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
  2079. /* Sync BD data before updating doorbell */
  2080. wmb();
  2081. bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod);
  2082. rc = bnxt_poll_loopback(bp, pkt_size);
  2083. dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
  2084. dev_kfree_skb(skb);
  2085. return rc;
  2086. }
  2087. static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
  2088. {
  2089. struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
  2090. struct hwrm_selftest_exec_input req = {0};
  2091. int rc;
  2092. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
  2093. mutex_lock(&bp->hwrm_cmd_lock);
  2094. resp->test_success = 0;
  2095. req.flags = test_mask;
  2096. rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
  2097. *test_results = resp->test_success;
  2098. mutex_unlock(&bp->hwrm_cmd_lock);
  2099. return rc;
  2100. }
  2101. #define BNXT_DRV_TESTS 3
  2102. #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
  2103. #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
  2104. #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
  2105. static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
  2106. u64 *buf)
  2107. {
  2108. struct bnxt *bp = netdev_priv(dev);
  2109. bool offline = false;
  2110. u8 test_results = 0;
  2111. u8 test_mask = 0;
  2112. int rc, i;
  2113. if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
  2114. return;
  2115. memset(buf, 0, sizeof(u64) * bp->num_tests);
  2116. if (!netif_running(dev)) {
  2117. etest->flags |= ETH_TEST_FL_FAILED;
  2118. return;
  2119. }
  2120. if (etest->flags & ETH_TEST_FL_OFFLINE) {
  2121. if (bp->pf.active_vfs) {
  2122. etest->flags |= ETH_TEST_FL_FAILED;
  2123. netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
  2124. return;
  2125. }
  2126. offline = true;
  2127. }
  2128. for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
  2129. u8 bit_val = 1 << i;
  2130. if (!(bp->test_info->offline_mask & bit_val))
  2131. test_mask |= bit_val;
  2132. else if (offline)
  2133. test_mask |= bit_val;
  2134. }
  2135. if (!offline) {
  2136. bnxt_run_fw_tests(bp, test_mask, &test_results);
  2137. } else {
  2138. rc = bnxt_close_nic(bp, false, false);
  2139. if (rc)
  2140. return;
  2141. bnxt_run_fw_tests(bp, test_mask, &test_results);
  2142. buf[BNXT_MACLPBK_TEST_IDX] = 1;
  2143. bnxt_hwrm_mac_loopback(bp, true);
  2144. msleep(250);
  2145. rc = bnxt_half_open_nic(bp);
  2146. if (rc) {
  2147. bnxt_hwrm_mac_loopback(bp, false);
  2148. etest->flags |= ETH_TEST_FL_FAILED;
  2149. return;
  2150. }
  2151. if (bnxt_run_loopback(bp))
  2152. etest->flags |= ETH_TEST_FL_FAILED;
  2153. else
  2154. buf[BNXT_MACLPBK_TEST_IDX] = 0;
  2155. bnxt_hwrm_mac_loopback(bp, false);
  2156. bnxt_hwrm_phy_loopback(bp, true);
  2157. msleep(1000);
  2158. if (bnxt_run_loopback(bp)) {
  2159. buf[BNXT_PHYLPBK_TEST_IDX] = 1;
  2160. etest->flags |= ETH_TEST_FL_FAILED;
  2161. }
  2162. bnxt_hwrm_phy_loopback(bp, false);
  2163. bnxt_half_close_nic(bp);
  2164. bnxt_open_nic(bp, false, true);
  2165. }
  2166. if (bnxt_test_irq(bp)) {
  2167. buf[BNXT_IRQ_TEST_IDX] = 1;
  2168. etest->flags |= ETH_TEST_FL_FAILED;
  2169. }
  2170. for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
  2171. u8 bit_val = 1 << i;
  2172. if ((test_mask & bit_val) && !(test_results & bit_val)) {
  2173. buf[i] = 1;
  2174. etest->flags |= ETH_TEST_FL_FAILED;
  2175. }
  2176. }
  2177. }
  2178. void bnxt_ethtool_init(struct bnxt *bp)
  2179. {
  2180. struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
  2181. struct hwrm_selftest_qlist_input req = {0};
  2182. struct bnxt_test_info *test_info;
  2183. int i, rc;
  2184. if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
  2185. return;
  2186. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
  2187. mutex_lock(&bp->hwrm_cmd_lock);
  2188. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2189. if (rc)
  2190. goto ethtool_init_exit;
  2191. test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
  2192. if (!test_info)
  2193. goto ethtool_init_exit;
  2194. bp->test_info = test_info;
  2195. bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
  2196. if (bp->num_tests > BNXT_MAX_TEST)
  2197. bp->num_tests = BNXT_MAX_TEST;
  2198. test_info->offline_mask = resp->offline_tests;
  2199. test_info->timeout = le16_to_cpu(resp->test_timeout);
  2200. if (!test_info->timeout)
  2201. test_info->timeout = HWRM_CMD_TIMEOUT;
  2202. for (i = 0; i < bp->num_tests; i++) {
  2203. char *str = test_info->string[i];
  2204. char *fw_str = resp->test0_name + i * 32;
  2205. if (i == BNXT_MACLPBK_TEST_IDX) {
  2206. strcpy(str, "Mac loopback test (offline)");
  2207. } else if (i == BNXT_PHYLPBK_TEST_IDX) {
  2208. strcpy(str, "Phy loopback test (offline)");
  2209. } else if (i == BNXT_IRQ_TEST_IDX) {
  2210. strcpy(str, "Interrupt_test (offline)");
  2211. } else {
  2212. strlcpy(str, fw_str, ETH_GSTRING_LEN);
  2213. strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
  2214. if (test_info->offline_mask & (1 << i))
  2215. strncat(str, " (offline)",
  2216. ETH_GSTRING_LEN - strlen(str));
  2217. else
  2218. strncat(str, " (online)",
  2219. ETH_GSTRING_LEN - strlen(str));
  2220. }
  2221. }
  2222. ethtool_init_exit:
  2223. mutex_unlock(&bp->hwrm_cmd_lock);
  2224. }
  2225. void bnxt_ethtool_free(struct bnxt *bp)
  2226. {
  2227. kfree(bp->test_info);
  2228. bp->test_info = NULL;
  2229. }
  2230. const struct ethtool_ops bnxt_ethtool_ops = {
  2231. .get_link_ksettings = bnxt_get_link_ksettings,
  2232. .set_link_ksettings = bnxt_set_link_ksettings,
  2233. .get_pauseparam = bnxt_get_pauseparam,
  2234. .set_pauseparam = bnxt_set_pauseparam,
  2235. .get_drvinfo = bnxt_get_drvinfo,
  2236. .get_wol = bnxt_get_wol,
  2237. .set_wol = bnxt_set_wol,
  2238. .get_coalesce = bnxt_get_coalesce,
  2239. .set_coalesce = bnxt_set_coalesce,
  2240. .get_msglevel = bnxt_get_msglevel,
  2241. .set_msglevel = bnxt_set_msglevel,
  2242. .get_sset_count = bnxt_get_sset_count,
  2243. .get_strings = bnxt_get_strings,
  2244. .get_ethtool_stats = bnxt_get_ethtool_stats,
  2245. .set_ringparam = bnxt_set_ringparam,
  2246. .get_ringparam = bnxt_get_ringparam,
  2247. .get_channels = bnxt_get_channels,
  2248. .set_channels = bnxt_set_channels,
  2249. .get_rxnfc = bnxt_get_rxnfc,
  2250. .set_rxnfc = bnxt_set_rxnfc,
  2251. .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
  2252. .get_rxfh_key_size = bnxt_get_rxfh_key_size,
  2253. .get_rxfh = bnxt_get_rxfh,
  2254. .flash_device = bnxt_flash_device,
  2255. .get_eeprom_len = bnxt_get_eeprom_len,
  2256. .get_eeprom = bnxt_get_eeprom,
  2257. .set_eeprom = bnxt_set_eeprom,
  2258. .get_link = bnxt_get_link,
  2259. .get_eee = bnxt_get_eee,
  2260. .set_eee = bnxt_set_eee,
  2261. .get_module_info = bnxt_get_module_info,
  2262. .get_module_eeprom = bnxt_get_module_eeprom,
  2263. .nway_reset = bnxt_nway_reset,
  2264. .set_phys_id = bnxt_set_phys_id,
  2265. .self_test = bnxt_self_test,
  2266. };