eth_v10.c 48 KB

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  1. /*
  2. * e100net.c: A network driver for the ETRAX 100LX network controller.
  3. *
  4. * Copyright (c) 1998-2002 Axis Communications AB.
  5. *
  6. * The outline of this driver comes from skeleton.c.
  7. *
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/delay.h>
  11. #include <linux/types.h>
  12. #include <linux/fcntl.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/ptrace.h>
  15. #include <linux/ioport.h>
  16. #include <linux/in.h>
  17. #include <linux/string.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/errno.h>
  20. #include <linux/init.h>
  21. #include <linux/bitops.h>
  22. #include <linux/if.h>
  23. #include <linux/mii.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/skbuff.h>
  27. #include <linux/ethtool.h>
  28. #include <arch/svinto.h>/* DMA and register descriptions */
  29. #include <asm/io.h> /* CRIS_LED_* I/O functions */
  30. #include <asm/irq.h>
  31. #include <asm/dma.h>
  32. #include <asm/ethernet.h>
  33. #include <asm/cache.h>
  34. #include <arch/io_interface_mux.h>
  35. //#define ETHDEBUG
  36. #define D(x)
  37. /*
  38. * The name of the card. Is used for messages and in the requests for
  39. * io regions, irqs and dma channels
  40. */
  41. static const char* cardname = "ETRAX 100LX built-in ethernet controller";
  42. /* A default ethernet address. Highlevel SW will set the real one later */
  43. static struct sockaddr default_mac = {
  44. 0,
  45. { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
  46. };
  47. /* Information that need to be kept for each board. */
  48. struct net_local {
  49. struct mii_if_info mii_if;
  50. /* Tx control lock. This protects the transmit buffer ring
  51. * state along with the "tx full" state of the driver. This
  52. * means all netif_queue flow control actions are protected
  53. * by this lock as well.
  54. */
  55. spinlock_t lock;
  56. spinlock_t led_lock; /* Protect LED state */
  57. spinlock_t transceiver_lock; /* Protect transceiver state. */
  58. };
  59. typedef struct etrax_eth_descr
  60. {
  61. etrax_dma_descr descr;
  62. struct sk_buff* skb;
  63. } etrax_eth_descr;
  64. /* Some transceivers requires special handling */
  65. struct transceiver_ops
  66. {
  67. unsigned int oui;
  68. void (*check_speed)(struct net_device* dev);
  69. void (*check_duplex)(struct net_device* dev);
  70. };
  71. /* Duplex settings */
  72. enum duplex
  73. {
  74. half,
  75. full,
  76. autoneg
  77. };
  78. /* Dma descriptors etc. */
  79. #define MAX_MEDIA_DATA_SIZE 1522
  80. #define MIN_PACKET_LEN 46
  81. #define ETHER_HEAD_LEN 14
  82. /*
  83. ** MDIO constants.
  84. */
  85. #define MDIO_START 0x1
  86. #define MDIO_READ 0x2
  87. #define MDIO_WRITE 0x1
  88. #define MDIO_PREAMBLE 0xfffffffful
  89. /* Broadcom specific */
  90. #define MDIO_AUX_CTRL_STATUS_REG 0x18
  91. #define MDIO_BC_FULL_DUPLEX_IND 0x1
  92. #define MDIO_BC_SPEED 0x2
  93. /* TDK specific */
  94. #define MDIO_TDK_DIAGNOSTIC_REG 18
  95. #define MDIO_TDK_DIAGNOSTIC_RATE 0x400
  96. #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
  97. /*Intel LXT972A specific*/
  98. #define MDIO_INT_STATUS_REG_2 0x0011
  99. #define MDIO_INT_FULL_DUPLEX_IND (1 << 9)
  100. #define MDIO_INT_SPEED (1 << 14)
  101. /* Network flash constants */
  102. #define NET_FLASH_TIME (HZ/50) /* 20 ms */
  103. #define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
  104. #define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
  105. #define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
  106. #define NO_NETWORK_ACTIVITY 0
  107. #define NETWORK_ACTIVITY 1
  108. #define NBR_OF_RX_DESC 32
  109. #define NBR_OF_TX_DESC 16
  110. /* Large packets are sent directly to upper layers while small packets are */
  111. /* copied (to reduce memory waste). The following constant decides the breakpoint */
  112. #define RX_COPYBREAK 256
  113. /* Due to a chip bug we need to flush the cache when descriptors are returned */
  114. /* to the DMA. To decrease performance impact we return descriptors in chunks. */
  115. /* The following constant determines the number of descriptors to return. */
  116. #define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
  117. #define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
  118. /* Define some macros to access ETRAX 100 registers */
  119. #define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
  120. IO_FIELD_(reg##_, field##_, val)
  121. #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
  122. IO_STATE_(reg##_, field##_, _##val)
  123. static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
  124. to be processed */
  125. static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
  126. static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
  127. static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
  128. static etrax_eth_descr* myLastTxDesc; /* End of send queue */
  129. static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
  130. static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
  131. static unsigned int network_rec_config_shadow = 0;
  132. static unsigned int network_tr_ctrl_shadow = 0;
  133. /* Network speed indication. */
  134. static DEFINE_TIMER(speed_timer, NULL, 0, 0);
  135. static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);
  136. static int current_speed; /* Speed read from transceiver */
  137. static int current_speed_selection; /* Speed selected by user */
  138. static unsigned long led_next_time;
  139. static int led_active;
  140. static int rx_queue_len;
  141. /* Duplex */
  142. static DEFINE_TIMER(duplex_timer, NULL, 0, 0);
  143. static int full_duplex;
  144. static enum duplex current_duplex;
  145. /* Index to functions, as function prototypes. */
  146. static int etrax_ethernet_init(void);
  147. static int e100_open(struct net_device *dev);
  148. static int e100_set_mac_address(struct net_device *dev, void *addr);
  149. static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
  150. static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id);
  151. static irqreturn_t e100nw_interrupt(int irq, void *dev_id);
  152. static void e100_rx(struct net_device *dev);
  153. static int e100_close(struct net_device *dev);
  154. static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
  155. static int e100_set_config(struct net_device* dev, struct ifmap* map);
  156. static void e100_tx_timeout(struct net_device *dev);
  157. static struct net_device_stats *e100_get_stats(struct net_device *dev);
  158. static void set_multicast_list(struct net_device *dev);
  159. static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);
  160. static void update_rx_stats(struct net_device_stats *);
  161. static void update_tx_stats(struct net_device_stats *);
  162. static int e100_probe_transceiver(struct net_device* dev);
  163. static void e100_check_speed(unsigned long priv);
  164. static void e100_set_speed(struct net_device* dev, unsigned long speed);
  165. static void e100_check_duplex(unsigned long priv);
  166. static void e100_set_duplex(struct net_device* dev, enum duplex);
  167. static void e100_negotiate(struct net_device* dev);
  168. static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);
  169. static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);
  170. static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
  171. static void e100_send_mdio_bit(unsigned char bit);
  172. static unsigned char e100_receive_mdio_bit(void);
  173. static void e100_reset_transceiver(struct net_device* net);
  174. static void e100_clear_network_leds(unsigned long dummy);
  175. static void e100_set_network_leds(int active);
  176. static const struct ethtool_ops e100_ethtool_ops;
  177. #if defined(CONFIG_ETRAX_NO_PHY)
  178. static void dummy_check_speed(struct net_device* dev);
  179. static void dummy_check_duplex(struct net_device* dev);
  180. #else
  181. static void broadcom_check_speed(struct net_device* dev);
  182. static void broadcom_check_duplex(struct net_device* dev);
  183. static void tdk_check_speed(struct net_device* dev);
  184. static void tdk_check_duplex(struct net_device* dev);
  185. static void intel_check_speed(struct net_device* dev);
  186. static void intel_check_duplex(struct net_device* dev);
  187. static void generic_check_speed(struct net_device* dev);
  188. static void generic_check_duplex(struct net_device* dev);
  189. #endif
  190. #ifdef CONFIG_NET_POLL_CONTROLLER
  191. static void e100_netpoll(struct net_device* dev);
  192. #endif
  193. static int autoneg_normal = 1;
  194. struct transceiver_ops transceivers[] =
  195. {
  196. #if defined(CONFIG_ETRAX_NO_PHY)
  197. {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */
  198. #else
  199. {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
  200. {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
  201. {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
  202. {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
  203. {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
  204. #endif
  205. };
  206. struct transceiver_ops* transceiver = &transceivers[0];
  207. static const struct net_device_ops e100_netdev_ops = {
  208. .ndo_open = e100_open,
  209. .ndo_stop = e100_close,
  210. .ndo_start_xmit = e100_send_packet,
  211. .ndo_tx_timeout = e100_tx_timeout,
  212. .ndo_get_stats = e100_get_stats,
  213. .ndo_set_rx_mode = set_multicast_list,
  214. .ndo_do_ioctl = e100_ioctl,
  215. .ndo_set_mac_address = e100_set_mac_address,
  216. .ndo_validate_addr = eth_validate_addr,
  217. .ndo_set_config = e100_set_config,
  218. #ifdef CONFIG_NET_POLL_CONTROLLER
  219. .ndo_poll_controller = e100_netpoll,
  220. #endif
  221. };
  222. #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
  223. /*
  224. * Check for a network adaptor of this type, and return '0' if one exists.
  225. * If dev->base_addr == 0, probe all likely locations.
  226. * If dev->base_addr == 1, always return failure.
  227. * If dev->base_addr == 2, allocate space for the device and return success
  228. * (detachable devices only).
  229. */
  230. static int __init
  231. etrax_ethernet_init(void)
  232. {
  233. struct net_device *dev;
  234. struct net_local* np;
  235. int i, err;
  236. printk(KERN_INFO
  237. "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n");
  238. if (cris_request_io_interface(if_eth, cardname)) {
  239. printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");
  240. return -EBUSY;
  241. }
  242. dev = alloc_etherdev(sizeof(struct net_local));
  243. if (!dev)
  244. return -ENOMEM;
  245. np = netdev_priv(dev);
  246. /* we do our own locking */
  247. dev->features |= NETIF_F_LLTX;
  248. dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
  249. /* now setup our etrax specific stuff */
  250. dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
  251. dev->dma = NETWORK_RX_DMA_NBR;
  252. /* fill in our handlers so the network layer can talk to us in the future */
  253. dev->ethtool_ops = &e100_ethtool_ops;
  254. dev->netdev_ops = &e100_netdev_ops;
  255. spin_lock_init(&np->lock);
  256. spin_lock_init(&np->led_lock);
  257. spin_lock_init(&np->transceiver_lock);
  258. /* Initialise the list of Etrax DMA-descriptors */
  259. /* Initialise receive descriptors */
  260. for (i = 0; i < NBR_OF_RX_DESC; i++) {
  261. /* Allocate two extra cachelines to make sure that buffer used
  262. * by DMA does not share cacheline with any other data (to
  263. * avoid cache bug)
  264. */
  265. RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
  266. if (!RxDescList[i].skb)
  267. return -ENOMEM;
  268. RxDescList[i].descr.ctrl = 0;
  269. RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
  270. RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
  271. RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
  272. RxDescList[i].descr.status = 0;
  273. RxDescList[i].descr.hw_len = 0;
  274. prepare_rx_descriptor(&RxDescList[i].descr);
  275. }
  276. RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
  277. RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
  278. rx_queue_len = 0;
  279. /* Initialize transmit descriptors */
  280. for (i = 0; i < NBR_OF_TX_DESC; i++) {
  281. TxDescList[i].descr.ctrl = 0;
  282. TxDescList[i].descr.sw_len = 0;
  283. TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
  284. TxDescList[i].descr.buf = 0;
  285. TxDescList[i].descr.status = 0;
  286. TxDescList[i].descr.hw_len = 0;
  287. TxDescList[i].skb = 0;
  288. }
  289. TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
  290. TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
  291. /* Initialise initial pointers */
  292. myNextRxDesc = &RxDescList[0];
  293. myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
  294. myFirstTxDesc = &TxDescList[0];
  295. myNextTxDesc = &TxDescList[0];
  296. myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
  297. /* Register device */
  298. err = register_netdev(dev);
  299. if (err) {
  300. free_netdev(dev);
  301. return err;
  302. }
  303. /* set the default MAC address */
  304. e100_set_mac_address(dev, &default_mac);
  305. /* Initialize speed indicator stuff. */
  306. current_speed = 10;
  307. current_speed_selection = 0; /* Auto */
  308. speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
  309. speed_timer.data = (unsigned long)dev;
  310. speed_timer.function = e100_check_speed;
  311. clear_led_timer.function = e100_clear_network_leds;
  312. clear_led_timer.data = (unsigned long)dev;
  313. full_duplex = 0;
  314. current_duplex = autoneg;
  315. duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
  316. duplex_timer.data = (unsigned long)dev;
  317. duplex_timer.function = e100_check_duplex;
  318. /* Initialize mii interface */
  319. np->mii_if.phy_id_mask = 0x1f;
  320. np->mii_if.reg_num_mask = 0x1f;
  321. np->mii_if.dev = dev;
  322. np->mii_if.mdio_read = e100_get_mdio_reg;
  323. np->mii_if.mdio_write = e100_set_mdio_reg;
  324. /* Initialize group address registers to make sure that no */
  325. /* unwanted addresses are matched */
  326. *R_NETWORK_GA_0 = 0x00000000;
  327. *R_NETWORK_GA_1 = 0x00000000;
  328. /* Initialize next time the led can flash */
  329. led_next_time = jiffies;
  330. return 0;
  331. }
  332. device_initcall(etrax_ethernet_init)
  333. /* set MAC address of the interface. called from the core after a
  334. * SIOCSIFADDR ioctl, and from the bootup above.
  335. */
  336. static int
  337. e100_set_mac_address(struct net_device *dev, void *p)
  338. {
  339. struct net_local *np = netdev_priv(dev);
  340. struct sockaddr *addr = p;
  341. spin_lock(&np->lock); /* preemption protection */
  342. /* remember it */
  343. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  344. /* Write it to the hardware.
  345. * Note the way the address is wrapped:
  346. * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
  347. * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
  348. */
  349. *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
  350. (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
  351. *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
  352. *R_NETWORK_SA_2 = 0;
  353. /* show it in the log as well */
  354. printk(KERN_INFO "%s: changed MAC to %pM\n", dev->name, dev->dev_addr);
  355. spin_unlock(&np->lock);
  356. return 0;
  357. }
  358. /*
  359. * Open/initialize the board. This is called (in the current kernel)
  360. * sometime after booting when the 'ifconfig' program is run.
  361. *
  362. * This routine should set everything up anew at each open, even
  363. * registers that "should" only need to be set once at boot, so that
  364. * there is non-reboot way to recover if something goes wrong.
  365. */
  366. static int
  367. e100_open(struct net_device *dev)
  368. {
  369. unsigned long flags;
  370. /* enable the MDIO output pin */
  371. *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
  372. *R_IRQ_MASK0_CLR =
  373. IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
  374. IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
  375. IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
  376. /* clear dma0 and 1 eop and descr irq masks */
  377. *R_IRQ_MASK2_CLR =
  378. IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
  379. IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
  380. IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
  381. IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
  382. /* Reset and wait for the DMA channels */
  383. RESET_DMA(NETWORK_TX_DMA_NBR);
  384. RESET_DMA(NETWORK_RX_DMA_NBR);
  385. WAIT_DMA(NETWORK_TX_DMA_NBR);
  386. WAIT_DMA(NETWORK_RX_DMA_NBR);
  387. /* Initialise the etrax network controller */
  388. /* allocate the irq corresponding to the receiving DMA */
  389. if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt, 0, cardname,
  390. (void *)dev)) {
  391. goto grace_exit0;
  392. }
  393. /* allocate the irq corresponding to the transmitting DMA */
  394. if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
  395. cardname, (void *)dev)) {
  396. goto grace_exit1;
  397. }
  398. /* allocate the irq corresponding to the network errors etc */
  399. if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
  400. cardname, (void *)dev)) {
  401. goto grace_exit2;
  402. }
  403. /*
  404. * Always allocate the DMA channels after the IRQ,
  405. * and clean up on failure.
  406. */
  407. if (cris_request_dma(NETWORK_TX_DMA_NBR,
  408. cardname,
  409. DMA_VERBOSE_ON_ERROR,
  410. dma_eth)) {
  411. goto grace_exit3;
  412. }
  413. if (cris_request_dma(NETWORK_RX_DMA_NBR,
  414. cardname,
  415. DMA_VERBOSE_ON_ERROR,
  416. dma_eth)) {
  417. goto grace_exit4;
  418. }
  419. /* give the HW an idea of what MAC address we want */
  420. *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
  421. (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
  422. *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
  423. *R_NETWORK_SA_2 = 0;
  424. #if 0
  425. /* use promiscuous mode for testing */
  426. *R_NETWORK_GA_0 = 0xffffffff;
  427. *R_NETWORK_GA_1 = 0xffffffff;
  428. *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
  429. #else
  430. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);
  431. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
  432. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
  433. SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
  434. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  435. #endif
  436. *R_NETWORK_GEN_CONFIG =
  437. IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
  438. IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
  439. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
  440. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
  441. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
  442. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
  443. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
  444. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
  445. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
  446. *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
  447. local_irq_save(flags);
  448. /* enable the irq's for ethernet DMA */
  449. *R_IRQ_MASK2_SET =
  450. IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
  451. IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
  452. *R_IRQ_MASK0_SET =
  453. IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
  454. IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
  455. IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
  456. /* make sure the irqs are cleared */
  457. *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
  458. *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
  459. /* make sure the rec and transmit error counters are cleared */
  460. (void)*R_REC_COUNTERS; /* dummy read */
  461. (void)*R_TR_COUNTERS; /* dummy read */
  462. /* start the receiving DMA channel so we can receive packets from now on */
  463. *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
  464. *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
  465. /* Set up transmit DMA channel so it can be restarted later */
  466. *R_DMA_CH0_FIRST = 0;
  467. *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
  468. netif_start_queue(dev);
  469. local_irq_restore(flags);
  470. /* Probe for transceiver */
  471. if (e100_probe_transceiver(dev))
  472. goto grace_exit5;
  473. /* Start duplex/speed timers */
  474. add_timer(&speed_timer);
  475. add_timer(&duplex_timer);
  476. /* We are now ready to accept transmit requeusts from
  477. * the queueing layer of the networking.
  478. */
  479. netif_carrier_on(dev);
  480. return 0;
  481. grace_exit5:
  482. cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
  483. grace_exit4:
  484. cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
  485. grace_exit3:
  486. free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
  487. grace_exit2:
  488. free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
  489. grace_exit1:
  490. free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
  491. grace_exit0:
  492. return -EAGAIN;
  493. }
  494. #if defined(CONFIG_ETRAX_NO_PHY)
  495. static void
  496. dummy_check_speed(struct net_device* dev)
  497. {
  498. current_speed = 100;
  499. }
  500. #else
  501. static void
  502. generic_check_speed(struct net_device* dev)
  503. {
  504. unsigned long data;
  505. struct net_local *np = netdev_priv(dev);
  506. data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
  507. if ((data & ADVERTISE_100FULL) ||
  508. (data & ADVERTISE_100HALF))
  509. current_speed = 100;
  510. else
  511. current_speed = 10;
  512. }
  513. static void
  514. tdk_check_speed(struct net_device* dev)
  515. {
  516. unsigned long data;
  517. struct net_local *np = netdev_priv(dev);
  518. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  519. MDIO_TDK_DIAGNOSTIC_REG);
  520. current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
  521. }
  522. static void
  523. broadcom_check_speed(struct net_device* dev)
  524. {
  525. unsigned long data;
  526. struct net_local *np = netdev_priv(dev);
  527. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  528. MDIO_AUX_CTRL_STATUS_REG);
  529. current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
  530. }
  531. static void
  532. intel_check_speed(struct net_device* dev)
  533. {
  534. unsigned long data;
  535. struct net_local *np = netdev_priv(dev);
  536. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  537. MDIO_INT_STATUS_REG_2);
  538. current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
  539. }
  540. #endif
  541. static void
  542. e100_check_speed(unsigned long priv)
  543. {
  544. struct net_device* dev = (struct net_device*)priv;
  545. struct net_local *np = netdev_priv(dev);
  546. static int led_initiated = 0;
  547. unsigned long data;
  548. int old_speed = current_speed;
  549. spin_lock(&np->transceiver_lock);
  550. data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR);
  551. if (!(data & BMSR_LSTATUS)) {
  552. current_speed = 0;
  553. } else {
  554. transceiver->check_speed(dev);
  555. }
  556. spin_lock(&np->led_lock);
  557. if ((old_speed != current_speed) || !led_initiated) {
  558. led_initiated = 1;
  559. e100_set_network_leds(NO_NETWORK_ACTIVITY);
  560. if (current_speed)
  561. netif_carrier_on(dev);
  562. else
  563. netif_carrier_off(dev);
  564. }
  565. spin_unlock(&np->led_lock);
  566. /* Reinitialize the timer. */
  567. speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
  568. add_timer(&speed_timer);
  569. spin_unlock(&np->transceiver_lock);
  570. }
  571. static void
  572. e100_negotiate(struct net_device* dev)
  573. {
  574. struct net_local *np = netdev_priv(dev);
  575. unsigned short data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  576. MII_ADVERTISE);
  577. /* Discard old speed and duplex settings */
  578. data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |
  579. ADVERTISE_10HALF | ADVERTISE_10FULL);
  580. switch (current_speed_selection) {
  581. case 10:
  582. if (current_duplex == full)
  583. data |= ADVERTISE_10FULL;
  584. else if (current_duplex == half)
  585. data |= ADVERTISE_10HALF;
  586. else
  587. data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
  588. break;
  589. case 100:
  590. if (current_duplex == full)
  591. data |= ADVERTISE_100FULL;
  592. else if (current_duplex == half)
  593. data |= ADVERTISE_100HALF;
  594. else
  595. data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
  596. break;
  597. case 0: /* Auto */
  598. if (current_duplex == full)
  599. data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
  600. else if (current_duplex == half)
  601. data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
  602. else
  603. data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
  604. ADVERTISE_100HALF | ADVERTISE_100FULL;
  605. break;
  606. default: /* assume autoneg speed and duplex */
  607. data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
  608. ADVERTISE_100HALF | ADVERTISE_100FULL;
  609. break;
  610. }
  611. e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data);
  612. data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
  613. if (autoneg_normal) {
  614. /* Renegotiate with link partner */
  615. data |= BMCR_ANENABLE | BMCR_ANRESTART;
  616. } else {
  617. /* Don't negotiate speed or duplex */
  618. data &= ~(BMCR_ANENABLE | BMCR_ANRESTART);
  619. /* Set speed and duplex static */
  620. if (current_speed_selection == 10)
  621. data &= ~BMCR_SPEED100;
  622. else
  623. data |= BMCR_SPEED100;
  624. if (current_duplex != full)
  625. data &= ~BMCR_FULLDPLX;
  626. else
  627. data |= BMCR_FULLDPLX;
  628. }
  629. e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data);
  630. }
  631. static void
  632. e100_set_speed(struct net_device* dev, unsigned long speed)
  633. {
  634. struct net_local *np = netdev_priv(dev);
  635. spin_lock(&np->transceiver_lock);
  636. if (speed != current_speed_selection) {
  637. current_speed_selection = speed;
  638. e100_negotiate(dev);
  639. }
  640. spin_unlock(&np->transceiver_lock);
  641. }
  642. static void
  643. e100_check_duplex(unsigned long priv)
  644. {
  645. struct net_device *dev = (struct net_device *)priv;
  646. struct net_local *np = netdev_priv(dev);
  647. int old_duplex;
  648. spin_lock(&np->transceiver_lock);
  649. old_duplex = full_duplex;
  650. transceiver->check_duplex(dev);
  651. if (old_duplex != full_duplex) {
  652. /* Duplex changed */
  653. SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
  654. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  655. }
  656. /* Reinitialize the timer. */
  657. duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
  658. add_timer(&duplex_timer);
  659. np->mii_if.full_duplex = full_duplex;
  660. spin_unlock(&np->transceiver_lock);
  661. }
  662. #if defined(CONFIG_ETRAX_NO_PHY)
  663. static void
  664. dummy_check_duplex(struct net_device* dev)
  665. {
  666. full_duplex = 1;
  667. }
  668. #else
  669. static void
  670. generic_check_duplex(struct net_device* dev)
  671. {
  672. unsigned long data;
  673. struct net_local *np = netdev_priv(dev);
  674. data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
  675. if ((data & ADVERTISE_10FULL) ||
  676. (data & ADVERTISE_100FULL))
  677. full_duplex = 1;
  678. else
  679. full_duplex = 0;
  680. }
  681. static void
  682. tdk_check_duplex(struct net_device* dev)
  683. {
  684. unsigned long data;
  685. struct net_local *np = netdev_priv(dev);
  686. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  687. MDIO_TDK_DIAGNOSTIC_REG);
  688. full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
  689. }
  690. static void
  691. broadcom_check_duplex(struct net_device* dev)
  692. {
  693. unsigned long data;
  694. struct net_local *np = netdev_priv(dev);
  695. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  696. MDIO_AUX_CTRL_STATUS_REG);
  697. full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
  698. }
  699. static void
  700. intel_check_duplex(struct net_device* dev)
  701. {
  702. unsigned long data;
  703. struct net_local *np = netdev_priv(dev);
  704. data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
  705. MDIO_INT_STATUS_REG_2);
  706. full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
  707. }
  708. #endif
  709. static void
  710. e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
  711. {
  712. struct net_local *np = netdev_priv(dev);
  713. spin_lock(&np->transceiver_lock);
  714. if (new_duplex != current_duplex) {
  715. current_duplex = new_duplex;
  716. e100_negotiate(dev);
  717. }
  718. spin_unlock(&np->transceiver_lock);
  719. }
  720. static int
  721. e100_probe_transceiver(struct net_device* dev)
  722. {
  723. int ret = 0;
  724. #if !defined(CONFIG_ETRAX_NO_PHY)
  725. unsigned int phyid_high;
  726. unsigned int phyid_low;
  727. unsigned int oui;
  728. struct transceiver_ops* ops = NULL;
  729. struct net_local *np = netdev_priv(dev);
  730. spin_lock(&np->transceiver_lock);
  731. /* Probe MDIO physical address */
  732. for (np->mii_if.phy_id = 0; np->mii_if.phy_id <= 31;
  733. np->mii_if.phy_id++) {
  734. if (e100_get_mdio_reg(dev,
  735. np->mii_if.phy_id, MII_BMSR) != 0xffff)
  736. break;
  737. }
  738. if (np->mii_if.phy_id == 32) {
  739. ret = -ENODEV;
  740. goto out;
  741. }
  742. /* Get manufacturer */
  743. phyid_high = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID1);
  744. phyid_low = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID2);
  745. oui = (phyid_high << 6) | (phyid_low >> 10);
  746. for (ops = &transceivers[0]; ops->oui; ops++) {
  747. if (ops->oui == oui)
  748. break;
  749. }
  750. transceiver = ops;
  751. out:
  752. spin_unlock(&np->transceiver_lock);
  753. #endif
  754. return ret;
  755. }
  756. static int
  757. e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
  758. {
  759. unsigned short cmd; /* Data to be sent on MDIO port */
  760. int data; /* Data read from MDIO */
  761. int bitCounter;
  762. /* Start of frame, OP Code, Physical Address, Register Address */
  763. cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) |
  764. (location << 2);
  765. e100_send_mdio_cmd(cmd, 0);
  766. data = 0;
  767. /* Data... */
  768. for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
  769. data |= (e100_receive_mdio_bit() << bitCounter);
  770. }
  771. return data;
  772. }
  773. static void
  774. e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)
  775. {
  776. int bitCounter;
  777. unsigned short cmd;
  778. cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) |
  779. (location << 2);
  780. e100_send_mdio_cmd(cmd, 1);
  781. /* Data... */
  782. for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
  783. e100_send_mdio_bit(GET_BIT(bitCounter, value));
  784. }
  785. }
  786. static void
  787. e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
  788. {
  789. int bitCounter;
  790. unsigned char data = 0x2;
  791. /* Preamble */
  792. for (bitCounter = 31; bitCounter>= 0; bitCounter--)
  793. e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
  794. for (bitCounter = 15; bitCounter >= 2; bitCounter--)
  795. e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
  796. /* Turnaround */
  797. for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
  798. if (write_cmd)
  799. e100_send_mdio_bit(GET_BIT(bitCounter, data));
  800. else
  801. e100_receive_mdio_bit();
  802. }
  803. static void
  804. e100_send_mdio_bit(unsigned char bit)
  805. {
  806. *R_NETWORK_MGM_CTRL =
  807. IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
  808. IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
  809. udelay(1);
  810. *R_NETWORK_MGM_CTRL =
  811. IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
  812. IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
  813. IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
  814. udelay(1);
  815. }
  816. static unsigned char
  817. e100_receive_mdio_bit(void)
  818. {
  819. unsigned char bit;
  820. *R_NETWORK_MGM_CTRL = 0;
  821. bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
  822. udelay(1);
  823. *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
  824. udelay(1);
  825. return bit;
  826. }
  827. static void
  828. e100_reset_transceiver(struct net_device* dev)
  829. {
  830. struct net_local *np = netdev_priv(dev);
  831. unsigned short cmd;
  832. unsigned short data;
  833. int bitCounter;
  834. data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
  835. cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (np->mii_if.phy_id << 7) | (MII_BMCR << 2);
  836. e100_send_mdio_cmd(cmd, 1);
  837. data |= 0x8000;
  838. for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
  839. e100_send_mdio_bit(GET_BIT(bitCounter, data));
  840. }
  841. }
  842. /* Called by upper layers if they decide it took too long to complete
  843. * sending a packet - we need to reset and stuff.
  844. */
  845. static void
  846. e100_tx_timeout(struct net_device *dev)
  847. {
  848. struct net_local *np = netdev_priv(dev);
  849. unsigned long flags;
  850. spin_lock_irqsave(&np->lock, flags);
  851. printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
  852. tx_done(dev) ? "IRQ problem" : "network cable problem");
  853. /* remember we got an error */
  854. dev->stats.tx_errors++;
  855. /* reset the TX DMA in case it has hung on something */
  856. RESET_DMA(NETWORK_TX_DMA_NBR);
  857. WAIT_DMA(NETWORK_TX_DMA_NBR);
  858. /* Reset the transceiver. */
  859. e100_reset_transceiver(dev);
  860. /* and get rid of the packets that never got an interrupt */
  861. while (myFirstTxDesc != myNextTxDesc) {
  862. dev_kfree_skb(myFirstTxDesc->skb);
  863. myFirstTxDesc->skb = 0;
  864. myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
  865. }
  866. /* Set up transmit DMA channel so it can be restarted later */
  867. *R_DMA_CH0_FIRST = 0;
  868. *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
  869. /* tell the upper layers we're ok again */
  870. netif_wake_queue(dev);
  871. spin_unlock_irqrestore(&np->lock, flags);
  872. }
  873. /* This will only be invoked if the driver is _not_ in XOFF state.
  874. * What this means is that we need not check it, and that this
  875. * invariant will hold if we make sure that the netif_*_queue()
  876. * calls are done at the proper times.
  877. */
  878. static int
  879. e100_send_packet(struct sk_buff *skb, struct net_device *dev)
  880. {
  881. struct net_local *np = netdev_priv(dev);
  882. unsigned char *buf = skb->data;
  883. unsigned long flags;
  884. #ifdef ETHDEBUG
  885. printk("send packet len %d\n", length);
  886. #endif
  887. spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
  888. myNextTxDesc->skb = skb;
  889. netif_trans_update(dev); /* NETIF_F_LLTX driver :( */
  890. e100_hardware_send_packet(np, buf, skb->len);
  891. myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
  892. /* Stop queue if full */
  893. if (myNextTxDesc == myFirstTxDesc) {
  894. netif_stop_queue(dev);
  895. }
  896. spin_unlock_irqrestore(&np->lock, flags);
  897. return NETDEV_TX_OK;
  898. }
  899. /*
  900. * The typical workload of the driver:
  901. * Handle the network interface interrupts.
  902. */
  903. static irqreturn_t
  904. e100rxtx_interrupt(int irq, void *dev_id)
  905. {
  906. struct net_device *dev = (struct net_device *)dev_id;
  907. unsigned long irqbits;
  908. /*
  909. * Note that both rx and tx interrupts are blocked at this point,
  910. * regardless of which got us here.
  911. */
  912. irqbits = *R_IRQ_MASK2_RD;
  913. /* Handle received packets */
  914. if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
  915. /* acknowledge the eop interrupt */
  916. *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
  917. /* check if one or more complete packets were indeed received */
  918. while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &&
  919. (myNextRxDesc != myLastRxDesc)) {
  920. /* Take out the buffer and give it to the OS, then
  921. * allocate a new buffer to put a packet in.
  922. */
  923. e100_rx(dev);
  924. dev->stats.rx_packets++;
  925. /* restart/continue on the channel, for safety */
  926. *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
  927. /* clear dma channel 1 eop/descr irq bits */
  928. *R_DMA_CH1_CLR_INTR =
  929. IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
  930. IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
  931. /* now, we might have gotten another packet
  932. so we have to loop back and check if so */
  933. }
  934. }
  935. /* Report any packets that have been sent */
  936. while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST &&
  937. (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {
  938. dev->stats.tx_bytes += myFirstTxDesc->skb->len;
  939. dev->stats.tx_packets++;
  940. /* dma is ready with the transmission of the data in tx_skb, so now
  941. we can release the skb memory */
  942. dev_kfree_skb_irq(myFirstTxDesc->skb);
  943. myFirstTxDesc->skb = 0;
  944. myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
  945. /* Wake up queue. */
  946. netif_wake_queue(dev);
  947. }
  948. if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
  949. /* acknowledge the eop interrupt. */
  950. *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
  951. }
  952. return IRQ_HANDLED;
  953. }
  954. static irqreturn_t
  955. e100nw_interrupt(int irq, void *dev_id)
  956. {
  957. struct net_device *dev = (struct net_device *)dev_id;
  958. unsigned long irqbits = *R_IRQ_MASK0_RD;
  959. /* check for underrun irq */
  960. if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
  961. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
  962. *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
  963. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
  964. dev->stats.tx_errors++;
  965. D(printk("ethernet receiver underrun!\n"));
  966. }
  967. /* check for overrun irq */
  968. if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
  969. update_rx_stats(&dev->stats); /* this will ack the irq */
  970. D(printk("ethernet receiver overrun!\n"));
  971. }
  972. /* check for excessive collision irq */
  973. if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
  974. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
  975. *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
  976. SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
  977. dev->stats.tx_errors++;
  978. D(printk("ethernet excessive collisions!\n"));
  979. }
  980. return IRQ_HANDLED;
  981. }
  982. /* We have a good packet(s), get it/them out of the buffers. */
  983. static void
  984. e100_rx(struct net_device *dev)
  985. {
  986. struct sk_buff *skb;
  987. int length = 0;
  988. struct net_local *np = netdev_priv(dev);
  989. unsigned char *skb_data_ptr;
  990. #ifdef ETHDEBUG
  991. int i;
  992. #endif
  993. etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */
  994. spin_lock(&np->led_lock);
  995. if (!led_active && time_after(jiffies, led_next_time)) {
  996. /* light the network leds depending on the current speed. */
  997. e100_set_network_leds(NETWORK_ACTIVITY);
  998. /* Set the earliest time we may clear the LED */
  999. led_next_time = jiffies + NET_FLASH_TIME;
  1000. led_active = 1;
  1001. mod_timer(&clear_led_timer, jiffies + HZ/10);
  1002. }
  1003. spin_unlock(&np->led_lock);
  1004. length = myNextRxDesc->descr.hw_len - 4;
  1005. dev->stats.rx_bytes += length;
  1006. #ifdef ETHDEBUG
  1007. printk("Got a packet of length %d:\n", length);
  1008. /* dump the first bytes in the packet */
  1009. skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
  1010. for (i = 0; i < 8; i++) {
  1011. printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
  1012. skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
  1013. skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
  1014. skb_data_ptr += 8;
  1015. }
  1016. #endif
  1017. if (length < RX_COPYBREAK) {
  1018. /* Small packet, copy data */
  1019. skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
  1020. if (!skb) {
  1021. dev->stats.rx_errors++;
  1022. printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
  1023. goto update_nextrxdesc;
  1024. }
  1025. skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
  1026. skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
  1027. #ifdef ETHDEBUG
  1028. printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
  1029. skb->head, skb->data, skb_tail_pointer(skb),
  1030. skb_end_pointer(skb));
  1031. printk("copying packet to 0x%x.\n", skb_data_ptr);
  1032. #endif
  1033. memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
  1034. }
  1035. else {
  1036. /* Large packet, send directly to upper layers and allocate new
  1037. * memory (aligned to cache line boundary to avoid bug).
  1038. * Before sending the skb to upper layers we must make sure
  1039. * that skb->data points to the aligned start of the packet.
  1040. */
  1041. int align;
  1042. struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
  1043. if (!new_skb) {
  1044. dev->stats.rx_errors++;
  1045. printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
  1046. goto update_nextrxdesc;
  1047. }
  1048. skb = myNextRxDesc->skb;
  1049. align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
  1050. skb_put(skb, length + align);
  1051. skb_pull(skb, align); /* Remove alignment bytes */
  1052. myNextRxDesc->skb = new_skb;
  1053. myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
  1054. }
  1055. skb->protocol = eth_type_trans(skb, dev);
  1056. /* Send the packet to the upper layers */
  1057. netif_rx(skb);
  1058. update_nextrxdesc:
  1059. /* Prepare for next packet */
  1060. myNextRxDesc->descr.status = 0;
  1061. prevRxDesc = myNextRxDesc;
  1062. myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
  1063. rx_queue_len++;
  1064. /* Check if descriptors should be returned */
  1065. if (rx_queue_len == RX_QUEUE_THRESHOLD) {
  1066. flush_etrax_cache();
  1067. prevRxDesc->descr.ctrl |= d_eol;
  1068. myLastRxDesc->descr.ctrl &= ~d_eol;
  1069. myLastRxDesc = prevRxDesc;
  1070. rx_queue_len = 0;
  1071. }
  1072. }
  1073. /* The inverse routine to net_open(). */
  1074. static int
  1075. e100_close(struct net_device *dev)
  1076. {
  1077. printk(KERN_INFO "Closing %s.\n", dev->name);
  1078. netif_stop_queue(dev);
  1079. *R_IRQ_MASK0_CLR =
  1080. IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
  1081. IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
  1082. IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
  1083. *R_IRQ_MASK2_CLR =
  1084. IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
  1085. IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
  1086. IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
  1087. IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
  1088. /* Stop the receiver and the transmitter */
  1089. RESET_DMA(NETWORK_TX_DMA_NBR);
  1090. RESET_DMA(NETWORK_RX_DMA_NBR);
  1091. /* Flush the Tx and disable Rx here. */
  1092. free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
  1093. free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
  1094. free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
  1095. cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
  1096. cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
  1097. /* Update the statistics here. */
  1098. update_rx_stats(&dev->stats);
  1099. update_tx_stats(&dev->stats);
  1100. /* Stop speed/duplex timers */
  1101. del_timer(&speed_timer);
  1102. del_timer(&duplex_timer);
  1103. return 0;
  1104. }
  1105. static int
  1106. e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  1107. {
  1108. struct mii_ioctl_data *data = if_mii(ifr);
  1109. struct net_local *np = netdev_priv(dev);
  1110. int rc = 0;
  1111. int old_autoneg;
  1112. spin_lock(&np->lock); /* Preempt protection */
  1113. switch (cmd) {
  1114. /* The ioctls below should be considered obsolete but are */
  1115. /* still present for compatibility with old scripts/apps */
  1116. case SET_ETH_SPEED_10: /* 10 Mbps */
  1117. e100_set_speed(dev, 10);
  1118. break;
  1119. case SET_ETH_SPEED_100: /* 100 Mbps */
  1120. e100_set_speed(dev, 100);
  1121. break;
  1122. case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */
  1123. e100_set_speed(dev, 0);
  1124. break;
  1125. case SET_ETH_DUPLEX_HALF: /* Half duplex */
  1126. e100_set_duplex(dev, half);
  1127. break;
  1128. case SET_ETH_DUPLEX_FULL: /* Full duplex */
  1129. e100_set_duplex(dev, full);
  1130. break;
  1131. case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */
  1132. e100_set_duplex(dev, autoneg);
  1133. break;
  1134. case SET_ETH_AUTONEG:
  1135. old_autoneg = autoneg_normal;
  1136. autoneg_normal = *(int*)data;
  1137. if (autoneg_normal != old_autoneg)
  1138. e100_negotiate(dev);
  1139. break;
  1140. default:
  1141. rc = generic_mii_ioctl(&np->mii_if, if_mii(ifr),
  1142. cmd, NULL);
  1143. break;
  1144. }
  1145. spin_unlock(&np->lock);
  1146. return rc;
  1147. }
  1148. static int e100_get_link_ksettings(struct net_device *dev,
  1149. struct ethtool_link_ksettings *cmd)
  1150. {
  1151. struct net_local *np = netdev_priv(dev);
  1152. u32 supported;
  1153. spin_lock_irq(&np->lock);
  1154. mii_ethtool_get_link_ksettings(&np->mii_if, cmd);
  1155. spin_unlock_irq(&np->lock);
  1156. /* The PHY may support 1000baseT, but the Etrax100 does not. */
  1157. ethtool_convert_link_mode_to_legacy_u32(&supported,
  1158. cmd->link_modes.supported);
  1159. supported &= ~(SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full);
  1160. ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
  1161. supported);
  1162. return 0;
  1163. }
  1164. static int e100_set_link_ksettings(struct net_device *dev,
  1165. const struct ethtool_link_ksettings *ecmd)
  1166. {
  1167. if (ecmd->base.autoneg == AUTONEG_ENABLE) {
  1168. e100_set_duplex(dev, autoneg);
  1169. e100_set_speed(dev, 0);
  1170. } else {
  1171. e100_set_duplex(dev, ecmd->base.duplex == DUPLEX_HALF ?
  1172. half : full);
  1173. e100_set_speed(dev, ecmd->base.speed == SPEED_10 ? 10 : 100);
  1174. }
  1175. return 0;
  1176. }
  1177. static void e100_get_drvinfo(struct net_device *dev,
  1178. struct ethtool_drvinfo *info)
  1179. {
  1180. strlcpy(info->driver, "ETRAX 100LX", sizeof(info->driver));
  1181. strlcpy(info->version, "$Revision: 1.31 $", sizeof(info->version));
  1182. strlcpy(info->fw_version, "N/A", sizeof(info->fw_version));
  1183. strlcpy(info->bus_info, "N/A", sizeof(info->bus_info));
  1184. }
  1185. static int e100_nway_reset(struct net_device *dev)
  1186. {
  1187. if (current_duplex == autoneg && current_speed_selection == 0)
  1188. e100_negotiate(dev);
  1189. return 0;
  1190. }
  1191. static const struct ethtool_ops e100_ethtool_ops = {
  1192. .get_drvinfo = e100_get_drvinfo,
  1193. .nway_reset = e100_nway_reset,
  1194. .get_link = ethtool_op_get_link,
  1195. .get_link_ksettings = e100_get_link_ksettings,
  1196. .set_link_ksettings = e100_set_link_ksettings,
  1197. };
  1198. static int
  1199. e100_set_config(struct net_device *dev, struct ifmap *map)
  1200. {
  1201. struct net_local *np = netdev_priv(dev);
  1202. spin_lock(&np->lock); /* Preempt protection */
  1203. switch(map->port) {
  1204. case IF_PORT_UNKNOWN:
  1205. /* Use autoneg */
  1206. e100_set_speed(dev, 0);
  1207. e100_set_duplex(dev, autoneg);
  1208. break;
  1209. case IF_PORT_10BASET:
  1210. e100_set_speed(dev, 10);
  1211. e100_set_duplex(dev, autoneg);
  1212. break;
  1213. case IF_PORT_100BASET:
  1214. case IF_PORT_100BASETX:
  1215. e100_set_speed(dev, 100);
  1216. e100_set_duplex(dev, autoneg);
  1217. break;
  1218. case IF_PORT_100BASEFX:
  1219. case IF_PORT_10BASE2:
  1220. case IF_PORT_AUI:
  1221. spin_unlock(&np->lock);
  1222. return -EOPNOTSUPP;
  1223. default:
  1224. printk(KERN_ERR "%s: Invalid media selected", dev->name);
  1225. spin_unlock(&np->lock);
  1226. return -EINVAL;
  1227. }
  1228. spin_unlock(&np->lock);
  1229. return 0;
  1230. }
  1231. static void
  1232. update_rx_stats(struct net_device_stats *es)
  1233. {
  1234. unsigned long r = *R_REC_COUNTERS;
  1235. /* update stats relevant to reception errors */
  1236. es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
  1237. es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
  1238. es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
  1239. es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
  1240. }
  1241. static void
  1242. update_tx_stats(struct net_device_stats *es)
  1243. {
  1244. unsigned long r = *R_TR_COUNTERS;
  1245. /* update stats relevant to transmission errors */
  1246. es->collisions +=
  1247. IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
  1248. IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
  1249. }
  1250. /*
  1251. * Get the current statistics.
  1252. * This may be called with the card open or closed.
  1253. */
  1254. static struct net_device_stats *
  1255. e100_get_stats(struct net_device *dev)
  1256. {
  1257. struct net_local *lp = netdev_priv(dev);
  1258. unsigned long flags;
  1259. spin_lock_irqsave(&lp->lock, flags);
  1260. update_rx_stats(&dev->stats);
  1261. update_tx_stats(&dev->stats);
  1262. spin_unlock_irqrestore(&lp->lock, flags);
  1263. return &dev->stats;
  1264. }
  1265. /*
  1266. * Set or clear the multicast filter for this adaptor.
  1267. * num_addrs == -1 Promiscuous mode, receive all packets
  1268. * num_addrs == 0 Normal mode, clear multicast list
  1269. * num_addrs > 0 Multicast mode, receive normal and MC packets,
  1270. * and do best-effort filtering.
  1271. */
  1272. static void
  1273. set_multicast_list(struct net_device *dev)
  1274. {
  1275. struct net_local *lp = netdev_priv(dev);
  1276. int num_addr = netdev_mc_count(dev);
  1277. unsigned long int lo_bits;
  1278. unsigned long int hi_bits;
  1279. spin_lock(&lp->lock);
  1280. if (dev->flags & IFF_PROMISC) {
  1281. /* promiscuous mode */
  1282. lo_bits = 0xfffffffful;
  1283. hi_bits = 0xfffffffful;
  1284. /* Enable individual receive */
  1285. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
  1286. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  1287. } else if (dev->flags & IFF_ALLMULTI) {
  1288. /* enable all multicasts */
  1289. lo_bits = 0xfffffffful;
  1290. hi_bits = 0xfffffffful;
  1291. /* Disable individual receive */
  1292. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
  1293. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  1294. } else if (num_addr == 0) {
  1295. /* Normal, clear the mc list */
  1296. lo_bits = 0x00000000ul;
  1297. hi_bits = 0x00000000ul;
  1298. /* Disable individual receive */
  1299. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
  1300. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  1301. } else {
  1302. /* MC mode, receive normal and MC packets */
  1303. char hash_ix;
  1304. struct netdev_hw_addr *ha;
  1305. char *baddr;
  1306. lo_bits = 0x00000000ul;
  1307. hi_bits = 0x00000000ul;
  1308. netdev_for_each_mc_addr(ha, dev) {
  1309. /* Calculate the hash index for the GA registers */
  1310. hash_ix = 0;
  1311. baddr = ha->addr;
  1312. hash_ix ^= (*baddr) & 0x3f;
  1313. hash_ix ^= ((*baddr) >> 6) & 0x03;
  1314. ++baddr;
  1315. hash_ix ^= ((*baddr) << 2) & 0x03c;
  1316. hash_ix ^= ((*baddr) >> 4) & 0xf;
  1317. ++baddr;
  1318. hash_ix ^= ((*baddr) << 4) & 0x30;
  1319. hash_ix ^= ((*baddr) >> 2) & 0x3f;
  1320. ++baddr;
  1321. hash_ix ^= (*baddr) & 0x3f;
  1322. hash_ix ^= ((*baddr) >> 6) & 0x03;
  1323. ++baddr;
  1324. hash_ix ^= ((*baddr) << 2) & 0x03c;
  1325. hash_ix ^= ((*baddr) >> 4) & 0xf;
  1326. ++baddr;
  1327. hash_ix ^= ((*baddr) << 4) & 0x30;
  1328. hash_ix ^= ((*baddr) >> 2) & 0x3f;
  1329. hash_ix &= 0x3f;
  1330. if (hash_ix >= 32) {
  1331. hi_bits |= (1 << (hash_ix-32));
  1332. } else {
  1333. lo_bits |= (1 << hash_ix);
  1334. }
  1335. }
  1336. /* Disable individual receive */
  1337. SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
  1338. *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
  1339. }
  1340. *R_NETWORK_GA_0 = lo_bits;
  1341. *R_NETWORK_GA_1 = hi_bits;
  1342. spin_unlock(&lp->lock);
  1343. }
  1344. void
  1345. e100_hardware_send_packet(struct net_local *np, char *buf, int length)
  1346. {
  1347. D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
  1348. spin_lock(&np->led_lock);
  1349. if (!led_active && time_after(jiffies, led_next_time)) {
  1350. /* light the network leds depending on the current speed. */
  1351. e100_set_network_leds(NETWORK_ACTIVITY);
  1352. /* Set the earliest time we may clear the LED */
  1353. led_next_time = jiffies + NET_FLASH_TIME;
  1354. led_active = 1;
  1355. mod_timer(&clear_led_timer, jiffies + HZ/10);
  1356. }
  1357. spin_unlock(&np->led_lock);
  1358. /* configure the tx dma descriptor */
  1359. myNextTxDesc->descr.sw_len = length;
  1360. myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
  1361. myNextTxDesc->descr.buf = virt_to_phys(buf);
  1362. /* Move end of list */
  1363. myLastTxDesc->descr.ctrl &= ~d_eol;
  1364. myLastTxDesc = myNextTxDesc;
  1365. /* Restart DMA channel */
  1366. *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
  1367. }
  1368. static void
  1369. e100_clear_network_leds(unsigned long dummy)
  1370. {
  1371. struct net_device *dev = (struct net_device *)dummy;
  1372. struct net_local *np = netdev_priv(dev);
  1373. spin_lock(&np->led_lock);
  1374. if (led_active && time_after(jiffies, led_next_time)) {
  1375. e100_set_network_leds(NO_NETWORK_ACTIVITY);
  1376. /* Set the earliest time we may set the LED */
  1377. led_next_time = jiffies + NET_FLASH_PAUSE;
  1378. led_active = 0;
  1379. }
  1380. spin_unlock(&np->led_lock);
  1381. }
  1382. static void
  1383. e100_set_network_leds(int active)
  1384. {
  1385. #if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
  1386. int light_leds = (active == NO_NETWORK_ACTIVITY);
  1387. #elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
  1388. int light_leds = (active == NETWORK_ACTIVITY);
  1389. #else
  1390. #error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
  1391. #endif
  1392. if (!current_speed) {
  1393. /* Make LED red, link is down */
  1394. CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
  1395. } else if (light_leds) {
  1396. if (current_speed == 10) {
  1397. CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE);
  1398. } else {
  1399. CRIS_LED_NETWORK_SET(CRIS_LED_GREEN);
  1400. }
  1401. } else {
  1402. CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
  1403. }
  1404. }
  1405. #ifdef CONFIG_NET_POLL_CONTROLLER
  1406. static void
  1407. e100_netpoll(struct net_device* netdev)
  1408. {
  1409. e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev);
  1410. }
  1411. #endif
  1412. static int __init
  1413. e100_boot_setup(char* str)
  1414. {
  1415. struct sockaddr sa = {0};
  1416. int i;
  1417. /* Parse the colon separated Ethernet station address */
  1418. for (i = 0; i < ETH_ALEN; i++) {
  1419. unsigned int tmp;
  1420. if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
  1421. printk(KERN_WARNING "Malformed station address");
  1422. return 0;
  1423. }
  1424. sa.sa_data[i] = (char)tmp;
  1425. }
  1426. default_mac = sa;
  1427. return 1;
  1428. }
  1429. __setup("etrax100_eth=", e100_boot_setup);