cxllib.c 6.0 KB

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  1. /*
  2. * Copyright 2017 IBM Corp.
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version
  7. * 2 of the License, or (at your option) any later version.
  8. */
  9. #include <linux/hugetlb.h>
  10. #include <linux/sched/mm.h>
  11. #include <asm/pnv-pci.h>
  12. #include <misc/cxllib.h>
  13. #include "cxl.h"
  14. #define CXL_INVALID_DRA ~0ull
  15. #define CXL_DUMMY_READ_SIZE 128
  16. #define CXL_DUMMY_READ_ALIGN 8
  17. #define CXL_CAPI_WINDOW_START 0x2000000000000ull
  18. #define CXL_CAPI_WINDOW_LOG_SIZE 48
  19. #define CXL_XSL_CONFIG_CURRENT_VERSION CXL_XSL_CONFIG_VERSION1
  20. bool cxllib_slot_is_supported(struct pci_dev *dev, unsigned long flags)
  21. {
  22. int rc;
  23. u32 phb_index;
  24. u64 chip_id, capp_unit_id;
  25. /* No flags currently supported */
  26. if (flags)
  27. return false;
  28. if (!cpu_has_feature(CPU_FTR_HVMODE))
  29. return false;
  30. if (!cxl_is_power9())
  31. return false;
  32. if (cxl_slot_is_switched(dev))
  33. return false;
  34. /* on p9, some pci slots are not connected to a CAPP unit */
  35. rc = cxl_calc_capp_routing(dev, &chip_id, &phb_index, &capp_unit_id);
  36. if (rc)
  37. return false;
  38. return true;
  39. }
  40. EXPORT_SYMBOL_GPL(cxllib_slot_is_supported);
  41. static DEFINE_MUTEX(dra_mutex);
  42. static u64 dummy_read_addr = CXL_INVALID_DRA;
  43. static int allocate_dummy_read_buf(void)
  44. {
  45. u64 buf, vaddr;
  46. size_t buf_size;
  47. /*
  48. * Dummy read buffer is 128-byte long, aligned on a
  49. * 256-byte boundary and we need the physical address.
  50. */
  51. buf_size = CXL_DUMMY_READ_SIZE + (1ull << CXL_DUMMY_READ_ALIGN);
  52. buf = (u64) kzalloc(buf_size, GFP_KERNEL);
  53. if (!buf)
  54. return -ENOMEM;
  55. vaddr = (buf + (1ull << CXL_DUMMY_READ_ALIGN) - 1) &
  56. (~0ull << CXL_DUMMY_READ_ALIGN);
  57. WARN((vaddr + CXL_DUMMY_READ_SIZE) > (buf + buf_size),
  58. "Dummy read buffer alignment issue");
  59. dummy_read_addr = virt_to_phys((void *) vaddr);
  60. return 0;
  61. }
  62. int cxllib_get_xsl_config(struct pci_dev *dev, struct cxllib_xsl_config *cfg)
  63. {
  64. int rc;
  65. u32 phb_index;
  66. u64 chip_id, capp_unit_id;
  67. if (!cpu_has_feature(CPU_FTR_HVMODE))
  68. return -EINVAL;
  69. mutex_lock(&dra_mutex);
  70. if (dummy_read_addr == CXL_INVALID_DRA) {
  71. rc = allocate_dummy_read_buf();
  72. if (rc) {
  73. mutex_unlock(&dra_mutex);
  74. return rc;
  75. }
  76. }
  77. mutex_unlock(&dra_mutex);
  78. rc = cxl_calc_capp_routing(dev, &chip_id, &phb_index, &capp_unit_id);
  79. if (rc)
  80. return rc;
  81. rc = cxl_get_xsl9_dsnctl(capp_unit_id, &cfg->dsnctl);
  82. if (rc)
  83. return rc;
  84. if (cpu_has_feature(CPU_FTR_POWER9_DD1)) {
  85. /* workaround for DD1 - nbwind = capiind */
  86. cfg->dsnctl |= ((u64)0x02 << (63-47));
  87. }
  88. cfg->version = CXL_XSL_CONFIG_CURRENT_VERSION;
  89. cfg->log_bar_size = CXL_CAPI_WINDOW_LOG_SIZE;
  90. cfg->bar_addr = CXL_CAPI_WINDOW_START;
  91. cfg->dra = dummy_read_addr;
  92. return 0;
  93. }
  94. EXPORT_SYMBOL_GPL(cxllib_get_xsl_config);
  95. int cxllib_switch_phb_mode(struct pci_dev *dev, enum cxllib_mode mode,
  96. unsigned long flags)
  97. {
  98. int rc = 0;
  99. if (!cpu_has_feature(CPU_FTR_HVMODE))
  100. return -EINVAL;
  101. switch (mode) {
  102. case CXL_MODE_PCI:
  103. /*
  104. * We currently don't support going back to PCI mode
  105. * However, we'll turn the invalidations off, so that
  106. * the firmware doesn't have to ack them and can do
  107. * things like reset, etc.. with no worries.
  108. * So always return EPERM (can't go back to PCI) or
  109. * EBUSY if we couldn't even turn off snooping
  110. */
  111. rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_SNOOP_OFF);
  112. if (rc)
  113. rc = -EBUSY;
  114. else
  115. rc = -EPERM;
  116. break;
  117. case CXL_MODE_CXL:
  118. /* DMA only supported on TVT1 for the time being */
  119. if (flags != CXL_MODE_DMA_TVT1)
  120. return -EINVAL;
  121. rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_DMA_TVT1);
  122. if (rc)
  123. return rc;
  124. rc = pnv_phb_to_cxl_mode(dev, OPAL_PHB_CAPI_MODE_SNOOP_ON);
  125. break;
  126. default:
  127. rc = -EINVAL;
  128. }
  129. return rc;
  130. }
  131. EXPORT_SYMBOL_GPL(cxllib_switch_phb_mode);
  132. /*
  133. * When switching the PHB to capi mode, the TVT#1 entry for
  134. * the Partitionable Endpoint is set in bypass mode, like
  135. * in PCI mode.
  136. * Configure the device dma to use TVT#1, which is done
  137. * by calling dma_set_mask() with a mask large enough.
  138. */
  139. int cxllib_set_device_dma(struct pci_dev *dev, unsigned long flags)
  140. {
  141. int rc;
  142. if (flags)
  143. return -EINVAL;
  144. rc = dma_set_mask(&dev->dev, DMA_BIT_MASK(64));
  145. return rc;
  146. }
  147. EXPORT_SYMBOL_GPL(cxllib_set_device_dma);
  148. int cxllib_get_PE_attributes(struct task_struct *task,
  149. unsigned long translation_mode,
  150. struct cxllib_pe_attributes *attr)
  151. {
  152. struct mm_struct *mm = NULL;
  153. if (translation_mode != CXL_TRANSLATED_MODE &&
  154. translation_mode != CXL_REAL_MODE)
  155. return -EINVAL;
  156. attr->sr = cxl_calculate_sr(false,
  157. task == NULL,
  158. translation_mode == CXL_REAL_MODE,
  159. true);
  160. attr->lpid = mfspr(SPRN_LPID);
  161. if (task) {
  162. mm = get_task_mm(task);
  163. if (mm == NULL)
  164. return -EINVAL;
  165. /*
  166. * Caller is keeping a reference on mm_users for as long
  167. * as XSL uses the memory context
  168. */
  169. attr->pid = mm->context.id;
  170. mmput(mm);
  171. } else {
  172. attr->pid = 0;
  173. }
  174. attr->tid = 0;
  175. return 0;
  176. }
  177. EXPORT_SYMBOL_GPL(cxllib_get_PE_attributes);
  178. int cxllib_handle_fault(struct mm_struct *mm, u64 addr, u64 size, u64 flags)
  179. {
  180. int rc;
  181. u64 dar;
  182. struct vm_area_struct *vma = NULL;
  183. unsigned long page_size;
  184. if (mm == NULL)
  185. return -EFAULT;
  186. down_read(&mm->mmap_sem);
  187. vma = find_vma(mm, addr);
  188. if (!vma) {
  189. pr_err("Can't find vma for addr %016llx\n", addr);
  190. rc = -EFAULT;
  191. goto out;
  192. }
  193. /* get the size of the pages allocated */
  194. page_size = vma_kernel_pagesize(vma);
  195. for (dar = (addr & ~(page_size - 1)); dar < (addr + size); dar += page_size) {
  196. if (dar < vma->vm_start || dar >= vma->vm_end) {
  197. vma = find_vma(mm, addr);
  198. if (!vma) {
  199. pr_err("Can't find vma for addr %016llx\n", addr);
  200. rc = -EFAULT;
  201. goto out;
  202. }
  203. /* get the size of the pages allocated */
  204. page_size = vma_kernel_pagesize(vma);
  205. }
  206. rc = cxl_handle_mm_fault(mm, flags, dar);
  207. if (rc) {
  208. pr_err("cxl_handle_mm_fault failed %d", rc);
  209. rc = -EFAULT;
  210. goto out;
  211. }
  212. }
  213. rc = 0;
  214. out:
  215. up_read(&mm->mmap_sem);
  216. return rc;
  217. }
  218. EXPORT_SYMBOL_GPL(cxllib_handle_fault);