nes.c 31 KB

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  1. /*
  2. * Copyright (c) 2006 - 2011 Intel Corporation. All rights reserved.
  3. * Copyright (c) 2005 Open Grid Computing, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/module.h>
  34. #include <linux/moduleparam.h>
  35. #include <linux/netdevice.h>
  36. #include <linux/etherdevice.h>
  37. #include <linux/ethtool.h>
  38. #include <linux/mii.h>
  39. #include <linux/if_vlan.h>
  40. #include <linux/crc32.h>
  41. #include <linux/in.h>
  42. #include <linux/fs.h>
  43. #include <linux/init.h>
  44. #include <linux/if_arp.h>
  45. #include <linux/highmem.h>
  46. #include <linux/slab.h>
  47. #include <asm/io.h>
  48. #include <asm/irq.h>
  49. #include <asm/byteorder.h>
  50. #include <rdma/ib_smi.h>
  51. #include <rdma/ib_verbs.h>
  52. #include <rdma/ib_pack.h>
  53. #include <rdma/iw_cm.h>
  54. #include "nes.h"
  55. #include <net/netevent.h>
  56. #include <net/neighbour.h>
  57. #include <linux/route.h>
  58. #include <net/ip_fib.h>
  59. MODULE_AUTHOR("NetEffect");
  60. MODULE_DESCRIPTION("NetEffect RNIC Low-level iWARP Driver");
  61. MODULE_LICENSE("Dual BSD/GPL");
  62. int interrupt_mod_interval = 0;
  63. /* Interoperability */
  64. int mpa_version = 1;
  65. module_param(mpa_version, int, 0644);
  66. MODULE_PARM_DESC(mpa_version, "MPA version to be used int MPA Req/Resp (0 or 1)");
  67. /* Interoperability */
  68. int disable_mpa_crc = 0;
  69. module_param(disable_mpa_crc, int, 0644);
  70. MODULE_PARM_DESC(disable_mpa_crc, "Disable checking of MPA CRC");
  71. unsigned int nes_drv_opt = NES_DRV_OPT_DISABLE_INT_MOD | NES_DRV_OPT_ENABLE_PAU;
  72. module_param(nes_drv_opt, int, 0644);
  73. MODULE_PARM_DESC(nes_drv_opt, "Driver option parameters");
  74. unsigned int nes_debug_level = 0;
  75. module_param_named(debug_level, nes_debug_level, uint, 0644);
  76. MODULE_PARM_DESC(debug_level, "Enable debug output level");
  77. unsigned int wqm_quanta = 0x10000;
  78. module_param(wqm_quanta, int, 0644);
  79. MODULE_PARM_DESC(wqm_quanta, "WQM quanta");
  80. static bool limit_maxrdreqsz;
  81. module_param(limit_maxrdreqsz, bool, 0644);
  82. MODULE_PARM_DESC(limit_maxrdreqsz, "Limit max read request size to 256 Bytes");
  83. LIST_HEAD(nes_adapter_list);
  84. static LIST_HEAD(nes_dev_list);
  85. atomic_t qps_destroyed;
  86. static unsigned int ee_flsh_adapter;
  87. static unsigned int sysfs_nonidx_addr;
  88. static unsigned int sysfs_idx_addr;
  89. static const struct pci_device_id nes_pci_table[] = {
  90. { PCI_VDEVICE(NETEFFECT, PCI_DEVICE_ID_NETEFFECT_NE020), },
  91. { PCI_VDEVICE(NETEFFECT, PCI_DEVICE_ID_NETEFFECT_NE020_KR), },
  92. {0}
  93. };
  94. MODULE_DEVICE_TABLE(pci, nes_pci_table);
  95. static int nes_inetaddr_event(struct notifier_block *, unsigned long, void *);
  96. static int nes_net_event(struct notifier_block *, unsigned long, void *);
  97. static int nes_notifiers_registered;
  98. static struct notifier_block nes_inetaddr_notifier = {
  99. .notifier_call = nes_inetaddr_event
  100. };
  101. static struct notifier_block nes_net_notifier = {
  102. .notifier_call = nes_net_event
  103. };
  104. /**
  105. * nes_inetaddr_event
  106. */
  107. static int nes_inetaddr_event(struct notifier_block *notifier,
  108. unsigned long event, void *ptr)
  109. {
  110. struct in_ifaddr *ifa = ptr;
  111. struct net_device *event_netdev = ifa->ifa_dev->dev;
  112. struct nes_device *nesdev;
  113. struct net_device *netdev;
  114. struct net_device *upper_dev;
  115. struct nes_vnic *nesvnic;
  116. unsigned int is_bonded;
  117. nes_debug(NES_DBG_NETDEV, "nes_inetaddr_event: ip address %pI4, netmask %pI4.\n",
  118. &ifa->ifa_address, &ifa->ifa_mask);
  119. list_for_each_entry(nesdev, &nes_dev_list, list) {
  120. nes_debug(NES_DBG_NETDEV, "Nesdev list entry = 0x%p. (%s)\n",
  121. nesdev, nesdev->netdev[0]->name);
  122. netdev = nesdev->netdev[0];
  123. nesvnic = netdev_priv(netdev);
  124. upper_dev = netdev_master_upper_dev_get(netdev);
  125. is_bonded = netif_is_bond_slave(netdev) &&
  126. (upper_dev == event_netdev);
  127. if ((netdev == event_netdev) || is_bonded) {
  128. if (nesvnic->rdma_enabled == 0) {
  129. nes_debug(NES_DBG_NETDEV, "Returning without processing event for %s since"
  130. " RDMA is not enabled.\n",
  131. netdev->name);
  132. return NOTIFY_OK;
  133. }
  134. /* we have ifa->ifa_address/mask here if we need it */
  135. switch (event) {
  136. case NETDEV_DOWN:
  137. nes_debug(NES_DBG_NETDEV, "event:DOWN\n");
  138. nes_write_indexed(nesdev,
  139. NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)), 0);
  140. nes_manage_arp_cache(netdev, netdev->dev_addr,
  141. ntohl(nesvnic->local_ipaddr), NES_ARP_DELETE);
  142. nesvnic->local_ipaddr = 0;
  143. if (is_bonded)
  144. continue;
  145. else
  146. return NOTIFY_OK;
  147. break;
  148. case NETDEV_UP:
  149. nes_debug(NES_DBG_NETDEV, "event:UP\n");
  150. if (nesvnic->local_ipaddr != 0) {
  151. nes_debug(NES_DBG_NETDEV, "Interface already has local_ipaddr\n");
  152. return NOTIFY_OK;
  153. }
  154. /* fall through */
  155. case NETDEV_CHANGEADDR:
  156. /* Add the address to the IP table */
  157. if (upper_dev)
  158. nesvnic->local_ipaddr =
  159. ((struct in_device *)upper_dev->ip_ptr)->ifa_list->ifa_address;
  160. else
  161. nesvnic->local_ipaddr = ifa->ifa_address;
  162. nes_write_indexed(nesdev,
  163. NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)),
  164. ntohl(nesvnic->local_ipaddr));
  165. nes_manage_arp_cache(netdev, netdev->dev_addr,
  166. ntohl(nesvnic->local_ipaddr), NES_ARP_ADD);
  167. if (is_bonded)
  168. continue;
  169. else
  170. return NOTIFY_OK;
  171. break;
  172. default:
  173. break;
  174. }
  175. }
  176. }
  177. return NOTIFY_DONE;
  178. }
  179. /**
  180. * nes_net_event
  181. */
  182. static int nes_net_event(struct notifier_block *notifier,
  183. unsigned long event, void *ptr)
  184. {
  185. struct neighbour *neigh = ptr;
  186. struct nes_device *nesdev;
  187. struct net_device *netdev;
  188. struct nes_vnic *nesvnic;
  189. switch (event) {
  190. case NETEVENT_NEIGH_UPDATE:
  191. list_for_each_entry(nesdev, &nes_dev_list, list) {
  192. /* nes_debug(NES_DBG_NETDEV, "Nesdev list entry = 0x%p.\n", nesdev); */
  193. netdev = nesdev->netdev[0];
  194. nesvnic = netdev_priv(netdev);
  195. if (netdev == neigh->dev) {
  196. if (nesvnic->rdma_enabled == 0) {
  197. nes_debug(NES_DBG_NETDEV, "Skipping device %s since no RDMA\n",
  198. netdev->name);
  199. } else {
  200. if (neigh->nud_state & NUD_VALID) {
  201. nes_manage_arp_cache(neigh->dev, neigh->ha,
  202. ntohl(*(__be32 *)neigh->primary_key), NES_ARP_ADD);
  203. } else {
  204. nes_manage_arp_cache(neigh->dev, neigh->ha,
  205. ntohl(*(__be32 *)neigh->primary_key), NES_ARP_DELETE);
  206. }
  207. }
  208. return NOTIFY_OK;
  209. }
  210. }
  211. break;
  212. default:
  213. nes_debug(NES_DBG_NETDEV, "NETEVENT_ %lu undefined\n", event);
  214. break;
  215. }
  216. return NOTIFY_DONE;
  217. }
  218. /**
  219. * nes_add_ref
  220. */
  221. void nes_add_ref(struct ib_qp *ibqp)
  222. {
  223. struct nes_qp *nesqp;
  224. nesqp = to_nesqp(ibqp);
  225. nes_debug(NES_DBG_QP, "Bumping refcount for QP%u. Pre-inc value = %u\n",
  226. ibqp->qp_num, atomic_read(&nesqp->refcount));
  227. atomic_inc(&nesqp->refcount);
  228. }
  229. static void nes_cqp_rem_ref_callback(struct nes_device *nesdev, struct nes_cqp_request *cqp_request)
  230. {
  231. unsigned long flags;
  232. struct nes_qp *nesqp = cqp_request->cqp_callback_pointer;
  233. struct nes_adapter *nesadapter = nesdev->nesadapter;
  234. atomic_inc(&qps_destroyed);
  235. /* Free the control structures */
  236. if (nesqp->pbl_vbase) {
  237. pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  238. nesqp->hwqp.q2_vbase, nesqp->hwqp.q2_pbase);
  239. spin_lock_irqsave(&nesadapter->pbl_lock, flags);
  240. nesadapter->free_256pbl++;
  241. spin_unlock_irqrestore(&nesadapter->pbl_lock, flags);
  242. pci_free_consistent(nesdev->pcidev, 256, nesqp->pbl_vbase, nesqp->pbl_pbase);
  243. nesqp->pbl_vbase = NULL;
  244. } else {
  245. pci_free_consistent(nesdev->pcidev, nesqp->qp_mem_size,
  246. nesqp->hwqp.sq_vbase, nesqp->hwqp.sq_pbase);
  247. }
  248. nes_free_resource(nesadapter, nesadapter->allocated_qps, nesqp->hwqp.qp_id);
  249. nesadapter->qp_table[nesqp->hwqp.qp_id-NES_FIRST_QPN] = NULL;
  250. kfree(nesqp->allocated_buffer);
  251. }
  252. /**
  253. * nes_rem_ref
  254. */
  255. void nes_rem_ref(struct ib_qp *ibqp)
  256. {
  257. u64 u64temp;
  258. struct nes_qp *nesqp;
  259. struct nes_vnic *nesvnic = to_nesvnic(ibqp->device);
  260. struct nes_device *nesdev = nesvnic->nesdev;
  261. struct nes_hw_cqp_wqe *cqp_wqe;
  262. struct nes_cqp_request *cqp_request;
  263. u32 opcode;
  264. nesqp = to_nesqp(ibqp);
  265. if (atomic_read(&nesqp->refcount) == 0) {
  266. printk(KERN_INFO PFX "%s: Reference count already 0 for QP%d, last aeq = 0x%04X.\n",
  267. __func__, ibqp->qp_num, nesqp->last_aeq);
  268. BUG();
  269. }
  270. if (atomic_dec_and_test(&nesqp->refcount)) {
  271. if (nesqp->pau_mode)
  272. nes_destroy_pau_qp(nesdev, nesqp);
  273. /* Destroy the QP */
  274. cqp_request = nes_get_cqp_request(nesdev);
  275. if (cqp_request == NULL) {
  276. nes_debug(NES_DBG_QP, "Failed to get a cqp_request.\n");
  277. return;
  278. }
  279. cqp_request->waiting = 0;
  280. cqp_request->callback = 1;
  281. cqp_request->cqp_callback = nes_cqp_rem_ref_callback;
  282. cqp_request->cqp_callback_pointer = nesqp;
  283. cqp_wqe = &cqp_request->cqp_wqe;
  284. nes_fill_init_cqp_wqe(cqp_wqe, nesdev);
  285. opcode = NES_CQP_DESTROY_QP | NES_CQP_QP_TYPE_IWARP;
  286. if (nesqp->hte_added) {
  287. opcode |= NES_CQP_QP_DEL_HTE;
  288. nesqp->hte_added = 0;
  289. }
  290. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_OPCODE_IDX, opcode);
  291. set_wqe_32bit_value(cqp_wqe->wqe_words, NES_CQP_WQE_ID_IDX, nesqp->hwqp.qp_id);
  292. u64temp = (u64)nesqp->nesqp_context_pbase;
  293. set_wqe_64bit_value(cqp_wqe->wqe_words, NES_CQP_QP_WQE_CONTEXT_LOW_IDX, u64temp);
  294. nes_post_cqp_request(nesdev, cqp_request);
  295. }
  296. }
  297. /**
  298. * nes_get_qp
  299. */
  300. struct ib_qp *nes_get_qp(struct ib_device *device, int qpn)
  301. {
  302. struct nes_vnic *nesvnic = to_nesvnic(device);
  303. struct nes_device *nesdev = nesvnic->nesdev;
  304. struct nes_adapter *nesadapter = nesdev->nesadapter;
  305. if ((qpn < NES_FIRST_QPN) || (qpn >= (NES_FIRST_QPN + nesadapter->max_qp)))
  306. return NULL;
  307. return &nesadapter->qp_table[qpn - NES_FIRST_QPN]->ibqp;
  308. }
  309. /**
  310. * nes_print_macaddr
  311. */
  312. static void nes_print_macaddr(struct net_device *netdev)
  313. {
  314. nes_debug(NES_DBG_INIT, "%s: %pM, IRQ %u\n",
  315. netdev->name, netdev->dev_addr, netdev->irq);
  316. }
  317. /**
  318. * nes_interrupt - handle interrupts
  319. */
  320. static irqreturn_t nes_interrupt(int irq, void *dev_id)
  321. {
  322. struct nes_device *nesdev = (struct nes_device *)dev_id;
  323. int handled = 0;
  324. u32 int_mask;
  325. u32 int_req;
  326. u32 int_stat;
  327. u32 intf_int_stat;
  328. u32 timer_stat;
  329. if (nesdev->msi_enabled) {
  330. /* No need to read the interrupt pending register if msi is enabled */
  331. handled = 1;
  332. } else {
  333. if (unlikely(nesdev->nesadapter->hw_rev == NE020_REV)) {
  334. /* Master interrupt enable provides synchronization for kicking off bottom half
  335. when interrupt sharing is going on */
  336. int_mask = nes_read32(nesdev->regs + NES_INT_MASK);
  337. if (int_mask & 0x80000000) {
  338. /* Check interrupt status to see if this might be ours */
  339. int_stat = nes_read32(nesdev->regs + NES_INT_STAT);
  340. int_req = nesdev->int_req;
  341. if (int_stat&int_req) {
  342. /* if interesting CEQ or AEQ is pending, claim the interrupt */
  343. if ((int_stat&int_req) & (~(NES_INT_TIMER|NES_INT_INTF))) {
  344. handled = 1;
  345. } else {
  346. if (((int_stat & int_req) & NES_INT_TIMER) == NES_INT_TIMER) {
  347. /* Timer might be running but might be for another function */
  348. timer_stat = nes_read32(nesdev->regs + NES_TIMER_STAT);
  349. if ((timer_stat & nesdev->timer_int_req) != 0) {
  350. handled = 1;
  351. }
  352. }
  353. if ((((int_stat & int_req) & NES_INT_INTF) == NES_INT_INTF) &&
  354. (handled == 0)) {
  355. intf_int_stat = nes_read32(nesdev->regs+NES_INTF_INT_STAT);
  356. if ((intf_int_stat & nesdev->intf_int_req) != 0) {
  357. handled = 1;
  358. }
  359. }
  360. }
  361. if (handled) {
  362. nes_write32(nesdev->regs+NES_INT_MASK, int_mask & (~0x80000000));
  363. int_mask = nes_read32(nesdev->regs+NES_INT_MASK);
  364. /* Save off the status to save an additional read */
  365. nesdev->int_stat = int_stat;
  366. nesdev->napi_isr_ran = 1;
  367. }
  368. }
  369. }
  370. } else {
  371. handled = nes_read32(nesdev->regs+NES_INT_PENDING);
  372. }
  373. }
  374. if (handled) {
  375. if (nes_napi_isr(nesdev) == 0) {
  376. tasklet_schedule(&nesdev->dpc_tasklet);
  377. }
  378. return IRQ_HANDLED;
  379. } else {
  380. return IRQ_NONE;
  381. }
  382. }
  383. /**
  384. * nes_probe - Device initialization
  385. */
  386. static int nes_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
  387. {
  388. struct net_device *netdev = NULL;
  389. struct nes_device *nesdev = NULL;
  390. int ret = 0;
  391. void __iomem *mmio_regs = NULL;
  392. u8 hw_rev;
  393. assert(pcidev != NULL);
  394. assert(ent != NULL);
  395. printk(KERN_INFO PFX "NetEffect RNIC driver v%s loading. (%s)\n",
  396. DRV_VERSION, pci_name(pcidev));
  397. ret = pci_enable_device(pcidev);
  398. if (ret) {
  399. printk(KERN_ERR PFX "Unable to enable PCI device. (%s)\n", pci_name(pcidev));
  400. goto bail0;
  401. }
  402. nes_debug(NES_DBG_INIT, "BAR0 (@0x%08lX) size = 0x%lX bytes\n",
  403. (long unsigned int)pci_resource_start(pcidev, BAR_0),
  404. (long unsigned int)pci_resource_len(pcidev, BAR_0));
  405. nes_debug(NES_DBG_INIT, "BAR1 (@0x%08lX) size = 0x%lX bytes\n",
  406. (long unsigned int)pci_resource_start(pcidev, BAR_1),
  407. (long unsigned int)pci_resource_len(pcidev, BAR_1));
  408. /* Make sure PCI base addr are MMIO */
  409. if (!(pci_resource_flags(pcidev, BAR_0) & IORESOURCE_MEM) ||
  410. !(pci_resource_flags(pcidev, BAR_1) & IORESOURCE_MEM)) {
  411. printk(KERN_ERR PFX "PCI regions not an MMIO resource\n");
  412. ret = -ENODEV;
  413. goto bail1;
  414. }
  415. /* Reserve PCI I/O and memory resources */
  416. ret = pci_request_regions(pcidev, DRV_NAME);
  417. if (ret) {
  418. printk(KERN_ERR PFX "Unable to request regions. (%s)\n", pci_name(pcidev));
  419. goto bail1;
  420. }
  421. if ((sizeof(dma_addr_t) > 4)) {
  422. ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
  423. if (ret < 0) {
  424. printk(KERN_ERR PFX "64b DMA mask configuration failed\n");
  425. goto bail2;
  426. }
  427. ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
  428. if (ret) {
  429. printk(KERN_ERR PFX "64b DMA consistent mask configuration failed\n");
  430. goto bail2;
  431. }
  432. } else {
  433. ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
  434. if (ret < 0) {
  435. printk(KERN_ERR PFX "32b DMA mask configuration failed\n");
  436. goto bail2;
  437. }
  438. ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
  439. if (ret) {
  440. printk(KERN_ERR PFX "32b DMA consistent mask configuration failed\n");
  441. goto bail2;
  442. }
  443. }
  444. pci_set_master(pcidev);
  445. /* Allocate hardware structure */
  446. nesdev = kzalloc(sizeof(struct nes_device), GFP_KERNEL);
  447. if (!nesdev) {
  448. ret = -ENOMEM;
  449. goto bail2;
  450. }
  451. nes_debug(NES_DBG_INIT, "Allocated nes device at %p\n", nesdev);
  452. nesdev->pcidev = pcidev;
  453. pci_set_drvdata(pcidev, nesdev);
  454. pci_read_config_byte(pcidev, 0x0008, &hw_rev);
  455. nes_debug(NES_DBG_INIT, "hw_rev=%u\n", hw_rev);
  456. spin_lock_init(&nesdev->indexed_regs_lock);
  457. /* Remap the PCI registers in adapter BAR0 to kernel VA space */
  458. mmio_regs = ioremap_nocache(pci_resource_start(pcidev, BAR_0),
  459. pci_resource_len(pcidev, BAR_0));
  460. if (mmio_regs == NULL) {
  461. printk(KERN_ERR PFX "Unable to remap BAR0\n");
  462. ret = -EIO;
  463. goto bail3;
  464. }
  465. nesdev->regs = mmio_regs;
  466. nesdev->index_reg = 0x50 + (PCI_FUNC(pcidev->devfn)*8) + mmio_regs;
  467. /* Ensure interrupts are disabled */
  468. nes_write32(nesdev->regs+NES_INT_MASK, 0x7fffffff);
  469. if (nes_drv_opt & NES_DRV_OPT_ENABLE_MSI) {
  470. if (!pci_enable_msi(nesdev->pcidev)) {
  471. nesdev->msi_enabled = 1;
  472. nes_debug(NES_DBG_INIT, "MSI is enabled for device %s\n",
  473. pci_name(pcidev));
  474. } else {
  475. nes_debug(NES_DBG_INIT, "MSI is disabled by linux for device %s\n",
  476. pci_name(pcidev));
  477. }
  478. } else {
  479. nes_debug(NES_DBG_INIT, "MSI not requested due to driver options for device %s\n",
  480. pci_name(pcidev));
  481. }
  482. nesdev->csr_start = pci_resource_start(nesdev->pcidev, BAR_0);
  483. nesdev->doorbell_region = pci_resource_start(nesdev->pcidev, BAR_1);
  484. /* Init the adapter */
  485. nesdev->nesadapter = nes_init_adapter(nesdev, hw_rev);
  486. if (!nesdev->nesadapter) {
  487. printk(KERN_ERR PFX "Unable to initialize adapter.\n");
  488. ret = -ENOMEM;
  489. goto bail5;
  490. }
  491. nesdev->nesadapter->et_rx_coalesce_usecs_irq = interrupt_mod_interval;
  492. nesdev->nesadapter->wqm_quanta = wqm_quanta;
  493. /* nesdev->base_doorbell_index =
  494. nesdev->nesadapter->pd_config_base[PCI_FUNC(nesdev->pcidev->devfn)]; */
  495. nesdev->base_doorbell_index = 1;
  496. nesdev->doorbell_start = nesdev->nesadapter->doorbell_start;
  497. if (nesdev->nesadapter->phy_type[0] == NES_PHY_TYPE_PUMA_1G) {
  498. switch (PCI_FUNC(nesdev->pcidev->devfn) %
  499. nesdev->nesadapter->port_count) {
  500. case 1:
  501. nesdev->mac_index = 2;
  502. break;
  503. case 2:
  504. nesdev->mac_index = 1;
  505. break;
  506. case 3:
  507. nesdev->mac_index = 3;
  508. break;
  509. case 0:
  510. default:
  511. nesdev->mac_index = 0;
  512. }
  513. } else {
  514. nesdev->mac_index = PCI_FUNC(nesdev->pcidev->devfn) %
  515. nesdev->nesadapter->port_count;
  516. }
  517. if ((limit_maxrdreqsz ||
  518. ((nesdev->nesadapter->phy_type[0] == NES_PHY_TYPE_GLADIUS) &&
  519. (hw_rev == NE020_REV1))) &&
  520. (pcie_get_readrq(pcidev) > 256)) {
  521. if (pcie_set_readrq(pcidev, 256))
  522. printk(KERN_ERR PFX "Unable to set max read request"
  523. " to 256 bytes\n");
  524. else
  525. nes_debug(NES_DBG_INIT, "Max read request size set"
  526. " to 256 bytes\n");
  527. }
  528. tasklet_init(&nesdev->dpc_tasklet, nes_dpc, (unsigned long)nesdev);
  529. /* bring up the Control QP */
  530. if (nes_init_cqp(nesdev)) {
  531. ret = -ENODEV;
  532. goto bail6;
  533. }
  534. /* Arm the CCQ */
  535. nes_write32(nesdev->regs+NES_CQE_ALLOC, NES_CQE_ALLOC_NOTIFY_NEXT |
  536. PCI_FUNC(nesdev->pcidev->devfn));
  537. nes_read32(nesdev->regs+NES_CQE_ALLOC);
  538. /* Enable the interrupts */
  539. nesdev->int_req = (0x101 << PCI_FUNC(nesdev->pcidev->devfn)) |
  540. (1 << (PCI_FUNC(nesdev->pcidev->devfn)+16));
  541. if (PCI_FUNC(nesdev->pcidev->devfn) < 4) {
  542. nesdev->int_req |= (1 << (PCI_FUNC(nesdev->mac_index)+24));
  543. }
  544. /* TODO: This really should be the first driver to load, not function 0 */
  545. if (PCI_FUNC(nesdev->pcidev->devfn) == 0) {
  546. /* pick up PCI and critical errors if the first driver to load */
  547. nesdev->intf_int_req = NES_INTF_INT_PCIERR | NES_INTF_INT_CRITERR;
  548. nesdev->int_req |= NES_INT_INTF;
  549. } else {
  550. nesdev->intf_int_req = 0;
  551. }
  552. nesdev->intf_int_req |= (1 << (PCI_FUNC(nesdev->pcidev->devfn)+16));
  553. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS0, 0);
  554. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS1, 0);
  555. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS2, 0x00001265);
  556. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS4, 0x18021804);
  557. nes_write_indexed(nesdev, NES_IDX_DEBUG_ERROR_MASKS3, 0x17801790);
  558. /* deal with both periodic and one_shot */
  559. nesdev->timer_int_req = 0x101 << PCI_FUNC(nesdev->pcidev->devfn);
  560. nesdev->nesadapter->timer_int_req |= nesdev->timer_int_req;
  561. nes_debug(NES_DBG_INIT, "setting int_req for function %u, nesdev = 0x%04X, adapter = 0x%04X\n",
  562. PCI_FUNC(nesdev->pcidev->devfn),
  563. nesdev->timer_int_req, nesdev->nesadapter->timer_int_req);
  564. nes_write32(nesdev->regs+NES_INTF_INT_MASK, ~(nesdev->intf_int_req));
  565. list_add_tail(&nesdev->list, &nes_dev_list);
  566. /* Request an interrupt line for the driver */
  567. ret = request_irq(pcidev->irq, nes_interrupt, IRQF_SHARED, DRV_NAME, nesdev);
  568. if (ret) {
  569. printk(KERN_ERR PFX "%s: requested IRQ %u is busy\n",
  570. pci_name(pcidev), pcidev->irq);
  571. goto bail65;
  572. }
  573. nes_write32(nesdev->regs+NES_INT_MASK, ~nesdev->int_req);
  574. if (nes_notifiers_registered == 0) {
  575. register_inetaddr_notifier(&nes_inetaddr_notifier);
  576. register_netevent_notifier(&nes_net_notifier);
  577. }
  578. nes_notifiers_registered++;
  579. INIT_DELAYED_WORK(&nesdev->work, nes_recheck_link_status);
  580. /* Initialize network devices */
  581. netdev = nes_netdev_init(nesdev, mmio_regs);
  582. if (netdev == NULL) {
  583. ret = -ENOMEM;
  584. goto bail7;
  585. }
  586. /* Register network device */
  587. ret = register_netdev(netdev);
  588. if (ret) {
  589. printk(KERN_ERR PFX "Unable to register netdev, ret = %d\n", ret);
  590. nes_netdev_destroy(netdev);
  591. goto bail7;
  592. }
  593. nes_print_macaddr(netdev);
  594. nesdev->netdev_count++;
  595. nesdev->nesadapter->netdev_count++;
  596. printk(KERN_INFO PFX "%s: NetEffect RNIC driver successfully loaded.\n",
  597. pci_name(pcidev));
  598. return 0;
  599. bail7:
  600. printk(KERN_ERR PFX "bail7\n");
  601. while (nesdev->netdev_count > 0) {
  602. nesdev->netdev_count--;
  603. nesdev->nesadapter->netdev_count--;
  604. unregister_netdev(nesdev->netdev[nesdev->netdev_count]);
  605. nes_netdev_destroy(nesdev->netdev[nesdev->netdev_count]);
  606. }
  607. nes_debug(NES_DBG_INIT, "netdev_count=%d, nesadapter->netdev_count=%d\n",
  608. nesdev->netdev_count, nesdev->nesadapter->netdev_count);
  609. nes_notifiers_registered--;
  610. if (nes_notifiers_registered == 0) {
  611. unregister_netevent_notifier(&nes_net_notifier);
  612. unregister_inetaddr_notifier(&nes_inetaddr_notifier);
  613. }
  614. list_del(&nesdev->list);
  615. nes_destroy_cqp(nesdev);
  616. bail65:
  617. printk(KERN_ERR PFX "bail65\n");
  618. free_irq(pcidev->irq, nesdev);
  619. if (nesdev->msi_enabled) {
  620. pci_disable_msi(pcidev);
  621. }
  622. bail6:
  623. printk(KERN_ERR PFX "bail6\n");
  624. tasklet_kill(&nesdev->dpc_tasklet);
  625. /* Deallocate the Adapter Structure */
  626. nes_destroy_adapter(nesdev->nesadapter);
  627. bail5:
  628. printk(KERN_ERR PFX "bail5\n");
  629. iounmap(nesdev->regs);
  630. bail3:
  631. printk(KERN_ERR PFX "bail3\n");
  632. kfree(nesdev);
  633. bail2:
  634. pci_release_regions(pcidev);
  635. bail1:
  636. pci_disable_device(pcidev);
  637. bail0:
  638. return ret;
  639. }
  640. /**
  641. * nes_remove - unload from kernel
  642. */
  643. static void nes_remove(struct pci_dev *pcidev)
  644. {
  645. struct nes_device *nesdev = pci_get_drvdata(pcidev);
  646. struct net_device *netdev;
  647. int netdev_index = 0;
  648. unsigned long flags;
  649. if (nesdev->netdev_count) {
  650. netdev = nesdev->netdev[netdev_index];
  651. if (netdev) {
  652. netif_stop_queue(netdev);
  653. unregister_netdev(netdev);
  654. nes_netdev_destroy(netdev);
  655. nesdev->netdev[netdev_index] = NULL;
  656. nesdev->netdev_count--;
  657. nesdev->nesadapter->netdev_count--;
  658. }
  659. }
  660. nes_notifiers_registered--;
  661. if (nes_notifiers_registered == 0) {
  662. unregister_netevent_notifier(&nes_net_notifier);
  663. unregister_inetaddr_notifier(&nes_inetaddr_notifier);
  664. }
  665. list_del(&nesdev->list);
  666. nes_destroy_cqp(nesdev);
  667. free_irq(pcidev->irq, nesdev);
  668. tasklet_kill(&nesdev->dpc_tasklet);
  669. spin_lock_irqsave(&nesdev->nesadapter->phy_lock, flags);
  670. if (nesdev->link_recheck) {
  671. spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
  672. cancel_delayed_work_sync(&nesdev->work);
  673. } else {
  674. spin_unlock_irqrestore(&nesdev->nesadapter->phy_lock, flags);
  675. }
  676. /* Deallocate the Adapter Structure */
  677. nes_destroy_adapter(nesdev->nesadapter);
  678. if (nesdev->msi_enabled) {
  679. pci_disable_msi(pcidev);
  680. }
  681. iounmap(nesdev->regs);
  682. kfree(nesdev);
  683. /* nes_debug(NES_DBG_SHUTDOWN, "calling pci_release_regions.\n"); */
  684. pci_release_regions(pcidev);
  685. pci_disable_device(pcidev);
  686. pci_set_drvdata(pcidev, NULL);
  687. }
  688. static ssize_t adapter_show(struct device_driver *ddp, char *buf)
  689. {
  690. unsigned int devfn = 0xffffffff;
  691. unsigned char bus_number = 0xff;
  692. unsigned int i = 0;
  693. struct nes_device *nesdev;
  694. list_for_each_entry(nesdev, &nes_dev_list, list) {
  695. if (i == ee_flsh_adapter) {
  696. devfn = nesdev->pcidev->devfn;
  697. bus_number = nesdev->pcidev->bus->number;
  698. break;
  699. }
  700. i++;
  701. }
  702. return snprintf(buf, PAGE_SIZE, "%x:%x\n", bus_number, devfn);
  703. }
  704. static ssize_t adapter_store(struct device_driver *ddp,
  705. const char *buf, size_t count)
  706. {
  707. char *p = (char *)buf;
  708. ee_flsh_adapter = simple_strtoul(p, &p, 10);
  709. return strnlen(buf, count);
  710. }
  711. static ssize_t eeprom_cmd_show(struct device_driver *ddp, char *buf)
  712. {
  713. u32 eeprom_cmd = 0xdead;
  714. u32 i = 0;
  715. struct nes_device *nesdev;
  716. list_for_each_entry(nesdev, &nes_dev_list, list) {
  717. if (i == ee_flsh_adapter) {
  718. eeprom_cmd = nes_read32(nesdev->regs + NES_EEPROM_COMMAND);
  719. break;
  720. }
  721. i++;
  722. }
  723. return snprintf(buf, PAGE_SIZE, "0x%x\n", eeprom_cmd);
  724. }
  725. static ssize_t eeprom_cmd_store(struct device_driver *ddp,
  726. const char *buf, size_t count)
  727. {
  728. char *p = (char *)buf;
  729. u32 val;
  730. u32 i = 0;
  731. struct nes_device *nesdev;
  732. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  733. val = simple_strtoul(p, &p, 16);
  734. list_for_each_entry(nesdev, &nes_dev_list, list) {
  735. if (i == ee_flsh_adapter) {
  736. nes_write32(nesdev->regs + NES_EEPROM_COMMAND, val);
  737. break;
  738. }
  739. i++;
  740. }
  741. }
  742. return strnlen(buf, count);
  743. }
  744. static ssize_t eeprom_data_show(struct device_driver *ddp, char *buf)
  745. {
  746. u32 eeprom_data = 0xdead;
  747. u32 i = 0;
  748. struct nes_device *nesdev;
  749. list_for_each_entry(nesdev, &nes_dev_list, list) {
  750. if (i == ee_flsh_adapter) {
  751. eeprom_data = nes_read32(nesdev->regs + NES_EEPROM_DATA);
  752. break;
  753. }
  754. i++;
  755. }
  756. return snprintf(buf, PAGE_SIZE, "0x%x\n", eeprom_data);
  757. }
  758. static ssize_t eeprom_data_store(struct device_driver *ddp,
  759. const char *buf, size_t count)
  760. {
  761. char *p = (char *)buf;
  762. u32 val;
  763. u32 i = 0;
  764. struct nes_device *nesdev;
  765. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  766. val = simple_strtoul(p, &p, 16);
  767. list_for_each_entry(nesdev, &nes_dev_list, list) {
  768. if (i == ee_flsh_adapter) {
  769. nes_write32(nesdev->regs + NES_EEPROM_DATA, val);
  770. break;
  771. }
  772. i++;
  773. }
  774. }
  775. return strnlen(buf, count);
  776. }
  777. static ssize_t flash_cmd_show(struct device_driver *ddp, char *buf)
  778. {
  779. u32 flash_cmd = 0xdead;
  780. u32 i = 0;
  781. struct nes_device *nesdev;
  782. list_for_each_entry(nesdev, &nes_dev_list, list) {
  783. if (i == ee_flsh_adapter) {
  784. flash_cmd = nes_read32(nesdev->regs + NES_FLASH_COMMAND);
  785. break;
  786. }
  787. i++;
  788. }
  789. return snprintf(buf, PAGE_SIZE, "0x%x\n", flash_cmd);
  790. }
  791. static ssize_t flash_cmd_store(struct device_driver *ddp,
  792. const char *buf, size_t count)
  793. {
  794. char *p = (char *)buf;
  795. u32 val;
  796. u32 i = 0;
  797. struct nes_device *nesdev;
  798. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  799. val = simple_strtoul(p, &p, 16);
  800. list_for_each_entry(nesdev, &nes_dev_list, list) {
  801. if (i == ee_flsh_adapter) {
  802. nes_write32(nesdev->regs + NES_FLASH_COMMAND, val);
  803. break;
  804. }
  805. i++;
  806. }
  807. }
  808. return strnlen(buf, count);
  809. }
  810. static ssize_t flash_data_show(struct device_driver *ddp, char *buf)
  811. {
  812. u32 flash_data = 0xdead;
  813. u32 i = 0;
  814. struct nes_device *nesdev;
  815. list_for_each_entry(nesdev, &nes_dev_list, list) {
  816. if (i == ee_flsh_adapter) {
  817. flash_data = nes_read32(nesdev->regs + NES_FLASH_DATA);
  818. break;
  819. }
  820. i++;
  821. }
  822. return snprintf(buf, PAGE_SIZE, "0x%x\n", flash_data);
  823. }
  824. static ssize_t flash_data_store(struct device_driver *ddp,
  825. const char *buf, size_t count)
  826. {
  827. char *p = (char *)buf;
  828. u32 val;
  829. u32 i = 0;
  830. struct nes_device *nesdev;
  831. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  832. val = simple_strtoul(p, &p, 16);
  833. list_for_each_entry(nesdev, &nes_dev_list, list) {
  834. if (i == ee_flsh_adapter) {
  835. nes_write32(nesdev->regs + NES_FLASH_DATA, val);
  836. break;
  837. }
  838. i++;
  839. }
  840. }
  841. return strnlen(buf, count);
  842. }
  843. static ssize_t nonidx_addr_show(struct device_driver *ddp, char *buf)
  844. {
  845. return snprintf(buf, PAGE_SIZE, "0x%x\n", sysfs_nonidx_addr);
  846. }
  847. static ssize_t nonidx_addr_store(struct device_driver *ddp,
  848. const char *buf, size_t count)
  849. {
  850. char *p = (char *)buf;
  851. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X')
  852. sysfs_nonidx_addr = simple_strtoul(p, &p, 16);
  853. return strnlen(buf, count);
  854. }
  855. static ssize_t nonidx_data_show(struct device_driver *ddp, char *buf)
  856. {
  857. u32 nonidx_data = 0xdead;
  858. u32 i = 0;
  859. struct nes_device *nesdev;
  860. list_for_each_entry(nesdev, &nes_dev_list, list) {
  861. if (i == ee_flsh_adapter) {
  862. nonidx_data = nes_read32(nesdev->regs + sysfs_nonidx_addr);
  863. break;
  864. }
  865. i++;
  866. }
  867. return snprintf(buf, PAGE_SIZE, "0x%x\n", nonidx_data);
  868. }
  869. static ssize_t nonidx_data_store(struct device_driver *ddp,
  870. const char *buf, size_t count)
  871. {
  872. char *p = (char *)buf;
  873. u32 val;
  874. u32 i = 0;
  875. struct nes_device *nesdev;
  876. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  877. val = simple_strtoul(p, &p, 16);
  878. list_for_each_entry(nesdev, &nes_dev_list, list) {
  879. if (i == ee_flsh_adapter) {
  880. nes_write32(nesdev->regs + sysfs_nonidx_addr, val);
  881. break;
  882. }
  883. i++;
  884. }
  885. }
  886. return strnlen(buf, count);
  887. }
  888. static ssize_t idx_addr_show(struct device_driver *ddp, char *buf)
  889. {
  890. return snprintf(buf, PAGE_SIZE, "0x%x\n", sysfs_idx_addr);
  891. }
  892. static ssize_t idx_addr_store(struct device_driver *ddp,
  893. const char *buf, size_t count)
  894. {
  895. char *p = (char *)buf;
  896. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X')
  897. sysfs_idx_addr = simple_strtoul(p, &p, 16);
  898. return strnlen(buf, count);
  899. }
  900. static ssize_t idx_data_show(struct device_driver *ddp, char *buf)
  901. {
  902. u32 idx_data = 0xdead;
  903. u32 i = 0;
  904. struct nes_device *nesdev;
  905. list_for_each_entry(nesdev, &nes_dev_list, list) {
  906. if (i == ee_flsh_adapter) {
  907. idx_data = nes_read_indexed(nesdev, sysfs_idx_addr);
  908. break;
  909. }
  910. i++;
  911. }
  912. return snprintf(buf, PAGE_SIZE, "0x%x\n", idx_data);
  913. }
  914. static ssize_t idx_data_store(struct device_driver *ddp,
  915. const char *buf, size_t count)
  916. {
  917. char *p = (char *)buf;
  918. u32 val;
  919. u32 i = 0;
  920. struct nes_device *nesdev;
  921. if (p[1] == 'x' || p[1] == 'X' || p[0] == 'x' || p[0] == 'X') {
  922. val = simple_strtoul(p, &p, 16);
  923. list_for_each_entry(nesdev, &nes_dev_list, list) {
  924. if (i == ee_flsh_adapter) {
  925. nes_write_indexed(nesdev, sysfs_idx_addr, val);
  926. break;
  927. }
  928. i++;
  929. }
  930. }
  931. return strnlen(buf, count);
  932. }
  933. static ssize_t wqm_quanta_show(struct device_driver *ddp, char *buf)
  934. {
  935. u32 wqm_quanta_value = 0xdead;
  936. u32 i = 0;
  937. struct nes_device *nesdev;
  938. list_for_each_entry(nesdev, &nes_dev_list, list) {
  939. if (i == ee_flsh_adapter) {
  940. wqm_quanta_value = nesdev->nesadapter->wqm_quanta;
  941. break;
  942. }
  943. i++;
  944. }
  945. return snprintf(buf, PAGE_SIZE, "0x%X\n", wqm_quanta_value);
  946. }
  947. static ssize_t wqm_quanta_store(struct device_driver *ddp, const char *buf,
  948. size_t count)
  949. {
  950. unsigned long wqm_quanta_value;
  951. u32 wqm_config1;
  952. u32 i = 0;
  953. struct nes_device *nesdev;
  954. if (kstrtoul(buf, 0, &wqm_quanta_value) < 0)
  955. return -EINVAL;
  956. list_for_each_entry(nesdev, &nes_dev_list, list) {
  957. if (i == ee_flsh_adapter) {
  958. nesdev->nesadapter->wqm_quanta = wqm_quanta_value;
  959. wqm_config1 = nes_read_indexed(nesdev,
  960. NES_IDX_WQM_CONFIG1);
  961. nes_write_indexed(nesdev, NES_IDX_WQM_CONFIG1,
  962. ((wqm_quanta_value << 1) |
  963. (wqm_config1 & 0x00000001)));
  964. break;
  965. }
  966. i++;
  967. }
  968. return strnlen(buf, count);
  969. }
  970. static DRIVER_ATTR_RW(adapter);
  971. static DRIVER_ATTR_RW(eeprom_cmd);
  972. static DRIVER_ATTR_RW(eeprom_data);
  973. static DRIVER_ATTR_RW(flash_cmd);
  974. static DRIVER_ATTR_RW(flash_data);
  975. static DRIVER_ATTR_RW(nonidx_addr);
  976. static DRIVER_ATTR_RW(nonidx_data);
  977. static DRIVER_ATTR_RW(idx_addr);
  978. static DRIVER_ATTR_RW(idx_data);
  979. static DRIVER_ATTR_RW(wqm_quanta);
  980. static struct attribute *nes_attrs[] = {
  981. &driver_attr_adapter.attr,
  982. &driver_attr_eeprom_cmd.attr,
  983. &driver_attr_eeprom_data.attr,
  984. &driver_attr_flash_cmd.attr,
  985. &driver_attr_flash_data.attr,
  986. &driver_attr_nonidx_addr.attr,
  987. &driver_attr_nonidx_data.attr,
  988. &driver_attr_idx_addr.attr,
  989. &driver_attr_idx_data.attr,
  990. &driver_attr_wqm_quanta.attr,
  991. NULL,
  992. };
  993. ATTRIBUTE_GROUPS(nes);
  994. static struct pci_driver nes_pci_driver = {
  995. .name = DRV_NAME,
  996. .id_table = nes_pci_table,
  997. .probe = nes_probe,
  998. .remove = nes_remove,
  999. .groups = nes_groups,
  1000. };
  1001. /**
  1002. * nes_init_module - module initialization entry point
  1003. */
  1004. static int __init nes_init_module(void)
  1005. {
  1006. int retval;
  1007. retval = nes_cm_start();
  1008. if (retval) {
  1009. printk(KERN_ERR PFX "Unable to start NetEffect iWARP CM.\n");
  1010. return retval;
  1011. }
  1012. return pci_register_driver(&nes_pci_driver);
  1013. }
  1014. /**
  1015. * nes_exit_module - module unload entry point
  1016. */
  1017. static void __exit nes_exit_module(void)
  1018. {
  1019. nes_cm_stop();
  1020. pci_unregister_driver(&nes_pci_driver);
  1021. }
  1022. module_init(nes_init_module);
  1023. module_exit(nes_exit_module);