i40iw_utils.c 41 KB

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  1. /*******************************************************************************
  2. *
  3. * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenFabrics.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. *******************************************************************************/
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/etherdevice.h>
  38. #include <linux/ethtool.h>
  39. #include <linux/mii.h>
  40. #include <linux/if_vlan.h>
  41. #include <linux/crc32.h>
  42. #include <linux/in.h>
  43. #include <linux/ip.h>
  44. #include <linux/tcp.h>
  45. #include <linux/init.h>
  46. #include <linux/io.h>
  47. #include <asm/irq.h>
  48. #include <asm/byteorder.h>
  49. #include <net/netevent.h>
  50. #include <net/neighbour.h>
  51. #include "i40iw.h"
  52. /**
  53. * i40iw_arp_table - manage arp table
  54. * @iwdev: iwarp device
  55. * @ip_addr: ip address for device
  56. * @mac_addr: mac address ptr
  57. * @action: modify, delete or add
  58. */
  59. int i40iw_arp_table(struct i40iw_device *iwdev,
  60. u32 *ip_addr,
  61. bool ipv4,
  62. u8 *mac_addr,
  63. u32 action)
  64. {
  65. int arp_index;
  66. int err;
  67. u32 ip[4];
  68. if (ipv4) {
  69. memset(ip, 0, sizeof(ip));
  70. ip[0] = *ip_addr;
  71. } else {
  72. memcpy(ip, ip_addr, sizeof(ip));
  73. }
  74. for (arp_index = 0; (u32)arp_index < iwdev->arp_table_size; arp_index++)
  75. if (memcmp(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip)) == 0)
  76. break;
  77. switch (action) {
  78. case I40IW_ARP_ADD:
  79. if (arp_index != iwdev->arp_table_size)
  80. return -1;
  81. arp_index = 0;
  82. err = i40iw_alloc_resource(iwdev, iwdev->allocated_arps,
  83. iwdev->arp_table_size,
  84. (u32 *)&arp_index,
  85. &iwdev->next_arp_index);
  86. if (err)
  87. return err;
  88. memcpy(iwdev->arp_table[arp_index].ip_addr, ip, sizeof(ip));
  89. ether_addr_copy(iwdev->arp_table[arp_index].mac_addr, mac_addr);
  90. break;
  91. case I40IW_ARP_RESOLVE:
  92. if (arp_index == iwdev->arp_table_size)
  93. return -1;
  94. break;
  95. case I40IW_ARP_DELETE:
  96. if (arp_index == iwdev->arp_table_size)
  97. return -1;
  98. memset(iwdev->arp_table[arp_index].ip_addr, 0,
  99. sizeof(iwdev->arp_table[arp_index].ip_addr));
  100. eth_zero_addr(iwdev->arp_table[arp_index].mac_addr);
  101. i40iw_free_resource(iwdev, iwdev->allocated_arps, arp_index);
  102. break;
  103. default:
  104. return -1;
  105. }
  106. return arp_index;
  107. }
  108. /**
  109. * i40iw_wr32 - write 32 bits to hw register
  110. * @hw: hardware information including registers
  111. * @reg: register offset
  112. * @value: vvalue to write to register
  113. */
  114. inline void i40iw_wr32(struct i40iw_hw *hw, u32 reg, u32 value)
  115. {
  116. writel(value, hw->hw_addr + reg);
  117. }
  118. /**
  119. * i40iw_rd32 - read a 32 bit hw register
  120. * @hw: hardware information including registers
  121. * @reg: register offset
  122. *
  123. * Return value of register content
  124. */
  125. inline u32 i40iw_rd32(struct i40iw_hw *hw, u32 reg)
  126. {
  127. return readl(hw->hw_addr + reg);
  128. }
  129. /**
  130. * i40iw_inetaddr_event - system notifier for netdev events
  131. * @notfier: not used
  132. * @event: event for notifier
  133. * @ptr: if address
  134. */
  135. int i40iw_inetaddr_event(struct notifier_block *notifier,
  136. unsigned long event,
  137. void *ptr)
  138. {
  139. struct in_ifaddr *ifa = ptr;
  140. struct net_device *event_netdev = ifa->ifa_dev->dev;
  141. struct net_device *netdev;
  142. struct net_device *upper_dev;
  143. struct i40iw_device *iwdev;
  144. struct i40iw_handler *hdl;
  145. u32 local_ipaddr;
  146. u32 action = I40IW_ARP_ADD;
  147. hdl = i40iw_find_netdev(event_netdev);
  148. if (!hdl)
  149. return NOTIFY_DONE;
  150. iwdev = &hdl->device;
  151. if (iwdev->init_state < IP_ADDR_REGISTERED || iwdev->closing)
  152. return NOTIFY_DONE;
  153. netdev = iwdev->ldev->netdev;
  154. upper_dev = netdev_master_upper_dev_get(netdev);
  155. if (netdev != event_netdev)
  156. return NOTIFY_DONE;
  157. if (upper_dev)
  158. local_ipaddr = ntohl(
  159. ((struct in_device *)upper_dev->ip_ptr)->ifa_list->ifa_address);
  160. else
  161. local_ipaddr = ntohl(ifa->ifa_address);
  162. switch (event) {
  163. case NETDEV_DOWN:
  164. action = I40IW_ARP_DELETE;
  165. /* Fall through */
  166. case NETDEV_UP:
  167. /* Fall through */
  168. case NETDEV_CHANGEADDR:
  169. i40iw_manage_arp_cache(iwdev,
  170. netdev->dev_addr,
  171. &local_ipaddr,
  172. true,
  173. action);
  174. i40iw_if_notify(iwdev, netdev, &local_ipaddr, true,
  175. (action == I40IW_ARP_ADD) ? true : false);
  176. break;
  177. default:
  178. break;
  179. }
  180. return NOTIFY_DONE;
  181. }
  182. /**
  183. * i40iw_inet6addr_event - system notifier for ipv6 netdev events
  184. * @notfier: not used
  185. * @event: event for notifier
  186. * @ptr: if address
  187. */
  188. int i40iw_inet6addr_event(struct notifier_block *notifier,
  189. unsigned long event,
  190. void *ptr)
  191. {
  192. struct inet6_ifaddr *ifa = (struct inet6_ifaddr *)ptr;
  193. struct net_device *event_netdev = ifa->idev->dev;
  194. struct net_device *netdev;
  195. struct i40iw_device *iwdev;
  196. struct i40iw_handler *hdl;
  197. u32 local_ipaddr6[4];
  198. u32 action = I40IW_ARP_ADD;
  199. hdl = i40iw_find_netdev(event_netdev);
  200. if (!hdl)
  201. return NOTIFY_DONE;
  202. iwdev = &hdl->device;
  203. if (iwdev->init_state < IP_ADDR_REGISTERED || iwdev->closing)
  204. return NOTIFY_DONE;
  205. netdev = iwdev->ldev->netdev;
  206. if (netdev != event_netdev)
  207. return NOTIFY_DONE;
  208. i40iw_copy_ip_ntohl(local_ipaddr6, ifa->addr.in6_u.u6_addr32);
  209. switch (event) {
  210. case NETDEV_DOWN:
  211. action = I40IW_ARP_DELETE;
  212. /* Fall through */
  213. case NETDEV_UP:
  214. /* Fall through */
  215. case NETDEV_CHANGEADDR:
  216. i40iw_manage_arp_cache(iwdev,
  217. netdev->dev_addr,
  218. local_ipaddr6,
  219. false,
  220. action);
  221. i40iw_if_notify(iwdev, netdev, local_ipaddr6, false,
  222. (action == I40IW_ARP_ADD) ? true : false);
  223. break;
  224. default:
  225. break;
  226. }
  227. return NOTIFY_DONE;
  228. }
  229. /**
  230. * i40iw_net_event - system notifier for net events
  231. * @notfier: not used
  232. * @event: event for notifier
  233. * @ptr: neighbor
  234. */
  235. int i40iw_net_event(struct notifier_block *notifier, unsigned long event, void *ptr)
  236. {
  237. struct neighbour *neigh = ptr;
  238. struct i40iw_device *iwdev;
  239. struct i40iw_handler *iwhdl;
  240. __be32 *p;
  241. u32 local_ipaddr[4];
  242. switch (event) {
  243. case NETEVENT_NEIGH_UPDATE:
  244. iwhdl = i40iw_find_netdev((struct net_device *)neigh->dev);
  245. if (!iwhdl)
  246. return NOTIFY_DONE;
  247. iwdev = &iwhdl->device;
  248. if (iwdev->init_state < IP_ADDR_REGISTERED || iwdev->closing)
  249. return NOTIFY_DONE;
  250. p = (__be32 *)neigh->primary_key;
  251. i40iw_copy_ip_ntohl(local_ipaddr, p);
  252. if (neigh->nud_state & NUD_VALID) {
  253. i40iw_manage_arp_cache(iwdev,
  254. neigh->ha,
  255. local_ipaddr,
  256. false,
  257. I40IW_ARP_ADD);
  258. } else {
  259. i40iw_manage_arp_cache(iwdev,
  260. neigh->ha,
  261. local_ipaddr,
  262. false,
  263. I40IW_ARP_DELETE);
  264. }
  265. break;
  266. default:
  267. break;
  268. }
  269. return NOTIFY_DONE;
  270. }
  271. /**
  272. * i40iw_get_cqp_request - get cqp struct
  273. * @cqp: device cqp ptr
  274. * @wait: cqp to be used in wait mode
  275. */
  276. struct i40iw_cqp_request *i40iw_get_cqp_request(struct i40iw_cqp *cqp, bool wait)
  277. {
  278. struct i40iw_cqp_request *cqp_request = NULL;
  279. unsigned long flags;
  280. spin_lock_irqsave(&cqp->req_lock, flags);
  281. if (!list_empty(&cqp->cqp_avail_reqs)) {
  282. cqp_request = list_entry(cqp->cqp_avail_reqs.next,
  283. struct i40iw_cqp_request, list);
  284. list_del_init(&cqp_request->list);
  285. }
  286. spin_unlock_irqrestore(&cqp->req_lock, flags);
  287. if (!cqp_request) {
  288. cqp_request = kzalloc(sizeof(*cqp_request), GFP_ATOMIC);
  289. if (cqp_request) {
  290. cqp_request->dynamic = true;
  291. INIT_LIST_HEAD(&cqp_request->list);
  292. init_waitqueue_head(&cqp_request->waitq);
  293. }
  294. }
  295. if (!cqp_request) {
  296. i40iw_pr_err("CQP Request Fail: No Memory");
  297. return NULL;
  298. }
  299. if (wait) {
  300. atomic_set(&cqp_request->refcount, 2);
  301. cqp_request->waiting = true;
  302. } else {
  303. atomic_set(&cqp_request->refcount, 1);
  304. }
  305. return cqp_request;
  306. }
  307. /**
  308. * i40iw_free_cqp_request - free cqp request
  309. * @cqp: cqp ptr
  310. * @cqp_request: to be put back in cqp list
  311. */
  312. void i40iw_free_cqp_request(struct i40iw_cqp *cqp, struct i40iw_cqp_request *cqp_request)
  313. {
  314. struct i40iw_device *iwdev = container_of(cqp, struct i40iw_device, cqp);
  315. unsigned long flags;
  316. if (cqp_request->dynamic) {
  317. kfree(cqp_request);
  318. } else {
  319. cqp_request->request_done = false;
  320. cqp_request->callback_fcn = NULL;
  321. cqp_request->waiting = false;
  322. spin_lock_irqsave(&cqp->req_lock, flags);
  323. list_add_tail(&cqp_request->list, &cqp->cqp_avail_reqs);
  324. spin_unlock_irqrestore(&cqp->req_lock, flags);
  325. }
  326. wake_up(&iwdev->close_wq);
  327. }
  328. /**
  329. * i40iw_put_cqp_request - dec ref count and free if 0
  330. * @cqp: cqp ptr
  331. * @cqp_request: to be put back in cqp list
  332. */
  333. void i40iw_put_cqp_request(struct i40iw_cqp *cqp,
  334. struct i40iw_cqp_request *cqp_request)
  335. {
  336. if (atomic_dec_and_test(&cqp_request->refcount))
  337. i40iw_free_cqp_request(cqp, cqp_request);
  338. }
  339. /**
  340. * i40iw_free_pending_cqp_request -free pending cqp request objs
  341. * @cqp: cqp ptr
  342. * @cqp_request: to be put back in cqp list
  343. */
  344. static void i40iw_free_pending_cqp_request(struct i40iw_cqp *cqp,
  345. struct i40iw_cqp_request *cqp_request)
  346. {
  347. struct i40iw_device *iwdev = container_of(cqp, struct i40iw_device, cqp);
  348. if (cqp_request->waiting) {
  349. cqp_request->compl_info.error = true;
  350. cqp_request->request_done = true;
  351. wake_up(&cqp_request->waitq);
  352. }
  353. i40iw_put_cqp_request(cqp, cqp_request);
  354. wait_event_timeout(iwdev->close_wq,
  355. !atomic_read(&cqp_request->refcount),
  356. 1000);
  357. }
  358. /**
  359. * i40iw_cleanup_pending_cqp_op - clean-up cqp with no completions
  360. * @iwdev: iwarp device
  361. */
  362. void i40iw_cleanup_pending_cqp_op(struct i40iw_device *iwdev)
  363. {
  364. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  365. struct i40iw_cqp *cqp = &iwdev->cqp;
  366. struct i40iw_cqp_request *cqp_request = NULL;
  367. struct cqp_commands_info *pcmdinfo = NULL;
  368. u32 i, pending_work, wqe_idx;
  369. pending_work = I40IW_RING_WORK_AVAILABLE(cqp->sc_cqp.sq_ring);
  370. wqe_idx = I40IW_RING_GETCURRENT_TAIL(cqp->sc_cqp.sq_ring);
  371. for (i = 0; i < pending_work; i++) {
  372. cqp_request = (struct i40iw_cqp_request *)(unsigned long)cqp->scratch_array[wqe_idx];
  373. if (cqp_request)
  374. i40iw_free_pending_cqp_request(cqp, cqp_request);
  375. wqe_idx = (wqe_idx + 1) % I40IW_RING_GETSIZE(cqp->sc_cqp.sq_ring);
  376. }
  377. while (!list_empty(&dev->cqp_cmd_head)) {
  378. pcmdinfo = (struct cqp_commands_info *)i40iw_remove_head(&dev->cqp_cmd_head);
  379. cqp_request = container_of(pcmdinfo, struct i40iw_cqp_request, info);
  380. if (cqp_request)
  381. i40iw_free_pending_cqp_request(cqp, cqp_request);
  382. }
  383. }
  384. /**
  385. * i40iw_free_qp - callback after destroy cqp completes
  386. * @cqp_request: cqp request for destroy qp
  387. * @num: not used
  388. */
  389. static void i40iw_free_qp(struct i40iw_cqp_request *cqp_request, u32 num)
  390. {
  391. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)cqp_request->param;
  392. struct i40iw_qp *iwqp = (struct i40iw_qp *)qp->back_qp;
  393. struct i40iw_device *iwdev;
  394. u32 qp_num = iwqp->ibqp.qp_num;
  395. iwdev = iwqp->iwdev;
  396. i40iw_rem_pdusecount(iwqp->iwpd, iwdev);
  397. i40iw_free_qp_resources(iwdev, iwqp, qp_num);
  398. i40iw_rem_devusecount(iwdev);
  399. }
  400. /**
  401. * i40iw_wait_event - wait for completion
  402. * @iwdev: iwarp device
  403. * @cqp_request: cqp request to wait
  404. */
  405. static int i40iw_wait_event(struct i40iw_device *iwdev,
  406. struct i40iw_cqp_request *cqp_request)
  407. {
  408. struct cqp_commands_info *info = &cqp_request->info;
  409. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  410. struct i40iw_cqp_timeout cqp_timeout;
  411. bool cqp_error = false;
  412. int err_code = 0;
  413. memset(&cqp_timeout, 0, sizeof(cqp_timeout));
  414. cqp_timeout.compl_cqp_cmds = iwdev->sc_dev.cqp_cmd_stats[OP_COMPLETED_COMMANDS];
  415. do {
  416. if (wait_event_timeout(cqp_request->waitq,
  417. cqp_request->request_done, CQP_COMPL_WAIT_TIME))
  418. break;
  419. i40iw_check_cqp_progress(&cqp_timeout, &iwdev->sc_dev);
  420. if (cqp_timeout.count < CQP_TIMEOUT_THRESHOLD)
  421. continue;
  422. i40iw_pr_err("error cqp command 0x%x timed out", info->cqp_cmd);
  423. err_code = -ETIME;
  424. if (!iwdev->reset) {
  425. iwdev->reset = true;
  426. i40iw_request_reset(iwdev);
  427. }
  428. goto done;
  429. } while (1);
  430. cqp_error = cqp_request->compl_info.error;
  431. if (cqp_error) {
  432. i40iw_pr_err("error cqp command 0x%x completion maj = 0x%x min=0x%x\n",
  433. info->cqp_cmd, cqp_request->compl_info.maj_err_code,
  434. cqp_request->compl_info.min_err_code);
  435. err_code = -EPROTO;
  436. goto done;
  437. }
  438. done:
  439. i40iw_put_cqp_request(iwcqp, cqp_request);
  440. return err_code;
  441. }
  442. /**
  443. * i40iw_handle_cqp_op - process cqp command
  444. * @iwdev: iwarp device
  445. * @cqp_request: cqp request to process
  446. */
  447. enum i40iw_status_code i40iw_handle_cqp_op(struct i40iw_device *iwdev,
  448. struct i40iw_cqp_request
  449. *cqp_request)
  450. {
  451. struct i40iw_sc_dev *dev = &iwdev->sc_dev;
  452. enum i40iw_status_code status;
  453. struct cqp_commands_info *info = &cqp_request->info;
  454. int err_code = 0;
  455. if (iwdev->reset) {
  456. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  457. return I40IW_ERR_CQP_COMPL_ERROR;
  458. }
  459. status = i40iw_process_cqp_cmd(dev, info);
  460. if (status) {
  461. i40iw_pr_err("error cqp command 0x%x failed\n", info->cqp_cmd);
  462. i40iw_free_cqp_request(&iwdev->cqp, cqp_request);
  463. return status;
  464. }
  465. if (cqp_request->waiting)
  466. err_code = i40iw_wait_event(iwdev, cqp_request);
  467. if (err_code)
  468. status = I40IW_ERR_CQP_COMPL_ERROR;
  469. return status;
  470. }
  471. /**
  472. * i40iw_add_devusecount - add dev refcount
  473. * @iwdev: dev for refcount
  474. */
  475. void i40iw_add_devusecount(struct i40iw_device *iwdev)
  476. {
  477. atomic64_inc(&iwdev->use_count);
  478. }
  479. /**
  480. * i40iw_rem_devusecount - decrement refcount for dev
  481. * @iwdev: device
  482. */
  483. void i40iw_rem_devusecount(struct i40iw_device *iwdev)
  484. {
  485. if (!atomic64_dec_and_test(&iwdev->use_count))
  486. return;
  487. wake_up(&iwdev->close_wq);
  488. }
  489. /**
  490. * i40iw_add_pdusecount - add pd refcount
  491. * @iwpd: pd for refcount
  492. */
  493. void i40iw_add_pdusecount(struct i40iw_pd *iwpd)
  494. {
  495. atomic_inc(&iwpd->usecount);
  496. }
  497. /**
  498. * i40iw_rem_pdusecount - decrement refcount for pd and free if 0
  499. * @iwpd: pd for refcount
  500. * @iwdev: iwarp device
  501. */
  502. void i40iw_rem_pdusecount(struct i40iw_pd *iwpd, struct i40iw_device *iwdev)
  503. {
  504. if (!atomic_dec_and_test(&iwpd->usecount))
  505. return;
  506. i40iw_free_resource(iwdev, iwdev->allocated_pds, iwpd->sc_pd.pd_id);
  507. kfree(iwpd);
  508. }
  509. /**
  510. * i40iw_add_ref - add refcount for qp
  511. * @ibqp: iqarp qp
  512. */
  513. void i40iw_add_ref(struct ib_qp *ibqp)
  514. {
  515. struct i40iw_qp *iwqp = (struct i40iw_qp *)ibqp;
  516. atomic_inc(&iwqp->refcount);
  517. }
  518. /**
  519. * i40iw_rem_ref - rem refcount for qp and free if 0
  520. * @ibqp: iqarp qp
  521. */
  522. void i40iw_rem_ref(struct ib_qp *ibqp)
  523. {
  524. struct i40iw_qp *iwqp;
  525. enum i40iw_status_code status;
  526. struct i40iw_cqp_request *cqp_request;
  527. struct cqp_commands_info *cqp_info;
  528. struct i40iw_device *iwdev;
  529. u32 qp_num;
  530. unsigned long flags;
  531. iwqp = to_iwqp(ibqp);
  532. iwdev = iwqp->iwdev;
  533. spin_lock_irqsave(&iwdev->qptable_lock, flags);
  534. if (!atomic_dec_and_test(&iwqp->refcount)) {
  535. spin_unlock_irqrestore(&iwdev->qptable_lock, flags);
  536. return;
  537. }
  538. qp_num = iwqp->ibqp.qp_num;
  539. iwdev->qp_table[qp_num] = NULL;
  540. spin_unlock_irqrestore(&iwdev->qptable_lock, flags);
  541. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  542. if (!cqp_request)
  543. return;
  544. cqp_request->callback_fcn = i40iw_free_qp;
  545. cqp_request->param = (void *)&iwqp->sc_qp;
  546. cqp_info = &cqp_request->info;
  547. cqp_info->cqp_cmd = OP_QP_DESTROY;
  548. cqp_info->post_sq = 1;
  549. cqp_info->in.u.qp_destroy.qp = &iwqp->sc_qp;
  550. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  551. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  552. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  553. if (!status)
  554. return;
  555. i40iw_rem_pdusecount(iwqp->iwpd, iwdev);
  556. i40iw_free_qp_resources(iwdev, iwqp, qp_num);
  557. i40iw_rem_devusecount(iwdev);
  558. }
  559. /**
  560. * i40iw_get_qp - get qp address
  561. * @device: iwarp device
  562. * @qpn: qp number
  563. */
  564. struct ib_qp *i40iw_get_qp(struct ib_device *device, int qpn)
  565. {
  566. struct i40iw_device *iwdev = to_iwdev(device);
  567. if ((qpn < IW_FIRST_QPN) || (qpn >= iwdev->max_qp))
  568. return NULL;
  569. return &iwdev->qp_table[qpn]->ibqp;
  570. }
  571. /**
  572. * i40iw_debug_buf - print debug msg and buffer is mask set
  573. * @dev: hardware control device structure
  574. * @mask: mask to compare if to print debug buffer
  575. * @buf: points buffer addr
  576. * @size: saize of buffer to print
  577. */
  578. void i40iw_debug_buf(struct i40iw_sc_dev *dev,
  579. enum i40iw_debug_flag mask,
  580. char *desc,
  581. u64 *buf,
  582. u32 size)
  583. {
  584. u32 i;
  585. if (!(dev->debug_mask & mask))
  586. return;
  587. i40iw_debug(dev, mask, "%s\n", desc);
  588. i40iw_debug(dev, mask, "starting address virt=%p phy=%llxh\n", buf,
  589. (unsigned long long)virt_to_phys(buf));
  590. for (i = 0; i < size; i += 8)
  591. i40iw_debug(dev, mask, "index %03d val: %016llx\n", i, buf[i / 8]);
  592. }
  593. /**
  594. * i40iw_get_hw_addr - return hw addr
  595. * @par: points to shared dev
  596. */
  597. u8 __iomem *i40iw_get_hw_addr(void *par)
  598. {
  599. struct i40iw_sc_dev *dev = (struct i40iw_sc_dev *)par;
  600. return dev->hw->hw_addr;
  601. }
  602. /**
  603. * i40iw_remove_head - return head entry and remove from list
  604. * @list: list for entry
  605. */
  606. void *i40iw_remove_head(struct list_head *list)
  607. {
  608. struct list_head *entry;
  609. if (list_empty(list))
  610. return NULL;
  611. entry = (void *)list->next;
  612. list_del(entry);
  613. return (void *)entry;
  614. }
  615. /**
  616. * i40iw_allocate_dma_mem - Memory alloc helper fn
  617. * @hw: pointer to the HW structure
  618. * @mem: ptr to mem struct to fill out
  619. * @size: size of memory requested
  620. * @alignment: what to align the allocation to
  621. */
  622. enum i40iw_status_code i40iw_allocate_dma_mem(struct i40iw_hw *hw,
  623. struct i40iw_dma_mem *mem,
  624. u64 size,
  625. u32 alignment)
  626. {
  627. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  628. if (!mem)
  629. return I40IW_ERR_PARAM;
  630. mem->size = ALIGN(size, alignment);
  631. mem->va = dma_zalloc_coherent(&pcidev->dev, mem->size,
  632. (dma_addr_t *)&mem->pa, GFP_KERNEL);
  633. if (!mem->va)
  634. return I40IW_ERR_NO_MEMORY;
  635. return 0;
  636. }
  637. /**
  638. * i40iw_free_dma_mem - Memory free helper fn
  639. * @hw: pointer to the HW structure
  640. * @mem: ptr to mem struct to free
  641. */
  642. void i40iw_free_dma_mem(struct i40iw_hw *hw, struct i40iw_dma_mem *mem)
  643. {
  644. struct pci_dev *pcidev = (struct pci_dev *)hw->dev_context;
  645. if (!mem || !mem->va)
  646. return;
  647. dma_free_coherent(&pcidev->dev, mem->size,
  648. mem->va, (dma_addr_t)mem->pa);
  649. mem->va = NULL;
  650. }
  651. /**
  652. * i40iw_allocate_virt_mem - virtual memory alloc helper fn
  653. * @hw: pointer to the HW structure
  654. * @mem: ptr to mem struct to fill out
  655. * @size: size of memory requested
  656. */
  657. enum i40iw_status_code i40iw_allocate_virt_mem(struct i40iw_hw *hw,
  658. struct i40iw_virt_mem *mem,
  659. u32 size)
  660. {
  661. if (!mem)
  662. return I40IW_ERR_PARAM;
  663. mem->size = size;
  664. mem->va = kzalloc(size, GFP_KERNEL);
  665. if (mem->va)
  666. return 0;
  667. else
  668. return I40IW_ERR_NO_MEMORY;
  669. }
  670. /**
  671. * i40iw_free_virt_mem - virtual memory free helper fn
  672. * @hw: pointer to the HW structure
  673. * @mem: ptr to mem struct to free
  674. */
  675. enum i40iw_status_code i40iw_free_virt_mem(struct i40iw_hw *hw,
  676. struct i40iw_virt_mem *mem)
  677. {
  678. if (!mem)
  679. return I40IW_ERR_PARAM;
  680. /*
  681. * mem->va points to the parent of mem, so both mem and mem->va
  682. * can not be touched once mem->va is freed
  683. */
  684. kfree(mem->va);
  685. return 0;
  686. }
  687. /**
  688. * i40iw_cqp_sds_cmd - create cqp command for sd
  689. * @dev: hardware control device structure
  690. * @sd_info: information for sd cqp
  691. *
  692. */
  693. enum i40iw_status_code i40iw_cqp_sds_cmd(struct i40iw_sc_dev *dev,
  694. struct i40iw_update_sds_info *sdinfo)
  695. {
  696. enum i40iw_status_code status;
  697. struct i40iw_cqp_request *cqp_request;
  698. struct cqp_commands_info *cqp_info;
  699. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  700. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  701. if (!cqp_request)
  702. return I40IW_ERR_NO_MEMORY;
  703. cqp_info = &cqp_request->info;
  704. memcpy(&cqp_info->in.u.update_pe_sds.info, sdinfo,
  705. sizeof(cqp_info->in.u.update_pe_sds.info));
  706. cqp_info->cqp_cmd = OP_UPDATE_PE_SDS;
  707. cqp_info->post_sq = 1;
  708. cqp_info->in.u.update_pe_sds.dev = dev;
  709. cqp_info->in.u.update_pe_sds.scratch = (uintptr_t)cqp_request;
  710. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  711. if (status)
  712. i40iw_pr_err("CQP-OP Update SD's fail");
  713. return status;
  714. }
  715. /**
  716. * i40iw_qp_suspend_resume - cqp command for suspend/resume
  717. * @dev: hardware control device structure
  718. * @qp: hardware control qp
  719. * @suspend: flag if suspend or resume
  720. */
  721. void i40iw_qp_suspend_resume(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp, bool suspend)
  722. {
  723. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  724. struct i40iw_cqp_request *cqp_request;
  725. struct i40iw_sc_cqp *cqp = dev->cqp;
  726. struct cqp_commands_info *cqp_info;
  727. enum i40iw_status_code status;
  728. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  729. if (!cqp_request)
  730. return;
  731. cqp_info = &cqp_request->info;
  732. cqp_info->cqp_cmd = (suspend) ? OP_SUSPEND : OP_RESUME;
  733. cqp_info->in.u.suspend_resume.cqp = cqp;
  734. cqp_info->in.u.suspend_resume.qp = qp;
  735. cqp_info->in.u.suspend_resume.scratch = (uintptr_t)cqp_request;
  736. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  737. if (status)
  738. i40iw_pr_err("CQP-OP QP Suspend/Resume fail");
  739. }
  740. /**
  741. * i40iw_term_modify_qp - modify qp for term message
  742. * @qp: hardware control qp
  743. * @next_state: qp's next state
  744. * @term: terminate code
  745. * @term_len: length
  746. */
  747. void i40iw_term_modify_qp(struct i40iw_sc_qp *qp, u8 next_state, u8 term, u8 term_len)
  748. {
  749. struct i40iw_qp *iwqp;
  750. iwqp = (struct i40iw_qp *)qp->back_qp;
  751. i40iw_next_iw_state(iwqp, next_state, 0, term, term_len);
  752. };
  753. /**
  754. * i40iw_terminate_done - after terminate is completed
  755. * @qp: hardware control qp
  756. * @timeout_occurred: indicates if terminate timer expired
  757. */
  758. void i40iw_terminate_done(struct i40iw_sc_qp *qp, int timeout_occurred)
  759. {
  760. struct i40iw_qp *iwqp;
  761. u32 next_iwarp_state = I40IW_QP_STATE_ERROR;
  762. u8 hte = 0;
  763. bool first_time;
  764. unsigned long flags;
  765. iwqp = (struct i40iw_qp *)qp->back_qp;
  766. spin_lock_irqsave(&iwqp->lock, flags);
  767. if (iwqp->hte_added) {
  768. iwqp->hte_added = 0;
  769. hte = 1;
  770. }
  771. first_time = !(qp->term_flags & I40IW_TERM_DONE);
  772. qp->term_flags |= I40IW_TERM_DONE;
  773. spin_unlock_irqrestore(&iwqp->lock, flags);
  774. if (first_time) {
  775. if (!timeout_occurred)
  776. i40iw_terminate_del_timer(qp);
  777. else
  778. next_iwarp_state = I40IW_QP_STATE_CLOSING;
  779. i40iw_next_iw_state(iwqp, next_iwarp_state, hte, 0, 0);
  780. i40iw_cm_disconn(iwqp);
  781. }
  782. }
  783. /**
  784. * i40iw_terminate_imeout - timeout happened
  785. * @context: points to iwarp qp
  786. */
  787. static void i40iw_terminate_timeout(unsigned long context)
  788. {
  789. struct i40iw_qp *iwqp = (struct i40iw_qp *)context;
  790. struct i40iw_sc_qp *qp = (struct i40iw_sc_qp *)&iwqp->sc_qp;
  791. i40iw_terminate_done(qp, 1);
  792. i40iw_rem_ref(&iwqp->ibqp);
  793. }
  794. /**
  795. * i40iw_terminate_start_timer - start terminate timeout
  796. * @qp: hardware control qp
  797. */
  798. void i40iw_terminate_start_timer(struct i40iw_sc_qp *qp)
  799. {
  800. struct i40iw_qp *iwqp;
  801. iwqp = (struct i40iw_qp *)qp->back_qp;
  802. i40iw_add_ref(&iwqp->ibqp);
  803. setup_timer(&iwqp->terminate_timer, i40iw_terminate_timeout,
  804. (unsigned long)iwqp);
  805. iwqp->terminate_timer.expires = jiffies + HZ;
  806. add_timer(&iwqp->terminate_timer);
  807. }
  808. /**
  809. * i40iw_terminate_del_timer - delete terminate timeout
  810. * @qp: hardware control qp
  811. */
  812. void i40iw_terminate_del_timer(struct i40iw_sc_qp *qp)
  813. {
  814. struct i40iw_qp *iwqp;
  815. iwqp = (struct i40iw_qp *)qp->back_qp;
  816. if (del_timer(&iwqp->terminate_timer))
  817. i40iw_rem_ref(&iwqp->ibqp);
  818. }
  819. /**
  820. * i40iw_cqp_generic_worker - generic worker for cqp
  821. * @work: work pointer
  822. */
  823. static void i40iw_cqp_generic_worker(struct work_struct *work)
  824. {
  825. struct i40iw_virtchnl_work_info *work_info =
  826. &((struct virtchnl_work *)work)->work_info;
  827. if (work_info->worker_vf_dev)
  828. work_info->callback_fcn(work_info->worker_vf_dev);
  829. }
  830. /**
  831. * i40iw_cqp_spawn_worker - spawn worket thread
  832. * @iwdev: device struct pointer
  833. * @work_info: work request info
  834. * @iw_vf_idx: virtual function index
  835. */
  836. void i40iw_cqp_spawn_worker(struct i40iw_sc_dev *dev,
  837. struct i40iw_virtchnl_work_info *work_info,
  838. u32 iw_vf_idx)
  839. {
  840. struct virtchnl_work *work;
  841. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  842. work = &iwdev->virtchnl_w[iw_vf_idx];
  843. memcpy(&work->work_info, work_info, sizeof(*work_info));
  844. INIT_WORK(&work->work, i40iw_cqp_generic_worker);
  845. queue_work(iwdev->virtchnl_wq, &work->work);
  846. }
  847. /**
  848. * i40iw_cqp_manage_hmc_fcn_worker -
  849. * @work: work pointer for hmc info
  850. */
  851. static void i40iw_cqp_manage_hmc_fcn_worker(struct work_struct *work)
  852. {
  853. struct i40iw_cqp_request *cqp_request =
  854. ((struct virtchnl_work *)work)->cqp_request;
  855. struct i40iw_ccq_cqe_info ccq_cqe_info;
  856. struct i40iw_hmc_fcn_info *hmcfcninfo =
  857. &cqp_request->info.in.u.manage_hmc_pm.info;
  858. struct i40iw_device *iwdev =
  859. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->back_dev;
  860. ccq_cqe_info.cqp = NULL;
  861. ccq_cqe_info.maj_err_code = cqp_request->compl_info.maj_err_code;
  862. ccq_cqe_info.min_err_code = cqp_request->compl_info.min_err_code;
  863. ccq_cqe_info.op_code = cqp_request->compl_info.op_code;
  864. ccq_cqe_info.op_ret_val = cqp_request->compl_info.op_ret_val;
  865. ccq_cqe_info.scratch = 0;
  866. ccq_cqe_info.error = cqp_request->compl_info.error;
  867. hmcfcninfo->callback_fcn(cqp_request->info.in.u.manage_hmc_pm.dev,
  868. hmcfcninfo->cqp_callback_param, &ccq_cqe_info);
  869. i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
  870. }
  871. /**
  872. * i40iw_cqp_manage_hmc_fcn_callback - called function after cqp completion
  873. * @cqp_request: cqp request info struct for hmc fun
  874. * @unused: unused param of callback
  875. */
  876. static void i40iw_cqp_manage_hmc_fcn_callback(struct i40iw_cqp_request *cqp_request,
  877. u32 unused)
  878. {
  879. struct virtchnl_work *work;
  880. struct i40iw_hmc_fcn_info *hmcfcninfo =
  881. &cqp_request->info.in.u.manage_hmc_pm.info;
  882. struct i40iw_device *iwdev =
  883. (struct i40iw_device *)cqp_request->info.in.u.manage_hmc_pm.dev->
  884. back_dev;
  885. if (hmcfcninfo && hmcfcninfo->callback_fcn) {
  886. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s1\n", __func__);
  887. atomic_inc(&cqp_request->refcount);
  888. work = &iwdev->virtchnl_w[hmcfcninfo->iw_vf_idx];
  889. work->cqp_request = cqp_request;
  890. INIT_WORK(&work->work, i40iw_cqp_manage_hmc_fcn_worker);
  891. queue_work(iwdev->virtchnl_wq, &work->work);
  892. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s2\n", __func__);
  893. } else {
  894. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s: Something wrong\n", __func__);
  895. }
  896. }
  897. /**
  898. * i40iw_cqp_manage_hmc_fcn_cmd - issue cqp command to manage hmc
  899. * @dev: hardware control device structure
  900. * @hmcfcninfo: info for hmc
  901. */
  902. enum i40iw_status_code i40iw_cqp_manage_hmc_fcn_cmd(struct i40iw_sc_dev *dev,
  903. struct i40iw_hmc_fcn_info *hmcfcninfo)
  904. {
  905. enum i40iw_status_code status;
  906. struct i40iw_cqp_request *cqp_request;
  907. struct cqp_commands_info *cqp_info;
  908. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  909. i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_HMC, "%s\n", __func__);
  910. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
  911. if (!cqp_request)
  912. return I40IW_ERR_NO_MEMORY;
  913. cqp_info = &cqp_request->info;
  914. cqp_request->callback_fcn = i40iw_cqp_manage_hmc_fcn_callback;
  915. cqp_request->param = hmcfcninfo;
  916. memcpy(&cqp_info->in.u.manage_hmc_pm.info, hmcfcninfo,
  917. sizeof(*hmcfcninfo));
  918. cqp_info->in.u.manage_hmc_pm.dev = dev;
  919. cqp_info->cqp_cmd = OP_MANAGE_HMC_PM_FUNC_TABLE;
  920. cqp_info->post_sq = 1;
  921. cqp_info->in.u.manage_hmc_pm.scratch = (uintptr_t)cqp_request;
  922. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  923. if (status)
  924. i40iw_pr_err("CQP-OP Manage HMC fail");
  925. return status;
  926. }
  927. /**
  928. * i40iw_cqp_query_fpm_values_cmd - send cqp command for fpm
  929. * @iwdev: function device struct
  930. * @values_mem: buffer for fpm
  931. * @hmc_fn_id: function id for fpm
  932. */
  933. enum i40iw_status_code i40iw_cqp_query_fpm_values_cmd(struct i40iw_sc_dev *dev,
  934. struct i40iw_dma_mem *values_mem,
  935. u8 hmc_fn_id)
  936. {
  937. enum i40iw_status_code status;
  938. struct i40iw_cqp_request *cqp_request;
  939. struct cqp_commands_info *cqp_info;
  940. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  941. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  942. if (!cqp_request)
  943. return I40IW_ERR_NO_MEMORY;
  944. cqp_info = &cqp_request->info;
  945. cqp_request->param = NULL;
  946. cqp_info->in.u.query_fpm_values.cqp = dev->cqp;
  947. cqp_info->in.u.query_fpm_values.fpm_values_pa = values_mem->pa;
  948. cqp_info->in.u.query_fpm_values.fpm_values_va = values_mem->va;
  949. cqp_info->in.u.query_fpm_values.hmc_fn_id = hmc_fn_id;
  950. cqp_info->cqp_cmd = OP_QUERY_FPM_VALUES;
  951. cqp_info->post_sq = 1;
  952. cqp_info->in.u.query_fpm_values.scratch = (uintptr_t)cqp_request;
  953. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  954. if (status)
  955. i40iw_pr_err("CQP-OP Query FPM fail");
  956. return status;
  957. }
  958. /**
  959. * i40iw_cqp_commit_fpm_values_cmd - commit fpm values in hw
  960. * @dev: hardware control device structure
  961. * @values_mem: buffer with fpm values
  962. * @hmc_fn_id: function id for fpm
  963. */
  964. enum i40iw_status_code i40iw_cqp_commit_fpm_values_cmd(struct i40iw_sc_dev *dev,
  965. struct i40iw_dma_mem *values_mem,
  966. u8 hmc_fn_id)
  967. {
  968. enum i40iw_status_code status;
  969. struct i40iw_cqp_request *cqp_request;
  970. struct cqp_commands_info *cqp_info;
  971. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  972. cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
  973. if (!cqp_request)
  974. return I40IW_ERR_NO_MEMORY;
  975. cqp_info = &cqp_request->info;
  976. cqp_request->param = NULL;
  977. cqp_info->in.u.commit_fpm_values.cqp = dev->cqp;
  978. cqp_info->in.u.commit_fpm_values.fpm_values_pa = values_mem->pa;
  979. cqp_info->in.u.commit_fpm_values.fpm_values_va = values_mem->va;
  980. cqp_info->in.u.commit_fpm_values.hmc_fn_id = hmc_fn_id;
  981. cqp_info->cqp_cmd = OP_COMMIT_FPM_VALUES;
  982. cqp_info->post_sq = 1;
  983. cqp_info->in.u.commit_fpm_values.scratch = (uintptr_t)cqp_request;
  984. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  985. if (status)
  986. i40iw_pr_err("CQP-OP Commit FPM fail");
  987. return status;
  988. }
  989. /**
  990. * i40iw_vf_wait_vchnl_resp - wait for channel msg
  991. * @iwdev: function's device struct
  992. */
  993. enum i40iw_status_code i40iw_vf_wait_vchnl_resp(struct i40iw_sc_dev *dev)
  994. {
  995. struct i40iw_device *iwdev = dev->back_dev;
  996. int timeout_ret;
  997. i40iw_debug(dev, I40IW_DEBUG_VIRT, "%s[%u] dev %p, iwdev %p\n",
  998. __func__, __LINE__, dev, iwdev);
  999. atomic_set(&iwdev->vchnl_msgs, 2);
  1000. timeout_ret = wait_event_timeout(iwdev->vchnl_waitq,
  1001. (atomic_read(&iwdev->vchnl_msgs) == 1),
  1002. I40IW_VCHNL_EVENT_TIMEOUT);
  1003. atomic_dec(&iwdev->vchnl_msgs);
  1004. if (!timeout_ret) {
  1005. i40iw_pr_err("virt channel completion timeout = 0x%x\n", timeout_ret);
  1006. atomic_set(&iwdev->vchnl_msgs, 0);
  1007. dev->vchnl_up = false;
  1008. return I40IW_ERR_TIMEOUT;
  1009. }
  1010. wake_up(&dev->vf_reqs);
  1011. return 0;
  1012. }
  1013. /**
  1014. * i40iw_cqp_cq_create_cmd - create a cq for the cqp
  1015. * @dev: device pointer
  1016. * @cq: pointer to created cq
  1017. */
  1018. enum i40iw_status_code i40iw_cqp_cq_create_cmd(struct i40iw_sc_dev *dev,
  1019. struct i40iw_sc_cq *cq)
  1020. {
  1021. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1022. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1023. struct i40iw_cqp_request *cqp_request;
  1024. struct cqp_commands_info *cqp_info;
  1025. enum i40iw_status_code status;
  1026. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1027. if (!cqp_request)
  1028. return I40IW_ERR_NO_MEMORY;
  1029. cqp_info = &cqp_request->info;
  1030. cqp_info->cqp_cmd = OP_CQ_CREATE;
  1031. cqp_info->post_sq = 1;
  1032. cqp_info->in.u.cq_create.cq = cq;
  1033. cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
  1034. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1035. if (status)
  1036. i40iw_pr_err("CQP-OP Create QP fail");
  1037. return status;
  1038. }
  1039. /**
  1040. * i40iw_cqp_qp_create_cmd - create a qp for the cqp
  1041. * @dev: device pointer
  1042. * @qp: pointer to created qp
  1043. */
  1044. enum i40iw_status_code i40iw_cqp_qp_create_cmd(struct i40iw_sc_dev *dev,
  1045. struct i40iw_sc_qp *qp)
  1046. {
  1047. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1048. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1049. struct i40iw_cqp_request *cqp_request;
  1050. struct cqp_commands_info *cqp_info;
  1051. struct i40iw_create_qp_info *qp_info;
  1052. enum i40iw_status_code status;
  1053. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1054. if (!cqp_request)
  1055. return I40IW_ERR_NO_MEMORY;
  1056. cqp_info = &cqp_request->info;
  1057. qp_info = &cqp_request->info.in.u.qp_create.info;
  1058. memset(qp_info, 0, sizeof(*qp_info));
  1059. qp_info->cq_num_valid = true;
  1060. qp_info->next_iwarp_state = I40IW_QP_STATE_RTS;
  1061. cqp_info->cqp_cmd = OP_QP_CREATE;
  1062. cqp_info->post_sq = 1;
  1063. cqp_info->in.u.qp_create.qp = qp;
  1064. cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
  1065. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1066. if (status)
  1067. i40iw_pr_err("CQP-OP QP create fail");
  1068. return status;
  1069. }
  1070. /**
  1071. * i40iw_cqp_cq_destroy_cmd - destroy the cqp cq
  1072. * @dev: device pointer
  1073. * @cq: pointer to cq
  1074. */
  1075. void i40iw_cqp_cq_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_cq *cq)
  1076. {
  1077. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1078. i40iw_cq_wq_destroy(iwdev, cq);
  1079. }
  1080. /**
  1081. * i40iw_cqp_qp_destroy_cmd - destroy the cqp
  1082. * @dev: device pointer
  1083. * @qp: pointer to qp
  1084. */
  1085. void i40iw_cqp_qp_destroy_cmd(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  1086. {
  1087. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1088. struct i40iw_cqp *iwcqp = &iwdev->cqp;
  1089. struct i40iw_cqp_request *cqp_request;
  1090. struct cqp_commands_info *cqp_info;
  1091. enum i40iw_status_code status;
  1092. cqp_request = i40iw_get_cqp_request(iwcqp, true);
  1093. if (!cqp_request)
  1094. return;
  1095. cqp_info = &cqp_request->info;
  1096. memset(cqp_info, 0, sizeof(*cqp_info));
  1097. cqp_info->cqp_cmd = OP_QP_DESTROY;
  1098. cqp_info->post_sq = 1;
  1099. cqp_info->in.u.qp_destroy.qp = qp;
  1100. cqp_info->in.u.qp_destroy.scratch = (uintptr_t)cqp_request;
  1101. cqp_info->in.u.qp_destroy.remove_hash_idx = true;
  1102. status = i40iw_handle_cqp_op(iwdev, cqp_request);
  1103. if (status)
  1104. i40iw_pr_err("CQP QP_DESTROY fail");
  1105. }
  1106. /**
  1107. * i40iw_ieq_mpa_crc_ae - generate AE for crc error
  1108. * @dev: hardware control device structure
  1109. * @qp: hardware control qp
  1110. */
  1111. void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
  1112. {
  1113. struct i40iw_qp_flush_info info;
  1114. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1115. i40iw_debug(dev, I40IW_DEBUG_AEQ, "%s entered\n", __func__);
  1116. memset(&info, 0, sizeof(info));
  1117. info.ae_code = I40IW_AE_LLP_RECEIVED_MPA_CRC_ERROR;
  1118. info.generate_ae = true;
  1119. info.ae_source = 0x3;
  1120. (void)i40iw_hw_flush_wqes(iwdev, qp, &info, false);
  1121. }
  1122. /**
  1123. * i40iw_init_hash_desc - initialize hash for crc calculation
  1124. * @desc: cryption type
  1125. */
  1126. enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc)
  1127. {
  1128. struct crypto_shash *tfm;
  1129. struct shash_desc *tdesc;
  1130. tfm = crypto_alloc_shash("crc32c", 0, 0);
  1131. if (IS_ERR(tfm))
  1132. return I40IW_ERR_MPA_CRC;
  1133. tdesc = kzalloc(sizeof(*tdesc) + crypto_shash_descsize(tfm),
  1134. GFP_KERNEL);
  1135. if (!tdesc) {
  1136. crypto_free_shash(tfm);
  1137. return I40IW_ERR_MPA_CRC;
  1138. }
  1139. tdesc->tfm = tfm;
  1140. *desc = tdesc;
  1141. return 0;
  1142. }
  1143. /**
  1144. * i40iw_free_hash_desc - free hash desc
  1145. * @desc: to be freed
  1146. */
  1147. void i40iw_free_hash_desc(struct shash_desc *desc)
  1148. {
  1149. if (desc) {
  1150. crypto_free_shash(desc->tfm);
  1151. kfree(desc);
  1152. }
  1153. }
  1154. /**
  1155. * i40iw_alloc_query_fpm_buf - allocate buffer for fpm
  1156. * @dev: hardware control device structure
  1157. * @mem: buffer ptr for fpm to be allocated
  1158. * @return: memory allocation status
  1159. */
  1160. enum i40iw_status_code i40iw_alloc_query_fpm_buf(struct i40iw_sc_dev *dev,
  1161. struct i40iw_dma_mem *mem)
  1162. {
  1163. enum i40iw_status_code status;
  1164. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1165. status = i40iw_obj_aligned_mem(iwdev, mem, I40IW_QUERY_FPM_BUF_SIZE,
  1166. I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK);
  1167. return status;
  1168. }
  1169. /**
  1170. * i40iw_ieq_check_mpacrc - check if mpa crc is OK
  1171. * @desc: desc for hash
  1172. * @addr: address of buffer for crc
  1173. * @length: length of buffer
  1174. * @value: value to be compared
  1175. */
  1176. enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
  1177. void *addr,
  1178. u32 length,
  1179. u32 value)
  1180. {
  1181. u32 crc = 0;
  1182. int ret;
  1183. enum i40iw_status_code ret_code = 0;
  1184. crypto_shash_init(desc);
  1185. ret = crypto_shash_update(desc, addr, length);
  1186. if (!ret)
  1187. crypto_shash_final(desc, (u8 *)&crc);
  1188. if (crc != value) {
  1189. i40iw_pr_err("mpa crc check fail\n");
  1190. ret_code = I40IW_ERR_MPA_CRC;
  1191. }
  1192. return ret_code;
  1193. }
  1194. /**
  1195. * i40iw_ieq_get_qp - get qp based on quad in puda buffer
  1196. * @dev: hardware control device structure
  1197. * @buf: receive puda buffer on exception q
  1198. */
  1199. struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev,
  1200. struct i40iw_puda_buf *buf)
  1201. {
  1202. struct i40iw_device *iwdev = (struct i40iw_device *)dev->back_dev;
  1203. struct i40iw_qp *iwqp;
  1204. struct i40iw_cm_node *cm_node;
  1205. u32 loc_addr[4], rem_addr[4];
  1206. u16 loc_port, rem_port;
  1207. struct ipv6hdr *ip6h;
  1208. struct iphdr *iph = (struct iphdr *)buf->iph;
  1209. struct tcphdr *tcph = (struct tcphdr *)buf->tcph;
  1210. if (iph->version == 4) {
  1211. memset(loc_addr, 0, sizeof(loc_addr));
  1212. loc_addr[0] = ntohl(iph->daddr);
  1213. memset(rem_addr, 0, sizeof(rem_addr));
  1214. rem_addr[0] = ntohl(iph->saddr);
  1215. } else {
  1216. ip6h = (struct ipv6hdr *)buf->iph;
  1217. i40iw_copy_ip_ntohl(loc_addr, ip6h->daddr.in6_u.u6_addr32);
  1218. i40iw_copy_ip_ntohl(rem_addr, ip6h->saddr.in6_u.u6_addr32);
  1219. }
  1220. loc_port = ntohs(tcph->dest);
  1221. rem_port = ntohs(tcph->source);
  1222. cm_node = i40iw_find_node(&iwdev->cm_core, rem_port, rem_addr, loc_port,
  1223. loc_addr, false);
  1224. if (!cm_node)
  1225. return NULL;
  1226. iwqp = cm_node->iwqp;
  1227. return &iwqp->sc_qp;
  1228. }
  1229. /**
  1230. * i40iw_ieq_update_tcpip_info - update tcpip in the buffer
  1231. * @buf: puda to update
  1232. * @length: length of buffer
  1233. * @seqnum: seq number for tcp
  1234. */
  1235. void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length, u32 seqnum)
  1236. {
  1237. struct tcphdr *tcph;
  1238. struct iphdr *iph;
  1239. u16 iphlen;
  1240. u16 packetsize;
  1241. u8 *addr = (u8 *)buf->mem.va;
  1242. iphlen = (buf->ipv4) ? 20 : 40;
  1243. iph = (struct iphdr *)(addr + buf->maclen);
  1244. tcph = (struct tcphdr *)(addr + buf->maclen + iphlen);
  1245. packetsize = length + buf->tcphlen + iphlen;
  1246. iph->tot_len = htons(packetsize);
  1247. tcph->seq = htonl(seqnum);
  1248. }
  1249. /**
  1250. * i40iw_puda_get_tcpip_info - get tcpip info from puda buffer
  1251. * @info: to get information
  1252. * @buf: puda buffer
  1253. */
  1254. enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
  1255. struct i40iw_puda_buf *buf)
  1256. {
  1257. struct iphdr *iph;
  1258. struct ipv6hdr *ip6h;
  1259. struct tcphdr *tcph;
  1260. u16 iphlen;
  1261. u16 pkt_len;
  1262. u8 *mem = (u8 *)buf->mem.va;
  1263. struct ethhdr *ethh = (struct ethhdr *)buf->mem.va;
  1264. if (ethh->h_proto == htons(0x8100)) {
  1265. info->vlan_valid = true;
  1266. buf->vlan_id = ntohs(((struct vlan_ethhdr *)ethh)->h_vlan_TCI) & VLAN_VID_MASK;
  1267. }
  1268. buf->maclen = (info->vlan_valid) ? 18 : 14;
  1269. iphlen = (info->l3proto) ? 40 : 20;
  1270. buf->ipv4 = (info->l3proto) ? false : true;
  1271. buf->iph = mem + buf->maclen;
  1272. iph = (struct iphdr *)buf->iph;
  1273. buf->tcph = buf->iph + iphlen;
  1274. tcph = (struct tcphdr *)buf->tcph;
  1275. if (buf->ipv4) {
  1276. pkt_len = ntohs(iph->tot_len);
  1277. } else {
  1278. ip6h = (struct ipv6hdr *)buf->iph;
  1279. pkt_len = ntohs(ip6h->payload_len) + iphlen;
  1280. }
  1281. buf->totallen = pkt_len + buf->maclen;
  1282. if (info->payload_len < buf->totallen) {
  1283. i40iw_pr_err("payload_len = 0x%x totallen expected0x%x\n",
  1284. info->payload_len, buf->totallen);
  1285. return I40IW_ERR_INVALID_SIZE;
  1286. }
  1287. buf->tcphlen = (tcph->doff) << 2;
  1288. buf->datalen = pkt_len - iphlen - buf->tcphlen;
  1289. buf->data = (buf->datalen) ? buf->tcph + buf->tcphlen : NULL;
  1290. buf->hdrlen = buf->maclen + iphlen + buf->tcphlen;
  1291. buf->seqnum = ntohl(tcph->seq);
  1292. return 0;
  1293. }
  1294. /**
  1295. * i40iw_hw_stats_timeout - Stats timer-handler which updates all HW stats
  1296. * @vsi: pointer to the vsi structure
  1297. */
  1298. static void i40iw_hw_stats_timeout(unsigned long vsi)
  1299. {
  1300. struct i40iw_sc_vsi *sc_vsi = (struct i40iw_sc_vsi *)vsi;
  1301. struct i40iw_sc_dev *pf_dev = sc_vsi->dev;
  1302. struct i40iw_vsi_pestat *pf_devstat = sc_vsi->pestat;
  1303. struct i40iw_vsi_pestat *vf_devstat = NULL;
  1304. u16 iw_vf_idx;
  1305. unsigned long flags;
  1306. /*PF*/
  1307. i40iw_hw_stats_read_all(pf_devstat, &pf_devstat->hw_stats);
  1308. for (iw_vf_idx = 0; iw_vf_idx < I40IW_MAX_PE_ENABLED_VF_COUNT; iw_vf_idx++) {
  1309. spin_lock_irqsave(&pf_devstat->lock, flags);
  1310. if (pf_dev->vf_dev[iw_vf_idx]) {
  1311. if (pf_dev->vf_dev[iw_vf_idx]->stats_initialized) {
  1312. vf_devstat = &pf_dev->vf_dev[iw_vf_idx]->pestat;
  1313. i40iw_hw_stats_read_all(vf_devstat, &vf_devstat->hw_stats);
  1314. }
  1315. }
  1316. spin_unlock_irqrestore(&pf_devstat->lock, flags);
  1317. }
  1318. mod_timer(&pf_devstat->stats_timer,
  1319. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1320. }
  1321. /**
  1322. * i40iw_hw_stats_start_timer - Start periodic stats timer
  1323. * @vsi: pointer to the vsi structure
  1324. */
  1325. void i40iw_hw_stats_start_timer(struct i40iw_sc_vsi *vsi)
  1326. {
  1327. struct i40iw_vsi_pestat *devstat = vsi->pestat;
  1328. setup_timer(&devstat->stats_timer, i40iw_hw_stats_timeout,
  1329. (unsigned long)vsi);
  1330. mod_timer(&devstat->stats_timer,
  1331. jiffies + msecs_to_jiffies(STATS_TIMER_DELAY));
  1332. }
  1333. /**
  1334. * i40iw_hw_stats_stop_timer - Delete periodic stats timer
  1335. * @vsi: pointer to the vsi structure
  1336. */
  1337. void i40iw_hw_stats_stop_timer(struct i40iw_sc_vsi *vsi)
  1338. {
  1339. struct i40iw_vsi_pestat *devstat = vsi->pestat;
  1340. del_timer_sync(&devstat->stats_timer);
  1341. }