user_sdma.h 7.5 KB

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  1. #ifndef _HFI1_USER_SDMA_H
  2. #define _HFI1_USER_SDMA_H
  3. /*
  4. * Copyright(c) 2015 - 2017 Intel Corporation.
  5. *
  6. * This file is provided under a dual BSD/GPLv2 license. When using or
  7. * redistributing this file, you may do so under either license.
  8. *
  9. * GPL LICENSE SUMMARY
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of version 2 of the GNU General Public License as
  13. * published by the Free Software Foundation.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  18. * General Public License for more details.
  19. *
  20. * BSD LICENSE
  21. *
  22. * Redistribution and use in source and binary forms, with or without
  23. * modification, are permitted provided that the following conditions
  24. * are met:
  25. *
  26. * - Redistributions of source code must retain the above copyright
  27. * notice, this list of conditions and the following disclaimer.
  28. * - Redistributions in binary form must reproduce the above copyright
  29. * notice, this list of conditions and the following disclaimer in
  30. * the documentation and/or other materials provided with the
  31. * distribution.
  32. * - Neither the name of Intel Corporation nor the names of its
  33. * contributors may be used to endorse or promote products derived
  34. * from this software without specific prior written permission.
  35. *
  36. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  37. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  38. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  39. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  40. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  41. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  42. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  43. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  44. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  45. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  46. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  47. *
  48. */
  49. #include <linux/device.h>
  50. #include <linux/wait.h>
  51. #include "common.h"
  52. #include "iowait.h"
  53. #include "user_exp_rcv.h"
  54. /* The maximum number of Data io vectors per message/request */
  55. #define MAX_VECTORS_PER_REQ 8
  56. /*
  57. * Maximum number of packet to send from each message/request
  58. * before moving to the next one.
  59. */
  60. #define MAX_PKTS_PER_QUEUE 16
  61. #define num_pages(x) (1 + ((((x) - 1) & PAGE_MASK) >> PAGE_SHIFT))
  62. #define req_opcode(x) \
  63. (((x) >> HFI1_SDMA_REQ_OPCODE_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
  64. #define req_version(x) \
  65. (((x) >> HFI1_SDMA_REQ_VERSION_SHIFT) & HFI1_SDMA_REQ_OPCODE_MASK)
  66. #define req_iovcnt(x) \
  67. (((x) >> HFI1_SDMA_REQ_IOVCNT_SHIFT) & HFI1_SDMA_REQ_IOVCNT_MASK)
  68. /* Number of BTH.PSN bits used for sequence number in expected rcvs */
  69. #define BTH_SEQ_MASK 0x7ffull
  70. #define AHG_KDETH_INTR_SHIFT 12
  71. #define AHG_KDETH_SH_SHIFT 13
  72. #define AHG_KDETH_ARRAY_SIZE 9
  73. #define PBC2LRH(x) ((((x) & 0xfff) << 2) - 4)
  74. #define LRH2PBC(x) ((((x) >> 2) + 1) & 0xfff)
  75. #define AHG_HEADER_SET(arr, idx, dw, bit, width, value) \
  76. do { \
  77. if ((idx) < ARRAY_SIZE((arr))) \
  78. (arr)[(idx++)] = sdma_build_ahg_descriptor( \
  79. (__force u16)(value), (dw), (bit), \
  80. (width)); \
  81. else \
  82. return -ERANGE; \
  83. } while (0)
  84. /* Tx request flag bits */
  85. #define TXREQ_FLAGS_REQ_ACK BIT(0) /* Set the ACK bit in the header */
  86. #define TXREQ_FLAGS_REQ_DISABLE_SH BIT(1) /* Disable header suppression */
  87. #define SDMA_PKT_Q_INACTIVE BIT(0)
  88. #define SDMA_PKT_Q_ACTIVE BIT(1)
  89. #define SDMA_PKT_Q_DEFERRED BIT(2)
  90. /*
  91. * Maximum retry attempts to submit a TX request
  92. * before putting the process to sleep.
  93. */
  94. #define MAX_DEFER_RETRY_COUNT 1
  95. #define SDMA_IOWAIT_TIMEOUT 1000 /* in milliseconds */
  96. #define SDMA_DBG(req, fmt, ...) \
  97. hfi1_cdbg(SDMA, "[%u:%u:%u:%u] " fmt, (req)->pq->dd->unit, \
  98. (req)->pq->ctxt, (req)->pq->subctxt, (req)->info.comp_idx, \
  99. ##__VA_ARGS__)
  100. extern uint extended_psn;
  101. struct hfi1_user_sdma_pkt_q {
  102. u16 ctxt;
  103. u16 subctxt;
  104. u16 n_max_reqs;
  105. atomic_t n_reqs;
  106. u16 reqidx;
  107. struct hfi1_devdata *dd;
  108. struct kmem_cache *txreq_cache;
  109. struct user_sdma_request *reqs;
  110. unsigned long *req_in_use;
  111. struct iowait busy;
  112. unsigned state;
  113. wait_queue_head_t wait;
  114. unsigned long unpinned;
  115. struct mmu_rb_handler *handler;
  116. atomic_t n_locked;
  117. struct mm_struct *mm;
  118. };
  119. struct hfi1_user_sdma_comp_q {
  120. u16 nentries;
  121. struct hfi1_sdma_comp_entry *comps;
  122. };
  123. struct sdma_mmu_node {
  124. struct mmu_rb_node rb;
  125. struct hfi1_user_sdma_pkt_q *pq;
  126. atomic_t refcount;
  127. struct page **pages;
  128. unsigned int npages;
  129. };
  130. struct user_sdma_iovec {
  131. struct list_head list;
  132. struct iovec iov;
  133. /* number of pages in this vector */
  134. unsigned int npages;
  135. /* array of pinned pages for this vector */
  136. struct page **pages;
  137. /*
  138. * offset into the virtual address space of the vector at
  139. * which we last left off.
  140. */
  141. u64 offset;
  142. struct sdma_mmu_node *node;
  143. };
  144. /* evict operation argument */
  145. struct evict_data {
  146. u32 cleared; /* count evicted so far */
  147. u32 target; /* target count to evict */
  148. };
  149. struct user_sdma_request {
  150. /* This is the original header from user space */
  151. struct hfi1_pkt_header hdr;
  152. /* Read mostly fields */
  153. struct hfi1_user_sdma_pkt_q *pq ____cacheline_aligned_in_smp;
  154. struct hfi1_user_sdma_comp_q *cq;
  155. /*
  156. * Pointer to the SDMA engine for this request.
  157. * Since different request could be on different VLs,
  158. * each request will need it's own engine pointer.
  159. */
  160. struct sdma_engine *sde;
  161. struct sdma_req_info info;
  162. /* TID array values copied from the tid_iov vector */
  163. u32 *tids;
  164. /* total length of the data in the request */
  165. u32 data_len;
  166. /* number of elements copied to the tids array */
  167. u16 n_tids;
  168. /*
  169. * We copy the iovs for this request (based on
  170. * info.iovcnt). These are only the data vectors
  171. */
  172. u8 data_iovs;
  173. s8 ahg_idx;
  174. /* Writeable fields shared with interrupt */
  175. u64 seqcomp ____cacheline_aligned_in_smp;
  176. u64 seqsubmitted;
  177. /* status of the last txreq completed */
  178. int status;
  179. /* Send side fields */
  180. struct list_head txps ____cacheline_aligned_in_smp;
  181. u64 seqnum;
  182. /*
  183. * KDETH.OFFSET (TID) field
  184. * The offset can cover multiple packets, depending on the
  185. * size of the TID entry.
  186. */
  187. u32 tidoffset;
  188. /*
  189. * KDETH.Offset (Eager) field
  190. * We need to remember the initial value so the headers
  191. * can be updated properly.
  192. */
  193. u32 koffset;
  194. u32 sent;
  195. /* TID index copied from the tid_iov vector */
  196. u16 tididx;
  197. /* progress index moving along the iovs array */
  198. u8 iov_idx;
  199. u8 done;
  200. u8 has_error;
  201. struct user_sdma_iovec iovs[MAX_VECTORS_PER_REQ];
  202. } ____cacheline_aligned_in_smp;
  203. /*
  204. * A single txreq could span up to 3 physical pages when the MTU
  205. * is sufficiently large (> 4K). Each of the IOV pointers also
  206. * needs it's own set of flags so the vector has been handled
  207. * independently of each other.
  208. */
  209. struct user_sdma_txreq {
  210. /* Packet header for the txreq */
  211. struct hfi1_pkt_header hdr;
  212. struct sdma_txreq txreq;
  213. struct list_head list;
  214. struct user_sdma_request *req;
  215. u16 flags;
  216. unsigned int busycount;
  217. u64 seqnum;
  218. };
  219. int hfi1_user_sdma_alloc_queues(struct hfi1_ctxtdata *uctxt,
  220. struct hfi1_filedata *fd);
  221. int hfi1_user_sdma_free_queues(struct hfi1_filedata *fd,
  222. struct hfi1_ctxtdata *uctxt);
  223. int hfi1_user_sdma_process_request(struct hfi1_filedata *fd,
  224. struct iovec *iovec, unsigned long dim,
  225. unsigned long *count);
  226. #endif /* _HFI1_USER_SDMA_H */