rc.c 67 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525
  1. /*
  2. * Copyright(c) 2015, 2016 Intel Corporation.
  3. *
  4. * This file is provided under a dual BSD/GPLv2 license. When using or
  5. * redistributing this file, you may do so under either license.
  6. *
  7. * GPL LICENSE SUMMARY
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * BSD LICENSE
  19. *
  20. * Redistribution and use in source and binary forms, with or without
  21. * modification, are permitted provided that the following conditions
  22. * are met:
  23. *
  24. * - Redistributions of source code must retain the above copyright
  25. * notice, this list of conditions and the following disclaimer.
  26. * - Redistributions in binary form must reproduce the above copyright
  27. * notice, this list of conditions and the following disclaimer in
  28. * the documentation and/or other materials provided with the
  29. * distribution.
  30. * - Neither the name of Intel Corporation nor the names of its
  31. * contributors may be used to endorse or promote products derived
  32. * from this software without specific prior written permission.
  33. *
  34. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45. *
  46. */
  47. #include <linux/io.h>
  48. #include <rdma/rdma_vt.h>
  49. #include <rdma/rdmavt_qp.h>
  50. #include "hfi.h"
  51. #include "qp.h"
  52. #include "verbs_txreq.h"
  53. #include "trace.h"
  54. /* cut down ridiculously long IB macro names */
  55. #define OP(x) RC_OP(x)
  56. static u32 restart_sge(struct rvt_sge_state *ss, struct rvt_swqe *wqe,
  57. u32 psn, u32 pmtu)
  58. {
  59. u32 len;
  60. len = delta_psn(psn, wqe->psn) * pmtu;
  61. ss->sge = wqe->sg_list[0];
  62. ss->sg_list = wqe->sg_list + 1;
  63. ss->num_sge = wqe->wr.num_sge;
  64. ss->total_len = wqe->length;
  65. rvt_skip_sge(ss, len, false);
  66. return wqe->length - len;
  67. }
  68. /**
  69. * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  70. * @dev: the device for this QP
  71. * @qp: a pointer to the QP
  72. * @ohdr: a pointer to the IB header being constructed
  73. * @ps: the xmit packet state
  74. *
  75. * Return 1 if constructed; otherwise, return 0.
  76. * Note that we are in the responder's side of the QP context.
  77. * Note the QP s_lock must be held.
  78. */
  79. static int make_rc_ack(struct hfi1_ibdev *dev, struct rvt_qp *qp,
  80. struct ib_other_headers *ohdr,
  81. struct hfi1_pkt_state *ps)
  82. {
  83. struct rvt_ack_entry *e;
  84. u32 hwords;
  85. u32 len;
  86. u32 bth0;
  87. u32 bth2;
  88. int middle = 0;
  89. u32 pmtu = qp->pmtu;
  90. struct hfi1_qp_priv *priv = qp->priv;
  91. lockdep_assert_held(&qp->s_lock);
  92. /* Don't send an ACK if we aren't supposed to. */
  93. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  94. goto bail;
  95. if (priv->hdr_type == HFI1_PKT_TYPE_9B)
  96. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  97. hwords = 5;
  98. else
  99. /* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */
  100. hwords = 7;
  101. switch (qp->s_ack_state) {
  102. case OP(RDMA_READ_RESPONSE_LAST):
  103. case OP(RDMA_READ_RESPONSE_ONLY):
  104. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  105. if (e->rdma_sge.mr) {
  106. rvt_put_mr(e->rdma_sge.mr);
  107. e->rdma_sge.mr = NULL;
  108. }
  109. /* FALLTHROUGH */
  110. case OP(ATOMIC_ACKNOWLEDGE):
  111. /*
  112. * We can increment the tail pointer now that the last
  113. * response has been sent instead of only being
  114. * constructed.
  115. */
  116. if (++qp->s_tail_ack_queue > HFI1_MAX_RDMA_ATOMIC)
  117. qp->s_tail_ack_queue = 0;
  118. /* FALLTHROUGH */
  119. case OP(SEND_ONLY):
  120. case OP(ACKNOWLEDGE):
  121. /* Check for no next entry in the queue. */
  122. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  123. if (qp->s_flags & RVT_S_ACK_PENDING)
  124. goto normal;
  125. goto bail;
  126. }
  127. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  128. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  129. /*
  130. * If a RDMA read response is being resent and
  131. * we haven't seen the duplicate request yet,
  132. * then stop sending the remaining responses the
  133. * responder has seen until the requester re-sends it.
  134. */
  135. len = e->rdma_sge.sge_length;
  136. if (len && !e->rdma_sge.mr) {
  137. qp->s_tail_ack_queue = qp->r_head_ack_queue;
  138. goto bail;
  139. }
  140. /* Copy SGE state in case we need to resend */
  141. ps->s_txreq->mr = e->rdma_sge.mr;
  142. if (ps->s_txreq->mr)
  143. rvt_get_mr(ps->s_txreq->mr);
  144. qp->s_ack_rdma_sge.sge = e->rdma_sge;
  145. qp->s_ack_rdma_sge.num_sge = 1;
  146. ps->s_txreq->ss = &qp->s_ack_rdma_sge;
  147. if (len > pmtu) {
  148. len = pmtu;
  149. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  150. } else {
  151. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  152. e->sent = 1;
  153. }
  154. ohdr->u.aeth = rvt_compute_aeth(qp);
  155. hwords++;
  156. qp->s_ack_rdma_psn = e->psn;
  157. bth2 = mask_psn(qp->s_ack_rdma_psn++);
  158. } else {
  159. /* COMPARE_SWAP or FETCH_ADD */
  160. ps->s_txreq->ss = NULL;
  161. len = 0;
  162. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  163. ohdr->u.at.aeth = rvt_compute_aeth(qp);
  164. ib_u64_put(e->atomic_data, &ohdr->u.at.atomic_ack_eth);
  165. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  166. bth2 = mask_psn(e->psn);
  167. e->sent = 1;
  168. }
  169. bth0 = qp->s_ack_state << 24;
  170. break;
  171. case OP(RDMA_READ_RESPONSE_FIRST):
  172. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  173. /* FALLTHROUGH */
  174. case OP(RDMA_READ_RESPONSE_MIDDLE):
  175. ps->s_txreq->ss = &qp->s_ack_rdma_sge;
  176. ps->s_txreq->mr = qp->s_ack_rdma_sge.sge.mr;
  177. if (ps->s_txreq->mr)
  178. rvt_get_mr(ps->s_txreq->mr);
  179. len = qp->s_ack_rdma_sge.sge.sge_length;
  180. if (len > pmtu) {
  181. len = pmtu;
  182. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  183. } else {
  184. ohdr->u.aeth = rvt_compute_aeth(qp);
  185. hwords++;
  186. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  187. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  188. e->sent = 1;
  189. }
  190. bth0 = qp->s_ack_state << 24;
  191. bth2 = mask_psn(qp->s_ack_rdma_psn++);
  192. break;
  193. default:
  194. normal:
  195. /*
  196. * Send a regular ACK.
  197. * Set the s_ack_state so we wait until after sending
  198. * the ACK before setting s_ack_state to ACKNOWLEDGE
  199. * (see above).
  200. */
  201. qp->s_ack_state = OP(SEND_ONLY);
  202. qp->s_flags &= ~RVT_S_ACK_PENDING;
  203. ps->s_txreq->ss = NULL;
  204. if (qp->s_nak_state)
  205. ohdr->u.aeth =
  206. cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
  207. (qp->s_nak_state <<
  208. IB_AETH_CREDIT_SHIFT));
  209. else
  210. ohdr->u.aeth = rvt_compute_aeth(qp);
  211. hwords++;
  212. len = 0;
  213. bth0 = OP(ACKNOWLEDGE) << 24;
  214. bth2 = mask_psn(qp->s_ack_psn);
  215. }
  216. qp->s_rdma_ack_cnt++;
  217. qp->s_hdrwords = hwords;
  218. ps->s_txreq->sde = priv->s_sde;
  219. ps->s_txreq->s_cur_size = len;
  220. hfi1_make_ruc_header(qp, ohdr, bth0, bth2, middle, ps);
  221. /* pbc */
  222. ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
  223. return 1;
  224. bail:
  225. qp->s_ack_state = OP(ACKNOWLEDGE);
  226. /*
  227. * Ensure s_rdma_ack_cnt changes are committed prior to resetting
  228. * RVT_S_RESP_PENDING
  229. */
  230. smp_wmb();
  231. qp->s_flags &= ~(RVT_S_RESP_PENDING
  232. | RVT_S_ACK_PENDING
  233. | RVT_S_AHG_VALID);
  234. return 0;
  235. }
  236. /**
  237. * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  238. * @qp: a pointer to the QP
  239. *
  240. * Assumes s_lock is held.
  241. *
  242. * Return 1 if constructed; otherwise, return 0.
  243. */
  244. int hfi1_make_rc_req(struct rvt_qp *qp, struct hfi1_pkt_state *ps)
  245. {
  246. struct hfi1_qp_priv *priv = qp->priv;
  247. struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
  248. struct ib_other_headers *ohdr;
  249. struct rvt_sge_state *ss;
  250. struct rvt_swqe *wqe;
  251. u32 hwords;
  252. u32 len;
  253. u32 bth0 = 0;
  254. u32 bth2;
  255. u32 pmtu = qp->pmtu;
  256. char newreq;
  257. int middle = 0;
  258. int delta;
  259. lockdep_assert_held(&qp->s_lock);
  260. ps->s_txreq = get_txreq(ps->dev, qp);
  261. if (IS_ERR(ps->s_txreq))
  262. goto bail_no_tx;
  263. ps->s_txreq->phdr.hdr.hdr_type = priv->hdr_type;
  264. if (priv->hdr_type == HFI1_PKT_TYPE_9B) {
  265. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  266. hwords = 5;
  267. if (rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)
  268. ohdr = &ps->s_txreq->phdr.hdr.ibh.u.l.oth;
  269. else
  270. ohdr = &ps->s_txreq->phdr.hdr.ibh.u.oth;
  271. } else {
  272. /* header size in 32-bit words 16B LRH+BTH = (16+12)/4. */
  273. hwords = 7;
  274. if ((rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) &&
  275. (hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr))))
  276. ohdr = &ps->s_txreq->phdr.hdr.opah.u.l.oth;
  277. else
  278. ohdr = &ps->s_txreq->phdr.hdr.opah.u.oth;
  279. }
  280. /* Sending responses has higher priority over sending requests. */
  281. if ((qp->s_flags & RVT_S_RESP_PENDING) &&
  282. make_rc_ack(dev, qp, ohdr, ps))
  283. return 1;
  284. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_SEND_OK)) {
  285. if (!(ib_rvt_state_ops[qp->state] & RVT_FLUSH_SEND))
  286. goto bail;
  287. /* We are in the error state, flush the work request. */
  288. smp_read_barrier_depends(); /* see post_one_send() */
  289. if (qp->s_last == READ_ONCE(qp->s_head))
  290. goto bail;
  291. /* If DMAs are in progress, we can't flush immediately. */
  292. if (iowait_sdma_pending(&priv->s_iowait)) {
  293. qp->s_flags |= RVT_S_WAIT_DMA;
  294. goto bail;
  295. }
  296. clear_ahg(qp);
  297. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  298. hfi1_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
  299. IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
  300. /* will get called again */
  301. goto done_free_tx;
  302. }
  303. if (qp->s_flags & (RVT_S_WAIT_RNR | RVT_S_WAIT_ACK))
  304. goto bail;
  305. if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) {
  306. if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
  307. qp->s_flags |= RVT_S_WAIT_PSN;
  308. goto bail;
  309. }
  310. qp->s_sending_psn = qp->s_psn;
  311. qp->s_sending_hpsn = qp->s_psn - 1;
  312. }
  313. /* Send a request. */
  314. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  315. switch (qp->s_state) {
  316. default:
  317. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_NEXT_SEND_OK))
  318. goto bail;
  319. /*
  320. * Resend an old request or start a new one.
  321. *
  322. * We keep track of the current SWQE so that
  323. * we don't reset the "furthest progress" state
  324. * if we need to back up.
  325. */
  326. newreq = 0;
  327. if (qp->s_cur == qp->s_tail) {
  328. /* Check if send work queue is empty. */
  329. smp_read_barrier_depends(); /* see post_one_send() */
  330. if (qp->s_tail == READ_ONCE(qp->s_head)) {
  331. clear_ahg(qp);
  332. goto bail;
  333. }
  334. /*
  335. * If a fence is requested, wait for previous
  336. * RDMA read and atomic operations to finish.
  337. */
  338. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  339. qp->s_num_rd_atomic) {
  340. qp->s_flags |= RVT_S_WAIT_FENCE;
  341. goto bail;
  342. }
  343. /*
  344. * Local operations are processed immediately
  345. * after all prior requests have completed
  346. */
  347. if (wqe->wr.opcode == IB_WR_REG_MR ||
  348. wqe->wr.opcode == IB_WR_LOCAL_INV) {
  349. int local_ops = 0;
  350. int err = 0;
  351. if (qp->s_last != qp->s_cur)
  352. goto bail;
  353. if (++qp->s_cur == qp->s_size)
  354. qp->s_cur = 0;
  355. if (++qp->s_tail == qp->s_size)
  356. qp->s_tail = 0;
  357. if (!(wqe->wr.send_flags &
  358. RVT_SEND_COMPLETION_ONLY)) {
  359. err = rvt_invalidate_rkey(
  360. qp,
  361. wqe->wr.ex.invalidate_rkey);
  362. local_ops = 1;
  363. }
  364. hfi1_send_complete(qp, wqe,
  365. err ? IB_WC_LOC_PROT_ERR
  366. : IB_WC_SUCCESS);
  367. if (local_ops)
  368. atomic_dec(&qp->local_ops_pending);
  369. qp->s_hdrwords = 0;
  370. goto done_free_tx;
  371. }
  372. newreq = 1;
  373. qp->s_psn = wqe->psn;
  374. }
  375. /*
  376. * Note that we have to be careful not to modify the
  377. * original work request since we may need to resend
  378. * it.
  379. */
  380. len = wqe->length;
  381. ss = &qp->s_sge;
  382. bth2 = mask_psn(qp->s_psn);
  383. switch (wqe->wr.opcode) {
  384. case IB_WR_SEND:
  385. case IB_WR_SEND_WITH_IMM:
  386. case IB_WR_SEND_WITH_INV:
  387. /* If no credit, return. */
  388. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  389. rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
  390. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  391. goto bail;
  392. }
  393. if (len > pmtu) {
  394. qp->s_state = OP(SEND_FIRST);
  395. len = pmtu;
  396. break;
  397. }
  398. if (wqe->wr.opcode == IB_WR_SEND) {
  399. qp->s_state = OP(SEND_ONLY);
  400. } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
  401. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  402. /* Immediate data comes after the BTH */
  403. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  404. hwords += 1;
  405. } else {
  406. qp->s_state = OP(SEND_ONLY_WITH_INVALIDATE);
  407. /* Invalidate rkey comes after the BTH */
  408. ohdr->u.ieth = cpu_to_be32(
  409. wqe->wr.ex.invalidate_rkey);
  410. hwords += 1;
  411. }
  412. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  413. bth0 |= IB_BTH_SOLICITED;
  414. bth2 |= IB_BTH_REQ_ACK;
  415. if (++qp->s_cur == qp->s_size)
  416. qp->s_cur = 0;
  417. break;
  418. case IB_WR_RDMA_WRITE:
  419. if (newreq && !(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  420. qp->s_lsn++;
  421. goto no_flow_control;
  422. case IB_WR_RDMA_WRITE_WITH_IMM:
  423. /* If no credit, return. */
  424. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT) &&
  425. rvt_cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
  426. qp->s_flags |= RVT_S_WAIT_SSN_CREDIT;
  427. goto bail;
  428. }
  429. no_flow_control:
  430. put_ib_reth_vaddr(
  431. wqe->rdma_wr.remote_addr,
  432. &ohdr->u.rc.reth);
  433. ohdr->u.rc.reth.rkey =
  434. cpu_to_be32(wqe->rdma_wr.rkey);
  435. ohdr->u.rc.reth.length = cpu_to_be32(len);
  436. hwords += sizeof(struct ib_reth) / sizeof(u32);
  437. if (len > pmtu) {
  438. qp->s_state = OP(RDMA_WRITE_FIRST);
  439. len = pmtu;
  440. break;
  441. }
  442. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  443. qp->s_state = OP(RDMA_WRITE_ONLY);
  444. } else {
  445. qp->s_state =
  446. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  447. /* Immediate data comes after RETH */
  448. ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
  449. hwords += 1;
  450. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  451. bth0 |= IB_BTH_SOLICITED;
  452. }
  453. bth2 |= IB_BTH_REQ_ACK;
  454. if (++qp->s_cur == qp->s_size)
  455. qp->s_cur = 0;
  456. break;
  457. case IB_WR_RDMA_READ:
  458. /*
  459. * Don't allow more operations to be started
  460. * than the QP limits allow.
  461. */
  462. if (newreq) {
  463. if (qp->s_num_rd_atomic >=
  464. qp->s_max_rd_atomic) {
  465. qp->s_flags |= RVT_S_WAIT_RDMAR;
  466. goto bail;
  467. }
  468. qp->s_num_rd_atomic++;
  469. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  470. qp->s_lsn++;
  471. }
  472. put_ib_reth_vaddr(
  473. wqe->rdma_wr.remote_addr,
  474. &ohdr->u.rc.reth);
  475. ohdr->u.rc.reth.rkey =
  476. cpu_to_be32(wqe->rdma_wr.rkey);
  477. ohdr->u.rc.reth.length = cpu_to_be32(len);
  478. qp->s_state = OP(RDMA_READ_REQUEST);
  479. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  480. ss = NULL;
  481. len = 0;
  482. bth2 |= IB_BTH_REQ_ACK;
  483. if (++qp->s_cur == qp->s_size)
  484. qp->s_cur = 0;
  485. break;
  486. case IB_WR_ATOMIC_CMP_AND_SWP:
  487. case IB_WR_ATOMIC_FETCH_AND_ADD:
  488. /*
  489. * Don't allow more operations to be started
  490. * than the QP limits allow.
  491. */
  492. if (newreq) {
  493. if (qp->s_num_rd_atomic >=
  494. qp->s_max_rd_atomic) {
  495. qp->s_flags |= RVT_S_WAIT_RDMAR;
  496. goto bail;
  497. }
  498. qp->s_num_rd_atomic++;
  499. if (!(qp->s_flags & RVT_S_UNLIMITED_CREDIT))
  500. qp->s_lsn++;
  501. }
  502. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  503. qp->s_state = OP(COMPARE_SWAP);
  504. put_ib_ateth_swap(wqe->atomic_wr.swap,
  505. &ohdr->u.atomic_eth);
  506. put_ib_ateth_compare(wqe->atomic_wr.compare_add,
  507. &ohdr->u.atomic_eth);
  508. } else {
  509. qp->s_state = OP(FETCH_ADD);
  510. put_ib_ateth_swap(wqe->atomic_wr.compare_add,
  511. &ohdr->u.atomic_eth);
  512. put_ib_ateth_compare(0, &ohdr->u.atomic_eth);
  513. }
  514. put_ib_ateth_vaddr(wqe->atomic_wr.remote_addr,
  515. &ohdr->u.atomic_eth);
  516. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  517. wqe->atomic_wr.rkey);
  518. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  519. ss = NULL;
  520. len = 0;
  521. bth2 |= IB_BTH_REQ_ACK;
  522. if (++qp->s_cur == qp->s_size)
  523. qp->s_cur = 0;
  524. break;
  525. default:
  526. goto bail;
  527. }
  528. qp->s_sge.sge = wqe->sg_list[0];
  529. qp->s_sge.sg_list = wqe->sg_list + 1;
  530. qp->s_sge.num_sge = wqe->wr.num_sge;
  531. qp->s_sge.total_len = wqe->length;
  532. qp->s_len = wqe->length;
  533. if (newreq) {
  534. qp->s_tail++;
  535. if (qp->s_tail >= qp->s_size)
  536. qp->s_tail = 0;
  537. }
  538. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  539. qp->s_psn = wqe->lpsn + 1;
  540. else
  541. qp->s_psn++;
  542. break;
  543. case OP(RDMA_READ_RESPONSE_FIRST):
  544. /*
  545. * qp->s_state is normally set to the opcode of the
  546. * last packet constructed for new requests and therefore
  547. * is never set to RDMA read response.
  548. * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
  549. * thread to indicate a SEND needs to be restarted from an
  550. * earlier PSN without interfering with the sending thread.
  551. * See restart_rc().
  552. */
  553. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  554. /* FALLTHROUGH */
  555. case OP(SEND_FIRST):
  556. qp->s_state = OP(SEND_MIDDLE);
  557. /* FALLTHROUGH */
  558. case OP(SEND_MIDDLE):
  559. bth2 = mask_psn(qp->s_psn++);
  560. ss = &qp->s_sge;
  561. len = qp->s_len;
  562. if (len > pmtu) {
  563. len = pmtu;
  564. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  565. break;
  566. }
  567. if (wqe->wr.opcode == IB_WR_SEND) {
  568. qp->s_state = OP(SEND_LAST);
  569. } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
  570. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  571. /* Immediate data comes after the BTH */
  572. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  573. hwords += 1;
  574. } else {
  575. qp->s_state = OP(SEND_LAST_WITH_INVALIDATE);
  576. /* invalidate data comes after the BTH */
  577. ohdr->u.ieth = cpu_to_be32(wqe->wr.ex.invalidate_rkey);
  578. hwords += 1;
  579. }
  580. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  581. bth0 |= IB_BTH_SOLICITED;
  582. bth2 |= IB_BTH_REQ_ACK;
  583. qp->s_cur++;
  584. if (qp->s_cur >= qp->s_size)
  585. qp->s_cur = 0;
  586. break;
  587. case OP(RDMA_READ_RESPONSE_LAST):
  588. /*
  589. * qp->s_state is normally set to the opcode of the
  590. * last packet constructed for new requests and therefore
  591. * is never set to RDMA read response.
  592. * RDMA_READ_RESPONSE_LAST is used by the ACK processing
  593. * thread to indicate a RDMA write needs to be restarted from
  594. * an earlier PSN without interfering with the sending thread.
  595. * See restart_rc().
  596. */
  597. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
  598. /* FALLTHROUGH */
  599. case OP(RDMA_WRITE_FIRST):
  600. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  601. /* FALLTHROUGH */
  602. case OP(RDMA_WRITE_MIDDLE):
  603. bth2 = mask_psn(qp->s_psn++);
  604. ss = &qp->s_sge;
  605. len = qp->s_len;
  606. if (len > pmtu) {
  607. len = pmtu;
  608. middle = HFI1_CAP_IS_KSET(SDMA_AHG);
  609. break;
  610. }
  611. if (wqe->wr.opcode == IB_WR_RDMA_WRITE) {
  612. qp->s_state = OP(RDMA_WRITE_LAST);
  613. } else {
  614. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  615. /* Immediate data comes after the BTH */
  616. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  617. hwords += 1;
  618. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  619. bth0 |= IB_BTH_SOLICITED;
  620. }
  621. bth2 |= IB_BTH_REQ_ACK;
  622. qp->s_cur++;
  623. if (qp->s_cur >= qp->s_size)
  624. qp->s_cur = 0;
  625. break;
  626. case OP(RDMA_READ_RESPONSE_MIDDLE):
  627. /*
  628. * qp->s_state is normally set to the opcode of the
  629. * last packet constructed for new requests and therefore
  630. * is never set to RDMA read response.
  631. * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
  632. * thread to indicate a RDMA read needs to be restarted from
  633. * an earlier PSN without interfering with the sending thread.
  634. * See restart_rc().
  635. */
  636. len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu;
  637. put_ib_reth_vaddr(
  638. wqe->rdma_wr.remote_addr + len,
  639. &ohdr->u.rc.reth);
  640. ohdr->u.rc.reth.rkey =
  641. cpu_to_be32(wqe->rdma_wr.rkey);
  642. ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
  643. qp->s_state = OP(RDMA_READ_REQUEST);
  644. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  645. bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK;
  646. qp->s_psn = wqe->lpsn + 1;
  647. ss = NULL;
  648. len = 0;
  649. qp->s_cur++;
  650. if (qp->s_cur == qp->s_size)
  651. qp->s_cur = 0;
  652. break;
  653. }
  654. qp->s_sending_hpsn = bth2;
  655. delta = delta_psn(bth2, wqe->psn);
  656. if (delta && delta % HFI1_PSN_CREDIT == 0)
  657. bth2 |= IB_BTH_REQ_ACK;
  658. if (qp->s_flags & RVT_S_SEND_ONE) {
  659. qp->s_flags &= ~RVT_S_SEND_ONE;
  660. qp->s_flags |= RVT_S_WAIT_ACK;
  661. bth2 |= IB_BTH_REQ_ACK;
  662. }
  663. qp->s_len -= len;
  664. qp->s_hdrwords = hwords;
  665. ps->s_txreq->sde = priv->s_sde;
  666. ps->s_txreq->ss = ss;
  667. ps->s_txreq->s_cur_size = len;
  668. hfi1_make_ruc_header(
  669. qp,
  670. ohdr,
  671. bth0 | (qp->s_state << 24),
  672. bth2,
  673. middle,
  674. ps);
  675. /* pbc */
  676. ps->s_txreq->hdr_dwords = qp->s_hdrwords + 2;
  677. return 1;
  678. done_free_tx:
  679. hfi1_put_txreq(ps->s_txreq);
  680. ps->s_txreq = NULL;
  681. return 1;
  682. bail:
  683. hfi1_put_txreq(ps->s_txreq);
  684. bail_no_tx:
  685. ps->s_txreq = NULL;
  686. qp->s_flags &= ~RVT_S_BUSY;
  687. qp->s_hdrwords = 0;
  688. return 0;
  689. }
  690. static inline void hfi1_make_bth_aeth(struct rvt_qp *qp,
  691. struct ib_other_headers *ohdr,
  692. u32 bth0, u32 bth1)
  693. {
  694. if (qp->r_nak_state)
  695. ohdr->u.aeth = cpu_to_be32((qp->r_msn & IB_MSN_MASK) |
  696. (qp->r_nak_state <<
  697. IB_AETH_CREDIT_SHIFT));
  698. else
  699. ohdr->u.aeth = rvt_compute_aeth(qp);
  700. ohdr->bth[0] = cpu_to_be32(bth0);
  701. ohdr->bth[1] = cpu_to_be32(bth1 | qp->remote_qpn);
  702. ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
  703. }
  704. static inline void hfi1_queue_rc_ack(struct rvt_qp *qp, bool is_fecn)
  705. {
  706. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  707. unsigned long flags;
  708. spin_lock_irqsave(&qp->s_lock, flags);
  709. if (!(ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  710. goto unlock;
  711. this_cpu_inc(*ibp->rvp.rc_qacks);
  712. qp->s_flags |= RVT_S_ACK_PENDING | RVT_S_RESP_PENDING;
  713. qp->s_nak_state = qp->r_nak_state;
  714. qp->s_ack_psn = qp->r_ack_psn;
  715. if (is_fecn)
  716. qp->s_flags |= RVT_S_ECN;
  717. /* Schedule the send tasklet. */
  718. hfi1_schedule_send(qp);
  719. unlock:
  720. spin_unlock_irqrestore(&qp->s_lock, flags);
  721. }
  722. static inline void hfi1_make_rc_ack_9B(struct rvt_qp *qp,
  723. struct hfi1_opa_header *opa_hdr,
  724. u8 sc5, bool is_fecn,
  725. u64 *pbc_flags, u32 *hwords,
  726. u32 *nwords)
  727. {
  728. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  729. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  730. struct ib_header *hdr = &opa_hdr->ibh;
  731. struct ib_other_headers *ohdr;
  732. u16 lrh0 = HFI1_LRH_BTH;
  733. u16 pkey;
  734. u32 bth0, bth1;
  735. opa_hdr->hdr_type = HFI1_PKT_TYPE_9B;
  736. ohdr = &hdr->u.oth;
  737. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */
  738. *hwords = 6;
  739. if (unlikely(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH)) {
  740. *hwords += hfi1_make_grh(ibp, &hdr->u.l.grh,
  741. rdma_ah_read_grh(&qp->remote_ah_attr),
  742. *hwords - 2, SIZE_OF_CRC);
  743. ohdr = &hdr->u.l.oth;
  744. lrh0 = HFI1_LRH_GRH;
  745. }
  746. /* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
  747. *pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
  748. /* read pkey_index w/o lock (its atomic) */
  749. pkey = hfi1_get_pkey(ibp, qp->s_pkey_index);
  750. lrh0 |= (sc5 & IB_SC_MASK) << IB_SC_SHIFT |
  751. (rdma_ah_get_sl(&qp->remote_ah_attr) & IB_SL_MASK) <<
  752. IB_SL_SHIFT;
  753. hfi1_make_ib_hdr(hdr, lrh0, *hwords + SIZE_OF_CRC,
  754. opa_get_lid(rdma_ah_get_dlid(&qp->remote_ah_attr), 9B),
  755. ppd->lid | rdma_ah_get_path_bits(&qp->remote_ah_attr));
  756. bth0 = pkey | (OP(ACKNOWLEDGE) << 24);
  757. if (qp->s_mig_state == IB_MIG_MIGRATED)
  758. bth0 |= IB_BTH_MIG_REQ;
  759. bth1 = (!!is_fecn) << IB_BECN_SHIFT;
  760. hfi1_make_bth_aeth(qp, ohdr, bth0, bth1);
  761. }
  762. static inline void hfi1_make_rc_ack_16B(struct rvt_qp *qp,
  763. struct hfi1_opa_header *opa_hdr,
  764. u8 sc5, bool is_fecn,
  765. u64 *pbc_flags, u32 *hwords,
  766. u32 *nwords)
  767. {
  768. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  769. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  770. struct hfi1_16b_header *hdr = &opa_hdr->opah;
  771. struct ib_other_headers *ohdr;
  772. u32 bth0, bth1;
  773. u16 len, pkey;
  774. u8 becn = !!is_fecn;
  775. u8 l4 = OPA_16B_L4_IB_LOCAL;
  776. u8 extra_bytes;
  777. opa_hdr->hdr_type = HFI1_PKT_TYPE_16B;
  778. ohdr = &hdr->u.oth;
  779. /* header size in 32-bit words 16B LRH+BTH+AETH = (16+12+4)/4 */
  780. *hwords = 8;
  781. extra_bytes = hfi1_get_16b_padding(*hwords << 2, 0);
  782. *nwords = SIZE_OF_CRC + ((extra_bytes + SIZE_OF_LT) >> 2);
  783. if (unlikely(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH) &&
  784. hfi1_check_mcast(rdma_ah_get_dlid(&qp->remote_ah_attr))) {
  785. *hwords += hfi1_make_grh(ibp, &hdr->u.l.grh,
  786. rdma_ah_read_grh(&qp->remote_ah_attr),
  787. *hwords - 4, *nwords);
  788. ohdr = &hdr->u.l.oth;
  789. l4 = OPA_16B_L4_IB_GLOBAL;
  790. }
  791. *pbc_flags |= PBC_PACKET_BYPASS | PBC_INSERT_BYPASS_ICRC;
  792. /* read pkey_index w/o lock (its atomic) */
  793. pkey = hfi1_get_pkey(ibp, qp->s_pkey_index);
  794. /* Convert dwords to flits */
  795. len = (*hwords + *nwords) >> 1;
  796. hfi1_make_16b_hdr(hdr,
  797. ppd->lid | rdma_ah_get_path_bits(&qp->remote_ah_attr),
  798. opa_get_lid(rdma_ah_get_dlid(&qp->remote_ah_attr),
  799. 16B),
  800. len, pkey, becn, 0, l4, sc5);
  801. bth0 = pkey | (OP(ACKNOWLEDGE) << 24);
  802. bth0 |= extra_bytes << 20;
  803. if (qp->s_mig_state == IB_MIG_MIGRATED)
  804. bth1 = OPA_BTH_MIG_REQ;
  805. hfi1_make_bth_aeth(qp, ohdr, bth0, bth1);
  806. }
  807. typedef void (*hfi1_make_rc_ack)(struct rvt_qp *qp,
  808. struct hfi1_opa_header *opa_hdr,
  809. u8 sc5, bool is_fecn,
  810. u64 *pbc_flags, u32 *hwords,
  811. u32 *nwords);
  812. /* We support only two types - 9B and 16B for now */
  813. static const hfi1_make_rc_ack hfi1_make_rc_ack_tbl[2] = {
  814. [HFI1_PKT_TYPE_9B] = &hfi1_make_rc_ack_9B,
  815. [HFI1_PKT_TYPE_16B] = &hfi1_make_rc_ack_16B
  816. };
  817. /**
  818. * hfi1_send_rc_ack - Construct an ACK packet and send it
  819. * @qp: a pointer to the QP
  820. *
  821. * This is called from hfi1_rc_rcv() and handle_receive_interrupt().
  822. * Note that RDMA reads and atomics are handled in the
  823. * send side QP state and send engine.
  824. */
  825. void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd,
  826. struct rvt_qp *qp, bool is_fecn)
  827. {
  828. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  829. struct hfi1_qp_priv *priv = qp->priv;
  830. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  831. u8 sc5 = ibp->sl_to_sc[rdma_ah_get_sl(&qp->remote_ah_attr)];
  832. u64 pbc, pbc_flags = 0;
  833. u32 hwords = 0;
  834. u32 nwords = 0;
  835. u32 plen;
  836. struct pio_buf *pbuf;
  837. struct hfi1_opa_header opa_hdr;
  838. /* clear the defer count */
  839. qp->r_adefered = 0;
  840. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  841. if (qp->s_flags & RVT_S_RESP_PENDING) {
  842. hfi1_queue_rc_ack(qp, is_fecn);
  843. return;
  844. }
  845. /* Ensure s_rdma_ack_cnt changes are committed */
  846. smp_read_barrier_depends();
  847. if (qp->s_rdma_ack_cnt) {
  848. hfi1_queue_rc_ack(qp, is_fecn);
  849. return;
  850. }
  851. /* Don't try to send ACKs if the link isn't ACTIVE */
  852. if (driver_lstate(ppd) != IB_PORT_ACTIVE)
  853. return;
  854. /* Make the appropriate header */
  855. hfi1_make_rc_ack_tbl[priv->hdr_type](qp, &opa_hdr, sc5, is_fecn,
  856. &pbc_flags, &hwords, &nwords);
  857. plen = 2 /* PBC */ + hwords + nwords;
  858. pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps,
  859. sc_to_vlt(ppd->dd, sc5), plen);
  860. pbuf = sc_buffer_alloc(rcd->sc, plen, NULL, NULL);
  861. if (!pbuf) {
  862. /*
  863. * We have no room to send at the moment. Pass
  864. * responsibility for sending the ACK to the send engine
  865. * so that when enough buffer space becomes available,
  866. * the ACK is sent ahead of other outgoing packets.
  867. */
  868. hfi1_queue_rc_ack(qp, is_fecn);
  869. return;
  870. }
  871. trace_ack_output_ibhdr(dd_from_ibdev(qp->ibqp.device),
  872. &opa_hdr, ib_is_sc5(sc5));
  873. /* write the pbc and data */
  874. ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc,
  875. (priv->hdr_type == HFI1_PKT_TYPE_9B ?
  876. (void *)&opa_hdr.ibh :
  877. (void *)&opa_hdr.opah), hwords);
  878. return;
  879. }
  880. /**
  881. * reset_psn - reset the QP state to send starting from PSN
  882. * @qp: the QP
  883. * @psn: the packet sequence number to restart at
  884. *
  885. * This is called from hfi1_rc_rcv() to process an incoming RC ACK
  886. * for the given QP.
  887. * Called at interrupt level with the QP s_lock held.
  888. */
  889. static void reset_psn(struct rvt_qp *qp, u32 psn)
  890. {
  891. u32 n = qp->s_acked;
  892. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, n);
  893. u32 opcode;
  894. lockdep_assert_held(&qp->s_lock);
  895. qp->s_cur = n;
  896. /*
  897. * If we are starting the request from the beginning,
  898. * let the normal send code handle initialization.
  899. */
  900. if (cmp_psn(psn, wqe->psn) <= 0) {
  901. qp->s_state = OP(SEND_LAST);
  902. goto done;
  903. }
  904. /* Find the work request opcode corresponding to the given PSN. */
  905. opcode = wqe->wr.opcode;
  906. for (;;) {
  907. int diff;
  908. if (++n == qp->s_size)
  909. n = 0;
  910. if (n == qp->s_tail)
  911. break;
  912. wqe = rvt_get_swqe_ptr(qp, n);
  913. diff = cmp_psn(psn, wqe->psn);
  914. if (diff < 0)
  915. break;
  916. qp->s_cur = n;
  917. /*
  918. * If we are starting the request from the beginning,
  919. * let the normal send code handle initialization.
  920. */
  921. if (diff == 0) {
  922. qp->s_state = OP(SEND_LAST);
  923. goto done;
  924. }
  925. opcode = wqe->wr.opcode;
  926. }
  927. /*
  928. * Set the state to restart in the middle of a request.
  929. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  930. * See hfi1_make_rc_req().
  931. */
  932. switch (opcode) {
  933. case IB_WR_SEND:
  934. case IB_WR_SEND_WITH_IMM:
  935. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  936. break;
  937. case IB_WR_RDMA_WRITE:
  938. case IB_WR_RDMA_WRITE_WITH_IMM:
  939. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  940. break;
  941. case IB_WR_RDMA_READ:
  942. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  943. break;
  944. default:
  945. /*
  946. * This case shouldn't happen since its only
  947. * one PSN per req.
  948. */
  949. qp->s_state = OP(SEND_LAST);
  950. }
  951. done:
  952. qp->s_psn = psn;
  953. /*
  954. * Set RVT_S_WAIT_PSN as rc_complete() may start the timer
  955. * asynchronously before the send engine can get scheduled.
  956. * Doing it in hfi1_make_rc_req() is too late.
  957. */
  958. if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
  959. (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
  960. qp->s_flags |= RVT_S_WAIT_PSN;
  961. qp->s_flags &= ~RVT_S_AHG_VALID;
  962. }
  963. /*
  964. * Back up requester to resend the last un-ACKed request.
  965. * The QP r_lock and s_lock should be held and interrupts disabled.
  966. */
  967. void hfi1_restart_rc(struct rvt_qp *qp, u32 psn, int wait)
  968. {
  969. struct rvt_swqe *wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  970. struct hfi1_ibport *ibp;
  971. lockdep_assert_held(&qp->r_lock);
  972. lockdep_assert_held(&qp->s_lock);
  973. if (qp->s_retry == 0) {
  974. if (qp->s_mig_state == IB_MIG_ARMED) {
  975. hfi1_migrate_qp(qp);
  976. qp->s_retry = qp->s_retry_cnt;
  977. } else if (qp->s_last == qp->s_acked) {
  978. hfi1_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
  979. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  980. return;
  981. } else { /* need to handle delayed completion */
  982. return;
  983. }
  984. } else {
  985. qp->s_retry--;
  986. }
  987. ibp = to_iport(qp->ibqp.device, qp->port_num);
  988. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  989. ibp->rvp.n_rc_resends++;
  990. else
  991. ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
  992. qp->s_flags &= ~(RVT_S_WAIT_FENCE | RVT_S_WAIT_RDMAR |
  993. RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_PSN |
  994. RVT_S_WAIT_ACK);
  995. if (wait)
  996. qp->s_flags |= RVT_S_SEND_ONE;
  997. reset_psn(qp, psn);
  998. }
  999. /*
  1000. * Set qp->s_sending_psn to the next PSN after the given one.
  1001. * This would be psn+1 except when RDMA reads are present.
  1002. */
  1003. static void reset_sending_psn(struct rvt_qp *qp, u32 psn)
  1004. {
  1005. struct rvt_swqe *wqe;
  1006. u32 n = qp->s_last;
  1007. lockdep_assert_held(&qp->s_lock);
  1008. /* Find the work request corresponding to the given PSN. */
  1009. for (;;) {
  1010. wqe = rvt_get_swqe_ptr(qp, n);
  1011. if (cmp_psn(psn, wqe->lpsn) <= 0) {
  1012. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  1013. qp->s_sending_psn = wqe->lpsn + 1;
  1014. else
  1015. qp->s_sending_psn = psn + 1;
  1016. break;
  1017. }
  1018. if (++n == qp->s_size)
  1019. n = 0;
  1020. if (n == qp->s_tail)
  1021. break;
  1022. }
  1023. }
  1024. /*
  1025. * This should be called with the QP s_lock held and interrupts disabled.
  1026. */
  1027. void hfi1_rc_send_complete(struct rvt_qp *qp, struct hfi1_opa_header *opah)
  1028. {
  1029. struct ib_other_headers *ohdr;
  1030. struct hfi1_qp_priv *priv = qp->priv;
  1031. struct rvt_swqe *wqe;
  1032. struct ib_header *hdr = NULL;
  1033. struct hfi1_16b_header *hdr_16b = NULL;
  1034. u32 opcode;
  1035. u32 psn;
  1036. lockdep_assert_held(&qp->s_lock);
  1037. if (!(ib_rvt_state_ops[qp->state] & RVT_SEND_OR_FLUSH_OR_RECV_OK))
  1038. return;
  1039. /* Find out where the BTH is */
  1040. if (priv->hdr_type == HFI1_PKT_TYPE_9B) {
  1041. hdr = &opah->ibh;
  1042. if (ib_get_lnh(hdr) == HFI1_LRH_BTH)
  1043. ohdr = &hdr->u.oth;
  1044. else
  1045. ohdr = &hdr->u.l.oth;
  1046. } else {
  1047. u8 l4;
  1048. hdr_16b = &opah->opah;
  1049. l4 = hfi1_16B_get_l4(hdr_16b);
  1050. if (l4 == OPA_16B_L4_IB_LOCAL)
  1051. ohdr = &hdr_16b->u.oth;
  1052. else
  1053. ohdr = &hdr_16b->u.l.oth;
  1054. }
  1055. opcode = ib_bth_get_opcode(ohdr);
  1056. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1057. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1058. WARN_ON(!qp->s_rdma_ack_cnt);
  1059. qp->s_rdma_ack_cnt--;
  1060. return;
  1061. }
  1062. psn = ib_bth_get_psn(ohdr);
  1063. reset_sending_psn(qp, psn);
  1064. /*
  1065. * Start timer after a packet requesting an ACK has been sent and
  1066. * there are still requests that haven't been acked.
  1067. */
  1068. if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
  1069. !(qp->s_flags &
  1070. (RVT_S_TIMER | RVT_S_WAIT_RNR | RVT_S_WAIT_PSN)) &&
  1071. (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK))
  1072. rvt_add_retry_timer(qp);
  1073. while (qp->s_last != qp->s_acked) {
  1074. u32 s_last;
  1075. wqe = rvt_get_swqe_ptr(qp, qp->s_last);
  1076. if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
  1077. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
  1078. break;
  1079. s_last = qp->s_last;
  1080. trace_hfi1_qp_send_completion(qp, wqe, s_last);
  1081. if (++s_last >= qp->s_size)
  1082. s_last = 0;
  1083. qp->s_last = s_last;
  1084. /* see post_send() */
  1085. barrier();
  1086. rvt_put_swqe(wqe);
  1087. rvt_qp_swqe_complete(qp,
  1088. wqe,
  1089. ib_hfi1_wc_opcode[wqe->wr.opcode],
  1090. IB_WC_SUCCESS);
  1091. }
  1092. /*
  1093. * If we were waiting for sends to complete before re-sending,
  1094. * and they are now complete, restart sending.
  1095. */
  1096. trace_hfi1_sendcomplete(qp, psn);
  1097. if (qp->s_flags & RVT_S_WAIT_PSN &&
  1098. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  1099. qp->s_flags &= ~RVT_S_WAIT_PSN;
  1100. qp->s_sending_psn = qp->s_psn;
  1101. qp->s_sending_hpsn = qp->s_psn - 1;
  1102. hfi1_schedule_send(qp);
  1103. }
  1104. }
  1105. static inline void update_last_psn(struct rvt_qp *qp, u32 psn)
  1106. {
  1107. qp->s_last_psn = psn;
  1108. }
  1109. /*
  1110. * Generate a SWQE completion.
  1111. * This is similar to hfi1_send_complete but has to check to be sure
  1112. * that the SGEs are not being referenced if the SWQE is being resent.
  1113. */
  1114. static struct rvt_swqe *do_rc_completion(struct rvt_qp *qp,
  1115. struct rvt_swqe *wqe,
  1116. struct hfi1_ibport *ibp)
  1117. {
  1118. lockdep_assert_held(&qp->s_lock);
  1119. /*
  1120. * Don't decrement refcount and don't generate a
  1121. * completion if the SWQE is being resent until the send
  1122. * is finished.
  1123. */
  1124. if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
  1125. cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
  1126. u32 s_last;
  1127. rvt_put_swqe(wqe);
  1128. s_last = qp->s_last;
  1129. trace_hfi1_qp_send_completion(qp, wqe, s_last);
  1130. if (++s_last >= qp->s_size)
  1131. s_last = 0;
  1132. qp->s_last = s_last;
  1133. /* see post_send() */
  1134. barrier();
  1135. rvt_qp_swqe_complete(qp,
  1136. wqe,
  1137. ib_hfi1_wc_opcode[wqe->wr.opcode],
  1138. IB_WC_SUCCESS);
  1139. } else {
  1140. struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
  1141. this_cpu_inc(*ibp->rvp.rc_delayed_comp);
  1142. /*
  1143. * If send progress not running attempt to progress
  1144. * SDMA queue.
  1145. */
  1146. if (ppd->dd->flags & HFI1_HAS_SEND_DMA) {
  1147. struct sdma_engine *engine;
  1148. u8 sl = rdma_ah_get_sl(&qp->remote_ah_attr);
  1149. u8 sc5;
  1150. /* For now use sc to find engine */
  1151. sc5 = ibp->sl_to_sc[sl];
  1152. engine = qp_to_sdma_engine(qp, sc5);
  1153. sdma_engine_progress_schedule(engine);
  1154. }
  1155. }
  1156. qp->s_retry = qp->s_retry_cnt;
  1157. update_last_psn(qp, wqe->lpsn);
  1158. /*
  1159. * If we are completing a request which is in the process of
  1160. * being resent, we can stop re-sending it since we know the
  1161. * responder has already seen it.
  1162. */
  1163. if (qp->s_acked == qp->s_cur) {
  1164. if (++qp->s_cur >= qp->s_size)
  1165. qp->s_cur = 0;
  1166. qp->s_acked = qp->s_cur;
  1167. wqe = rvt_get_swqe_ptr(qp, qp->s_cur);
  1168. if (qp->s_acked != qp->s_tail) {
  1169. qp->s_state = OP(SEND_LAST);
  1170. qp->s_psn = wqe->psn;
  1171. }
  1172. } else {
  1173. if (++qp->s_acked >= qp->s_size)
  1174. qp->s_acked = 0;
  1175. if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
  1176. qp->s_draining = 0;
  1177. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1178. }
  1179. return wqe;
  1180. }
  1181. /**
  1182. * do_rc_ack - process an incoming RC ACK
  1183. * @qp: the QP the ACK came in on
  1184. * @psn: the packet sequence number of the ACK
  1185. * @opcode: the opcode of the request that resulted in the ACK
  1186. *
  1187. * This is called from rc_rcv_resp() to process an incoming RC ACK
  1188. * for the given QP.
  1189. * May be called at interrupt level, with the QP s_lock held.
  1190. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  1191. */
  1192. static int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode,
  1193. u64 val, struct hfi1_ctxtdata *rcd)
  1194. {
  1195. struct hfi1_ibport *ibp;
  1196. enum ib_wc_status status;
  1197. struct rvt_swqe *wqe;
  1198. int ret = 0;
  1199. u32 ack_psn;
  1200. int diff;
  1201. lockdep_assert_held(&qp->s_lock);
  1202. /*
  1203. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  1204. * requests and implicitly NAK RDMA read and atomic requests issued
  1205. * before the NAK'ed request. The MSN won't include the NAK'ed
  1206. * request but will include an ACK'ed request(s).
  1207. */
  1208. ack_psn = psn;
  1209. if (aeth >> IB_AETH_NAK_SHIFT)
  1210. ack_psn--;
  1211. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1212. ibp = rcd_to_iport(rcd);
  1213. /*
  1214. * The MSN might be for a later WQE than the PSN indicates so
  1215. * only complete WQEs that the PSN finishes.
  1216. */
  1217. while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) {
  1218. /*
  1219. * RDMA_READ_RESPONSE_ONLY is a special case since
  1220. * we want to generate completion events for everything
  1221. * before the RDMA read, copy the data, then generate
  1222. * the completion for the read.
  1223. */
  1224. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  1225. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  1226. diff == 0) {
  1227. ret = 1;
  1228. goto bail_stop;
  1229. }
  1230. /*
  1231. * If this request is a RDMA read or atomic, and the ACK is
  1232. * for a later operation, this ACK NAKs the RDMA read or
  1233. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  1234. * can ACK a RDMA read and likewise for atomic ops. Note
  1235. * that the NAK case can only happen if relaxed ordering is
  1236. * used and requests are sent after an RDMA read or atomic
  1237. * is sent but before the response is received.
  1238. */
  1239. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  1240. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  1241. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1242. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  1243. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  1244. /* Retry this request. */
  1245. if (!(qp->r_flags & RVT_R_RDMAR_SEQ)) {
  1246. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1247. hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
  1248. if (list_empty(&qp->rspwait)) {
  1249. qp->r_flags |= RVT_R_RSP_SEND;
  1250. rvt_get_qp(qp);
  1251. list_add_tail(&qp->rspwait,
  1252. &rcd->qp_wait_list);
  1253. }
  1254. }
  1255. /*
  1256. * No need to process the ACK/NAK since we are
  1257. * restarting an earlier request.
  1258. */
  1259. goto bail_stop;
  1260. }
  1261. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1262. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
  1263. u64 *vaddr = wqe->sg_list[0].vaddr;
  1264. *vaddr = val;
  1265. }
  1266. if (qp->s_num_rd_atomic &&
  1267. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1268. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1269. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  1270. qp->s_num_rd_atomic--;
  1271. /* Restart sending task if fence is complete */
  1272. if ((qp->s_flags & RVT_S_WAIT_FENCE) &&
  1273. !qp->s_num_rd_atomic) {
  1274. qp->s_flags &= ~(RVT_S_WAIT_FENCE |
  1275. RVT_S_WAIT_ACK);
  1276. hfi1_schedule_send(qp);
  1277. } else if (qp->s_flags & RVT_S_WAIT_RDMAR) {
  1278. qp->s_flags &= ~(RVT_S_WAIT_RDMAR |
  1279. RVT_S_WAIT_ACK);
  1280. hfi1_schedule_send(qp);
  1281. }
  1282. }
  1283. wqe = do_rc_completion(qp, wqe, ibp);
  1284. if (qp->s_acked == qp->s_tail)
  1285. break;
  1286. }
  1287. switch (aeth >> IB_AETH_NAK_SHIFT) {
  1288. case 0: /* ACK */
  1289. this_cpu_inc(*ibp->rvp.rc_acks);
  1290. if (qp->s_acked != qp->s_tail) {
  1291. /*
  1292. * We are expecting more ACKs so
  1293. * mod the retry timer.
  1294. */
  1295. rvt_mod_retry_timer(qp);
  1296. /*
  1297. * We can stop re-sending the earlier packets and
  1298. * continue with the next packet the receiver wants.
  1299. */
  1300. if (cmp_psn(qp->s_psn, psn) <= 0)
  1301. reset_psn(qp, psn + 1);
  1302. } else {
  1303. /* No more acks - kill all timers */
  1304. rvt_stop_rc_timers(qp);
  1305. if (cmp_psn(qp->s_psn, psn) <= 0) {
  1306. qp->s_state = OP(SEND_LAST);
  1307. qp->s_psn = psn + 1;
  1308. }
  1309. }
  1310. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1311. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1312. hfi1_schedule_send(qp);
  1313. }
  1314. rvt_get_credit(qp, aeth);
  1315. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1316. qp->s_retry = qp->s_retry_cnt;
  1317. update_last_psn(qp, psn);
  1318. return 1;
  1319. case 1: /* RNR NAK */
  1320. ibp->rvp.n_rnr_naks++;
  1321. if (qp->s_acked == qp->s_tail)
  1322. goto bail_stop;
  1323. if (qp->s_flags & RVT_S_WAIT_RNR)
  1324. goto bail_stop;
  1325. if (qp->s_rnr_retry == 0) {
  1326. status = IB_WC_RNR_RETRY_EXC_ERR;
  1327. goto class_b;
  1328. }
  1329. if (qp->s_rnr_retry_cnt < 7)
  1330. qp->s_rnr_retry--;
  1331. /* The last valid PSN is the previous PSN. */
  1332. update_last_psn(qp, psn - 1);
  1333. ibp->rvp.n_rc_resends += delta_psn(qp->s_psn, psn);
  1334. reset_psn(qp, psn);
  1335. qp->s_flags &= ~(RVT_S_WAIT_SSN_CREDIT | RVT_S_WAIT_ACK);
  1336. rvt_stop_rc_timers(qp);
  1337. rvt_add_rnr_timer(qp, aeth);
  1338. return 0;
  1339. case 3: /* NAK */
  1340. if (qp->s_acked == qp->s_tail)
  1341. goto bail_stop;
  1342. /* The last valid PSN is the previous PSN. */
  1343. update_last_psn(qp, psn - 1);
  1344. switch ((aeth >> IB_AETH_CREDIT_SHIFT) &
  1345. IB_AETH_CREDIT_MASK) {
  1346. case 0: /* PSN sequence error */
  1347. ibp->rvp.n_seq_naks++;
  1348. /*
  1349. * Back up to the responder's expected PSN.
  1350. * Note that we might get a NAK in the middle of an
  1351. * RDMA READ response which terminates the RDMA
  1352. * READ.
  1353. */
  1354. hfi1_restart_rc(qp, psn, 0);
  1355. hfi1_schedule_send(qp);
  1356. break;
  1357. case 1: /* Invalid Request */
  1358. status = IB_WC_REM_INV_REQ_ERR;
  1359. ibp->rvp.n_other_naks++;
  1360. goto class_b;
  1361. case 2: /* Remote Access Error */
  1362. status = IB_WC_REM_ACCESS_ERR;
  1363. ibp->rvp.n_other_naks++;
  1364. goto class_b;
  1365. case 3: /* Remote Operation Error */
  1366. status = IB_WC_REM_OP_ERR;
  1367. ibp->rvp.n_other_naks++;
  1368. class_b:
  1369. if (qp->s_last == qp->s_acked) {
  1370. hfi1_send_complete(qp, wqe, status);
  1371. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1372. }
  1373. break;
  1374. default:
  1375. /* Ignore other reserved NAK error codes */
  1376. goto reserved;
  1377. }
  1378. qp->s_retry = qp->s_retry_cnt;
  1379. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  1380. goto bail_stop;
  1381. default: /* 2: reserved */
  1382. reserved:
  1383. /* Ignore reserved NAK codes. */
  1384. goto bail_stop;
  1385. }
  1386. /* cannot be reached */
  1387. bail_stop:
  1388. rvt_stop_rc_timers(qp);
  1389. return ret;
  1390. }
  1391. /*
  1392. * We have seen an out of sequence RDMA read middle or last packet.
  1393. * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
  1394. */
  1395. static void rdma_seq_err(struct rvt_qp *qp, struct hfi1_ibport *ibp, u32 psn,
  1396. struct hfi1_ctxtdata *rcd)
  1397. {
  1398. struct rvt_swqe *wqe;
  1399. lockdep_assert_held(&qp->s_lock);
  1400. /* Remove QP from retry timer */
  1401. rvt_stop_rc_timers(qp);
  1402. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1403. while (cmp_psn(psn, wqe->lpsn) > 0) {
  1404. if (wqe->wr.opcode == IB_WR_RDMA_READ ||
  1405. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  1406. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  1407. break;
  1408. wqe = do_rc_completion(qp, wqe, ibp);
  1409. }
  1410. ibp->rvp.n_rdma_seq++;
  1411. qp->r_flags |= RVT_R_RDMAR_SEQ;
  1412. hfi1_restart_rc(qp, qp->s_last_psn + 1, 0);
  1413. if (list_empty(&qp->rspwait)) {
  1414. qp->r_flags |= RVT_R_RSP_SEND;
  1415. rvt_get_qp(qp);
  1416. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1417. }
  1418. }
  1419. /**
  1420. * rc_rcv_resp - process an incoming RC response packet
  1421. * @packet: data packet information
  1422. *
  1423. * This is called from hfi1_rc_rcv() to process an incoming RC response
  1424. * packet for the given QP.
  1425. * Called at interrupt level.
  1426. */
  1427. static void rc_rcv_resp(struct hfi1_packet *packet)
  1428. {
  1429. struct hfi1_ctxtdata *rcd = packet->rcd;
  1430. void *data = packet->payload;
  1431. u32 tlen = packet->tlen;
  1432. struct rvt_qp *qp = packet->qp;
  1433. struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
  1434. struct ib_other_headers *ohdr = packet->ohdr;
  1435. struct rvt_swqe *wqe;
  1436. enum ib_wc_status status;
  1437. unsigned long flags;
  1438. int diff;
  1439. u64 val;
  1440. u32 aeth;
  1441. u32 psn = ib_bth_get_psn(packet->ohdr);
  1442. u32 pmtu = qp->pmtu;
  1443. u16 hdrsize = packet->hlen;
  1444. u8 opcode = packet->opcode;
  1445. u8 pad = packet->pad;
  1446. u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2);
  1447. spin_lock_irqsave(&qp->s_lock, flags);
  1448. trace_hfi1_ack(qp, psn);
  1449. /* Ignore invalid responses. */
  1450. smp_read_barrier_depends(); /* see post_one_send */
  1451. if (cmp_psn(psn, READ_ONCE(qp->s_next_psn)) >= 0)
  1452. goto ack_done;
  1453. /* Ignore duplicate responses. */
  1454. diff = cmp_psn(psn, qp->s_last_psn);
  1455. if (unlikely(diff <= 0)) {
  1456. /* Update credits for "ghost" ACKs */
  1457. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1458. aeth = be32_to_cpu(ohdr->u.aeth);
  1459. if ((aeth >> IB_AETH_NAK_SHIFT) == 0)
  1460. rvt_get_credit(qp, aeth);
  1461. }
  1462. goto ack_done;
  1463. }
  1464. /*
  1465. * Skip everything other than the PSN we expect, if we are waiting
  1466. * for a reply to a restarted RDMA read or atomic op.
  1467. */
  1468. if (qp->r_flags & RVT_R_RDMAR_SEQ) {
  1469. if (cmp_psn(psn, qp->s_last_psn + 1) != 0)
  1470. goto ack_done;
  1471. qp->r_flags &= ~RVT_R_RDMAR_SEQ;
  1472. }
  1473. if (unlikely(qp->s_acked == qp->s_tail))
  1474. goto ack_done;
  1475. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1476. status = IB_WC_SUCCESS;
  1477. switch (opcode) {
  1478. case OP(ACKNOWLEDGE):
  1479. case OP(ATOMIC_ACKNOWLEDGE):
  1480. case OP(RDMA_READ_RESPONSE_FIRST):
  1481. aeth = be32_to_cpu(ohdr->u.aeth);
  1482. if (opcode == OP(ATOMIC_ACKNOWLEDGE))
  1483. val = ib_u64_get(&ohdr->u.at.atomic_ack_eth);
  1484. else
  1485. val = 0;
  1486. if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
  1487. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1488. goto ack_done;
  1489. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1490. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1491. goto ack_op_err;
  1492. /*
  1493. * If this is a response to a resent RDMA read, we
  1494. * have to be careful to copy the data to the right
  1495. * location.
  1496. */
  1497. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1498. wqe, psn, pmtu);
  1499. goto read_middle;
  1500. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1501. /* no AETH, no ACK */
  1502. if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
  1503. goto ack_seq_err;
  1504. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1505. goto ack_op_err;
  1506. read_middle:
  1507. if (unlikely(tlen != (hdrsize + pmtu + extra_bytes)))
  1508. goto ack_len_err;
  1509. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1510. goto ack_len_err;
  1511. /*
  1512. * We got a response so update the timeout.
  1513. * 4.096 usec. * (1 << qp->timeout)
  1514. */
  1515. rvt_mod_retry_timer(qp);
  1516. if (qp->s_flags & RVT_S_WAIT_ACK) {
  1517. qp->s_flags &= ~RVT_S_WAIT_ACK;
  1518. hfi1_schedule_send(qp);
  1519. }
  1520. if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
  1521. qp->s_retry = qp->s_retry_cnt;
  1522. /*
  1523. * Update the RDMA receive state but do the copy w/o
  1524. * holding the locks and blocking interrupts.
  1525. */
  1526. qp->s_rdma_read_len -= pmtu;
  1527. update_last_psn(qp, psn);
  1528. spin_unlock_irqrestore(&qp->s_lock, flags);
  1529. hfi1_copy_sge(&qp->s_rdma_read_sge, data, pmtu, false, false);
  1530. goto bail;
  1531. case OP(RDMA_READ_RESPONSE_ONLY):
  1532. aeth = be32_to_cpu(ohdr->u.aeth);
  1533. if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
  1534. goto ack_done;
  1535. /*
  1536. * Check that the data size is >= 0 && <= pmtu.
  1537. * Remember to account for ICRC (4).
  1538. */
  1539. if (unlikely(tlen < (hdrsize + extra_bytes)))
  1540. goto ack_len_err;
  1541. /*
  1542. * If this is a response to a resent RDMA read, we
  1543. * have to be careful to copy the data to the right
  1544. * location.
  1545. */
  1546. wqe = rvt_get_swqe_ptr(qp, qp->s_acked);
  1547. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1548. wqe, psn, pmtu);
  1549. goto read_last;
  1550. case OP(RDMA_READ_RESPONSE_LAST):
  1551. /* ACKs READ req. */
  1552. if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
  1553. goto ack_seq_err;
  1554. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1555. goto ack_op_err;
  1556. /*
  1557. * Check that the data size is >= 1 && <= pmtu.
  1558. * Remember to account for ICRC (4).
  1559. */
  1560. if (unlikely(tlen <= (hdrsize + extra_bytes)))
  1561. goto ack_len_err;
  1562. read_last:
  1563. tlen -= hdrsize + extra_bytes;
  1564. if (unlikely(tlen != qp->s_rdma_read_len))
  1565. goto ack_len_err;
  1566. aeth = be32_to_cpu(ohdr->u.aeth);
  1567. hfi1_copy_sge(&qp->s_rdma_read_sge, data, tlen, false, false);
  1568. WARN_ON(qp->s_rdma_read_sge.num_sge);
  1569. (void)do_rc_ack(qp, aeth, psn,
  1570. OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
  1571. goto ack_done;
  1572. }
  1573. ack_op_err:
  1574. status = IB_WC_LOC_QP_OP_ERR;
  1575. goto ack_err;
  1576. ack_seq_err:
  1577. rdma_seq_err(qp, ibp, psn, rcd);
  1578. goto ack_done;
  1579. ack_len_err:
  1580. status = IB_WC_LOC_LEN_ERR;
  1581. ack_err:
  1582. if (qp->s_last == qp->s_acked) {
  1583. hfi1_send_complete(qp, wqe, status);
  1584. rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1585. }
  1586. ack_done:
  1587. spin_unlock_irqrestore(&qp->s_lock, flags);
  1588. bail:
  1589. return;
  1590. }
  1591. static inline void rc_defered_ack(struct hfi1_ctxtdata *rcd,
  1592. struct rvt_qp *qp)
  1593. {
  1594. if (list_empty(&qp->rspwait)) {
  1595. qp->r_flags |= RVT_R_RSP_NAK;
  1596. rvt_get_qp(qp);
  1597. list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
  1598. }
  1599. }
  1600. static inline void rc_cancel_ack(struct rvt_qp *qp)
  1601. {
  1602. qp->r_adefered = 0;
  1603. if (list_empty(&qp->rspwait))
  1604. return;
  1605. list_del_init(&qp->rspwait);
  1606. qp->r_flags &= ~RVT_R_RSP_NAK;
  1607. rvt_put_qp(qp);
  1608. }
  1609. /**
  1610. * rc_rcv_error - process an incoming duplicate or error RC packet
  1611. * @ohdr: the other headers for this packet
  1612. * @data: the packet data
  1613. * @qp: the QP for this packet
  1614. * @opcode: the opcode for this packet
  1615. * @psn: the packet sequence number for this packet
  1616. * @diff: the difference between the PSN and the expected PSN
  1617. *
  1618. * This is called from hfi1_rc_rcv() to process an unexpected
  1619. * incoming RC packet for the given QP.
  1620. * Called at interrupt level.
  1621. * Return 1 if no more processing is needed; otherwise return 0 to
  1622. * schedule a response to be sent.
  1623. */
  1624. static noinline int rc_rcv_error(struct ib_other_headers *ohdr, void *data,
  1625. struct rvt_qp *qp, u32 opcode, u32 psn,
  1626. int diff, struct hfi1_ctxtdata *rcd)
  1627. {
  1628. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  1629. struct rvt_ack_entry *e;
  1630. unsigned long flags;
  1631. u8 i, prev;
  1632. int old_req;
  1633. trace_hfi1_rcv_error(qp, psn);
  1634. if (diff > 0) {
  1635. /*
  1636. * Packet sequence error.
  1637. * A NAK will ACK earlier sends and RDMA writes.
  1638. * Don't queue the NAK if we already sent one.
  1639. */
  1640. if (!qp->r_nak_state) {
  1641. ibp->rvp.n_rc_seqnak++;
  1642. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1643. /* Use the expected PSN. */
  1644. qp->r_ack_psn = qp->r_psn;
  1645. /*
  1646. * Wait to send the sequence NAK until all packets
  1647. * in the receive queue have been processed.
  1648. * Otherwise, we end up propagating congestion.
  1649. */
  1650. rc_defered_ack(rcd, qp);
  1651. }
  1652. goto done;
  1653. }
  1654. /*
  1655. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1656. * write or atomic op. Don't NAK errors, just silently drop
  1657. * the duplicate request. Note that r_sge, r_len, and
  1658. * r_rcv_len may be in use so don't modify them.
  1659. *
  1660. * We are supposed to ACK the earliest duplicate PSN but we
  1661. * can coalesce an outstanding duplicate ACK. We have to
  1662. * send the earliest so that RDMA reads can be restarted at
  1663. * the requester's expected PSN.
  1664. *
  1665. * First, find where this duplicate PSN falls within the
  1666. * ACKs previously sent.
  1667. * old_req is true if there is an older response that is scheduled
  1668. * to be sent before sending this one.
  1669. */
  1670. e = NULL;
  1671. old_req = 1;
  1672. ibp->rvp.n_rc_dupreq++;
  1673. spin_lock_irqsave(&qp->s_lock, flags);
  1674. for (i = qp->r_head_ack_queue; ; i = prev) {
  1675. if (i == qp->s_tail_ack_queue)
  1676. old_req = 0;
  1677. if (i)
  1678. prev = i - 1;
  1679. else
  1680. prev = HFI1_MAX_RDMA_ATOMIC;
  1681. if (prev == qp->r_head_ack_queue) {
  1682. e = NULL;
  1683. break;
  1684. }
  1685. e = &qp->s_ack_queue[prev];
  1686. if (!e->opcode) {
  1687. e = NULL;
  1688. break;
  1689. }
  1690. if (cmp_psn(psn, e->psn) >= 0) {
  1691. if (prev == qp->s_tail_ack_queue &&
  1692. cmp_psn(psn, e->lpsn) <= 0)
  1693. old_req = 0;
  1694. break;
  1695. }
  1696. }
  1697. switch (opcode) {
  1698. case OP(RDMA_READ_REQUEST): {
  1699. struct ib_reth *reth;
  1700. u32 offset;
  1701. u32 len;
  1702. /*
  1703. * If we didn't find the RDMA read request in the ack queue,
  1704. * we can ignore this request.
  1705. */
  1706. if (!e || e->opcode != OP(RDMA_READ_REQUEST))
  1707. goto unlock_done;
  1708. /* RETH comes after BTH */
  1709. reth = &ohdr->u.rc.reth;
  1710. /*
  1711. * Address range must be a subset of the original
  1712. * request and start on pmtu boundaries.
  1713. * We reuse the old ack_queue slot since the requester
  1714. * should not back up and request an earlier PSN for the
  1715. * same request.
  1716. */
  1717. offset = delta_psn(psn, e->psn) * qp->pmtu;
  1718. len = be32_to_cpu(reth->length);
  1719. if (unlikely(offset + len != e->rdma_sge.sge_length))
  1720. goto unlock_done;
  1721. if (e->rdma_sge.mr) {
  1722. rvt_put_mr(e->rdma_sge.mr);
  1723. e->rdma_sge.mr = NULL;
  1724. }
  1725. if (len != 0) {
  1726. u32 rkey = be32_to_cpu(reth->rkey);
  1727. u64 vaddr = get_ib_reth_vaddr(reth);
  1728. int ok;
  1729. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
  1730. IB_ACCESS_REMOTE_READ);
  1731. if (unlikely(!ok))
  1732. goto unlock_done;
  1733. } else {
  1734. e->rdma_sge.vaddr = NULL;
  1735. e->rdma_sge.length = 0;
  1736. e->rdma_sge.sge_length = 0;
  1737. }
  1738. e->psn = psn;
  1739. if (old_req)
  1740. goto unlock_done;
  1741. qp->s_tail_ack_queue = prev;
  1742. break;
  1743. }
  1744. case OP(COMPARE_SWAP):
  1745. case OP(FETCH_ADD): {
  1746. /*
  1747. * If we didn't find the atomic request in the ack queue
  1748. * or the send engine is already backed up to send an
  1749. * earlier entry, we can ignore this request.
  1750. */
  1751. if (!e || e->opcode != (u8)opcode || old_req)
  1752. goto unlock_done;
  1753. qp->s_tail_ack_queue = prev;
  1754. break;
  1755. }
  1756. default:
  1757. /*
  1758. * Ignore this operation if it doesn't request an ACK
  1759. * or an earlier RDMA read or atomic is going to be resent.
  1760. */
  1761. if (!(psn & IB_BTH_REQ_ACK) || old_req)
  1762. goto unlock_done;
  1763. /*
  1764. * Resend the most recent ACK if this request is
  1765. * after all the previous RDMA reads and atomics.
  1766. */
  1767. if (i == qp->r_head_ack_queue) {
  1768. spin_unlock_irqrestore(&qp->s_lock, flags);
  1769. qp->r_nak_state = 0;
  1770. qp->r_ack_psn = qp->r_psn - 1;
  1771. goto send_ack;
  1772. }
  1773. /*
  1774. * Resend the RDMA read or atomic op which
  1775. * ACKs this duplicate request.
  1776. */
  1777. qp->s_tail_ack_queue = i;
  1778. break;
  1779. }
  1780. qp->s_ack_state = OP(ACKNOWLEDGE);
  1781. qp->s_flags |= RVT_S_RESP_PENDING;
  1782. qp->r_nak_state = 0;
  1783. hfi1_schedule_send(qp);
  1784. unlock_done:
  1785. spin_unlock_irqrestore(&qp->s_lock, flags);
  1786. done:
  1787. return 1;
  1788. send_ack:
  1789. return 0;
  1790. }
  1791. static inline void update_ack_queue(struct rvt_qp *qp, unsigned n)
  1792. {
  1793. unsigned next;
  1794. next = n + 1;
  1795. if (next > HFI1_MAX_RDMA_ATOMIC)
  1796. next = 0;
  1797. qp->s_tail_ack_queue = next;
  1798. qp->s_ack_state = OP(ACKNOWLEDGE);
  1799. }
  1800. static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid,
  1801. u32 lqpn, u32 rqpn, u8 svc_type)
  1802. {
  1803. struct opa_hfi1_cong_log_event_internal *cc_event;
  1804. unsigned long flags;
  1805. if (sl >= OPA_MAX_SLS)
  1806. return;
  1807. spin_lock_irqsave(&ppd->cc_log_lock, flags);
  1808. ppd->threshold_cong_event_map[sl / 8] |= 1 << (sl % 8);
  1809. ppd->threshold_event_counter++;
  1810. cc_event = &ppd->cc_events[ppd->cc_log_idx++];
  1811. if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS)
  1812. ppd->cc_log_idx = 0;
  1813. cc_event->lqpn = lqpn & RVT_QPN_MASK;
  1814. cc_event->rqpn = rqpn & RVT_QPN_MASK;
  1815. cc_event->sl = sl;
  1816. cc_event->svc_type = svc_type;
  1817. cc_event->rlid = rlid;
  1818. /* keep timestamp in units of 1.024 usec */
  1819. cc_event->timestamp = ktime_to_ns(ktime_get()) / 1024;
  1820. spin_unlock_irqrestore(&ppd->cc_log_lock, flags);
  1821. }
  1822. void process_becn(struct hfi1_pportdata *ppd, u8 sl, u32 rlid, u32 lqpn,
  1823. u32 rqpn, u8 svc_type)
  1824. {
  1825. struct cca_timer *cca_timer;
  1826. u16 ccti, ccti_incr, ccti_timer, ccti_limit;
  1827. u8 trigger_threshold;
  1828. struct cc_state *cc_state;
  1829. unsigned long flags;
  1830. if (sl >= OPA_MAX_SLS)
  1831. return;
  1832. cc_state = get_cc_state(ppd);
  1833. if (!cc_state)
  1834. return;
  1835. /*
  1836. * 1) increase CCTI (for this SL)
  1837. * 2) select IPG (i.e., call set_link_ipg())
  1838. * 3) start timer
  1839. */
  1840. ccti_limit = cc_state->cct.ccti_limit;
  1841. ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase;
  1842. ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
  1843. trigger_threshold =
  1844. cc_state->cong_setting.entries[sl].trigger_threshold;
  1845. spin_lock_irqsave(&ppd->cca_timer_lock, flags);
  1846. cca_timer = &ppd->cca_timer[sl];
  1847. if (cca_timer->ccti < ccti_limit) {
  1848. if (cca_timer->ccti + ccti_incr <= ccti_limit)
  1849. cca_timer->ccti += ccti_incr;
  1850. else
  1851. cca_timer->ccti = ccti_limit;
  1852. set_link_ipg(ppd);
  1853. }
  1854. ccti = cca_timer->ccti;
  1855. if (!hrtimer_active(&cca_timer->hrtimer)) {
  1856. /* ccti_timer is in units of 1.024 usec */
  1857. unsigned long nsec = 1024 * ccti_timer;
  1858. hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec),
  1859. HRTIMER_MODE_REL);
  1860. }
  1861. spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
  1862. if ((trigger_threshold != 0) && (ccti >= trigger_threshold))
  1863. log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type);
  1864. }
  1865. /**
  1866. * hfi1_rc_rcv - process an incoming RC packet
  1867. * @packet: data packet information
  1868. *
  1869. * This is called from qp_rcv() to process an incoming RC packet
  1870. * for the given QP.
  1871. * May be called at interrupt level.
  1872. */
  1873. void hfi1_rc_rcv(struct hfi1_packet *packet)
  1874. {
  1875. struct hfi1_ctxtdata *rcd = packet->rcd;
  1876. void *data = packet->payload;
  1877. u32 tlen = packet->tlen;
  1878. struct rvt_qp *qp = packet->qp;
  1879. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  1880. struct ib_other_headers *ohdr = packet->ohdr;
  1881. u32 bth0 = be32_to_cpu(ohdr->bth[0]);
  1882. u32 opcode = packet->opcode;
  1883. u32 hdrsize = packet->hlen;
  1884. u32 psn = ib_bth_get_psn(packet->ohdr);
  1885. u32 pad = packet->pad;
  1886. struct ib_wc wc;
  1887. u32 pmtu = qp->pmtu;
  1888. int diff;
  1889. struct ib_reth *reth;
  1890. unsigned long flags;
  1891. int ret;
  1892. bool is_fecn = false;
  1893. bool copy_last = false;
  1894. u32 rkey;
  1895. u8 extra_bytes = pad + packet->extra_byte + (SIZE_OF_CRC << 2);
  1896. lockdep_assert_held(&qp->r_lock);
  1897. if (hfi1_ruc_check_hdr(ibp, packet))
  1898. return;
  1899. is_fecn = process_ecn(qp, packet, false);
  1900. /*
  1901. * Process responses (ACKs) before anything else. Note that the
  1902. * packet sequence number will be for something in the send work
  1903. * queue rather than the expected receive packet sequence number.
  1904. * In other words, this QP is the requester.
  1905. */
  1906. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1907. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1908. rc_rcv_resp(packet);
  1909. if (is_fecn)
  1910. goto send_ack;
  1911. return;
  1912. }
  1913. /* Compute 24 bits worth of difference. */
  1914. diff = delta_psn(psn, qp->r_psn);
  1915. if (unlikely(diff)) {
  1916. if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
  1917. return;
  1918. goto send_ack;
  1919. }
  1920. /* Check for opcode sequence errors. */
  1921. switch (qp->r_state) {
  1922. case OP(SEND_FIRST):
  1923. case OP(SEND_MIDDLE):
  1924. if (opcode == OP(SEND_MIDDLE) ||
  1925. opcode == OP(SEND_LAST) ||
  1926. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1927. opcode == OP(SEND_LAST_WITH_INVALIDATE))
  1928. break;
  1929. goto nack_inv;
  1930. case OP(RDMA_WRITE_FIRST):
  1931. case OP(RDMA_WRITE_MIDDLE):
  1932. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1933. opcode == OP(RDMA_WRITE_LAST) ||
  1934. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1935. break;
  1936. goto nack_inv;
  1937. default:
  1938. if (opcode == OP(SEND_MIDDLE) ||
  1939. opcode == OP(SEND_LAST) ||
  1940. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1941. opcode == OP(SEND_LAST_WITH_INVALIDATE) ||
  1942. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1943. opcode == OP(RDMA_WRITE_LAST) ||
  1944. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1945. goto nack_inv;
  1946. /*
  1947. * Note that it is up to the requester to not send a new
  1948. * RDMA read or atomic operation before receiving an ACK
  1949. * for the previous operation.
  1950. */
  1951. break;
  1952. }
  1953. if (qp->state == IB_QPS_RTR && !(qp->r_flags & RVT_R_COMM_EST))
  1954. rvt_comm_est(qp);
  1955. /* OK, process the packet. */
  1956. switch (opcode) {
  1957. case OP(SEND_FIRST):
  1958. ret = hfi1_rvt_get_rwqe(qp, 0);
  1959. if (ret < 0)
  1960. goto nack_op_err;
  1961. if (!ret)
  1962. goto rnr_nak;
  1963. qp->r_rcv_len = 0;
  1964. /* FALLTHROUGH */
  1965. case OP(SEND_MIDDLE):
  1966. case OP(RDMA_WRITE_MIDDLE):
  1967. send_middle:
  1968. /* Check for invalid length PMTU or posted rwqe len. */
  1969. /*
  1970. * There will be no padding for 9B packet but 16B packets
  1971. * will come in with some padding since we always add
  1972. * CRC and LT bytes which will need to be flit aligned
  1973. */
  1974. if (unlikely(tlen != (hdrsize + pmtu + extra_bytes)))
  1975. goto nack_inv;
  1976. qp->r_rcv_len += pmtu;
  1977. if (unlikely(qp->r_rcv_len > qp->r_len))
  1978. goto nack_inv;
  1979. hfi1_copy_sge(&qp->r_sge, data, pmtu, true, false);
  1980. break;
  1981. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1982. /* consume RWQE */
  1983. ret = hfi1_rvt_get_rwqe(qp, 1);
  1984. if (ret < 0)
  1985. goto nack_op_err;
  1986. if (!ret)
  1987. goto rnr_nak;
  1988. goto send_last_imm;
  1989. case OP(SEND_ONLY):
  1990. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1991. case OP(SEND_ONLY_WITH_INVALIDATE):
  1992. ret = hfi1_rvt_get_rwqe(qp, 0);
  1993. if (ret < 0)
  1994. goto nack_op_err;
  1995. if (!ret)
  1996. goto rnr_nak;
  1997. qp->r_rcv_len = 0;
  1998. if (opcode == OP(SEND_ONLY))
  1999. goto no_immediate_data;
  2000. if (opcode == OP(SEND_ONLY_WITH_INVALIDATE))
  2001. goto send_last_inv;
  2002. /* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */
  2003. case OP(SEND_LAST_WITH_IMMEDIATE):
  2004. send_last_imm:
  2005. wc.ex.imm_data = ohdr->u.imm_data;
  2006. wc.wc_flags = IB_WC_WITH_IMM;
  2007. goto send_last;
  2008. case OP(SEND_LAST_WITH_INVALIDATE):
  2009. send_last_inv:
  2010. rkey = be32_to_cpu(ohdr->u.ieth);
  2011. if (rvt_invalidate_rkey(qp, rkey))
  2012. goto no_immediate_data;
  2013. wc.ex.invalidate_rkey = rkey;
  2014. wc.wc_flags = IB_WC_WITH_INVALIDATE;
  2015. goto send_last;
  2016. case OP(RDMA_WRITE_LAST):
  2017. copy_last = rvt_is_user_qp(qp);
  2018. /* fall through */
  2019. case OP(SEND_LAST):
  2020. no_immediate_data:
  2021. wc.wc_flags = 0;
  2022. wc.ex.imm_data = 0;
  2023. send_last:
  2024. /* Check for invalid length. */
  2025. /* LAST len should be >= 1 */
  2026. if (unlikely(tlen < (hdrsize + extra_bytes)))
  2027. goto nack_inv;
  2028. /* Don't count the CRC(and padding and LT byte for 16B). */
  2029. tlen -= (hdrsize + extra_bytes);
  2030. wc.byte_len = tlen + qp->r_rcv_len;
  2031. if (unlikely(wc.byte_len > qp->r_len))
  2032. goto nack_inv;
  2033. hfi1_copy_sge(&qp->r_sge, data, tlen, true, copy_last);
  2034. rvt_put_ss(&qp->r_sge);
  2035. qp->r_msn++;
  2036. if (!__test_and_clear_bit(RVT_R_WRID_VALID, &qp->r_aflags))
  2037. break;
  2038. wc.wr_id = qp->r_wr_id;
  2039. wc.status = IB_WC_SUCCESS;
  2040. if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
  2041. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  2042. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  2043. else
  2044. wc.opcode = IB_WC_RECV;
  2045. wc.qp = &qp->ibqp;
  2046. wc.src_qp = qp->remote_qpn;
  2047. wc.slid = rdma_ah_get_dlid(&qp->remote_ah_attr);
  2048. /*
  2049. * It seems that IB mandates the presence of an SL in a
  2050. * work completion only for the UD transport (see section
  2051. * 11.4.2 of IBTA Vol. 1).
  2052. *
  2053. * However, the way the SL is chosen below is consistent
  2054. * with the way that IB/qib works and is trying avoid
  2055. * introducing incompatibilities.
  2056. *
  2057. * See also OPA Vol. 1, section 9.7.6, and table 9-17.
  2058. */
  2059. wc.sl = rdma_ah_get_sl(&qp->remote_ah_attr);
  2060. /* zero fields that are N/A */
  2061. wc.vendor_err = 0;
  2062. wc.pkey_index = 0;
  2063. wc.dlid_path_bits = 0;
  2064. wc.port_num = 0;
  2065. /* Signal completion event if the solicited bit is set. */
  2066. rvt_cq_enter(ibcq_to_rvtcq(qp->ibqp.recv_cq), &wc,
  2067. (bth0 & IB_BTH_SOLICITED) != 0);
  2068. break;
  2069. case OP(RDMA_WRITE_ONLY):
  2070. copy_last = rvt_is_user_qp(qp);
  2071. /* fall through */
  2072. case OP(RDMA_WRITE_FIRST):
  2073. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  2074. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
  2075. goto nack_inv;
  2076. /* consume RWQE */
  2077. reth = &ohdr->u.rc.reth;
  2078. qp->r_len = be32_to_cpu(reth->length);
  2079. qp->r_rcv_len = 0;
  2080. qp->r_sge.sg_list = NULL;
  2081. if (qp->r_len != 0) {
  2082. u32 rkey = be32_to_cpu(reth->rkey);
  2083. u64 vaddr = get_ib_reth_vaddr(reth);
  2084. int ok;
  2085. /* Check rkey & NAK */
  2086. ok = rvt_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
  2087. rkey, IB_ACCESS_REMOTE_WRITE);
  2088. if (unlikely(!ok))
  2089. goto nack_acc;
  2090. qp->r_sge.num_sge = 1;
  2091. } else {
  2092. qp->r_sge.num_sge = 0;
  2093. qp->r_sge.sge.mr = NULL;
  2094. qp->r_sge.sge.vaddr = NULL;
  2095. qp->r_sge.sge.length = 0;
  2096. qp->r_sge.sge.sge_length = 0;
  2097. }
  2098. if (opcode == OP(RDMA_WRITE_FIRST))
  2099. goto send_middle;
  2100. else if (opcode == OP(RDMA_WRITE_ONLY))
  2101. goto no_immediate_data;
  2102. ret = hfi1_rvt_get_rwqe(qp, 1);
  2103. if (ret < 0)
  2104. goto nack_op_err;
  2105. if (!ret) {
  2106. /* peer will send again */
  2107. rvt_put_ss(&qp->r_sge);
  2108. goto rnr_nak;
  2109. }
  2110. wc.ex.imm_data = ohdr->u.rc.imm_data;
  2111. wc.wc_flags = IB_WC_WITH_IMM;
  2112. goto send_last;
  2113. case OP(RDMA_READ_REQUEST): {
  2114. struct rvt_ack_entry *e;
  2115. u32 len;
  2116. u8 next;
  2117. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
  2118. goto nack_inv;
  2119. next = qp->r_head_ack_queue + 1;
  2120. /* s_ack_queue is size HFI1_MAX_RDMA_ATOMIC+1 so use > not >= */
  2121. if (next > HFI1_MAX_RDMA_ATOMIC)
  2122. next = 0;
  2123. spin_lock_irqsave(&qp->s_lock, flags);
  2124. if (unlikely(next == qp->s_tail_ack_queue)) {
  2125. if (!qp->s_ack_queue[next].sent)
  2126. goto nack_inv_unlck;
  2127. update_ack_queue(qp, next);
  2128. }
  2129. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2130. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2131. rvt_put_mr(e->rdma_sge.mr);
  2132. e->rdma_sge.mr = NULL;
  2133. }
  2134. reth = &ohdr->u.rc.reth;
  2135. len = be32_to_cpu(reth->length);
  2136. if (len) {
  2137. u32 rkey = be32_to_cpu(reth->rkey);
  2138. u64 vaddr = get_ib_reth_vaddr(reth);
  2139. int ok;
  2140. /* Check rkey & NAK */
  2141. ok = rvt_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  2142. rkey, IB_ACCESS_REMOTE_READ);
  2143. if (unlikely(!ok))
  2144. goto nack_acc_unlck;
  2145. /*
  2146. * Update the next expected PSN. We add 1 later
  2147. * below, so only add the remainder here.
  2148. */
  2149. qp->r_psn += rvt_div_mtu(qp, len - 1);
  2150. } else {
  2151. e->rdma_sge.mr = NULL;
  2152. e->rdma_sge.vaddr = NULL;
  2153. e->rdma_sge.length = 0;
  2154. e->rdma_sge.sge_length = 0;
  2155. }
  2156. e->opcode = opcode;
  2157. e->sent = 0;
  2158. e->psn = psn;
  2159. e->lpsn = qp->r_psn;
  2160. /*
  2161. * We need to increment the MSN here instead of when we
  2162. * finish sending the result since a duplicate request would
  2163. * increment it more than once.
  2164. */
  2165. qp->r_msn++;
  2166. qp->r_psn++;
  2167. qp->r_state = opcode;
  2168. qp->r_nak_state = 0;
  2169. qp->r_head_ack_queue = next;
  2170. /* Schedule the send engine. */
  2171. qp->s_flags |= RVT_S_RESP_PENDING;
  2172. hfi1_schedule_send(qp);
  2173. spin_unlock_irqrestore(&qp->s_lock, flags);
  2174. if (is_fecn)
  2175. goto send_ack;
  2176. return;
  2177. }
  2178. case OP(COMPARE_SWAP):
  2179. case OP(FETCH_ADD): {
  2180. struct ib_atomic_eth *ateth;
  2181. struct rvt_ack_entry *e;
  2182. u64 vaddr;
  2183. atomic64_t *maddr;
  2184. u64 sdata;
  2185. u32 rkey;
  2186. u8 next;
  2187. if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
  2188. goto nack_inv;
  2189. next = qp->r_head_ack_queue + 1;
  2190. if (next > HFI1_MAX_RDMA_ATOMIC)
  2191. next = 0;
  2192. spin_lock_irqsave(&qp->s_lock, flags);
  2193. if (unlikely(next == qp->s_tail_ack_queue)) {
  2194. if (!qp->s_ack_queue[next].sent)
  2195. goto nack_inv_unlck;
  2196. update_ack_queue(qp, next);
  2197. }
  2198. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  2199. if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
  2200. rvt_put_mr(e->rdma_sge.mr);
  2201. e->rdma_sge.mr = NULL;
  2202. }
  2203. ateth = &ohdr->u.atomic_eth;
  2204. vaddr = get_ib_ateth_vaddr(ateth);
  2205. if (unlikely(vaddr & (sizeof(u64) - 1)))
  2206. goto nack_inv_unlck;
  2207. rkey = be32_to_cpu(ateth->rkey);
  2208. /* Check rkey & NAK */
  2209. if (unlikely(!rvt_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
  2210. vaddr, rkey,
  2211. IB_ACCESS_REMOTE_ATOMIC)))
  2212. goto nack_acc_unlck;
  2213. /* Perform atomic OP and save result. */
  2214. maddr = (atomic64_t *)qp->r_sge.sge.vaddr;
  2215. sdata = get_ib_ateth_swap(ateth);
  2216. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  2217. (u64)atomic64_add_return(sdata, maddr) - sdata :
  2218. (u64)cmpxchg((u64 *)qp->r_sge.sge.vaddr,
  2219. get_ib_ateth_compare(ateth),
  2220. sdata);
  2221. rvt_put_mr(qp->r_sge.sge.mr);
  2222. qp->r_sge.num_sge = 0;
  2223. e->opcode = opcode;
  2224. e->sent = 0;
  2225. e->psn = psn;
  2226. e->lpsn = psn;
  2227. qp->r_msn++;
  2228. qp->r_psn++;
  2229. qp->r_state = opcode;
  2230. qp->r_nak_state = 0;
  2231. qp->r_head_ack_queue = next;
  2232. /* Schedule the send engine. */
  2233. qp->s_flags |= RVT_S_RESP_PENDING;
  2234. hfi1_schedule_send(qp);
  2235. spin_unlock_irqrestore(&qp->s_lock, flags);
  2236. if (is_fecn)
  2237. goto send_ack;
  2238. return;
  2239. }
  2240. default:
  2241. /* NAK unknown opcodes. */
  2242. goto nack_inv;
  2243. }
  2244. qp->r_psn++;
  2245. qp->r_state = opcode;
  2246. qp->r_ack_psn = psn;
  2247. qp->r_nak_state = 0;
  2248. /* Send an ACK if requested or required. */
  2249. if (psn & IB_BTH_REQ_ACK) {
  2250. if (packet->numpkt == 0) {
  2251. rc_cancel_ack(qp);
  2252. goto send_ack;
  2253. }
  2254. if (qp->r_adefered >= HFI1_PSN_CREDIT) {
  2255. rc_cancel_ack(qp);
  2256. goto send_ack;
  2257. }
  2258. if (unlikely(is_fecn)) {
  2259. rc_cancel_ack(qp);
  2260. goto send_ack;
  2261. }
  2262. qp->r_adefered++;
  2263. rc_defered_ack(rcd, qp);
  2264. }
  2265. return;
  2266. rnr_nak:
  2267. qp->r_nak_state = qp->r_min_rnr_timer | IB_RNR_NAK;
  2268. qp->r_ack_psn = qp->r_psn;
  2269. /* Queue RNR NAK for later */
  2270. rc_defered_ack(rcd, qp);
  2271. return;
  2272. nack_op_err:
  2273. rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2274. qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
  2275. qp->r_ack_psn = qp->r_psn;
  2276. /* Queue NAK for later */
  2277. rc_defered_ack(rcd, qp);
  2278. return;
  2279. nack_inv_unlck:
  2280. spin_unlock_irqrestore(&qp->s_lock, flags);
  2281. nack_inv:
  2282. rvt_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  2283. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  2284. qp->r_ack_psn = qp->r_psn;
  2285. /* Queue NAK for later */
  2286. rc_defered_ack(rcd, qp);
  2287. return;
  2288. nack_acc_unlck:
  2289. spin_unlock_irqrestore(&qp->s_lock, flags);
  2290. nack_acc:
  2291. rvt_rc_error(qp, IB_WC_LOC_PROT_ERR);
  2292. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  2293. qp->r_ack_psn = qp->r_psn;
  2294. send_ack:
  2295. hfi1_send_rc_ack(rcd, qp, is_fecn);
  2296. }
  2297. void hfi1_rc_hdrerr(
  2298. struct hfi1_ctxtdata *rcd,
  2299. struct hfi1_packet *packet,
  2300. struct rvt_qp *qp)
  2301. {
  2302. struct hfi1_ibport *ibp = rcd_to_iport(rcd);
  2303. int diff;
  2304. u32 opcode;
  2305. u32 psn;
  2306. if (hfi1_ruc_check_hdr(ibp, packet))
  2307. return;
  2308. psn = ib_bth_get_psn(packet->ohdr);
  2309. opcode = ib_bth_get_opcode(packet->ohdr);
  2310. /* Only deal with RDMA Writes for now */
  2311. if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
  2312. diff = delta_psn(psn, qp->r_psn);
  2313. if (!qp->r_nak_state && diff >= 0) {
  2314. ibp->rvp.n_rc_seqnak++;
  2315. qp->r_nak_state = IB_NAK_PSN_ERROR;
  2316. /* Use the expected PSN. */
  2317. qp->r_ack_psn = qp->r_psn;
  2318. /*
  2319. * Wait to send the sequence
  2320. * NAK until all packets
  2321. * in the receive queue have
  2322. * been processed.
  2323. * Otherwise, we end up
  2324. * propagating congestion.
  2325. */
  2326. rc_defered_ack(rcd, qp);
  2327. } /* Out of sequence NAK */
  2328. } /* QP Request NAKs */
  2329. }