twl4030-madc.c 26 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955
  1. /*
  2. *
  3. * TWL4030 MADC module driver-This driver monitors the real time
  4. * conversion of analog signals like battery temperature,
  5. * battery type, battery level etc.
  6. *
  7. * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  8. * J Keerthy <j-keerthy@ti.com>
  9. *
  10. * Based on twl4030-madc.c
  11. * Copyright (C) 2008 Nokia Corporation
  12. * Mikko Ylinen <mikko.k.ylinen@nokia.com>
  13. *
  14. * Amit Kucheria <amit.kucheria@canonical.com>
  15. *
  16. * This program is free software; you can redistribute it and/or
  17. * modify it under the terms of the GNU General Public License
  18. * version 2 as published by the Free Software Foundation.
  19. *
  20. * This program is distributed in the hope that it will be useful, but
  21. * WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  23. * General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, write to the Free Software
  27. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  28. * 02110-1301 USA
  29. *
  30. */
  31. #include <linux/device.h>
  32. #include <linux/interrupt.h>
  33. #include <linux/kernel.h>
  34. #include <linux/delay.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/slab.h>
  37. #include <linux/mfd/twl.h>
  38. #include <linux/module.h>
  39. #include <linux/stddef.h>
  40. #include <linux/mutex.h>
  41. #include <linux/bitops.h>
  42. #include <linux/jiffies.h>
  43. #include <linux/types.h>
  44. #include <linux/gfp.h>
  45. #include <linux/err.h>
  46. #include <linux/regulator/consumer.h>
  47. #include <linux/iio/iio.h>
  48. #define TWL4030_MADC_MAX_CHANNELS 16
  49. #define TWL4030_MADC_CTRL1 0x00
  50. #define TWL4030_MADC_CTRL2 0x01
  51. #define TWL4030_MADC_RTSELECT_LSB 0x02
  52. #define TWL4030_MADC_SW1SELECT_LSB 0x06
  53. #define TWL4030_MADC_SW2SELECT_LSB 0x0A
  54. #define TWL4030_MADC_RTAVERAGE_LSB 0x04
  55. #define TWL4030_MADC_SW1AVERAGE_LSB 0x08
  56. #define TWL4030_MADC_SW2AVERAGE_LSB 0x0C
  57. #define TWL4030_MADC_CTRL_SW1 0x12
  58. #define TWL4030_MADC_CTRL_SW2 0x13
  59. #define TWL4030_MADC_RTCH0_LSB 0x17
  60. #define TWL4030_MADC_GPCH0_LSB 0x37
  61. #define TWL4030_MADC_MADCON (1 << 0) /* MADC power on */
  62. #define TWL4030_MADC_BUSY (1 << 0) /* MADC busy */
  63. /* MADC conversion completion */
  64. #define TWL4030_MADC_EOC_SW (1 << 1)
  65. /* MADC SWx start conversion */
  66. #define TWL4030_MADC_SW_START (1 << 5)
  67. #define TWL4030_MADC_ADCIN0 (1 << 0)
  68. #define TWL4030_MADC_ADCIN1 (1 << 1)
  69. #define TWL4030_MADC_ADCIN2 (1 << 2)
  70. #define TWL4030_MADC_ADCIN3 (1 << 3)
  71. #define TWL4030_MADC_ADCIN4 (1 << 4)
  72. #define TWL4030_MADC_ADCIN5 (1 << 5)
  73. #define TWL4030_MADC_ADCIN6 (1 << 6)
  74. #define TWL4030_MADC_ADCIN7 (1 << 7)
  75. #define TWL4030_MADC_ADCIN8 (1 << 8)
  76. #define TWL4030_MADC_ADCIN9 (1 << 9)
  77. #define TWL4030_MADC_ADCIN10 (1 << 10)
  78. #define TWL4030_MADC_ADCIN11 (1 << 11)
  79. #define TWL4030_MADC_ADCIN12 (1 << 12)
  80. #define TWL4030_MADC_ADCIN13 (1 << 13)
  81. #define TWL4030_MADC_ADCIN14 (1 << 14)
  82. #define TWL4030_MADC_ADCIN15 (1 << 15)
  83. /* Fixed channels */
  84. #define TWL4030_MADC_BTEMP TWL4030_MADC_ADCIN1
  85. #define TWL4030_MADC_VBUS TWL4030_MADC_ADCIN8
  86. #define TWL4030_MADC_VBKB TWL4030_MADC_ADCIN9
  87. #define TWL4030_MADC_ICHG TWL4030_MADC_ADCIN10
  88. #define TWL4030_MADC_VCHG TWL4030_MADC_ADCIN11
  89. #define TWL4030_MADC_VBAT TWL4030_MADC_ADCIN12
  90. /* Step size and prescaler ratio */
  91. #define TEMP_STEP_SIZE 147
  92. #define TEMP_PSR_R 100
  93. #define CURR_STEP_SIZE 147
  94. #define CURR_PSR_R1 44
  95. #define CURR_PSR_R2 88
  96. #define TWL4030_BCI_BCICTL1 0x23
  97. #define TWL4030_BCI_CGAIN 0x020
  98. #define TWL4030_BCI_MESBAT (1 << 1)
  99. #define TWL4030_BCI_TYPEN (1 << 4)
  100. #define TWL4030_BCI_ITHEN (1 << 3)
  101. #define REG_BCICTL2 0x024
  102. #define TWL4030_BCI_ITHSENS 0x007
  103. /* Register and bits for GPBR1 register */
  104. #define TWL4030_REG_GPBR1 0x0c
  105. #define TWL4030_GPBR1_MADC_HFCLK_EN (1 << 7)
  106. #define TWL4030_USB_SEL_MADC_MCPC (1<<3)
  107. #define TWL4030_USB_CARKIT_ANA_CTRL 0xBB
  108. struct twl4030_madc_conversion_method {
  109. u8 sel;
  110. u8 avg;
  111. u8 rbase;
  112. u8 ctrl;
  113. };
  114. /**
  115. * struct twl4030_madc_request - madc request packet for channel conversion
  116. * @channels: 16 bit bitmap for individual channels
  117. * @do_avg: sample the input channel for 4 consecutive cycles
  118. * @method: RT, SW1, SW2
  119. * @type: Polling or interrupt based method
  120. * @active: Flag if request is active
  121. * @result_pending: Flag from irq handler, that result is ready
  122. * @raw: Return raw value, do not convert it
  123. * @rbuf: Result buffer
  124. */
  125. struct twl4030_madc_request {
  126. unsigned long channels;
  127. bool do_avg;
  128. u16 method;
  129. u16 type;
  130. bool active;
  131. bool result_pending;
  132. bool raw;
  133. int rbuf[TWL4030_MADC_MAX_CHANNELS];
  134. };
  135. enum conversion_methods {
  136. TWL4030_MADC_RT,
  137. TWL4030_MADC_SW1,
  138. TWL4030_MADC_SW2,
  139. TWL4030_MADC_NUM_METHODS
  140. };
  141. enum sample_type {
  142. TWL4030_MADC_WAIT,
  143. TWL4030_MADC_IRQ_ONESHOT,
  144. TWL4030_MADC_IRQ_REARM
  145. };
  146. /**
  147. * struct twl4030_madc_data - a container for madc info
  148. * @dev: Pointer to device structure for madc
  149. * @lock: Mutex protecting this data structure
  150. * @regulator: Pointer to bias regulator for madc
  151. * @requests: Array of request struct corresponding to SW1, SW2 and RT
  152. * @use_second_irq: IRQ selection (main or co-processor)
  153. * @imr: Interrupt mask register of MADC
  154. * @isr: Interrupt status register of MADC
  155. */
  156. struct twl4030_madc_data {
  157. struct device *dev;
  158. struct mutex lock; /* mutex protecting this data structure */
  159. struct regulator *usb3v1;
  160. struct twl4030_madc_request requests[TWL4030_MADC_NUM_METHODS];
  161. bool use_second_irq;
  162. u8 imr;
  163. u8 isr;
  164. };
  165. static int twl4030_madc_conversion(struct twl4030_madc_request *req);
  166. static int twl4030_madc_read(struct iio_dev *iio_dev,
  167. const struct iio_chan_spec *chan,
  168. int *val, int *val2, long mask)
  169. {
  170. struct twl4030_madc_data *madc = iio_priv(iio_dev);
  171. struct twl4030_madc_request req;
  172. int ret;
  173. req.method = madc->use_second_irq ? TWL4030_MADC_SW2 : TWL4030_MADC_SW1;
  174. req.channels = BIT(chan->channel);
  175. req.active = false;
  176. req.type = TWL4030_MADC_WAIT;
  177. req.raw = !(mask == IIO_CHAN_INFO_PROCESSED);
  178. req.do_avg = (mask == IIO_CHAN_INFO_AVERAGE_RAW);
  179. ret = twl4030_madc_conversion(&req);
  180. if (ret < 0)
  181. return ret;
  182. *val = req.rbuf[chan->channel];
  183. return IIO_VAL_INT;
  184. }
  185. static const struct iio_info twl4030_madc_iio_info = {
  186. .read_raw = &twl4030_madc_read,
  187. .driver_module = THIS_MODULE,
  188. };
  189. #define TWL4030_ADC_CHANNEL(_channel, _type, _name) { \
  190. .type = _type, \
  191. .channel = _channel, \
  192. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  193. BIT(IIO_CHAN_INFO_AVERAGE_RAW) | \
  194. BIT(IIO_CHAN_INFO_PROCESSED), \
  195. .datasheet_name = _name, \
  196. .indexed = 1, \
  197. }
  198. static const struct iio_chan_spec twl4030_madc_iio_channels[] = {
  199. TWL4030_ADC_CHANNEL(0, IIO_VOLTAGE, "ADCIN0"),
  200. TWL4030_ADC_CHANNEL(1, IIO_TEMP, "ADCIN1"),
  201. TWL4030_ADC_CHANNEL(2, IIO_VOLTAGE, "ADCIN2"),
  202. TWL4030_ADC_CHANNEL(3, IIO_VOLTAGE, "ADCIN3"),
  203. TWL4030_ADC_CHANNEL(4, IIO_VOLTAGE, "ADCIN4"),
  204. TWL4030_ADC_CHANNEL(5, IIO_VOLTAGE, "ADCIN5"),
  205. TWL4030_ADC_CHANNEL(6, IIO_VOLTAGE, "ADCIN6"),
  206. TWL4030_ADC_CHANNEL(7, IIO_VOLTAGE, "ADCIN7"),
  207. TWL4030_ADC_CHANNEL(8, IIO_VOLTAGE, "ADCIN8"),
  208. TWL4030_ADC_CHANNEL(9, IIO_VOLTAGE, "ADCIN9"),
  209. TWL4030_ADC_CHANNEL(10, IIO_CURRENT, "ADCIN10"),
  210. TWL4030_ADC_CHANNEL(11, IIO_VOLTAGE, "ADCIN11"),
  211. TWL4030_ADC_CHANNEL(12, IIO_VOLTAGE, "ADCIN12"),
  212. TWL4030_ADC_CHANNEL(13, IIO_VOLTAGE, "ADCIN13"),
  213. TWL4030_ADC_CHANNEL(14, IIO_VOLTAGE, "ADCIN14"),
  214. TWL4030_ADC_CHANNEL(15, IIO_VOLTAGE, "ADCIN15"),
  215. };
  216. static struct twl4030_madc_data *twl4030_madc;
  217. struct twl4030_prescale_divider_ratios {
  218. s16 numerator;
  219. s16 denominator;
  220. };
  221. static const struct twl4030_prescale_divider_ratios
  222. twl4030_divider_ratios[16] = {
  223. {1, 1}, /* CHANNEL 0 No Prescaler */
  224. {1, 1}, /* CHANNEL 1 No Prescaler */
  225. {6, 10}, /* CHANNEL 2 */
  226. {6, 10}, /* CHANNEL 3 */
  227. {6, 10}, /* CHANNEL 4 */
  228. {6, 10}, /* CHANNEL 5 */
  229. {6, 10}, /* CHANNEL 6 */
  230. {6, 10}, /* CHANNEL 7 */
  231. {3, 14}, /* CHANNEL 8 */
  232. {1, 3}, /* CHANNEL 9 */
  233. {1, 1}, /* CHANNEL 10 No Prescaler */
  234. {15, 100}, /* CHANNEL 11 */
  235. {1, 4}, /* CHANNEL 12 */
  236. {1, 1}, /* CHANNEL 13 Reserved channels */
  237. {1, 1}, /* CHANNEL 14 Reseved channels */
  238. {5, 11}, /* CHANNEL 15 */
  239. };
  240. /* Conversion table from -3 to 55 degrees Celcius */
  241. static int twl4030_therm_tbl[] = {
  242. 30800, 29500, 28300, 27100,
  243. 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700,
  244. 17900, 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100,
  245. 12600, 12100, 11600, 11200, 10800, 10400, 10000, 9630, 9280,
  246. 8950, 8620, 8310, 8020, 7730, 7460, 7200, 6950, 6710,
  247. 6470, 6250, 6040, 5830, 5640, 5450, 5260, 5090, 4920,
  248. 4760, 4600, 4450, 4310, 4170, 4040, 3910, 3790, 3670,
  249. 3550
  250. };
  251. /*
  252. * Structure containing the registers
  253. * of different conversion methods supported by MADC.
  254. * Hardware or RT real time conversion request initiated by external host
  255. * processor for RT Signal conversions.
  256. * External host processors can also request for non RT conversions
  257. * SW1 and SW2 software conversions also called asynchronous or GPC request.
  258. */
  259. static
  260. const struct twl4030_madc_conversion_method twl4030_conversion_methods[] = {
  261. [TWL4030_MADC_RT] = {
  262. .sel = TWL4030_MADC_RTSELECT_LSB,
  263. .avg = TWL4030_MADC_RTAVERAGE_LSB,
  264. .rbase = TWL4030_MADC_RTCH0_LSB,
  265. },
  266. [TWL4030_MADC_SW1] = {
  267. .sel = TWL4030_MADC_SW1SELECT_LSB,
  268. .avg = TWL4030_MADC_SW1AVERAGE_LSB,
  269. .rbase = TWL4030_MADC_GPCH0_LSB,
  270. .ctrl = TWL4030_MADC_CTRL_SW1,
  271. },
  272. [TWL4030_MADC_SW2] = {
  273. .sel = TWL4030_MADC_SW2SELECT_LSB,
  274. .avg = TWL4030_MADC_SW2AVERAGE_LSB,
  275. .rbase = TWL4030_MADC_GPCH0_LSB,
  276. .ctrl = TWL4030_MADC_CTRL_SW2,
  277. },
  278. };
  279. /**
  280. * twl4030_madc_channel_raw_read() - Function to read a particular channel value
  281. * @madc: pointer to struct twl4030_madc_data
  282. * @reg: lsb of ADC Channel
  283. *
  284. * Return: 0 on success, an error code otherwise.
  285. */
  286. static int twl4030_madc_channel_raw_read(struct twl4030_madc_data *madc, u8 reg)
  287. {
  288. u16 val;
  289. int ret;
  290. /*
  291. * For each ADC channel, we have MSB and LSB register pair. MSB address
  292. * is always LSB address+1. reg parameter is the address of LSB register
  293. */
  294. ret = twl_i2c_read_u16(TWL4030_MODULE_MADC, &val, reg);
  295. if (ret) {
  296. dev_err(madc->dev, "unable to read register 0x%X\n", reg);
  297. return ret;
  298. }
  299. return (int)(val >> 6);
  300. }
  301. /*
  302. * Return battery temperature in degrees Celsius
  303. * Or < 0 on failure.
  304. */
  305. static int twl4030battery_temperature(int raw_volt)
  306. {
  307. u8 val;
  308. int temp, curr, volt, res, ret;
  309. volt = (raw_volt * TEMP_STEP_SIZE) / TEMP_PSR_R;
  310. /* Getting and calculating the supply current in micro amperes */
  311. ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val,
  312. REG_BCICTL2);
  313. if (ret < 0)
  314. return ret;
  315. curr = ((val & TWL4030_BCI_ITHSENS) + 1) * 10;
  316. /* Getting and calculating the thermistor resistance in ohms */
  317. res = volt * 1000 / curr;
  318. /* calculating temperature */
  319. for (temp = 58; temp >= 0; temp--) {
  320. int actual = twl4030_therm_tbl[temp];
  321. if ((actual - res) >= 0)
  322. break;
  323. }
  324. return temp + 1;
  325. }
  326. static int twl4030battery_current(int raw_volt)
  327. {
  328. int ret;
  329. u8 val;
  330. ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE, &val,
  331. TWL4030_BCI_BCICTL1);
  332. if (ret)
  333. return ret;
  334. if (val & TWL4030_BCI_CGAIN) /* slope of 0.44 mV/mA */
  335. return (raw_volt * CURR_STEP_SIZE) / CURR_PSR_R1;
  336. else /* slope of 0.88 mV/mA */
  337. return (raw_volt * CURR_STEP_SIZE) / CURR_PSR_R2;
  338. }
  339. /*
  340. * Function to read channel values
  341. * @madc - pointer to twl4030_madc_data struct
  342. * @reg_base - Base address of the first channel
  343. * @Channels - 16 bit bitmap. If the bit is set, channel's value is read
  344. * @buf - The channel values are stored here. if read fails error
  345. * @raw - Return raw values without conversion
  346. * value is stored
  347. * Returns the number of successfully read channels.
  348. */
  349. static int twl4030_madc_read_channels(struct twl4030_madc_data *madc,
  350. u8 reg_base, unsigned
  351. long channels, int *buf,
  352. bool raw)
  353. {
  354. int count = 0;
  355. int i;
  356. u8 reg;
  357. for_each_set_bit(i, &channels, TWL4030_MADC_MAX_CHANNELS) {
  358. reg = reg_base + (2 * i);
  359. buf[i] = twl4030_madc_channel_raw_read(madc, reg);
  360. if (buf[i] < 0) {
  361. dev_err(madc->dev, "Unable to read register 0x%X\n",
  362. reg);
  363. return buf[i];
  364. }
  365. if (raw) {
  366. count++;
  367. continue;
  368. }
  369. switch (i) {
  370. case 10:
  371. buf[i] = twl4030battery_current(buf[i]);
  372. if (buf[i] < 0) {
  373. dev_err(madc->dev, "err reading current\n");
  374. return buf[i];
  375. } else {
  376. count++;
  377. buf[i] = buf[i] - 750;
  378. }
  379. break;
  380. case 1:
  381. buf[i] = twl4030battery_temperature(buf[i]);
  382. if (buf[i] < 0) {
  383. dev_err(madc->dev, "err reading temperature\n");
  384. return buf[i];
  385. } else {
  386. buf[i] -= 3;
  387. count++;
  388. }
  389. break;
  390. default:
  391. count++;
  392. /* Analog Input (V) = conv_result * step_size / R
  393. * conv_result = decimal value of 10-bit conversion
  394. * result
  395. * step size = 1.5 / (2 ^ 10 -1)
  396. * R = Prescaler ratio for input channels.
  397. * Result given in mV hence multiplied by 1000.
  398. */
  399. buf[i] = (buf[i] * 3 * 1000 *
  400. twl4030_divider_ratios[i].denominator)
  401. / (2 * 1023 *
  402. twl4030_divider_ratios[i].numerator);
  403. }
  404. }
  405. return count;
  406. }
  407. /*
  408. * Disables irq.
  409. * @madc - pointer to twl4030_madc_data struct
  410. * @id - irq number to be disabled
  411. * can take one of TWL4030_MADC_RT, TWL4030_MADC_SW1, TWL4030_MADC_SW2
  412. * corresponding to RT, SW1, SW2 conversion requests.
  413. * Returns error if i2c read/write fails.
  414. */
  415. static int twl4030_madc_disable_irq(struct twl4030_madc_data *madc, u8 id)
  416. {
  417. u8 val;
  418. int ret;
  419. ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &val, madc->imr);
  420. if (ret) {
  421. dev_err(madc->dev, "unable to read imr register 0x%X\n",
  422. madc->imr);
  423. return ret;
  424. }
  425. val |= (1 << id);
  426. ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, val, madc->imr);
  427. if (ret) {
  428. dev_err(madc->dev,
  429. "unable to write imr register 0x%X\n", madc->imr);
  430. return ret;
  431. }
  432. return 0;
  433. }
  434. static irqreturn_t twl4030_madc_threaded_irq_handler(int irq, void *_madc)
  435. {
  436. struct twl4030_madc_data *madc = _madc;
  437. const struct twl4030_madc_conversion_method *method;
  438. u8 isr_val, imr_val;
  439. int i, len, ret;
  440. struct twl4030_madc_request *r;
  441. mutex_lock(&madc->lock);
  442. ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &isr_val, madc->isr);
  443. if (ret) {
  444. dev_err(madc->dev, "unable to read isr register 0x%X\n",
  445. madc->isr);
  446. goto err_i2c;
  447. }
  448. ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &imr_val, madc->imr);
  449. if (ret) {
  450. dev_err(madc->dev, "unable to read imr register 0x%X\n",
  451. madc->imr);
  452. goto err_i2c;
  453. }
  454. isr_val &= ~imr_val;
  455. for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
  456. if (!(isr_val & (1 << i)))
  457. continue;
  458. ret = twl4030_madc_disable_irq(madc, i);
  459. if (ret < 0)
  460. dev_dbg(madc->dev, "Disable interrupt failed %d\n", i);
  461. madc->requests[i].result_pending = 1;
  462. }
  463. for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
  464. r = &madc->requests[i];
  465. /* No pending results for this method, move to next one */
  466. if (!r->result_pending)
  467. continue;
  468. method = &twl4030_conversion_methods[r->method];
  469. /* Read results */
  470. len = twl4030_madc_read_channels(madc, method->rbase,
  471. r->channels, r->rbuf, r->raw);
  472. /* Free request */
  473. r->result_pending = 0;
  474. r->active = 0;
  475. }
  476. mutex_unlock(&madc->lock);
  477. return IRQ_HANDLED;
  478. err_i2c:
  479. /*
  480. * In case of error check whichever request is active
  481. * and service the same.
  482. */
  483. for (i = 0; i < TWL4030_MADC_NUM_METHODS; i++) {
  484. r = &madc->requests[i];
  485. if (r->active == 0)
  486. continue;
  487. method = &twl4030_conversion_methods[r->method];
  488. /* Read results */
  489. len = twl4030_madc_read_channels(madc, method->rbase,
  490. r->channels, r->rbuf, r->raw);
  491. /* Free request */
  492. r->result_pending = 0;
  493. r->active = 0;
  494. }
  495. mutex_unlock(&madc->lock);
  496. return IRQ_HANDLED;
  497. }
  498. /*
  499. * Function which enables the madc conversion
  500. * by writing to the control register.
  501. * @madc - pointer to twl4030_madc_data struct
  502. * @conv_method - can be TWL4030_MADC_RT, TWL4030_MADC_SW2, TWL4030_MADC_SW1
  503. * corresponding to RT SW1 or SW2 conversion methods.
  504. * Returns 0 if succeeds else a negative error value
  505. */
  506. static int twl4030_madc_start_conversion(struct twl4030_madc_data *madc,
  507. int conv_method)
  508. {
  509. const struct twl4030_madc_conversion_method *method;
  510. int ret = 0;
  511. if (conv_method != TWL4030_MADC_SW1 && conv_method != TWL4030_MADC_SW2)
  512. return -ENOTSUPP;
  513. method = &twl4030_conversion_methods[conv_method];
  514. ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, TWL4030_MADC_SW_START,
  515. method->ctrl);
  516. if (ret) {
  517. dev_err(madc->dev, "unable to write ctrl register 0x%X\n",
  518. method->ctrl);
  519. return ret;
  520. }
  521. return 0;
  522. }
  523. /*
  524. * Function that waits for conversion to be ready
  525. * @madc - pointer to twl4030_madc_data struct
  526. * @timeout_ms - timeout value in milliseconds
  527. * @status_reg - ctrl register
  528. * returns 0 if succeeds else a negative error value
  529. */
  530. static int twl4030_madc_wait_conversion_ready(struct twl4030_madc_data *madc,
  531. unsigned int timeout_ms,
  532. u8 status_reg)
  533. {
  534. unsigned long timeout;
  535. int ret;
  536. timeout = jiffies + msecs_to_jiffies(timeout_ms);
  537. do {
  538. u8 reg;
  539. ret = twl_i2c_read_u8(TWL4030_MODULE_MADC, &reg, status_reg);
  540. if (ret) {
  541. dev_err(madc->dev,
  542. "unable to read status register 0x%X\n",
  543. status_reg);
  544. return ret;
  545. }
  546. if (!(reg & TWL4030_MADC_BUSY) && (reg & TWL4030_MADC_EOC_SW))
  547. return 0;
  548. usleep_range(500, 2000);
  549. } while (!time_after(jiffies, timeout));
  550. dev_err(madc->dev, "conversion timeout!\n");
  551. return -EAGAIN;
  552. }
  553. /*
  554. * An exported function which can be called from other kernel drivers.
  555. * @req twl4030_madc_request structure
  556. * req->rbuf will be filled with read values of channels based on the
  557. * channel index. If a particular channel reading fails there will
  558. * be a negative error value in the corresponding array element.
  559. * returns 0 if succeeds else error value
  560. */
  561. static int twl4030_madc_conversion(struct twl4030_madc_request *req)
  562. {
  563. const struct twl4030_madc_conversion_method *method;
  564. int ret;
  565. if (!req || !twl4030_madc)
  566. return -EINVAL;
  567. mutex_lock(&twl4030_madc->lock);
  568. if (req->method < TWL4030_MADC_RT || req->method > TWL4030_MADC_SW2) {
  569. ret = -EINVAL;
  570. goto out;
  571. }
  572. /* Do we have a conversion request ongoing */
  573. if (twl4030_madc->requests[req->method].active) {
  574. ret = -EBUSY;
  575. goto out;
  576. }
  577. method = &twl4030_conversion_methods[req->method];
  578. /* Select channels to be converted */
  579. ret = twl_i2c_write_u16(TWL4030_MODULE_MADC, req->channels, method->sel);
  580. if (ret) {
  581. dev_err(twl4030_madc->dev,
  582. "unable to write sel register 0x%X\n", method->sel);
  583. goto out;
  584. }
  585. /* Select averaging for all channels if do_avg is set */
  586. if (req->do_avg) {
  587. ret = twl_i2c_write_u16(TWL4030_MODULE_MADC, req->channels,
  588. method->avg);
  589. if (ret) {
  590. dev_err(twl4030_madc->dev,
  591. "unable to write avg register 0x%X\n",
  592. method->avg);
  593. goto out;
  594. }
  595. }
  596. /* With RT method we should not be here anymore */
  597. if (req->method == TWL4030_MADC_RT) {
  598. ret = -EINVAL;
  599. goto out;
  600. }
  601. ret = twl4030_madc_start_conversion(twl4030_madc, req->method);
  602. if (ret < 0)
  603. goto out;
  604. twl4030_madc->requests[req->method].active = 1;
  605. /* Wait until conversion is ready (ctrl register returns EOC) */
  606. ret = twl4030_madc_wait_conversion_ready(twl4030_madc, 5, method->ctrl);
  607. if (ret) {
  608. twl4030_madc->requests[req->method].active = 0;
  609. goto out;
  610. }
  611. ret = twl4030_madc_read_channels(twl4030_madc, method->rbase,
  612. req->channels, req->rbuf, req->raw);
  613. twl4030_madc->requests[req->method].active = 0;
  614. out:
  615. mutex_unlock(&twl4030_madc->lock);
  616. return ret;
  617. }
  618. /**
  619. * twl4030_madc_set_current_generator() - setup bias current
  620. *
  621. * @madc: pointer to twl4030_madc_data struct
  622. * @chan: can be one of the two values:
  623. * 0 - Enables bias current for main battery type reading
  624. * 1 - Enables bias current for main battery temperature sensing
  625. * @on: enable or disable chan.
  626. *
  627. * Function to enable or disable bias current for
  628. * main battery type reading or temperature sensing
  629. */
  630. static int twl4030_madc_set_current_generator(struct twl4030_madc_data *madc,
  631. int chan, int on)
  632. {
  633. int ret;
  634. int regmask;
  635. u8 regval;
  636. ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
  637. &regval, TWL4030_BCI_BCICTL1);
  638. if (ret) {
  639. dev_err(madc->dev, "unable to read BCICTL1 reg 0x%X",
  640. TWL4030_BCI_BCICTL1);
  641. return ret;
  642. }
  643. regmask = chan ? TWL4030_BCI_ITHEN : TWL4030_BCI_TYPEN;
  644. if (on)
  645. regval |= regmask;
  646. else
  647. regval &= ~regmask;
  648. ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE,
  649. regval, TWL4030_BCI_BCICTL1);
  650. if (ret) {
  651. dev_err(madc->dev, "unable to write BCICTL1 reg 0x%X\n",
  652. TWL4030_BCI_BCICTL1);
  653. return ret;
  654. }
  655. return 0;
  656. }
  657. /*
  658. * Function that sets MADC software power on bit to enable MADC
  659. * @madc - pointer to twl4030_madc_data struct
  660. * @on - Enable or disable MADC software power on bit.
  661. * returns error if i2c read/write fails else 0
  662. */
  663. static int twl4030_madc_set_power(struct twl4030_madc_data *madc, int on)
  664. {
  665. u8 regval;
  666. int ret;
  667. ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
  668. &regval, TWL4030_MADC_CTRL1);
  669. if (ret) {
  670. dev_err(madc->dev, "unable to read madc ctrl1 reg 0x%X\n",
  671. TWL4030_MADC_CTRL1);
  672. return ret;
  673. }
  674. if (on)
  675. regval |= TWL4030_MADC_MADCON;
  676. else
  677. regval &= ~TWL4030_MADC_MADCON;
  678. ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, regval, TWL4030_MADC_CTRL1);
  679. if (ret) {
  680. dev_err(madc->dev, "unable to write madc ctrl1 reg 0x%X\n",
  681. TWL4030_MADC_CTRL1);
  682. return ret;
  683. }
  684. return 0;
  685. }
  686. /*
  687. * Initialize MADC and request for threaded irq
  688. */
  689. static int twl4030_madc_probe(struct platform_device *pdev)
  690. {
  691. struct twl4030_madc_data *madc;
  692. struct twl4030_madc_platform_data *pdata = dev_get_platdata(&pdev->dev);
  693. struct device_node *np = pdev->dev.of_node;
  694. int irq, ret;
  695. u8 regval;
  696. struct iio_dev *iio_dev = NULL;
  697. if (!pdata && !np) {
  698. dev_err(&pdev->dev, "neither platform data nor Device Tree node available\n");
  699. return -EINVAL;
  700. }
  701. iio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*madc));
  702. if (!iio_dev) {
  703. dev_err(&pdev->dev, "failed allocating iio device\n");
  704. return -ENOMEM;
  705. }
  706. madc = iio_priv(iio_dev);
  707. madc->dev = &pdev->dev;
  708. iio_dev->name = dev_name(&pdev->dev);
  709. iio_dev->dev.parent = &pdev->dev;
  710. iio_dev->dev.of_node = pdev->dev.of_node;
  711. iio_dev->info = &twl4030_madc_iio_info;
  712. iio_dev->modes = INDIO_DIRECT_MODE;
  713. iio_dev->channels = twl4030_madc_iio_channels;
  714. iio_dev->num_channels = ARRAY_SIZE(twl4030_madc_iio_channels);
  715. /*
  716. * Phoenix provides 2 interrupt lines. The first one is connected to
  717. * the OMAP. The other one can be connected to the other processor such
  718. * as modem. Hence two separate ISR and IMR registers.
  719. */
  720. if (pdata)
  721. madc->use_second_irq = (pdata->irq_line != 1);
  722. else
  723. madc->use_second_irq = of_property_read_bool(np,
  724. "ti,system-uses-second-madc-irq");
  725. madc->imr = madc->use_second_irq ? TWL4030_MADC_IMR2 :
  726. TWL4030_MADC_IMR1;
  727. madc->isr = madc->use_second_irq ? TWL4030_MADC_ISR2 :
  728. TWL4030_MADC_ISR1;
  729. ret = twl4030_madc_set_power(madc, 1);
  730. if (ret < 0)
  731. return ret;
  732. ret = twl4030_madc_set_current_generator(madc, 0, 1);
  733. if (ret < 0)
  734. goto err_current_generator;
  735. ret = twl_i2c_read_u8(TWL_MODULE_MAIN_CHARGE,
  736. &regval, TWL4030_BCI_BCICTL1);
  737. if (ret) {
  738. dev_err(&pdev->dev, "unable to read reg BCI CTL1 0x%X\n",
  739. TWL4030_BCI_BCICTL1);
  740. goto err_i2c;
  741. }
  742. regval |= TWL4030_BCI_MESBAT;
  743. ret = twl_i2c_write_u8(TWL_MODULE_MAIN_CHARGE,
  744. regval, TWL4030_BCI_BCICTL1);
  745. if (ret) {
  746. dev_err(&pdev->dev, "unable to write reg BCI Ctl1 0x%X\n",
  747. TWL4030_BCI_BCICTL1);
  748. goto err_i2c;
  749. }
  750. /* Check that MADC clock is on */
  751. ret = twl_i2c_read_u8(TWL4030_MODULE_INTBR, &regval, TWL4030_REG_GPBR1);
  752. if (ret) {
  753. dev_err(&pdev->dev, "unable to read reg GPBR1 0x%X\n",
  754. TWL4030_REG_GPBR1);
  755. goto err_i2c;
  756. }
  757. /* If MADC clk is not on, turn it on */
  758. if (!(regval & TWL4030_GPBR1_MADC_HFCLK_EN)) {
  759. dev_info(&pdev->dev, "clk disabled, enabling\n");
  760. regval |= TWL4030_GPBR1_MADC_HFCLK_EN;
  761. ret = twl_i2c_write_u8(TWL4030_MODULE_INTBR, regval,
  762. TWL4030_REG_GPBR1);
  763. if (ret) {
  764. dev_err(&pdev->dev, "unable to write reg GPBR1 0x%X\n",
  765. TWL4030_REG_GPBR1);
  766. goto err_i2c;
  767. }
  768. }
  769. platform_set_drvdata(pdev, iio_dev);
  770. mutex_init(&madc->lock);
  771. irq = platform_get_irq(pdev, 0);
  772. ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  773. twl4030_madc_threaded_irq_handler,
  774. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  775. "twl4030_madc", madc);
  776. if (ret) {
  777. dev_err(&pdev->dev, "could not request irq\n");
  778. goto err_i2c;
  779. }
  780. twl4030_madc = madc;
  781. /* Configure MADC[3:6] */
  782. ret = twl_i2c_read_u8(TWL_MODULE_USB, &regval,
  783. TWL4030_USB_CARKIT_ANA_CTRL);
  784. if (ret) {
  785. dev_err(&pdev->dev, "unable to read reg CARKIT_ANA_CTRL 0x%X\n",
  786. TWL4030_USB_CARKIT_ANA_CTRL);
  787. goto err_i2c;
  788. }
  789. regval |= TWL4030_USB_SEL_MADC_MCPC;
  790. ret = twl_i2c_write_u8(TWL_MODULE_USB, regval,
  791. TWL4030_USB_CARKIT_ANA_CTRL);
  792. if (ret) {
  793. dev_err(&pdev->dev, "unable to write reg CARKIT_ANA_CTRL 0x%X\n",
  794. TWL4030_USB_CARKIT_ANA_CTRL);
  795. goto err_i2c;
  796. }
  797. /* Enable 3v1 bias regulator for MADC[3:6] */
  798. madc->usb3v1 = devm_regulator_get(madc->dev, "vusb3v1");
  799. if (IS_ERR(madc->usb3v1)) {
  800. ret = -ENODEV;
  801. goto err_i2c;
  802. }
  803. ret = regulator_enable(madc->usb3v1);
  804. if (ret) {
  805. dev_err(madc->dev, "could not enable 3v1 bias regulator\n");
  806. goto err_i2c;
  807. }
  808. ret = iio_device_register(iio_dev);
  809. if (ret) {
  810. dev_err(&pdev->dev, "could not register iio device\n");
  811. goto err_usb3v1;
  812. }
  813. return 0;
  814. err_usb3v1:
  815. regulator_disable(madc->usb3v1);
  816. err_i2c:
  817. twl4030_madc_set_current_generator(madc, 0, 0);
  818. err_current_generator:
  819. twl4030_madc_set_power(madc, 0);
  820. return ret;
  821. }
  822. static int twl4030_madc_remove(struct platform_device *pdev)
  823. {
  824. struct iio_dev *iio_dev = platform_get_drvdata(pdev);
  825. struct twl4030_madc_data *madc = iio_priv(iio_dev);
  826. iio_device_unregister(iio_dev);
  827. twl4030_madc_set_current_generator(madc, 0, 0);
  828. twl4030_madc_set_power(madc, 0);
  829. regulator_disable(madc->usb3v1);
  830. return 0;
  831. }
  832. #ifdef CONFIG_OF
  833. static const struct of_device_id twl_madc_of_match[] = {
  834. { .compatible = "ti,twl4030-madc", },
  835. { },
  836. };
  837. MODULE_DEVICE_TABLE(of, twl_madc_of_match);
  838. #endif
  839. static struct platform_driver twl4030_madc_driver = {
  840. .probe = twl4030_madc_probe,
  841. .remove = twl4030_madc_remove,
  842. .driver = {
  843. .name = "twl4030_madc",
  844. .of_match_table = of_match_ptr(twl_madc_of_match),
  845. },
  846. };
  847. module_platform_driver(twl4030_madc_driver);
  848. MODULE_DESCRIPTION("TWL4030 ADC driver");
  849. MODULE_LICENSE("GPL");
  850. MODULE_AUTHOR("J Keerthy");
  851. MODULE_ALIAS("platform:twl4030_madc");