sun4i-gpadc-iio.c 20 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728
  1. /* ADC driver for sunxi platforms' (A10, A13 and A31) GPADC
  2. *
  3. * Copyright (c) 2016 Quentin Schulz <quentin.schulz@free-electrons.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it under
  6. * the terms of the GNU General Public License version 2 as published by the
  7. * Free Software Foundation.
  8. *
  9. * The Allwinner SoCs all have an ADC that can also act as a touchscreen
  10. * controller and a thermal sensor.
  11. * The thermal sensor works only when the ADC acts as a touchscreen controller
  12. * and is configured to throw an interrupt every fixed periods of time (let say
  13. * every X seconds).
  14. * One would be tempted to disable the IP on the hardware side rather than
  15. * disabling interrupts to save some power but that resets the internal clock of
  16. * the IP, resulting in having to wait X seconds every time we want to read the
  17. * value of the thermal sensor.
  18. * This is also the reason of using autosuspend in pm_runtime. If there was no
  19. * autosuspend, the thermal sensor would need X seconds after every
  20. * pm_runtime_get_sync to get a value from the ADC. The autosuspend allows the
  21. * thermal sensor to be requested again in a certain time span before it gets
  22. * shutdown for not being used.
  23. */
  24. #include <linux/completion.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/io.h>
  27. #include <linux/module.h>
  28. #include <linux/of.h>
  29. #include <linux/of_device.h>
  30. #include <linux/platform_device.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/regmap.h>
  33. #include <linux/thermal.h>
  34. #include <linux/delay.h>
  35. #include <linux/iio/iio.h>
  36. #include <linux/iio/driver.h>
  37. #include <linux/iio/machine.h>
  38. #include <linux/mfd/sun4i-gpadc.h>
  39. static unsigned int sun4i_gpadc_chan_select(unsigned int chan)
  40. {
  41. return SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
  42. }
  43. static unsigned int sun6i_gpadc_chan_select(unsigned int chan)
  44. {
  45. return SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
  46. }
  47. struct gpadc_data {
  48. int temp_offset;
  49. int temp_scale;
  50. unsigned int tp_mode_en;
  51. unsigned int tp_adc_select;
  52. unsigned int (*adc_chan_select)(unsigned int chan);
  53. unsigned int adc_chan_mask;
  54. };
  55. static const struct gpadc_data sun4i_gpadc_data = {
  56. .temp_offset = -1932,
  57. .temp_scale = 133,
  58. .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
  59. .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
  60. .adc_chan_select = &sun4i_gpadc_chan_select,
  61. .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
  62. };
  63. static const struct gpadc_data sun5i_gpadc_data = {
  64. .temp_offset = -1447,
  65. .temp_scale = 100,
  66. .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
  67. .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
  68. .adc_chan_select = &sun4i_gpadc_chan_select,
  69. .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
  70. };
  71. static const struct gpadc_data sun6i_gpadc_data = {
  72. .temp_offset = -1623,
  73. .temp_scale = 167,
  74. .tp_mode_en = SUN6I_GPADC_CTRL1_TP_MODE_EN,
  75. .tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
  76. .adc_chan_select = &sun6i_gpadc_chan_select,
  77. .adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
  78. };
  79. static const struct gpadc_data sun8i_a33_gpadc_data = {
  80. .temp_offset = -1662,
  81. .temp_scale = 162,
  82. .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
  83. };
  84. struct sun4i_gpadc_iio {
  85. struct iio_dev *indio_dev;
  86. struct completion completion;
  87. int temp_data;
  88. u32 adc_data;
  89. struct regmap *regmap;
  90. unsigned int fifo_data_irq;
  91. atomic_t ignore_fifo_data_irq;
  92. unsigned int temp_data_irq;
  93. atomic_t ignore_temp_data_irq;
  94. const struct gpadc_data *data;
  95. bool no_irq;
  96. /* prevents concurrent reads of temperature and ADC */
  97. struct mutex mutex;
  98. struct thermal_zone_device *tzd;
  99. struct device *sensor_device;
  100. };
  101. #define SUN4I_GPADC_ADC_CHANNEL(_channel, _name) { \
  102. .type = IIO_VOLTAGE, \
  103. .indexed = 1, \
  104. .channel = _channel, \
  105. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
  106. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
  107. .datasheet_name = _name, \
  108. }
  109. static struct iio_map sun4i_gpadc_hwmon_maps[] = {
  110. {
  111. .adc_channel_label = "temp_adc",
  112. .consumer_dev_name = "iio_hwmon.0",
  113. },
  114. { /* sentinel */ },
  115. };
  116. static const struct iio_chan_spec sun4i_gpadc_channels[] = {
  117. SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
  118. SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
  119. SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
  120. SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
  121. {
  122. .type = IIO_TEMP,
  123. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  124. BIT(IIO_CHAN_INFO_SCALE) |
  125. BIT(IIO_CHAN_INFO_OFFSET),
  126. .datasheet_name = "temp_adc",
  127. },
  128. };
  129. static const struct iio_chan_spec sun4i_gpadc_channels_no_temp[] = {
  130. SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
  131. SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
  132. SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
  133. SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
  134. };
  135. static const struct iio_chan_spec sun8i_a33_gpadc_channels[] = {
  136. {
  137. .type = IIO_TEMP,
  138. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  139. BIT(IIO_CHAN_INFO_SCALE) |
  140. BIT(IIO_CHAN_INFO_OFFSET),
  141. .datasheet_name = "temp_adc",
  142. },
  143. };
  144. static const struct regmap_config sun4i_gpadc_regmap_config = {
  145. .reg_bits = 32,
  146. .val_bits = 32,
  147. .reg_stride = 4,
  148. .fast_io = true,
  149. };
  150. static int sun4i_prepare_for_irq(struct iio_dev *indio_dev, int channel,
  151. unsigned int irq)
  152. {
  153. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  154. int ret;
  155. u32 reg;
  156. pm_runtime_get_sync(indio_dev->dev.parent);
  157. reinit_completion(&info->completion);
  158. ret = regmap_write(info->regmap, SUN4I_GPADC_INT_FIFOC,
  159. SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(1) |
  160. SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH);
  161. if (ret)
  162. return ret;
  163. ret = regmap_read(info->regmap, SUN4I_GPADC_CTRL1, &reg);
  164. if (ret)
  165. return ret;
  166. if (irq == info->fifo_data_irq) {
  167. ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
  168. info->data->tp_mode_en |
  169. info->data->tp_adc_select |
  170. info->data->adc_chan_select(channel));
  171. /*
  172. * When the IP changes channel, it needs a bit of time to get
  173. * correct values.
  174. */
  175. if ((reg & info->data->adc_chan_mask) !=
  176. info->data->adc_chan_select(channel))
  177. mdelay(10);
  178. } else {
  179. /*
  180. * The temperature sensor returns valid data only when the ADC
  181. * operates in touchscreen mode.
  182. */
  183. ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
  184. info->data->tp_mode_en);
  185. }
  186. if (ret)
  187. return ret;
  188. /*
  189. * When the IP changes mode between ADC or touchscreen, it
  190. * needs a bit of time to get correct values.
  191. */
  192. if ((reg & info->data->tp_adc_select) != info->data->tp_adc_select)
  193. mdelay(100);
  194. return 0;
  195. }
  196. static int sun4i_gpadc_read(struct iio_dev *indio_dev, int channel, int *val,
  197. unsigned int irq)
  198. {
  199. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  200. int ret;
  201. mutex_lock(&info->mutex);
  202. ret = sun4i_prepare_for_irq(indio_dev, channel, irq);
  203. if (ret)
  204. goto err;
  205. enable_irq(irq);
  206. /*
  207. * The temperature sensor throws an interruption periodically (currently
  208. * set at periods of ~0.6s in sun4i_gpadc_runtime_resume). A 1s delay
  209. * makes sure an interruption occurs in normal conditions. If it doesn't
  210. * occur, then there is a timeout.
  211. */
  212. if (!wait_for_completion_timeout(&info->completion,
  213. msecs_to_jiffies(1000))) {
  214. ret = -ETIMEDOUT;
  215. goto err;
  216. }
  217. if (irq == info->fifo_data_irq)
  218. *val = info->adc_data;
  219. else
  220. *val = info->temp_data;
  221. ret = 0;
  222. pm_runtime_mark_last_busy(indio_dev->dev.parent);
  223. err:
  224. pm_runtime_put_autosuspend(indio_dev->dev.parent);
  225. disable_irq(irq);
  226. mutex_unlock(&info->mutex);
  227. return ret;
  228. }
  229. static int sun4i_gpadc_adc_read(struct iio_dev *indio_dev, int channel,
  230. int *val)
  231. {
  232. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  233. return sun4i_gpadc_read(indio_dev, channel, val, info->fifo_data_irq);
  234. }
  235. static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
  236. {
  237. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  238. if (info->no_irq) {
  239. pm_runtime_get_sync(indio_dev->dev.parent);
  240. regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
  241. pm_runtime_mark_last_busy(indio_dev->dev.parent);
  242. pm_runtime_put_autosuspend(indio_dev->dev.parent);
  243. return 0;
  244. }
  245. return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
  246. }
  247. static int sun4i_gpadc_temp_offset(struct iio_dev *indio_dev, int *val)
  248. {
  249. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  250. *val = info->data->temp_offset;
  251. return 0;
  252. }
  253. static int sun4i_gpadc_temp_scale(struct iio_dev *indio_dev, int *val)
  254. {
  255. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  256. *val = info->data->temp_scale;
  257. return 0;
  258. }
  259. static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
  260. struct iio_chan_spec const *chan, int *val,
  261. int *val2, long mask)
  262. {
  263. int ret;
  264. switch (mask) {
  265. case IIO_CHAN_INFO_OFFSET:
  266. ret = sun4i_gpadc_temp_offset(indio_dev, val);
  267. if (ret)
  268. return ret;
  269. return IIO_VAL_INT;
  270. case IIO_CHAN_INFO_RAW:
  271. if (chan->type == IIO_VOLTAGE)
  272. ret = sun4i_gpadc_adc_read(indio_dev, chan->channel,
  273. val);
  274. else
  275. ret = sun4i_gpadc_temp_read(indio_dev, val);
  276. if (ret)
  277. return ret;
  278. return IIO_VAL_INT;
  279. case IIO_CHAN_INFO_SCALE:
  280. if (chan->type == IIO_VOLTAGE) {
  281. /* 3000mV / 4096 * raw */
  282. *val = 0;
  283. *val2 = 732421875;
  284. return IIO_VAL_INT_PLUS_NANO;
  285. }
  286. ret = sun4i_gpadc_temp_scale(indio_dev, val);
  287. if (ret)
  288. return ret;
  289. return IIO_VAL_INT;
  290. default:
  291. return -EINVAL;
  292. }
  293. return -EINVAL;
  294. }
  295. static const struct iio_info sun4i_gpadc_iio_info = {
  296. .read_raw = sun4i_gpadc_read_raw,
  297. .driver_module = THIS_MODULE,
  298. };
  299. static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)
  300. {
  301. struct sun4i_gpadc_iio *info = dev_id;
  302. if (atomic_read(&info->ignore_temp_data_irq))
  303. goto out;
  304. if (!regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, &info->temp_data))
  305. complete(&info->completion);
  306. out:
  307. return IRQ_HANDLED;
  308. }
  309. static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
  310. {
  311. struct sun4i_gpadc_iio *info = dev_id;
  312. if (atomic_read(&info->ignore_fifo_data_irq))
  313. goto out;
  314. if (!regmap_read(info->regmap, SUN4I_GPADC_DATA, &info->adc_data))
  315. complete(&info->completion);
  316. out:
  317. return IRQ_HANDLED;
  318. }
  319. static int sun4i_gpadc_runtime_suspend(struct device *dev)
  320. {
  321. struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
  322. /* Disable the ADC on IP */
  323. regmap_write(info->regmap, SUN4I_GPADC_CTRL1, 0);
  324. /* Disable temperature sensor on IP */
  325. regmap_write(info->regmap, SUN4I_GPADC_TPR, 0);
  326. return 0;
  327. }
  328. static int sun4i_gpadc_runtime_resume(struct device *dev)
  329. {
  330. struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
  331. /* clkin = 6MHz */
  332. regmap_write(info->regmap, SUN4I_GPADC_CTRL0,
  333. SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(2) |
  334. SUN4I_GPADC_CTRL0_FS_DIV(7) |
  335. SUN4I_GPADC_CTRL0_T_ACQ(63));
  336. regmap_write(info->regmap, SUN4I_GPADC_CTRL1, info->data->tp_mode_en);
  337. regmap_write(info->regmap, SUN4I_GPADC_CTRL3,
  338. SUN4I_GPADC_CTRL3_FILTER_EN |
  339. SUN4I_GPADC_CTRL3_FILTER_TYPE(1));
  340. /* period = SUN4I_GPADC_TPR_TEMP_PERIOD * 256 * 16 / clkin; ~0.6s */
  341. regmap_write(info->regmap, SUN4I_GPADC_TPR,
  342. SUN4I_GPADC_TPR_TEMP_ENABLE |
  343. SUN4I_GPADC_TPR_TEMP_PERIOD(800));
  344. return 0;
  345. }
  346. static int sun4i_gpadc_get_temp(void *data, int *temp)
  347. {
  348. struct sun4i_gpadc_iio *info = data;
  349. int val, scale, offset;
  350. if (sun4i_gpadc_temp_read(info->indio_dev, &val))
  351. return -ETIMEDOUT;
  352. sun4i_gpadc_temp_scale(info->indio_dev, &scale);
  353. sun4i_gpadc_temp_offset(info->indio_dev, &offset);
  354. *temp = (val + offset) * scale;
  355. return 0;
  356. }
  357. static const struct thermal_zone_of_device_ops sun4i_ts_tz_ops = {
  358. .get_temp = &sun4i_gpadc_get_temp,
  359. };
  360. static const struct dev_pm_ops sun4i_gpadc_pm_ops = {
  361. .runtime_suspend = &sun4i_gpadc_runtime_suspend,
  362. .runtime_resume = &sun4i_gpadc_runtime_resume,
  363. };
  364. static int sun4i_irq_init(struct platform_device *pdev, const char *name,
  365. irq_handler_t handler, const char *devname,
  366. unsigned int *irq, atomic_t *atomic)
  367. {
  368. int ret;
  369. struct sun4i_gpadc_dev *mfd_dev = dev_get_drvdata(pdev->dev.parent);
  370. struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(&pdev->dev));
  371. /*
  372. * Once the interrupt is activated, the IP continuously performs
  373. * conversions thus throws interrupts. The interrupt is activated right
  374. * after being requested but we want to control when these interrupts
  375. * occur thus we disable it right after being requested. However, an
  376. * interrupt might occur between these two instructions and we have to
  377. * make sure that does not happen, by using atomic flags. We set the
  378. * flag before requesting the interrupt and unset it right after
  379. * disabling the interrupt. When an interrupt occurs between these two
  380. * instructions, reading the atomic flag will tell us to ignore the
  381. * interrupt.
  382. */
  383. atomic_set(atomic, 1);
  384. ret = platform_get_irq_byname(pdev, name);
  385. if (ret < 0) {
  386. dev_err(&pdev->dev, "no %s interrupt registered\n", name);
  387. return ret;
  388. }
  389. ret = regmap_irq_get_virq(mfd_dev->regmap_irqc, ret);
  390. if (ret < 0) {
  391. dev_err(&pdev->dev, "failed to get virq for irq %s\n", name);
  392. return ret;
  393. }
  394. *irq = ret;
  395. ret = devm_request_any_context_irq(&pdev->dev, *irq, handler, 0,
  396. devname, info);
  397. if (ret < 0) {
  398. dev_err(&pdev->dev, "could not request %s interrupt: %d\n",
  399. name, ret);
  400. return ret;
  401. }
  402. disable_irq(*irq);
  403. atomic_set(atomic, 0);
  404. return 0;
  405. }
  406. static const struct of_device_id sun4i_gpadc_of_id[] = {
  407. {
  408. .compatible = "allwinner,sun8i-a33-ths",
  409. .data = &sun8i_a33_gpadc_data,
  410. },
  411. { /* sentinel */ }
  412. };
  413. static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
  414. struct iio_dev *indio_dev)
  415. {
  416. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  417. const struct of_device_id *of_dev;
  418. struct resource *mem;
  419. void __iomem *base;
  420. int ret;
  421. of_dev = of_match_device(sun4i_gpadc_of_id, &pdev->dev);
  422. if (!of_dev)
  423. return -ENODEV;
  424. info->no_irq = true;
  425. info->data = (struct gpadc_data *)of_dev->data;
  426. indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
  427. indio_dev->channels = sun8i_a33_gpadc_channels;
  428. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  429. base = devm_ioremap_resource(&pdev->dev, mem);
  430. if (IS_ERR(base))
  431. return PTR_ERR(base);
  432. info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
  433. &sun4i_gpadc_regmap_config);
  434. if (IS_ERR(info->regmap)) {
  435. ret = PTR_ERR(info->regmap);
  436. dev_err(&pdev->dev, "failed to init regmap: %d\n", ret);
  437. return ret;
  438. }
  439. if (!IS_ENABLED(CONFIG_THERMAL_OF))
  440. return 0;
  441. info->sensor_device = &pdev->dev;
  442. info->tzd = thermal_zone_of_sensor_register(info->sensor_device, 0,
  443. info, &sun4i_ts_tz_ops);
  444. if (IS_ERR(info->tzd))
  445. dev_err(&pdev->dev, "could not register thermal sensor: %ld\n",
  446. PTR_ERR(info->tzd));
  447. return PTR_ERR_OR_ZERO(info->tzd);
  448. }
  449. static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
  450. struct iio_dev *indio_dev)
  451. {
  452. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  453. struct sun4i_gpadc_dev *sun4i_gpadc_dev =
  454. dev_get_drvdata(pdev->dev.parent);
  455. int ret;
  456. info->no_irq = false;
  457. info->regmap = sun4i_gpadc_dev->regmap;
  458. indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels);
  459. indio_dev->channels = sun4i_gpadc_channels;
  460. info->data = (struct gpadc_data *)platform_get_device_id(pdev)->driver_data;
  461. /*
  462. * Since the controller needs to be in touchscreen mode for its thermal
  463. * sensor to operate properly, and that switching between the two modes
  464. * needs a delay, always registering in the thermal framework will
  465. * significantly slow down the conversion rate of the ADCs.
  466. *
  467. * Therefore, instead of depending on THERMAL_OF in Kconfig, we only
  468. * register the sensor if that option is enabled, eventually leaving
  469. * that choice to the user.
  470. */
  471. if (IS_ENABLED(CONFIG_THERMAL_OF)) {
  472. /*
  473. * This driver is a child of an MFD which has a node in the DT
  474. * but not its children, because of DT backward compatibility
  475. * for A10, A13 and A31 SoCs. Therefore, the resulting devices
  476. * of this driver do not have an of_node variable.
  477. * However, its parent (the MFD driver) has an of_node variable
  478. * and since devm_thermal_zone_of_sensor_register uses its first
  479. * argument to match the phandle defined in the node of the
  480. * thermal driver with the of_node of the device passed as first
  481. * argument and the third argument to call ops from
  482. * thermal_zone_of_device_ops, the solution is to use the parent
  483. * device as first argument to match the phandle with its
  484. * of_node, and the device from this driver as third argument to
  485. * return the temperature.
  486. */
  487. info->sensor_device = pdev->dev.parent;
  488. info->tzd = thermal_zone_of_sensor_register(info->sensor_device,
  489. 0, info,
  490. &sun4i_ts_tz_ops);
  491. if (IS_ERR(info->tzd)) {
  492. dev_err(&pdev->dev,
  493. "could not register thermal sensor: %ld\n",
  494. PTR_ERR(info->tzd));
  495. return PTR_ERR(info->tzd);
  496. }
  497. } else {
  498. indio_dev->num_channels =
  499. ARRAY_SIZE(sun4i_gpadc_channels_no_temp);
  500. indio_dev->channels = sun4i_gpadc_channels_no_temp;
  501. }
  502. if (IS_ENABLED(CONFIG_THERMAL_OF)) {
  503. ret = sun4i_irq_init(pdev, "TEMP_DATA_PENDING",
  504. sun4i_gpadc_temp_data_irq_handler,
  505. "temp_data", &info->temp_data_irq,
  506. &info->ignore_temp_data_irq);
  507. if (ret < 0)
  508. return ret;
  509. }
  510. ret = sun4i_irq_init(pdev, "FIFO_DATA_PENDING",
  511. sun4i_gpadc_fifo_data_irq_handler, "fifo_data",
  512. &info->fifo_data_irq, &info->ignore_fifo_data_irq);
  513. if (ret < 0)
  514. return ret;
  515. if (IS_ENABLED(CONFIG_THERMAL_OF)) {
  516. ret = iio_map_array_register(indio_dev, sun4i_gpadc_hwmon_maps);
  517. if (ret < 0) {
  518. dev_err(&pdev->dev,
  519. "failed to register iio map array\n");
  520. return ret;
  521. }
  522. }
  523. return 0;
  524. }
  525. static int sun4i_gpadc_probe(struct platform_device *pdev)
  526. {
  527. struct sun4i_gpadc_iio *info;
  528. struct iio_dev *indio_dev;
  529. int ret;
  530. indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
  531. if (!indio_dev)
  532. return -ENOMEM;
  533. info = iio_priv(indio_dev);
  534. platform_set_drvdata(pdev, indio_dev);
  535. mutex_init(&info->mutex);
  536. info->indio_dev = indio_dev;
  537. init_completion(&info->completion);
  538. indio_dev->name = dev_name(&pdev->dev);
  539. indio_dev->dev.parent = &pdev->dev;
  540. indio_dev->dev.of_node = pdev->dev.of_node;
  541. indio_dev->info = &sun4i_gpadc_iio_info;
  542. indio_dev->modes = INDIO_DIRECT_MODE;
  543. if (pdev->dev.of_node)
  544. ret = sun4i_gpadc_probe_dt(pdev, indio_dev);
  545. else
  546. ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
  547. if (ret)
  548. return ret;
  549. pm_runtime_set_autosuspend_delay(&pdev->dev,
  550. SUN4I_GPADC_AUTOSUSPEND_DELAY);
  551. pm_runtime_use_autosuspend(&pdev->dev);
  552. pm_runtime_set_suspended(&pdev->dev);
  553. pm_runtime_enable(&pdev->dev);
  554. ret = devm_iio_device_register(&pdev->dev, indio_dev);
  555. if (ret < 0) {
  556. dev_err(&pdev->dev, "could not register the device\n");
  557. goto err_map;
  558. }
  559. return 0;
  560. err_map:
  561. if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
  562. iio_map_array_unregister(indio_dev);
  563. pm_runtime_put(&pdev->dev);
  564. pm_runtime_disable(&pdev->dev);
  565. return ret;
  566. }
  567. static int sun4i_gpadc_remove(struct platform_device *pdev)
  568. {
  569. struct iio_dev *indio_dev = platform_get_drvdata(pdev);
  570. struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
  571. pm_runtime_put(&pdev->dev);
  572. pm_runtime_disable(&pdev->dev);
  573. if (!IS_ENABLED(CONFIG_THERMAL_OF))
  574. return 0;
  575. thermal_zone_of_sensor_unregister(info->sensor_device, info->tzd);
  576. if (!info->no_irq)
  577. iio_map_array_unregister(indio_dev);
  578. return 0;
  579. }
  580. static const struct platform_device_id sun4i_gpadc_id[] = {
  581. { "sun4i-a10-gpadc-iio", (kernel_ulong_t)&sun4i_gpadc_data },
  582. { "sun5i-a13-gpadc-iio", (kernel_ulong_t)&sun5i_gpadc_data },
  583. { "sun6i-a31-gpadc-iio", (kernel_ulong_t)&sun6i_gpadc_data },
  584. { /* sentinel */ },
  585. };
  586. MODULE_DEVICE_TABLE(platform, sun4i_gpadc_id);
  587. static struct platform_driver sun4i_gpadc_driver = {
  588. .driver = {
  589. .name = "sun4i-gpadc-iio",
  590. .of_match_table = sun4i_gpadc_of_id,
  591. .pm = &sun4i_gpadc_pm_ops,
  592. },
  593. .id_table = sun4i_gpadc_id,
  594. .probe = sun4i_gpadc_probe,
  595. .remove = sun4i_gpadc_remove,
  596. };
  597. MODULE_DEVICE_TABLE(of, sun4i_gpadc_of_id);
  598. module_platform_driver(sun4i_gpadc_driver);
  599. MODULE_DESCRIPTION("ADC driver for sunxi platforms");
  600. MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
  601. MODULE_LICENSE("GPL v2");