i2c-designware-platdrv.c 13 KB

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  1. /*
  2. * Synopsys DesignWare I2C adapter driver.
  3. *
  4. * Based on the TI DAVINCI I2C adapter driver.
  5. *
  6. * Copyright (C) 2006 Texas Instruments.
  7. * Copyright (C) 2007 MontaVista Software Inc.
  8. * Copyright (C) 2009 Provigent Ltd.
  9. *
  10. * ----------------------------------------------------------------------------
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. * ----------------------------------------------------------------------------
  22. *
  23. */
  24. #include <linux/acpi.h>
  25. #include <linux/clk-provider.h>
  26. #include <linux/clk.h>
  27. #include <linux/delay.h>
  28. #include <linux/dmi.h>
  29. #include <linux/err.h>
  30. #include <linux/errno.h>
  31. #include <linux/i2c.h>
  32. #include <linux/interrupt.h>
  33. #include <linux/io.h>
  34. #include <linux/kernel.h>
  35. #include <linux/module.h>
  36. #include <linux/of.h>
  37. #include <linux/platform_data/i2c-designware.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/pm.h>
  40. #include <linux/pm_runtime.h>
  41. #include <linux/property.h>
  42. #include <linux/reset.h>
  43. #include <linux/sched.h>
  44. #include <linux/slab.h>
  45. #include "i2c-designware-core.h"
  46. static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev *dev)
  47. {
  48. return clk_get_rate(dev->clk)/1000;
  49. }
  50. #ifdef CONFIG_ACPI
  51. /*
  52. * The HCNT/LCNT information coming from ACPI should be the most accurate
  53. * for given platform. However, some systems get it wrong. On such systems
  54. * we get better results by calculating those based on the input clock.
  55. */
  56. static const struct dmi_system_id dw_i2c_no_acpi_params[] = {
  57. {
  58. .ident = "Dell Inspiron 7348",
  59. .matches = {
  60. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  61. DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7348"),
  62. },
  63. },
  64. { }
  65. };
  66. static void dw_i2c_acpi_params(struct platform_device *pdev, char method[],
  67. u16 *hcnt, u16 *lcnt, u32 *sda_hold)
  68. {
  69. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER };
  70. acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  71. union acpi_object *obj;
  72. if (dmi_check_system(dw_i2c_no_acpi_params))
  73. return;
  74. if (ACPI_FAILURE(acpi_evaluate_object(handle, method, NULL, &buf)))
  75. return;
  76. obj = (union acpi_object *)buf.pointer;
  77. if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 3) {
  78. const union acpi_object *objs = obj->package.elements;
  79. *hcnt = (u16)objs[0].integer.value;
  80. *lcnt = (u16)objs[1].integer.value;
  81. *sda_hold = (u32)objs[2].integer.value;
  82. }
  83. kfree(buf.pointer);
  84. }
  85. static int dw_i2c_acpi_configure(struct platform_device *pdev)
  86. {
  87. struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
  88. u32 ss_ht = 0, fp_ht = 0, hs_ht = 0, fs_ht = 0;
  89. acpi_handle handle = ACPI_HANDLE(&pdev->dev);
  90. const struct acpi_device_id *id;
  91. struct acpi_device *adev;
  92. const char *uid;
  93. dev->adapter.nr = -1;
  94. dev->tx_fifo_depth = 32;
  95. dev->rx_fifo_depth = 32;
  96. /*
  97. * Try to get SDA hold time and *CNT values from an ACPI method for
  98. * selected speed modes.
  99. */
  100. dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, &ss_ht);
  101. dw_i2c_acpi_params(pdev, "FPCN", &dev->fp_hcnt, &dev->fp_lcnt, &fp_ht);
  102. dw_i2c_acpi_params(pdev, "HSCN", &dev->hs_hcnt, &dev->hs_lcnt, &hs_ht);
  103. dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, &fs_ht);
  104. switch (dev->clk_freq) {
  105. case 100000:
  106. dev->sda_hold_time = ss_ht;
  107. break;
  108. case 1000000:
  109. dev->sda_hold_time = fp_ht;
  110. break;
  111. case 3400000:
  112. dev->sda_hold_time = hs_ht;
  113. break;
  114. case 400000:
  115. default:
  116. dev->sda_hold_time = fs_ht;
  117. break;
  118. }
  119. id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev);
  120. if (id && id->driver_data)
  121. dev->flags |= (u32)id->driver_data;
  122. if (acpi_bus_get_device(handle, &adev))
  123. return -ENODEV;
  124. /*
  125. * Cherrytrail I2C7 gets used for the PMIC which gets accessed
  126. * through ACPI opregions during late suspend / early resume
  127. * disable pm for it.
  128. */
  129. uid = adev->pnp.unique_id;
  130. if ((dev->flags & MODEL_CHERRYTRAIL) && !strcmp(uid, "7"))
  131. dev->pm_disabled = true;
  132. return 0;
  133. }
  134. static const struct acpi_device_id dw_i2c_acpi_match[] = {
  135. { "INT33C2", 0 },
  136. { "INT33C3", 0 },
  137. { "INT3432", 0 },
  138. { "INT3433", 0 },
  139. { "80860F41", 0 },
  140. { "808622C1", MODEL_CHERRYTRAIL },
  141. { "AMD0010", ACCESS_INTR_MASK },
  142. { "AMDI0010", ACCESS_INTR_MASK },
  143. { "AMDI0510", 0 },
  144. { "APMC0D0F", 0 },
  145. { "HISI02A1", 0 },
  146. { "HISI02A2", 0 },
  147. { }
  148. };
  149. MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
  150. #else
  151. static inline int dw_i2c_acpi_configure(struct platform_device *pdev)
  152. {
  153. return -ENODEV;
  154. }
  155. #endif
  156. static void i2c_dw_configure_master(struct dw_i2c_dev *dev)
  157. {
  158. dev->functionality = I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY;
  159. dev->master_cfg = DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE |
  160. DW_IC_CON_RESTART_EN;
  161. dev->mode = DW_IC_MASTER;
  162. switch (dev->clk_freq) {
  163. case 100000:
  164. dev->master_cfg |= DW_IC_CON_SPEED_STD;
  165. break;
  166. case 3400000:
  167. dev->master_cfg |= DW_IC_CON_SPEED_HIGH;
  168. break;
  169. default:
  170. dev->master_cfg |= DW_IC_CON_SPEED_FAST;
  171. }
  172. }
  173. static void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
  174. {
  175. dev->functionality = I2C_FUNC_SLAVE | DW_IC_DEFAULT_FUNCTIONALITY;
  176. dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
  177. DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
  178. dev->mode = DW_IC_SLAVE;
  179. switch (dev->clk_freq) {
  180. case 100000:
  181. dev->slave_cfg |= DW_IC_CON_SPEED_STD;
  182. break;
  183. case 3400000:
  184. dev->slave_cfg |= DW_IC_CON_SPEED_HIGH;
  185. break;
  186. default:
  187. dev->slave_cfg |= DW_IC_CON_SPEED_FAST;
  188. }
  189. }
  190. static int i2c_dw_plat_prepare_clk(struct dw_i2c_dev *i_dev, bool prepare)
  191. {
  192. if (IS_ERR(i_dev->clk))
  193. return PTR_ERR(i_dev->clk);
  194. if (prepare)
  195. return clk_prepare_enable(i_dev->clk);
  196. clk_disable_unprepare(i_dev->clk);
  197. return 0;
  198. }
  199. static void dw_i2c_set_fifo_size(struct dw_i2c_dev *dev, int id)
  200. {
  201. u32 param, tx_fifo_depth, rx_fifo_depth;
  202. /*
  203. * Try to detect the FIFO depth if not set by interface driver,
  204. * the depth could be from 2 to 256 from HW spec.
  205. */
  206. param = i2c_dw_read_comp_param(dev);
  207. tx_fifo_depth = ((param >> 16) & 0xff) + 1;
  208. rx_fifo_depth = ((param >> 8) & 0xff) + 1;
  209. if (!dev->tx_fifo_depth) {
  210. dev->tx_fifo_depth = tx_fifo_depth;
  211. dev->rx_fifo_depth = rx_fifo_depth;
  212. dev->adapter.nr = id;
  213. } else if (tx_fifo_depth >= 2) {
  214. dev->tx_fifo_depth = min_t(u32, dev->tx_fifo_depth,
  215. tx_fifo_depth);
  216. dev->rx_fifo_depth = min_t(u32, dev->rx_fifo_depth,
  217. rx_fifo_depth);
  218. }
  219. }
  220. static int dw_i2c_plat_probe(struct platform_device *pdev)
  221. {
  222. struct dw_i2c_platform_data *pdata = dev_get_platdata(&pdev->dev);
  223. struct i2c_adapter *adap;
  224. struct dw_i2c_dev *dev;
  225. u32 acpi_speed, ht = 0;
  226. struct resource *mem;
  227. int i, irq, ret;
  228. const int supported_speeds[] = { 0, 100000, 400000, 1000000, 3400000 };
  229. irq = platform_get_irq(pdev, 0);
  230. if (irq < 0)
  231. return irq;
  232. dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL);
  233. if (!dev)
  234. return -ENOMEM;
  235. mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  236. dev->base = devm_ioremap_resource(&pdev->dev, mem);
  237. if (IS_ERR(dev->base))
  238. return PTR_ERR(dev->base);
  239. dev->dev = &pdev->dev;
  240. dev->irq = irq;
  241. platform_set_drvdata(pdev, dev);
  242. dev->rst = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL);
  243. if (IS_ERR(dev->rst)) {
  244. if (PTR_ERR(dev->rst) == -EPROBE_DEFER)
  245. return -EPROBE_DEFER;
  246. } else {
  247. reset_control_deassert(dev->rst);
  248. }
  249. if (pdata) {
  250. dev->clk_freq = pdata->i2c_scl_freq;
  251. } else {
  252. device_property_read_u32(&pdev->dev, "i2c-sda-hold-time-ns",
  253. &ht);
  254. device_property_read_u32(&pdev->dev, "i2c-sda-falling-time-ns",
  255. &dev->sda_falling_time);
  256. device_property_read_u32(&pdev->dev, "i2c-scl-falling-time-ns",
  257. &dev->scl_falling_time);
  258. device_property_read_u32(&pdev->dev, "clock-frequency",
  259. &dev->clk_freq);
  260. }
  261. acpi_speed = i2c_acpi_find_bus_speed(&pdev->dev);
  262. /*
  263. * Some DSTDs use a non standard speed, round down to the lowest
  264. * standard speed.
  265. */
  266. for (i = 1; i < ARRAY_SIZE(supported_speeds); i++) {
  267. if (acpi_speed < supported_speeds[i])
  268. break;
  269. }
  270. acpi_speed = supported_speeds[i - 1];
  271. /*
  272. * Find bus speed from the "clock-frequency" device property, ACPI
  273. * or by using fast mode if neither is set.
  274. */
  275. if (acpi_speed && dev->clk_freq)
  276. dev->clk_freq = min(dev->clk_freq, acpi_speed);
  277. else if (acpi_speed || dev->clk_freq)
  278. dev->clk_freq = max(dev->clk_freq, acpi_speed);
  279. else
  280. dev->clk_freq = 400000;
  281. if (has_acpi_companion(&pdev->dev))
  282. dw_i2c_acpi_configure(pdev);
  283. /*
  284. * Only standard mode at 100kHz, fast mode at 400kHz,
  285. * fast mode plus at 1MHz and high speed mode at 3.4MHz are supported.
  286. */
  287. if (dev->clk_freq != 100000 && dev->clk_freq != 400000
  288. && dev->clk_freq != 1000000 && dev->clk_freq != 3400000) {
  289. dev_err(&pdev->dev,
  290. "%d Hz is unsupported, only 100kHz, 400kHz, 1MHz and 3.4MHz are supported\n",
  291. dev->clk_freq);
  292. ret = -EINVAL;
  293. goto exit_reset;
  294. }
  295. ret = i2c_dw_probe_lock_support(dev);
  296. if (ret)
  297. goto exit_reset;
  298. if (i2c_detect_slave_mode(&pdev->dev))
  299. i2c_dw_configure_slave(dev);
  300. else
  301. i2c_dw_configure_master(dev);
  302. dev->clk = devm_clk_get(&pdev->dev, NULL);
  303. if (!i2c_dw_plat_prepare_clk(dev, true)) {
  304. dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz;
  305. if (!dev->sda_hold_time && ht)
  306. dev->sda_hold_time = div_u64(
  307. (u64)dev->get_clk_rate_khz(dev) * ht + 500000,
  308. 1000000);
  309. }
  310. dw_i2c_set_fifo_size(dev, pdev->id);
  311. adap = &dev->adapter;
  312. adap->owner = THIS_MODULE;
  313. adap->class = I2C_CLASS_DEPRECATED;
  314. ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
  315. adap->dev.of_node = pdev->dev.of_node;
  316. if (dev->pm_disabled) {
  317. pm_runtime_forbid(&pdev->dev);
  318. } else {
  319. pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
  320. pm_runtime_use_autosuspend(&pdev->dev);
  321. pm_runtime_set_active(&pdev->dev);
  322. pm_runtime_enable(&pdev->dev);
  323. }
  324. if (dev->mode == DW_IC_SLAVE)
  325. ret = i2c_dw_probe_slave(dev);
  326. else
  327. ret = i2c_dw_probe(dev);
  328. if (ret)
  329. goto exit_probe;
  330. return ret;
  331. exit_probe:
  332. if (!dev->pm_disabled)
  333. pm_runtime_disable(&pdev->dev);
  334. exit_reset:
  335. if (!IS_ERR_OR_NULL(dev->rst))
  336. reset_control_assert(dev->rst);
  337. return ret;
  338. }
  339. static int dw_i2c_plat_remove(struct platform_device *pdev)
  340. {
  341. struct dw_i2c_dev *dev = platform_get_drvdata(pdev);
  342. pm_runtime_get_sync(&pdev->dev);
  343. i2c_del_adapter(&dev->adapter);
  344. dev->disable(dev);
  345. pm_runtime_dont_use_autosuspend(&pdev->dev);
  346. pm_runtime_put_sync(&pdev->dev);
  347. if (!dev->pm_disabled)
  348. pm_runtime_disable(&pdev->dev);
  349. if (!IS_ERR_OR_NULL(dev->rst))
  350. reset_control_assert(dev->rst);
  351. i2c_dw_remove_lock_support(dev);
  352. return 0;
  353. }
  354. #ifdef CONFIG_OF
  355. static const struct of_device_id dw_i2c_of_match[] = {
  356. { .compatible = "snps,designware-i2c", },
  357. {},
  358. };
  359. MODULE_DEVICE_TABLE(of, dw_i2c_of_match);
  360. #endif
  361. #ifdef CONFIG_PM_SLEEP
  362. static int dw_i2c_plat_prepare(struct device *dev)
  363. {
  364. return pm_runtime_suspended(dev);
  365. }
  366. static void dw_i2c_plat_complete(struct device *dev)
  367. {
  368. if (dev->power.direct_complete)
  369. pm_request_resume(dev);
  370. }
  371. #else
  372. #define dw_i2c_plat_prepare NULL
  373. #define dw_i2c_plat_complete NULL
  374. #endif
  375. #ifdef CONFIG_PM
  376. static int dw_i2c_plat_runtime_suspend(struct device *dev)
  377. {
  378. struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
  379. i_dev->disable(i_dev);
  380. i2c_dw_plat_prepare_clk(i_dev, false);
  381. return 0;
  382. }
  383. static int dw_i2c_plat_resume(struct device *dev)
  384. {
  385. struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
  386. i2c_dw_plat_prepare_clk(i_dev, true);
  387. i_dev->init(i_dev);
  388. return 0;
  389. }
  390. #ifdef CONFIG_PM_SLEEP
  391. static int dw_i2c_plat_suspend(struct device *dev)
  392. {
  393. pm_runtime_resume(dev);
  394. return dw_i2c_plat_runtime_suspend(dev);
  395. }
  396. #endif
  397. static const struct dev_pm_ops dw_i2c_dev_pm_ops = {
  398. .prepare = dw_i2c_plat_prepare,
  399. .complete = dw_i2c_plat_complete,
  400. SET_SYSTEM_SLEEP_PM_OPS(dw_i2c_plat_suspend, dw_i2c_plat_resume)
  401. SET_RUNTIME_PM_OPS(dw_i2c_plat_runtime_suspend,
  402. dw_i2c_plat_resume,
  403. NULL)
  404. };
  405. #define DW_I2C_DEV_PMOPS (&dw_i2c_dev_pm_ops)
  406. #else
  407. #define DW_I2C_DEV_PMOPS NULL
  408. #endif
  409. /* Work with hotplug and coldplug */
  410. MODULE_ALIAS("platform:i2c_designware");
  411. static struct platform_driver dw_i2c_driver = {
  412. .probe = dw_i2c_plat_probe,
  413. .remove = dw_i2c_plat_remove,
  414. .driver = {
  415. .name = "i2c_designware",
  416. .of_match_table = of_match_ptr(dw_i2c_of_match),
  417. .acpi_match_table = ACPI_PTR(dw_i2c_acpi_match),
  418. .pm = DW_I2C_DEV_PMOPS,
  419. },
  420. };
  421. static int __init dw_i2c_init_driver(void)
  422. {
  423. return platform_driver_register(&dw_i2c_driver);
  424. }
  425. subsys_initcall(dw_i2c_init_driver);
  426. static void __exit dw_i2c_exit_driver(void)
  427. {
  428. platform_driver_unregister(&dw_i2c_driver);
  429. }
  430. module_exit(dw_i2c_exit_driver);
  431. MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
  432. MODULE_DESCRIPTION("Synopsys DesignWare I2C bus adapter");
  433. MODULE_LICENSE("GPL");