vc4_dpi.c 10 KB

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  1. /*
  2. * Copyright (C) 2016 Broadcom Limited
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License version 2 as published by
  6. * the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. /**
  17. * DOC: VC4 DPI module
  18. *
  19. * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
  20. * signals. On BCM2835, these can be routed out to GPIO0-27 with the
  21. * ALT2 function.
  22. */
  23. #include <drm/drm_atomic_helper.h>
  24. #include <drm/drm_bridge.h>
  25. #include <drm/drm_crtc_helper.h>
  26. #include <drm/drm_edid.h>
  27. #include <drm/drm_of.h>
  28. #include <drm/drm_panel.h>
  29. #include <linux/clk.h>
  30. #include <linux/component.h>
  31. #include <linux/of_graph.h>
  32. #include <linux/of_platform.h>
  33. #include "vc4_drv.h"
  34. #include "vc4_regs.h"
  35. #define DPI_C 0x00
  36. # define DPI_OUTPUT_ENABLE_MODE BIT(16)
  37. /* The order field takes the incoming 24 bit RGB from the pixel valve
  38. * and shuffles the 3 channels.
  39. */
  40. # define DPI_ORDER_MASK VC4_MASK(15, 14)
  41. # define DPI_ORDER_SHIFT 14
  42. # define DPI_ORDER_RGB 0
  43. # define DPI_ORDER_BGR 1
  44. # define DPI_ORDER_GRB 2
  45. # define DPI_ORDER_BRG 3
  46. /* The format field takes the ORDER-shuffled pixel valve data and
  47. * formats it onto the output lines.
  48. */
  49. # define DPI_FORMAT_MASK VC4_MASK(13, 11)
  50. # define DPI_FORMAT_SHIFT 11
  51. /* This define is named in the hardware, but actually just outputs 0. */
  52. # define DPI_FORMAT_9BIT_666_RGB 0
  53. /* Outputs 00000000rrrrrggggggbbbbb */
  54. # define DPI_FORMAT_16BIT_565_RGB_1 1
  55. /* Outputs 000rrrrr00gggggg000bbbbb */
  56. # define DPI_FORMAT_16BIT_565_RGB_2 2
  57. /* Outputs 00rrrrr000gggggg00bbbbb0 */
  58. # define DPI_FORMAT_16BIT_565_RGB_3 3
  59. /* Outputs 000000rrrrrrggggggbbbbbb */
  60. # define DPI_FORMAT_18BIT_666_RGB_1 4
  61. /* Outputs 00rrrrrr00gggggg00bbbbbb */
  62. # define DPI_FORMAT_18BIT_666_RGB_2 5
  63. /* Outputs rrrrrrrrggggggggbbbbbbbb */
  64. # define DPI_FORMAT_24BIT_888_RGB 6
  65. /* Reverses the polarity of the corresponding signal */
  66. # define DPI_PIXEL_CLK_INVERT BIT(10)
  67. # define DPI_HSYNC_INVERT BIT(9)
  68. # define DPI_VSYNC_INVERT BIT(8)
  69. # define DPI_OUTPUT_ENABLE_INVERT BIT(7)
  70. /* Outputs the signal the falling clock edge instead of rising. */
  71. # define DPI_HSYNC_NEGATE BIT(6)
  72. # define DPI_VSYNC_NEGATE BIT(5)
  73. # define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
  74. /* Disables the signal */
  75. # define DPI_HSYNC_DISABLE BIT(3)
  76. # define DPI_VSYNC_DISABLE BIT(2)
  77. # define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
  78. /* Power gate to the device, full reset at 0 -> 1 transition */
  79. # define DPI_ENABLE BIT(0)
  80. /* All other registers besides DPI_C return the ID */
  81. #define DPI_ID 0x04
  82. # define DPI_ID_VALUE 0x00647069
  83. /* General DPI hardware state. */
  84. struct vc4_dpi {
  85. struct platform_device *pdev;
  86. struct drm_encoder *encoder;
  87. struct drm_connector *connector;
  88. struct drm_bridge *bridge;
  89. bool is_panel_bridge;
  90. void __iomem *regs;
  91. struct clk *pixel_clock;
  92. struct clk *core_clock;
  93. };
  94. #define DPI_READ(offset) readl(dpi->regs + (offset))
  95. #define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
  96. /* VC4 DPI encoder KMS struct */
  97. struct vc4_dpi_encoder {
  98. struct vc4_encoder base;
  99. struct vc4_dpi *dpi;
  100. };
  101. static inline struct vc4_dpi_encoder *
  102. to_vc4_dpi_encoder(struct drm_encoder *encoder)
  103. {
  104. return container_of(encoder, struct vc4_dpi_encoder, base.base);
  105. }
  106. #define DPI_REG(reg) { reg, #reg }
  107. static const struct {
  108. u32 reg;
  109. const char *name;
  110. } dpi_regs[] = {
  111. DPI_REG(DPI_C),
  112. DPI_REG(DPI_ID),
  113. };
  114. #ifdef CONFIG_DEBUG_FS
  115. int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused)
  116. {
  117. struct drm_info_node *node = (struct drm_info_node *)m->private;
  118. struct drm_device *dev = node->minor->dev;
  119. struct vc4_dev *vc4 = to_vc4_dev(dev);
  120. struct vc4_dpi *dpi = vc4->dpi;
  121. int i;
  122. if (!dpi)
  123. return 0;
  124. for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) {
  125. seq_printf(m, "%s (0x%04x): 0x%08x\n",
  126. dpi_regs[i].name, dpi_regs[i].reg,
  127. DPI_READ(dpi_regs[i].reg));
  128. }
  129. return 0;
  130. }
  131. #endif
  132. static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
  133. .destroy = drm_encoder_cleanup,
  134. };
  135. static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
  136. {
  137. struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
  138. struct vc4_dpi *dpi = vc4_encoder->dpi;
  139. clk_disable_unprepare(dpi->pixel_clock);
  140. }
  141. static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
  142. {
  143. struct drm_display_mode *mode = &encoder->crtc->mode;
  144. struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
  145. struct vc4_dpi *dpi = vc4_encoder->dpi;
  146. u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE;
  147. int ret;
  148. if (dpi->connector->display_info.num_bus_formats) {
  149. u32 bus_format = dpi->connector->display_info.bus_formats[0];
  150. switch (bus_format) {
  151. case MEDIA_BUS_FMT_RGB888_1X24:
  152. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
  153. DPI_FORMAT);
  154. break;
  155. case MEDIA_BUS_FMT_BGR888_1X24:
  156. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
  157. DPI_FORMAT);
  158. dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
  159. break;
  160. case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
  161. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
  162. DPI_FORMAT);
  163. break;
  164. case MEDIA_BUS_FMT_RGB666_1X18:
  165. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
  166. DPI_FORMAT);
  167. break;
  168. case MEDIA_BUS_FMT_RGB565_1X16:
  169. dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
  170. DPI_FORMAT);
  171. break;
  172. default:
  173. DRM_ERROR("Unknown media bus format %d\n", bus_format);
  174. break;
  175. }
  176. }
  177. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  178. dpi_c |= DPI_HSYNC_INVERT;
  179. else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
  180. dpi_c |= DPI_HSYNC_DISABLE;
  181. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  182. dpi_c |= DPI_VSYNC_INVERT;
  183. else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
  184. dpi_c |= DPI_VSYNC_DISABLE;
  185. DPI_WRITE(DPI_C, dpi_c);
  186. ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
  187. if (ret)
  188. DRM_ERROR("Failed to set clock rate: %d\n", ret);
  189. ret = clk_prepare_enable(dpi->pixel_clock);
  190. if (ret)
  191. DRM_ERROR("Failed to set clock rate: %d\n", ret);
  192. }
  193. static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
  194. const struct drm_display_mode *mode)
  195. {
  196. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  197. return MODE_NO_INTERLACE;
  198. return MODE_OK;
  199. }
  200. static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
  201. .disable = vc4_dpi_encoder_disable,
  202. .enable = vc4_dpi_encoder_enable,
  203. .mode_valid = vc4_dpi_encoder_mode_valid,
  204. };
  205. static const struct of_device_id vc4_dpi_dt_match[] = {
  206. { .compatible = "brcm,bcm2835-dpi", .data = NULL },
  207. {}
  208. };
  209. /* Sets up the next link in the display chain, whether it's a panel or
  210. * a bridge.
  211. */
  212. static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
  213. {
  214. struct device *dev = &dpi->pdev->dev;
  215. struct drm_panel *panel;
  216. int ret;
  217. ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
  218. &panel, &dpi->bridge);
  219. if (ret) {
  220. /* If nothing was connected in the DT, that's not an
  221. * error.
  222. */
  223. if (ret == -ENODEV)
  224. return 0;
  225. else
  226. return ret;
  227. }
  228. if (panel) {
  229. dpi->bridge = drm_panel_bridge_add(panel,
  230. DRM_MODE_CONNECTOR_DPI);
  231. dpi->is_panel_bridge = true;
  232. }
  233. return drm_bridge_attach(dpi->encoder, dpi->bridge, NULL);
  234. }
  235. static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
  236. {
  237. struct platform_device *pdev = to_platform_device(dev);
  238. struct drm_device *drm = dev_get_drvdata(master);
  239. struct vc4_dev *vc4 = to_vc4_dev(drm);
  240. struct vc4_dpi *dpi;
  241. struct vc4_dpi_encoder *vc4_dpi_encoder;
  242. int ret;
  243. dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
  244. if (!dpi)
  245. return -ENOMEM;
  246. vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
  247. GFP_KERNEL);
  248. if (!vc4_dpi_encoder)
  249. return -ENOMEM;
  250. vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
  251. vc4_dpi_encoder->dpi = dpi;
  252. dpi->encoder = &vc4_dpi_encoder->base.base;
  253. dpi->pdev = pdev;
  254. dpi->regs = vc4_ioremap_regs(pdev, 0);
  255. if (IS_ERR(dpi->regs))
  256. return PTR_ERR(dpi->regs);
  257. if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
  258. dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
  259. DPI_READ(DPI_ID), DPI_ID_VALUE);
  260. return -ENODEV;
  261. }
  262. dpi->core_clock = devm_clk_get(dev, "core");
  263. if (IS_ERR(dpi->core_clock)) {
  264. ret = PTR_ERR(dpi->core_clock);
  265. if (ret != -EPROBE_DEFER)
  266. DRM_ERROR("Failed to get core clock: %d\n", ret);
  267. return ret;
  268. }
  269. dpi->pixel_clock = devm_clk_get(dev, "pixel");
  270. if (IS_ERR(dpi->pixel_clock)) {
  271. ret = PTR_ERR(dpi->pixel_clock);
  272. if (ret != -EPROBE_DEFER)
  273. DRM_ERROR("Failed to get pixel clock: %d\n", ret);
  274. return ret;
  275. }
  276. ret = clk_prepare_enable(dpi->core_clock);
  277. if (ret)
  278. DRM_ERROR("Failed to turn on core clock: %d\n", ret);
  279. drm_encoder_init(drm, dpi->encoder, &vc4_dpi_encoder_funcs,
  280. DRM_MODE_ENCODER_DPI, NULL);
  281. drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);
  282. ret = vc4_dpi_init_bridge(dpi);
  283. if (ret)
  284. goto err_destroy_encoder;
  285. dev_set_drvdata(dev, dpi);
  286. vc4->dpi = dpi;
  287. return 0;
  288. err_destroy_encoder:
  289. drm_encoder_cleanup(dpi->encoder);
  290. clk_disable_unprepare(dpi->core_clock);
  291. return ret;
  292. }
  293. static void vc4_dpi_unbind(struct device *dev, struct device *master,
  294. void *data)
  295. {
  296. struct drm_device *drm = dev_get_drvdata(master);
  297. struct vc4_dev *vc4 = to_vc4_dev(drm);
  298. struct vc4_dpi *dpi = dev_get_drvdata(dev);
  299. if (dpi->is_panel_bridge)
  300. drm_panel_bridge_remove(dpi->bridge);
  301. drm_encoder_cleanup(dpi->encoder);
  302. clk_disable_unprepare(dpi->core_clock);
  303. vc4->dpi = NULL;
  304. }
  305. static const struct component_ops vc4_dpi_ops = {
  306. .bind = vc4_dpi_bind,
  307. .unbind = vc4_dpi_unbind,
  308. };
  309. static int vc4_dpi_dev_probe(struct platform_device *pdev)
  310. {
  311. return component_add(&pdev->dev, &vc4_dpi_ops);
  312. }
  313. static int vc4_dpi_dev_remove(struct platform_device *pdev)
  314. {
  315. component_del(&pdev->dev, &vc4_dpi_ops);
  316. return 0;
  317. }
  318. struct platform_driver vc4_dpi_driver = {
  319. .probe = vc4_dpi_dev_probe,
  320. .remove = vc4_dpi_dev_remove,
  321. .driver = {
  322. .name = "vc4_dpi",
  323. .of_match_table = vc4_dpi_dt_match,
  324. },
  325. };