sun4i_hdmi_ddc_clk.c 2.8 KB

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  1. /*
  2. * Copyright (C) 2016 Free Electrons
  3. * Copyright (C) 2016 NextThing Co
  4. *
  5. * Maxime Ripard <maxime.ripard@free-electrons.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. */
  12. #include <linux/clk-provider.h>
  13. #include "sun4i_tcon.h"
  14. #include "sun4i_hdmi.h"
  15. struct sun4i_ddc {
  16. struct clk_hw hw;
  17. struct sun4i_hdmi *hdmi;
  18. };
  19. static inline struct sun4i_ddc *hw_to_ddc(struct clk_hw *hw)
  20. {
  21. return container_of(hw, struct sun4i_ddc, hw);
  22. }
  23. static unsigned long sun4i_ddc_calc_divider(unsigned long rate,
  24. unsigned long parent_rate,
  25. u8 *m, u8 *n)
  26. {
  27. unsigned long best_rate = 0;
  28. u8 best_m = 0, best_n = 0, _m, _n;
  29. for (_m = 0; _m < 8; _m++) {
  30. for (_n = 0; _n < 8; _n++) {
  31. unsigned long tmp_rate;
  32. tmp_rate = (((parent_rate / 2) / 10) >> _n) / (_m + 1);
  33. if (tmp_rate > rate)
  34. continue;
  35. if (abs(rate - tmp_rate) < abs(rate - best_rate)) {
  36. best_rate = tmp_rate;
  37. best_m = _m;
  38. best_n = _n;
  39. }
  40. }
  41. }
  42. if (m && n) {
  43. *m = best_m;
  44. *n = best_n;
  45. }
  46. return best_rate;
  47. }
  48. static long sun4i_ddc_round_rate(struct clk_hw *hw, unsigned long rate,
  49. unsigned long *prate)
  50. {
  51. return sun4i_ddc_calc_divider(rate, *prate, NULL, NULL);
  52. }
  53. static unsigned long sun4i_ddc_recalc_rate(struct clk_hw *hw,
  54. unsigned long parent_rate)
  55. {
  56. struct sun4i_ddc *ddc = hw_to_ddc(hw);
  57. u32 reg;
  58. u8 m, n;
  59. reg = readl(ddc->hdmi->base + SUN4I_HDMI_DDC_CLK_REG);
  60. m = (reg >> 3) & 0x7;
  61. n = reg & 0x7;
  62. return (((parent_rate / 2) / 10) >> n) / (m + 1);
  63. }
  64. static int sun4i_ddc_set_rate(struct clk_hw *hw, unsigned long rate,
  65. unsigned long parent_rate)
  66. {
  67. struct sun4i_ddc *ddc = hw_to_ddc(hw);
  68. u8 div_m, div_n;
  69. sun4i_ddc_calc_divider(rate, parent_rate, &div_m, &div_n);
  70. writel(SUN4I_HDMI_DDC_CLK_M(div_m) | SUN4I_HDMI_DDC_CLK_N(div_n),
  71. ddc->hdmi->base + SUN4I_HDMI_DDC_CLK_REG);
  72. return 0;
  73. }
  74. static const struct clk_ops sun4i_ddc_ops = {
  75. .recalc_rate = sun4i_ddc_recalc_rate,
  76. .round_rate = sun4i_ddc_round_rate,
  77. .set_rate = sun4i_ddc_set_rate,
  78. };
  79. int sun4i_ddc_create(struct sun4i_hdmi *hdmi, struct clk *parent)
  80. {
  81. struct clk_init_data init;
  82. struct sun4i_ddc *ddc;
  83. const char *parent_name;
  84. parent_name = __clk_get_name(parent);
  85. if (!parent_name)
  86. return -ENODEV;
  87. ddc = devm_kzalloc(hdmi->dev, sizeof(*ddc), GFP_KERNEL);
  88. if (!ddc)
  89. return -ENOMEM;
  90. init.name = "hdmi-ddc";
  91. init.ops = &sun4i_ddc_ops;
  92. init.parent_names = &parent_name;
  93. init.num_parents = 1;
  94. ddc->hdmi = hdmi;
  95. ddc->hw.init = &init;
  96. hdmi->ddc_clk = devm_clk_register(hdmi->dev, &ddc->hw);
  97. if (IS_ERR(hdmi->ddc_clk))
  98. return PTR_ERR(hdmi->ddc_clk);
  99. return 0;
  100. }