intel_panel.c 59 KB

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  1. /*
  2. * Copyright © 2006-2010 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. * Chris Wilson <chris@chris-wilson.co.uk>
  29. */
  30. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  31. #include <linux/kernel.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/pwm.h>
  34. #include "intel_drv.h"
  35. #define CRC_PMIC_PWM_PERIOD_NS 21333
  36. void
  37. intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
  38. struct drm_display_mode *adjusted_mode)
  39. {
  40. drm_mode_copy(adjusted_mode, fixed_mode);
  41. drm_mode_set_crtcinfo(adjusted_mode, 0);
  42. }
  43. /**
  44. * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
  45. * @dev_priv: i915 device instance
  46. * @fixed_mode : panel native mode
  47. * @connector: LVDS/eDP connector
  48. *
  49. * Return downclock_avail
  50. * Find the reduced downclock for LVDS/eDP in EDID.
  51. */
  52. struct drm_display_mode *
  53. intel_find_panel_downclock(struct drm_i915_private *dev_priv,
  54. struct drm_display_mode *fixed_mode,
  55. struct drm_connector *connector)
  56. {
  57. struct drm_display_mode *scan, *tmp_mode;
  58. int temp_downclock;
  59. temp_downclock = fixed_mode->clock;
  60. tmp_mode = NULL;
  61. list_for_each_entry(scan, &connector->probed_modes, head) {
  62. /*
  63. * If one mode has the same resolution with the fixed_panel
  64. * mode while they have the different refresh rate, it means
  65. * that the reduced downclock is found. In such
  66. * case we can set the different FPx0/1 to dynamically select
  67. * between low and high frequency.
  68. */
  69. if (scan->hdisplay == fixed_mode->hdisplay &&
  70. scan->hsync_start == fixed_mode->hsync_start &&
  71. scan->hsync_end == fixed_mode->hsync_end &&
  72. scan->htotal == fixed_mode->htotal &&
  73. scan->vdisplay == fixed_mode->vdisplay &&
  74. scan->vsync_start == fixed_mode->vsync_start &&
  75. scan->vsync_end == fixed_mode->vsync_end &&
  76. scan->vtotal == fixed_mode->vtotal) {
  77. if (scan->clock < temp_downclock) {
  78. /*
  79. * The downclock is already found. But we
  80. * expect to find the lower downclock.
  81. */
  82. temp_downclock = scan->clock;
  83. tmp_mode = scan;
  84. }
  85. }
  86. }
  87. if (temp_downclock < fixed_mode->clock)
  88. return drm_mode_duplicate(&dev_priv->drm, tmp_mode);
  89. else
  90. return NULL;
  91. }
  92. /* adjusted_mode has been preset to be the panel's fixed mode */
  93. void
  94. intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
  95. struct intel_crtc_state *pipe_config,
  96. int fitting_mode)
  97. {
  98. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  99. int x = 0, y = 0, width = 0, height = 0;
  100. /* Native modes don't need fitting */
  101. if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
  102. adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
  103. !pipe_config->ycbcr420)
  104. goto done;
  105. switch (fitting_mode) {
  106. case DRM_MODE_SCALE_CENTER:
  107. width = pipe_config->pipe_src_w;
  108. height = pipe_config->pipe_src_h;
  109. x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
  110. y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
  111. break;
  112. case DRM_MODE_SCALE_ASPECT:
  113. /* Scale but preserve the aspect ratio */
  114. {
  115. u32 scaled_width = adjusted_mode->crtc_hdisplay
  116. * pipe_config->pipe_src_h;
  117. u32 scaled_height = pipe_config->pipe_src_w
  118. * adjusted_mode->crtc_vdisplay;
  119. if (scaled_width > scaled_height) { /* pillar */
  120. width = scaled_height / pipe_config->pipe_src_h;
  121. if (width & 1)
  122. width++;
  123. x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
  124. y = 0;
  125. height = adjusted_mode->crtc_vdisplay;
  126. } else if (scaled_width < scaled_height) { /* letter */
  127. height = scaled_width / pipe_config->pipe_src_w;
  128. if (height & 1)
  129. height++;
  130. y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
  131. x = 0;
  132. width = adjusted_mode->crtc_hdisplay;
  133. } else {
  134. x = y = 0;
  135. width = adjusted_mode->crtc_hdisplay;
  136. height = adjusted_mode->crtc_vdisplay;
  137. }
  138. }
  139. break;
  140. case DRM_MODE_SCALE_FULLSCREEN:
  141. x = y = 0;
  142. width = adjusted_mode->crtc_hdisplay;
  143. height = adjusted_mode->crtc_vdisplay;
  144. break;
  145. default:
  146. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  147. return;
  148. }
  149. done:
  150. pipe_config->pch_pfit.pos = (x << 16) | y;
  151. pipe_config->pch_pfit.size = (width << 16) | height;
  152. pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
  153. }
  154. static void
  155. centre_horizontally(struct drm_display_mode *adjusted_mode,
  156. int width)
  157. {
  158. u32 border, sync_pos, blank_width, sync_width;
  159. /* keep the hsync and hblank widths constant */
  160. sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
  161. blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
  162. sync_pos = (blank_width - sync_width + 1) / 2;
  163. border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
  164. border += border & 1; /* make the border even */
  165. adjusted_mode->crtc_hdisplay = width;
  166. adjusted_mode->crtc_hblank_start = width + border;
  167. adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
  168. adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
  169. adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
  170. }
  171. static void
  172. centre_vertically(struct drm_display_mode *adjusted_mode,
  173. int height)
  174. {
  175. u32 border, sync_pos, blank_width, sync_width;
  176. /* keep the vsync and vblank widths constant */
  177. sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
  178. blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
  179. sync_pos = (blank_width - sync_width + 1) / 2;
  180. border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
  181. adjusted_mode->crtc_vdisplay = height;
  182. adjusted_mode->crtc_vblank_start = height + border;
  183. adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
  184. adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
  185. adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
  186. }
  187. static inline u32 panel_fitter_scaling(u32 source, u32 target)
  188. {
  189. /*
  190. * Floating point operation is not supported. So the FACTOR
  191. * is defined, which can avoid the floating point computation
  192. * when calculating the panel ratio.
  193. */
  194. #define ACCURACY 12
  195. #define FACTOR (1 << ACCURACY)
  196. u32 ratio = source * FACTOR / target;
  197. return (FACTOR * ratio + FACTOR/2) / FACTOR;
  198. }
  199. static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
  200. u32 *pfit_control)
  201. {
  202. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  203. u32 scaled_width = adjusted_mode->crtc_hdisplay *
  204. pipe_config->pipe_src_h;
  205. u32 scaled_height = pipe_config->pipe_src_w *
  206. adjusted_mode->crtc_vdisplay;
  207. /* 965+ is easy, it does everything in hw */
  208. if (scaled_width > scaled_height)
  209. *pfit_control |= PFIT_ENABLE |
  210. PFIT_SCALING_PILLAR;
  211. else if (scaled_width < scaled_height)
  212. *pfit_control |= PFIT_ENABLE |
  213. PFIT_SCALING_LETTER;
  214. else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
  215. *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
  216. }
  217. static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
  218. u32 *pfit_control, u32 *pfit_pgm_ratios,
  219. u32 *border)
  220. {
  221. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  222. u32 scaled_width = adjusted_mode->crtc_hdisplay *
  223. pipe_config->pipe_src_h;
  224. u32 scaled_height = pipe_config->pipe_src_w *
  225. adjusted_mode->crtc_vdisplay;
  226. u32 bits;
  227. /*
  228. * For earlier chips we have to calculate the scaling
  229. * ratio by hand and program it into the
  230. * PFIT_PGM_RATIO register
  231. */
  232. if (scaled_width > scaled_height) { /* pillar */
  233. centre_horizontally(adjusted_mode,
  234. scaled_height /
  235. pipe_config->pipe_src_h);
  236. *border = LVDS_BORDER_ENABLE;
  237. if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
  238. bits = panel_fitter_scaling(pipe_config->pipe_src_h,
  239. adjusted_mode->crtc_vdisplay);
  240. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  241. bits << PFIT_VERT_SCALE_SHIFT);
  242. *pfit_control |= (PFIT_ENABLE |
  243. VERT_INTERP_BILINEAR |
  244. HORIZ_INTERP_BILINEAR);
  245. }
  246. } else if (scaled_width < scaled_height) { /* letter */
  247. centre_vertically(adjusted_mode,
  248. scaled_width /
  249. pipe_config->pipe_src_w);
  250. *border = LVDS_BORDER_ENABLE;
  251. if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
  252. bits = panel_fitter_scaling(pipe_config->pipe_src_w,
  253. adjusted_mode->crtc_hdisplay);
  254. *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
  255. bits << PFIT_VERT_SCALE_SHIFT);
  256. *pfit_control |= (PFIT_ENABLE |
  257. VERT_INTERP_BILINEAR |
  258. HORIZ_INTERP_BILINEAR);
  259. }
  260. } else {
  261. /* Aspects match, Let hw scale both directions */
  262. *pfit_control |= (PFIT_ENABLE |
  263. VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  264. VERT_INTERP_BILINEAR |
  265. HORIZ_INTERP_BILINEAR);
  266. }
  267. }
  268. void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
  269. struct intel_crtc_state *pipe_config,
  270. int fitting_mode)
  271. {
  272. struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
  273. u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
  274. struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  275. /* Native modes don't need fitting */
  276. if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
  277. adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
  278. goto out;
  279. switch (fitting_mode) {
  280. case DRM_MODE_SCALE_CENTER:
  281. /*
  282. * For centered modes, we have to calculate border widths &
  283. * heights and modify the values programmed into the CRTC.
  284. */
  285. centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
  286. centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
  287. border = LVDS_BORDER_ENABLE;
  288. break;
  289. case DRM_MODE_SCALE_ASPECT:
  290. /* Scale but preserve the aspect ratio */
  291. if (INTEL_GEN(dev_priv) >= 4)
  292. i965_scale_aspect(pipe_config, &pfit_control);
  293. else
  294. i9xx_scale_aspect(pipe_config, &pfit_control,
  295. &pfit_pgm_ratios, &border);
  296. break;
  297. case DRM_MODE_SCALE_FULLSCREEN:
  298. /*
  299. * Full scaling, even if it changes the aspect ratio.
  300. * Fortunately this is all done for us in hw.
  301. */
  302. if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
  303. pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
  304. pfit_control |= PFIT_ENABLE;
  305. if (INTEL_GEN(dev_priv) >= 4)
  306. pfit_control |= PFIT_SCALING_AUTO;
  307. else
  308. pfit_control |= (VERT_AUTO_SCALE |
  309. VERT_INTERP_BILINEAR |
  310. HORIZ_AUTO_SCALE |
  311. HORIZ_INTERP_BILINEAR);
  312. }
  313. break;
  314. default:
  315. WARN(1, "bad panel fit mode: %d\n", fitting_mode);
  316. return;
  317. }
  318. /* 965+ wants fuzzy fitting */
  319. /* FIXME: handle multiple panels by failing gracefully */
  320. if (INTEL_GEN(dev_priv) >= 4)
  321. pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  322. PFIT_FILTER_FUZZY);
  323. out:
  324. if ((pfit_control & PFIT_ENABLE) == 0) {
  325. pfit_control = 0;
  326. pfit_pgm_ratios = 0;
  327. }
  328. /* Make sure pre-965 set dither correctly for 18bpp panels. */
  329. if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
  330. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  331. pipe_config->gmch_pfit.control = pfit_control;
  332. pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
  333. pipe_config->gmch_pfit.lvds_border_bits = border;
  334. }
  335. enum drm_connector_status
  336. intel_panel_detect(struct drm_i915_private *dev_priv)
  337. {
  338. /* Assume that the BIOS does not lie through the OpRegion... */
  339. if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
  340. return *dev_priv->opregion.lid_state & 0x1 ?
  341. connector_status_connected :
  342. connector_status_disconnected;
  343. }
  344. switch (i915.panel_ignore_lid) {
  345. case -2:
  346. return connector_status_connected;
  347. case -1:
  348. return connector_status_disconnected;
  349. default:
  350. return connector_status_unknown;
  351. }
  352. }
  353. /**
  354. * scale - scale values from one range to another
  355. *
  356. * @source_val: value in range [@source_min..@source_max]
  357. *
  358. * Return @source_val in range [@source_min..@source_max] scaled to range
  359. * [@target_min..@target_max].
  360. */
  361. static uint32_t scale(uint32_t source_val,
  362. uint32_t source_min, uint32_t source_max,
  363. uint32_t target_min, uint32_t target_max)
  364. {
  365. uint64_t target_val;
  366. WARN_ON(source_min > source_max);
  367. WARN_ON(target_min > target_max);
  368. /* defensive */
  369. source_val = clamp(source_val, source_min, source_max);
  370. /* avoid overflows */
  371. target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
  372. (target_max - target_min), source_max - source_min);
  373. target_val += target_min;
  374. return target_val;
  375. }
  376. /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
  377. static inline u32 scale_user_to_hw(struct intel_connector *connector,
  378. u32 user_level, u32 user_max)
  379. {
  380. struct intel_panel *panel = &connector->panel;
  381. return scale(user_level, 0, user_max,
  382. panel->backlight.min, panel->backlight.max);
  383. }
  384. /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
  385. * to [hw_min..hw_max]. */
  386. static inline u32 clamp_user_to_hw(struct intel_connector *connector,
  387. u32 user_level, u32 user_max)
  388. {
  389. struct intel_panel *panel = &connector->panel;
  390. u32 hw_level;
  391. hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
  392. hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
  393. return hw_level;
  394. }
  395. /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
  396. static inline u32 scale_hw_to_user(struct intel_connector *connector,
  397. u32 hw_level, u32 user_max)
  398. {
  399. struct intel_panel *panel = &connector->panel;
  400. return scale(hw_level, panel->backlight.min, panel->backlight.max,
  401. 0, user_max);
  402. }
  403. static u32 intel_panel_compute_brightness(struct intel_connector *connector,
  404. u32 val)
  405. {
  406. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  407. struct intel_panel *panel = &connector->panel;
  408. WARN_ON(panel->backlight.max == 0);
  409. if (i915.invert_brightness < 0)
  410. return val;
  411. if (i915.invert_brightness > 0 ||
  412. dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
  413. return panel->backlight.max - val + panel->backlight.min;
  414. }
  415. return val;
  416. }
  417. static u32 lpt_get_backlight(struct intel_connector *connector)
  418. {
  419. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  420. return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
  421. }
  422. static u32 pch_get_backlight(struct intel_connector *connector)
  423. {
  424. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  425. return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  426. }
  427. static u32 i9xx_get_backlight(struct intel_connector *connector)
  428. {
  429. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  430. struct intel_panel *panel = &connector->panel;
  431. u32 val;
  432. val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
  433. if (INTEL_INFO(dev_priv)->gen < 4)
  434. val >>= 1;
  435. if (panel->backlight.combination_mode) {
  436. u8 lbpc;
  437. pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
  438. val *= lbpc;
  439. }
  440. return val;
  441. }
  442. static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
  443. {
  444. if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  445. return 0;
  446. return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
  447. }
  448. static u32 vlv_get_backlight(struct intel_connector *connector)
  449. {
  450. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  451. enum pipe pipe = intel_get_pipe_from_connector(connector);
  452. return _vlv_get_backlight(dev_priv, pipe);
  453. }
  454. static u32 bxt_get_backlight(struct intel_connector *connector)
  455. {
  456. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  457. struct intel_panel *panel = &connector->panel;
  458. return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
  459. }
  460. static u32 pwm_get_backlight(struct intel_connector *connector)
  461. {
  462. struct intel_panel *panel = &connector->panel;
  463. int duty_ns;
  464. duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
  465. return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
  466. }
  467. static u32 intel_panel_get_backlight(struct intel_connector *connector)
  468. {
  469. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  470. struct intel_panel *panel = &connector->panel;
  471. u32 val = 0;
  472. mutex_lock(&dev_priv->backlight_lock);
  473. if (panel->backlight.enabled) {
  474. val = panel->backlight.get(connector);
  475. val = intel_panel_compute_brightness(connector, val);
  476. }
  477. mutex_unlock(&dev_priv->backlight_lock);
  478. DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
  479. return val;
  480. }
  481. static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  482. {
  483. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  484. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  485. u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  486. I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
  487. }
  488. static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  489. {
  490. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  491. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  492. u32 tmp;
  493. tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  494. I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
  495. }
  496. static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  497. {
  498. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  499. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  500. struct intel_panel *panel = &connector->panel;
  501. u32 tmp, mask;
  502. WARN_ON(panel->backlight.max == 0);
  503. if (panel->backlight.combination_mode) {
  504. u8 lbpc;
  505. lbpc = level * 0xfe / panel->backlight.max + 1;
  506. level /= lbpc;
  507. pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
  508. }
  509. if (IS_GEN4(dev_priv)) {
  510. mask = BACKLIGHT_DUTY_CYCLE_MASK;
  511. } else {
  512. level <<= 1;
  513. mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
  514. }
  515. tmp = I915_READ(BLC_PWM_CTL) & ~mask;
  516. I915_WRITE(BLC_PWM_CTL, tmp | level);
  517. }
  518. static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  519. {
  520. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  521. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  522. enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
  523. u32 tmp;
  524. tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  525. I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
  526. }
  527. static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  528. {
  529. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  530. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  531. struct intel_panel *panel = &connector->panel;
  532. I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
  533. }
  534. static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  535. {
  536. struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
  537. int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
  538. pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
  539. }
  540. static void
  541. intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
  542. {
  543. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  544. struct intel_panel *panel = &connector->panel;
  545. DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
  546. level = intel_panel_compute_brightness(connector, level);
  547. panel->backlight.set(conn_state, level);
  548. }
  549. /* set backlight brightness to level in range [0..max], scaling wrt hw min */
  550. static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
  551. u32 user_level, u32 user_max)
  552. {
  553. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  554. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  555. struct intel_panel *panel = &connector->panel;
  556. u32 hw_level;
  557. if (!panel->backlight.present)
  558. return;
  559. mutex_lock(&dev_priv->backlight_lock);
  560. WARN_ON(panel->backlight.max == 0);
  561. hw_level = scale_user_to_hw(connector, user_level, user_max);
  562. panel->backlight.level = hw_level;
  563. if (panel->backlight.enabled)
  564. intel_panel_actually_set_backlight(conn_state, hw_level);
  565. mutex_unlock(&dev_priv->backlight_lock);
  566. }
  567. /* set backlight brightness to level in range [0..max], assuming hw min is
  568. * respected.
  569. */
  570. void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
  571. u32 user_level, u32 user_max)
  572. {
  573. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  574. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  575. struct intel_panel *panel = &connector->panel;
  576. u32 hw_level;
  577. /*
  578. * Lack of crtc may occur during driver init because
  579. * connection_mutex isn't held across the entire backlight
  580. * setup + modeset readout, and the BIOS can issue the
  581. * requests at any time.
  582. */
  583. if (!panel->backlight.present || !conn_state->crtc)
  584. return;
  585. mutex_lock(&dev_priv->backlight_lock);
  586. WARN_ON(panel->backlight.max == 0);
  587. hw_level = clamp_user_to_hw(connector, user_level, user_max);
  588. panel->backlight.level = hw_level;
  589. if (panel->backlight.device)
  590. panel->backlight.device->props.brightness =
  591. scale_hw_to_user(connector,
  592. panel->backlight.level,
  593. panel->backlight.device->props.max_brightness);
  594. if (panel->backlight.enabled)
  595. intel_panel_actually_set_backlight(conn_state, hw_level);
  596. mutex_unlock(&dev_priv->backlight_lock);
  597. }
  598. static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
  599. {
  600. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  601. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  602. u32 tmp;
  603. intel_panel_actually_set_backlight(old_conn_state, 0);
  604. /*
  605. * Although we don't support or enable CPU PWM with LPT/SPT based
  606. * systems, it may have been enabled prior to loading the
  607. * driver. Disable to avoid warnings on LCPLL disable.
  608. *
  609. * This needs rework if we need to add support for CPU PWM on PCH split
  610. * platforms.
  611. */
  612. tmp = I915_READ(BLC_PWM_CPU_CTL2);
  613. if (tmp & BLM_PWM_ENABLE) {
  614. DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
  615. I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  616. }
  617. tmp = I915_READ(BLC_PWM_PCH_CTL1);
  618. I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  619. }
  620. static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
  621. {
  622. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  623. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  624. u32 tmp;
  625. intel_panel_actually_set_backlight(old_conn_state, 0);
  626. tmp = I915_READ(BLC_PWM_CPU_CTL2);
  627. I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
  628. tmp = I915_READ(BLC_PWM_PCH_CTL1);
  629. I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
  630. }
  631. static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
  632. {
  633. intel_panel_actually_set_backlight(old_conn_state, 0);
  634. }
  635. static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
  636. {
  637. struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
  638. u32 tmp;
  639. intel_panel_actually_set_backlight(old_conn_state, 0);
  640. tmp = I915_READ(BLC_PWM_CTL2);
  641. I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
  642. }
  643. static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
  644. {
  645. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  646. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  647. enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
  648. u32 tmp;
  649. intel_panel_actually_set_backlight(old_conn_state, 0);
  650. tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  651. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
  652. }
  653. static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
  654. {
  655. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  656. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  657. struct intel_panel *panel = &connector->panel;
  658. u32 tmp, val;
  659. intel_panel_actually_set_backlight(old_conn_state, 0);
  660. tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  661. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  662. tmp & ~BXT_BLC_PWM_ENABLE);
  663. if (panel->backlight.controller == 1) {
  664. val = I915_READ(UTIL_PIN_CTL);
  665. val &= ~UTIL_PIN_ENABLE;
  666. I915_WRITE(UTIL_PIN_CTL, val);
  667. }
  668. }
  669. static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
  670. {
  671. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  672. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  673. struct intel_panel *panel = &connector->panel;
  674. u32 tmp;
  675. intel_panel_actually_set_backlight(old_conn_state, 0);
  676. tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  677. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  678. tmp & ~BXT_BLC_PWM_ENABLE);
  679. }
  680. static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
  681. {
  682. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  683. struct intel_panel *panel = &connector->panel;
  684. /* Disable the backlight */
  685. pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
  686. usleep_range(2000, 3000);
  687. pwm_disable(panel->backlight.pwm);
  688. }
  689. void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
  690. {
  691. struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
  692. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  693. struct intel_panel *panel = &connector->panel;
  694. if (!panel->backlight.present)
  695. return;
  696. /*
  697. * Do not disable backlight on the vga_switcheroo path. When switching
  698. * away from i915, the other client may depend on i915 to handle the
  699. * backlight. This will leave the backlight on unnecessarily when
  700. * another client is not activated.
  701. */
  702. if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
  703. DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
  704. return;
  705. }
  706. mutex_lock(&dev_priv->backlight_lock);
  707. if (panel->backlight.device)
  708. panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
  709. panel->backlight.enabled = false;
  710. panel->backlight.disable(old_conn_state);
  711. mutex_unlock(&dev_priv->backlight_lock);
  712. }
  713. static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
  714. const struct drm_connector_state *conn_state)
  715. {
  716. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  717. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  718. struct intel_panel *panel = &connector->panel;
  719. u32 pch_ctl1, pch_ctl2, schicken;
  720. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  721. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  722. DRM_DEBUG_KMS("pch backlight already enabled\n");
  723. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  724. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  725. }
  726. if (HAS_PCH_LPT(dev_priv)) {
  727. schicken = I915_READ(SOUTH_CHICKEN2);
  728. if (panel->backlight.alternate_pwm_increment)
  729. schicken |= LPT_PWM_GRANULARITY;
  730. else
  731. schicken &= ~LPT_PWM_GRANULARITY;
  732. I915_WRITE(SOUTH_CHICKEN2, schicken);
  733. } else {
  734. schicken = I915_READ(SOUTH_CHICKEN1);
  735. if (panel->backlight.alternate_pwm_increment)
  736. schicken |= SPT_PWM_GRANULARITY;
  737. else
  738. schicken &= ~SPT_PWM_GRANULARITY;
  739. I915_WRITE(SOUTH_CHICKEN1, schicken);
  740. }
  741. pch_ctl2 = panel->backlight.max << 16;
  742. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  743. pch_ctl1 = 0;
  744. if (panel->backlight.active_low_pwm)
  745. pch_ctl1 |= BLM_PCH_POLARITY;
  746. /* After LPT, override is the default. */
  747. if (HAS_PCH_LPT(dev_priv))
  748. pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
  749. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  750. POSTING_READ(BLC_PWM_PCH_CTL1);
  751. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  752. /* This won't stick until the above enable. */
  753. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  754. }
  755. static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
  756. const struct drm_connector_state *conn_state)
  757. {
  758. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  759. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  760. struct intel_panel *panel = &connector->panel;
  761. enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
  762. u32 cpu_ctl2, pch_ctl1, pch_ctl2;
  763. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  764. if (cpu_ctl2 & BLM_PWM_ENABLE) {
  765. DRM_DEBUG_KMS("cpu backlight already enabled\n");
  766. cpu_ctl2 &= ~BLM_PWM_ENABLE;
  767. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  768. }
  769. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  770. if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
  771. DRM_DEBUG_KMS("pch backlight already enabled\n");
  772. pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
  773. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  774. }
  775. if (cpu_transcoder == TRANSCODER_EDP)
  776. cpu_ctl2 = BLM_TRANSCODER_EDP;
  777. else
  778. cpu_ctl2 = BLM_PIPE(cpu_transcoder);
  779. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
  780. POSTING_READ(BLC_PWM_CPU_CTL2);
  781. I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
  782. /* This won't stick until the above enable. */
  783. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  784. pch_ctl2 = panel->backlight.max << 16;
  785. I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
  786. pch_ctl1 = 0;
  787. if (panel->backlight.active_low_pwm)
  788. pch_ctl1 |= BLM_PCH_POLARITY;
  789. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
  790. POSTING_READ(BLC_PWM_PCH_CTL1);
  791. I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
  792. }
  793. static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
  794. const struct drm_connector_state *conn_state)
  795. {
  796. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  797. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  798. struct intel_panel *panel = &connector->panel;
  799. u32 ctl, freq;
  800. ctl = I915_READ(BLC_PWM_CTL);
  801. if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
  802. DRM_DEBUG_KMS("backlight already enabled\n");
  803. I915_WRITE(BLC_PWM_CTL, 0);
  804. }
  805. freq = panel->backlight.max;
  806. if (panel->backlight.combination_mode)
  807. freq /= 0xff;
  808. ctl = freq << 17;
  809. if (panel->backlight.combination_mode)
  810. ctl |= BLM_LEGACY_MODE;
  811. if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
  812. ctl |= BLM_POLARITY_PNV;
  813. I915_WRITE(BLC_PWM_CTL, ctl);
  814. POSTING_READ(BLC_PWM_CTL);
  815. /* XXX: combine this into above write? */
  816. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  817. /*
  818. * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
  819. * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
  820. * that has backlight.
  821. */
  822. if (IS_GEN2(dev_priv))
  823. I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
  824. }
  825. static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
  826. const struct drm_connector_state *conn_state)
  827. {
  828. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  829. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  830. struct intel_panel *panel = &connector->panel;
  831. enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
  832. u32 ctl, ctl2, freq;
  833. ctl2 = I915_READ(BLC_PWM_CTL2);
  834. if (ctl2 & BLM_PWM_ENABLE) {
  835. DRM_DEBUG_KMS("backlight already enabled\n");
  836. ctl2 &= ~BLM_PWM_ENABLE;
  837. I915_WRITE(BLC_PWM_CTL2, ctl2);
  838. }
  839. freq = panel->backlight.max;
  840. if (panel->backlight.combination_mode)
  841. freq /= 0xff;
  842. ctl = freq << 16;
  843. I915_WRITE(BLC_PWM_CTL, ctl);
  844. ctl2 = BLM_PIPE(pipe);
  845. if (panel->backlight.combination_mode)
  846. ctl2 |= BLM_COMBINATION_MODE;
  847. if (panel->backlight.active_low_pwm)
  848. ctl2 |= BLM_POLARITY_I965;
  849. I915_WRITE(BLC_PWM_CTL2, ctl2);
  850. POSTING_READ(BLC_PWM_CTL2);
  851. I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
  852. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  853. }
  854. static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
  855. const struct drm_connector_state *conn_state)
  856. {
  857. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  858. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  859. struct intel_panel *panel = &connector->panel;
  860. enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
  861. u32 ctl, ctl2;
  862. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  863. if (ctl2 & BLM_PWM_ENABLE) {
  864. DRM_DEBUG_KMS("backlight already enabled\n");
  865. ctl2 &= ~BLM_PWM_ENABLE;
  866. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  867. }
  868. ctl = panel->backlight.max << 16;
  869. I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
  870. /* XXX: combine this into above write? */
  871. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  872. ctl2 = 0;
  873. if (panel->backlight.active_low_pwm)
  874. ctl2 |= BLM_POLARITY_I965;
  875. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
  876. POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
  877. I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
  878. }
  879. static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
  880. const struct drm_connector_state *conn_state)
  881. {
  882. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  883. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  884. struct intel_panel *panel = &connector->panel;
  885. enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
  886. u32 pwm_ctl, val;
  887. /* Controller 1 uses the utility pin. */
  888. if (panel->backlight.controller == 1) {
  889. val = I915_READ(UTIL_PIN_CTL);
  890. if (val & UTIL_PIN_ENABLE) {
  891. DRM_DEBUG_KMS("util pin already enabled\n");
  892. val &= ~UTIL_PIN_ENABLE;
  893. I915_WRITE(UTIL_PIN_CTL, val);
  894. }
  895. val = 0;
  896. if (panel->backlight.util_pin_active_low)
  897. val |= UTIL_PIN_POLARITY;
  898. I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
  899. UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
  900. }
  901. pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  902. if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
  903. DRM_DEBUG_KMS("backlight already enabled\n");
  904. pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
  905. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  906. pwm_ctl);
  907. }
  908. I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
  909. panel->backlight.max);
  910. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  911. pwm_ctl = 0;
  912. if (panel->backlight.active_low_pwm)
  913. pwm_ctl |= BXT_BLC_PWM_POLARITY;
  914. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
  915. POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  916. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  917. pwm_ctl | BXT_BLC_PWM_ENABLE);
  918. }
  919. static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
  920. const struct drm_connector_state *conn_state)
  921. {
  922. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  923. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  924. struct intel_panel *panel = &connector->panel;
  925. u32 pwm_ctl;
  926. pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  927. if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
  928. DRM_DEBUG_KMS("backlight already enabled\n");
  929. pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
  930. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  931. pwm_ctl);
  932. }
  933. I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
  934. panel->backlight.max);
  935. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  936. pwm_ctl = 0;
  937. if (panel->backlight.active_low_pwm)
  938. pwm_ctl |= BXT_BLC_PWM_POLARITY;
  939. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
  940. POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  941. I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
  942. pwm_ctl | BXT_BLC_PWM_ENABLE);
  943. }
  944. static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
  945. const struct drm_connector_state *conn_state)
  946. {
  947. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  948. struct intel_panel *panel = &connector->panel;
  949. pwm_enable(panel->backlight.pwm);
  950. intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
  951. }
  952. void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
  953. const struct drm_connector_state *conn_state)
  954. {
  955. struct intel_connector *connector = to_intel_connector(conn_state->connector);
  956. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  957. struct intel_panel *panel = &connector->panel;
  958. enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
  959. if (!panel->backlight.present)
  960. return;
  961. DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
  962. mutex_lock(&dev_priv->backlight_lock);
  963. WARN_ON(panel->backlight.max == 0);
  964. if (panel->backlight.level <= panel->backlight.min) {
  965. panel->backlight.level = panel->backlight.max;
  966. if (panel->backlight.device)
  967. panel->backlight.device->props.brightness =
  968. scale_hw_to_user(connector,
  969. panel->backlight.level,
  970. panel->backlight.device->props.max_brightness);
  971. }
  972. panel->backlight.enable(crtc_state, conn_state);
  973. panel->backlight.enabled = true;
  974. if (panel->backlight.device)
  975. panel->backlight.device->props.power = FB_BLANK_UNBLANK;
  976. mutex_unlock(&dev_priv->backlight_lock);
  977. }
  978. #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
  979. static int intel_backlight_device_update_status(struct backlight_device *bd)
  980. {
  981. struct intel_connector *connector = bl_get_data(bd);
  982. struct intel_panel *panel = &connector->panel;
  983. struct drm_device *dev = connector->base.dev;
  984. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  985. DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
  986. bd->props.brightness, bd->props.max_brightness);
  987. intel_panel_set_backlight(connector->base.state, bd->props.brightness,
  988. bd->props.max_brightness);
  989. /*
  990. * Allow flipping bl_power as a sub-state of enabled. Sadly the
  991. * backlight class device does not make it easy to to differentiate
  992. * between callbacks for brightness and bl_power, so our backlight_power
  993. * callback needs to take this into account.
  994. */
  995. if (panel->backlight.enabled) {
  996. if (panel->backlight.power) {
  997. bool enable = bd->props.power == FB_BLANK_UNBLANK &&
  998. bd->props.brightness != 0;
  999. panel->backlight.power(connector, enable);
  1000. }
  1001. } else {
  1002. bd->props.power = FB_BLANK_POWERDOWN;
  1003. }
  1004. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  1005. return 0;
  1006. }
  1007. static int intel_backlight_device_get_brightness(struct backlight_device *bd)
  1008. {
  1009. struct intel_connector *connector = bl_get_data(bd);
  1010. struct drm_device *dev = connector->base.dev;
  1011. struct drm_i915_private *dev_priv = to_i915(dev);
  1012. u32 hw_level;
  1013. int ret;
  1014. intel_runtime_pm_get(dev_priv);
  1015. drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
  1016. hw_level = intel_panel_get_backlight(connector);
  1017. ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
  1018. drm_modeset_unlock(&dev->mode_config.connection_mutex);
  1019. intel_runtime_pm_put(dev_priv);
  1020. return ret;
  1021. }
  1022. static const struct backlight_ops intel_backlight_device_ops = {
  1023. .update_status = intel_backlight_device_update_status,
  1024. .get_brightness = intel_backlight_device_get_brightness,
  1025. };
  1026. int intel_backlight_device_register(struct intel_connector *connector)
  1027. {
  1028. struct intel_panel *panel = &connector->panel;
  1029. struct backlight_properties props;
  1030. if (WARN_ON(panel->backlight.device))
  1031. return -ENODEV;
  1032. if (!panel->backlight.present)
  1033. return 0;
  1034. WARN_ON(panel->backlight.max == 0);
  1035. memset(&props, 0, sizeof(props));
  1036. props.type = BACKLIGHT_RAW;
  1037. /*
  1038. * Note: Everything should work even if the backlight device max
  1039. * presented to the userspace is arbitrarily chosen.
  1040. */
  1041. props.max_brightness = panel->backlight.max;
  1042. props.brightness = scale_hw_to_user(connector,
  1043. panel->backlight.level,
  1044. props.max_brightness);
  1045. if (panel->backlight.enabled)
  1046. props.power = FB_BLANK_UNBLANK;
  1047. else
  1048. props.power = FB_BLANK_POWERDOWN;
  1049. /*
  1050. * Note: using the same name independent of the connector prevents
  1051. * registration of multiple backlight devices in the driver.
  1052. */
  1053. panel->backlight.device =
  1054. backlight_device_register("intel_backlight",
  1055. connector->base.kdev,
  1056. connector,
  1057. &intel_backlight_device_ops, &props);
  1058. if (IS_ERR(panel->backlight.device)) {
  1059. DRM_ERROR("Failed to register backlight: %ld\n",
  1060. PTR_ERR(panel->backlight.device));
  1061. panel->backlight.device = NULL;
  1062. return -ENODEV;
  1063. }
  1064. DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
  1065. connector->base.name);
  1066. return 0;
  1067. }
  1068. void intel_backlight_device_unregister(struct intel_connector *connector)
  1069. {
  1070. struct intel_panel *panel = &connector->panel;
  1071. if (panel->backlight.device) {
  1072. backlight_device_unregister(panel->backlight.device);
  1073. panel->backlight.device = NULL;
  1074. }
  1075. }
  1076. #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
  1077. /*
  1078. * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
  1079. * PWM increment = 1
  1080. */
  1081. static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1082. {
  1083. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1084. return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
  1085. }
  1086. /*
  1087. * BXT: PWM clock frequency = 19.2 MHz.
  1088. */
  1089. static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1090. {
  1091. return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
  1092. }
  1093. /*
  1094. * SPT: This value represents the period of the PWM stream in clock periods
  1095. * multiplied by 16 (default increment) or 128 (alternate increment selected in
  1096. * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
  1097. */
  1098. static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1099. {
  1100. struct intel_panel *panel = &connector->panel;
  1101. u32 mul;
  1102. if (panel->backlight.alternate_pwm_increment)
  1103. mul = 128;
  1104. else
  1105. mul = 16;
  1106. return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
  1107. }
  1108. /*
  1109. * LPT: This value represents the period of the PWM stream in clock periods
  1110. * multiplied by 128 (default increment) or 16 (alternate increment, selected in
  1111. * LPT SOUTH_CHICKEN2 register bit 5).
  1112. */
  1113. static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1114. {
  1115. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1116. struct intel_panel *panel = &connector->panel;
  1117. u32 mul, clock;
  1118. if (panel->backlight.alternate_pwm_increment)
  1119. mul = 16;
  1120. else
  1121. mul = 128;
  1122. if (HAS_PCH_LPT_H(dev_priv))
  1123. clock = MHz(135); /* LPT:H */
  1124. else
  1125. clock = MHz(24); /* LPT:LP */
  1126. return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
  1127. }
  1128. /*
  1129. * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
  1130. * display raw clocks multiplied by 128.
  1131. */
  1132. static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1133. {
  1134. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1135. return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
  1136. }
  1137. /*
  1138. * Gen2: This field determines the number of time base events (display core
  1139. * clock frequency/32) in total for a complete cycle of modulated backlight
  1140. * control.
  1141. *
  1142. * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
  1143. * divided by 32.
  1144. */
  1145. static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1146. {
  1147. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1148. int clock;
  1149. if (IS_PINEVIEW(dev_priv))
  1150. clock = KHz(dev_priv->rawclk_freq);
  1151. else
  1152. clock = KHz(dev_priv->cdclk.hw.cdclk);
  1153. return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
  1154. }
  1155. /*
  1156. * Gen4: This value represents the period of the PWM stream in display core
  1157. * clocks ([DevCTG] HRAW clocks) multiplied by 128.
  1158. *
  1159. */
  1160. static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1161. {
  1162. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1163. int clock;
  1164. if (IS_G4X(dev_priv))
  1165. clock = KHz(dev_priv->rawclk_freq);
  1166. else
  1167. clock = KHz(dev_priv->cdclk.hw.cdclk);
  1168. return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
  1169. }
  1170. /*
  1171. * VLV: This value represents the period of the PWM stream in display core
  1172. * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
  1173. * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
  1174. */
  1175. static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
  1176. {
  1177. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1178. int mul, clock;
  1179. if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
  1180. if (IS_CHERRYVIEW(dev_priv))
  1181. clock = KHz(19200);
  1182. else
  1183. clock = MHz(25);
  1184. mul = 16;
  1185. } else {
  1186. clock = KHz(dev_priv->rawclk_freq);
  1187. mul = 128;
  1188. }
  1189. return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
  1190. }
  1191. static u32 get_backlight_max_vbt(struct intel_connector *connector)
  1192. {
  1193. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1194. struct intel_panel *panel = &connector->panel;
  1195. u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
  1196. u32 pwm;
  1197. if (!panel->backlight.hz_to_pwm) {
  1198. DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
  1199. return 0;
  1200. }
  1201. if (pwm_freq_hz) {
  1202. DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
  1203. pwm_freq_hz);
  1204. } else {
  1205. pwm_freq_hz = 200;
  1206. DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
  1207. pwm_freq_hz);
  1208. }
  1209. pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
  1210. if (!pwm) {
  1211. DRM_DEBUG_KMS("backlight frequency conversion failed\n");
  1212. return 0;
  1213. }
  1214. return pwm;
  1215. }
  1216. /*
  1217. * Note: The setup hooks can't assume pipe is set!
  1218. */
  1219. static u32 get_backlight_min_vbt(struct intel_connector *connector)
  1220. {
  1221. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1222. struct intel_panel *panel = &connector->panel;
  1223. int min;
  1224. WARN_ON(panel->backlight.max == 0);
  1225. /*
  1226. * XXX: If the vbt value is 255, it makes min equal to max, which leads
  1227. * to problems. There are such machines out there. Either our
  1228. * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
  1229. * against this by letting the minimum be at most (arbitrarily chosen)
  1230. * 25% of the max.
  1231. */
  1232. min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
  1233. if (min != dev_priv->vbt.backlight.min_brightness) {
  1234. DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
  1235. dev_priv->vbt.backlight.min_brightness, min);
  1236. }
  1237. /* vbt value is a coefficient in range [0..255] */
  1238. return scale(min, 0, 255, 0, panel->backlight.max);
  1239. }
  1240. static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1241. {
  1242. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1243. struct intel_panel *panel = &connector->panel;
  1244. u32 pch_ctl1, pch_ctl2, val;
  1245. bool alt;
  1246. if (HAS_PCH_LPT(dev_priv))
  1247. alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
  1248. else
  1249. alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
  1250. panel->backlight.alternate_pwm_increment = alt;
  1251. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  1252. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  1253. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  1254. panel->backlight.max = pch_ctl2 >> 16;
  1255. if (!panel->backlight.max)
  1256. panel->backlight.max = get_backlight_max_vbt(connector);
  1257. if (!panel->backlight.max)
  1258. return -ENODEV;
  1259. panel->backlight.min = get_backlight_min_vbt(connector);
  1260. val = lpt_get_backlight(connector);
  1261. val = intel_panel_compute_brightness(connector, val);
  1262. panel->backlight.level = clamp(val, panel->backlight.min,
  1263. panel->backlight.max);
  1264. panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
  1265. return 0;
  1266. }
  1267. static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1268. {
  1269. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1270. struct intel_panel *panel = &connector->panel;
  1271. u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
  1272. pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
  1273. panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
  1274. pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
  1275. panel->backlight.max = pch_ctl2 >> 16;
  1276. if (!panel->backlight.max)
  1277. panel->backlight.max = get_backlight_max_vbt(connector);
  1278. if (!panel->backlight.max)
  1279. return -ENODEV;
  1280. panel->backlight.min = get_backlight_min_vbt(connector);
  1281. val = pch_get_backlight(connector);
  1282. val = intel_panel_compute_brightness(connector, val);
  1283. panel->backlight.level = clamp(val, panel->backlight.min,
  1284. panel->backlight.max);
  1285. cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
  1286. panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
  1287. (pch_ctl1 & BLM_PCH_PWM_ENABLE);
  1288. return 0;
  1289. }
  1290. static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1291. {
  1292. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1293. struct intel_panel *panel = &connector->panel;
  1294. u32 ctl, val;
  1295. ctl = I915_READ(BLC_PWM_CTL);
  1296. if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
  1297. panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
  1298. if (IS_PINEVIEW(dev_priv))
  1299. panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
  1300. panel->backlight.max = ctl >> 17;
  1301. if (!panel->backlight.max) {
  1302. panel->backlight.max = get_backlight_max_vbt(connector);
  1303. panel->backlight.max >>= 1;
  1304. }
  1305. if (!panel->backlight.max)
  1306. return -ENODEV;
  1307. if (panel->backlight.combination_mode)
  1308. panel->backlight.max *= 0xff;
  1309. panel->backlight.min = get_backlight_min_vbt(connector);
  1310. val = i9xx_get_backlight(connector);
  1311. val = intel_panel_compute_brightness(connector, val);
  1312. panel->backlight.level = clamp(val, panel->backlight.min,
  1313. panel->backlight.max);
  1314. panel->backlight.enabled = val != 0;
  1315. return 0;
  1316. }
  1317. static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1318. {
  1319. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1320. struct intel_panel *panel = &connector->panel;
  1321. u32 ctl, ctl2, val;
  1322. ctl2 = I915_READ(BLC_PWM_CTL2);
  1323. panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
  1324. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  1325. ctl = I915_READ(BLC_PWM_CTL);
  1326. panel->backlight.max = ctl >> 16;
  1327. if (!panel->backlight.max)
  1328. panel->backlight.max = get_backlight_max_vbt(connector);
  1329. if (!panel->backlight.max)
  1330. return -ENODEV;
  1331. if (panel->backlight.combination_mode)
  1332. panel->backlight.max *= 0xff;
  1333. panel->backlight.min = get_backlight_min_vbt(connector);
  1334. val = i9xx_get_backlight(connector);
  1335. val = intel_panel_compute_brightness(connector, val);
  1336. panel->backlight.level = clamp(val, panel->backlight.min,
  1337. panel->backlight.max);
  1338. panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
  1339. return 0;
  1340. }
  1341. static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
  1342. {
  1343. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1344. struct intel_panel *panel = &connector->panel;
  1345. u32 ctl, ctl2, val;
  1346. if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
  1347. return -ENODEV;
  1348. ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
  1349. panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
  1350. ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
  1351. panel->backlight.max = ctl >> 16;
  1352. if (!panel->backlight.max)
  1353. panel->backlight.max = get_backlight_max_vbt(connector);
  1354. if (!panel->backlight.max)
  1355. return -ENODEV;
  1356. panel->backlight.min = get_backlight_min_vbt(connector);
  1357. val = _vlv_get_backlight(dev_priv, pipe);
  1358. val = intel_panel_compute_brightness(connector, val);
  1359. panel->backlight.level = clamp(val, panel->backlight.min,
  1360. panel->backlight.max);
  1361. panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
  1362. return 0;
  1363. }
  1364. static int
  1365. bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1366. {
  1367. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1368. struct intel_panel *panel = &connector->panel;
  1369. u32 pwm_ctl, val;
  1370. panel->backlight.controller = dev_priv->vbt.backlight.controller;
  1371. pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  1372. /* Controller 1 uses the utility pin. */
  1373. if (panel->backlight.controller == 1) {
  1374. val = I915_READ(UTIL_PIN_CTL);
  1375. panel->backlight.util_pin_active_low =
  1376. val & UTIL_PIN_POLARITY;
  1377. }
  1378. panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
  1379. panel->backlight.max =
  1380. I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
  1381. if (!panel->backlight.max)
  1382. panel->backlight.max = get_backlight_max_vbt(connector);
  1383. if (!panel->backlight.max)
  1384. return -ENODEV;
  1385. panel->backlight.min = get_backlight_min_vbt(connector);
  1386. val = bxt_get_backlight(connector);
  1387. val = intel_panel_compute_brightness(connector, val);
  1388. panel->backlight.level = clamp(val, panel->backlight.min,
  1389. panel->backlight.max);
  1390. panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
  1391. return 0;
  1392. }
  1393. static int
  1394. cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
  1395. {
  1396. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1397. struct intel_panel *panel = &connector->panel;
  1398. u32 pwm_ctl, val;
  1399. /*
  1400. * CNP has the BXT implementation of backlight, but with only
  1401. * one controller. Future platforms could have multiple controllers
  1402. * so let's make this extensible and prepared for the future.
  1403. */
  1404. panel->backlight.controller = 0;
  1405. pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
  1406. panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
  1407. panel->backlight.max =
  1408. I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
  1409. if (!panel->backlight.max)
  1410. panel->backlight.max = get_backlight_max_vbt(connector);
  1411. if (!panel->backlight.max)
  1412. return -ENODEV;
  1413. panel->backlight.min = get_backlight_min_vbt(connector);
  1414. val = bxt_get_backlight(connector);
  1415. val = intel_panel_compute_brightness(connector, val);
  1416. panel->backlight.level = clamp(val, panel->backlight.min,
  1417. panel->backlight.max);
  1418. panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
  1419. return 0;
  1420. }
  1421. static int pwm_setup_backlight(struct intel_connector *connector,
  1422. enum pipe pipe)
  1423. {
  1424. struct drm_device *dev = connector->base.dev;
  1425. struct intel_panel *panel = &connector->panel;
  1426. int retval;
  1427. /* Get the PWM chip for backlight control */
  1428. panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
  1429. if (IS_ERR(panel->backlight.pwm)) {
  1430. DRM_ERROR("Failed to own the pwm chip\n");
  1431. panel->backlight.pwm = NULL;
  1432. return -ENODEV;
  1433. }
  1434. /*
  1435. * FIXME: pwm_apply_args() should be removed when switching to
  1436. * the atomic PWM API.
  1437. */
  1438. pwm_apply_args(panel->backlight.pwm);
  1439. retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
  1440. CRC_PMIC_PWM_PERIOD_NS);
  1441. if (retval < 0) {
  1442. DRM_ERROR("Failed to configure the pwm chip\n");
  1443. pwm_put(panel->backlight.pwm);
  1444. panel->backlight.pwm = NULL;
  1445. return retval;
  1446. }
  1447. panel->backlight.min = 0; /* 0% */
  1448. panel->backlight.max = 100; /* 100% */
  1449. panel->backlight.level = DIV_ROUND_UP(
  1450. pwm_get_duty_cycle(panel->backlight.pwm) * 100,
  1451. CRC_PMIC_PWM_PERIOD_NS);
  1452. panel->backlight.enabled = panel->backlight.level != 0;
  1453. return 0;
  1454. }
  1455. int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
  1456. {
  1457. struct drm_i915_private *dev_priv = to_i915(connector->dev);
  1458. struct intel_connector *intel_connector = to_intel_connector(connector);
  1459. struct intel_panel *panel = &intel_connector->panel;
  1460. int ret;
  1461. if (!dev_priv->vbt.backlight.present) {
  1462. if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
  1463. DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
  1464. } else {
  1465. DRM_DEBUG_KMS("no backlight present per VBT\n");
  1466. return 0;
  1467. }
  1468. }
  1469. /* ensure intel_panel has been initialized first */
  1470. if (WARN_ON(!panel->backlight.setup))
  1471. return -ENODEV;
  1472. /* set level and max in panel struct */
  1473. mutex_lock(&dev_priv->backlight_lock);
  1474. ret = panel->backlight.setup(intel_connector, pipe);
  1475. mutex_unlock(&dev_priv->backlight_lock);
  1476. if (ret) {
  1477. DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
  1478. connector->name);
  1479. return ret;
  1480. }
  1481. panel->backlight.present = true;
  1482. DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
  1483. connector->name,
  1484. enableddisabled(panel->backlight.enabled),
  1485. panel->backlight.level, panel->backlight.max);
  1486. return 0;
  1487. }
  1488. void intel_panel_destroy_backlight(struct drm_connector *connector)
  1489. {
  1490. struct intel_connector *intel_connector = to_intel_connector(connector);
  1491. struct intel_panel *panel = &intel_connector->panel;
  1492. /* dispose of the pwm */
  1493. if (panel->backlight.pwm)
  1494. pwm_put(panel->backlight.pwm);
  1495. panel->backlight.present = false;
  1496. }
  1497. /* Set up chip specific backlight functions */
  1498. static void
  1499. intel_panel_init_backlight_funcs(struct intel_panel *panel)
  1500. {
  1501. struct intel_connector *connector =
  1502. container_of(panel, struct intel_connector, panel);
  1503. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  1504. if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
  1505. intel_dp_aux_init_backlight_funcs(connector) == 0)
  1506. return;
  1507. if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
  1508. intel_dsi_dcs_init_backlight_funcs(connector) == 0)
  1509. return;
  1510. if (IS_GEN9_LP(dev_priv)) {
  1511. panel->backlight.setup = bxt_setup_backlight;
  1512. panel->backlight.enable = bxt_enable_backlight;
  1513. panel->backlight.disable = bxt_disable_backlight;
  1514. panel->backlight.set = bxt_set_backlight;
  1515. panel->backlight.get = bxt_get_backlight;
  1516. panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
  1517. } else if (HAS_PCH_CNP(dev_priv)) {
  1518. panel->backlight.setup = cnp_setup_backlight;
  1519. panel->backlight.enable = cnp_enable_backlight;
  1520. panel->backlight.disable = cnp_disable_backlight;
  1521. panel->backlight.set = bxt_set_backlight;
  1522. panel->backlight.get = bxt_get_backlight;
  1523. panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
  1524. } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
  1525. HAS_PCH_KBP(dev_priv)) {
  1526. panel->backlight.setup = lpt_setup_backlight;
  1527. panel->backlight.enable = lpt_enable_backlight;
  1528. panel->backlight.disable = lpt_disable_backlight;
  1529. panel->backlight.set = lpt_set_backlight;
  1530. panel->backlight.get = lpt_get_backlight;
  1531. if (HAS_PCH_LPT(dev_priv))
  1532. panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
  1533. else
  1534. panel->backlight.hz_to_pwm = spt_hz_to_pwm;
  1535. } else if (HAS_PCH_SPLIT(dev_priv)) {
  1536. panel->backlight.setup = pch_setup_backlight;
  1537. panel->backlight.enable = pch_enable_backlight;
  1538. panel->backlight.disable = pch_disable_backlight;
  1539. panel->backlight.set = pch_set_backlight;
  1540. panel->backlight.get = pch_get_backlight;
  1541. panel->backlight.hz_to_pwm = pch_hz_to_pwm;
  1542. } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
  1543. if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
  1544. panel->backlight.setup = pwm_setup_backlight;
  1545. panel->backlight.enable = pwm_enable_backlight;
  1546. panel->backlight.disable = pwm_disable_backlight;
  1547. panel->backlight.set = pwm_set_backlight;
  1548. panel->backlight.get = pwm_get_backlight;
  1549. } else {
  1550. panel->backlight.setup = vlv_setup_backlight;
  1551. panel->backlight.enable = vlv_enable_backlight;
  1552. panel->backlight.disable = vlv_disable_backlight;
  1553. panel->backlight.set = vlv_set_backlight;
  1554. panel->backlight.get = vlv_get_backlight;
  1555. panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
  1556. }
  1557. } else if (IS_GEN4(dev_priv)) {
  1558. panel->backlight.setup = i965_setup_backlight;
  1559. panel->backlight.enable = i965_enable_backlight;
  1560. panel->backlight.disable = i965_disable_backlight;
  1561. panel->backlight.set = i9xx_set_backlight;
  1562. panel->backlight.get = i9xx_get_backlight;
  1563. panel->backlight.hz_to_pwm = i965_hz_to_pwm;
  1564. } else {
  1565. panel->backlight.setup = i9xx_setup_backlight;
  1566. panel->backlight.enable = i9xx_enable_backlight;
  1567. panel->backlight.disable = i9xx_disable_backlight;
  1568. panel->backlight.set = i9xx_set_backlight;
  1569. panel->backlight.get = i9xx_get_backlight;
  1570. panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
  1571. }
  1572. }
  1573. int intel_panel_init(struct intel_panel *panel,
  1574. struct drm_display_mode *fixed_mode,
  1575. struct drm_display_mode *alt_fixed_mode,
  1576. struct drm_display_mode *downclock_mode)
  1577. {
  1578. intel_panel_init_backlight_funcs(panel);
  1579. panel->fixed_mode = fixed_mode;
  1580. panel->alt_fixed_mode = alt_fixed_mode;
  1581. panel->downclock_mode = downclock_mode;
  1582. return 0;
  1583. }
  1584. void intel_panel_fini(struct intel_panel *panel)
  1585. {
  1586. struct intel_connector *intel_connector =
  1587. container_of(panel, struct intel_connector, panel);
  1588. if (panel->fixed_mode)
  1589. drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
  1590. if (panel->alt_fixed_mode)
  1591. drm_mode_destroy(intel_connector->base.dev,
  1592. panel->alt_fixed_mode);
  1593. if (panel->downclock_mode)
  1594. drm_mode_destroy(intel_connector->base.dev,
  1595. panel->downclock_mode);
  1596. }