cdv_intel_lvds.c 20 KB

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  1. /*
  2. * Copyright © 2006-2011 Intel Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program; if not, write to the Free Software Foundation, Inc.,
  15. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  16. *
  17. * Authors:
  18. * Eric Anholt <eric@anholt.net>
  19. * Dave Airlie <airlied@linux.ie>
  20. * Jesse Barnes <jesse.barnes@intel.com>
  21. */
  22. #include <linux/i2c.h>
  23. #include <linux/dmi.h>
  24. #include <drm/drmP.h>
  25. #include "intel_bios.h"
  26. #include "psb_drv.h"
  27. #include "psb_intel_drv.h"
  28. #include "psb_intel_reg.h"
  29. #include "power.h"
  30. #include <linux/pm_runtime.h>
  31. #include "cdv_device.h"
  32. /**
  33. * LVDS I2C backlight control macros
  34. */
  35. #define BRIGHTNESS_MAX_LEVEL 100
  36. #define BRIGHTNESS_MASK 0xFF
  37. #define BLC_I2C_TYPE 0x01
  38. #define BLC_PWM_TYPT 0x02
  39. #define BLC_POLARITY_NORMAL 0
  40. #define BLC_POLARITY_INVERSE 1
  41. #define PSB_BLC_MAX_PWM_REG_FREQ (0xFFFE)
  42. #define PSB_BLC_MIN_PWM_REG_FREQ (0x2)
  43. #define PSB_BLC_PWM_PRECISION_FACTOR (10)
  44. #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
  45. #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
  46. struct cdv_intel_lvds_priv {
  47. /**
  48. * Saved LVDO output states
  49. */
  50. uint32_t savePP_ON;
  51. uint32_t savePP_OFF;
  52. uint32_t saveLVDS;
  53. uint32_t savePP_CONTROL;
  54. uint32_t savePP_CYCLE;
  55. uint32_t savePFIT_CONTROL;
  56. uint32_t savePFIT_PGM_RATIOS;
  57. uint32_t saveBLC_PWM_CTL;
  58. };
  59. /*
  60. * Returns the maximum level of the backlight duty cycle field.
  61. */
  62. static u32 cdv_intel_lvds_get_max_backlight(struct drm_device *dev)
  63. {
  64. struct drm_psb_private *dev_priv = dev->dev_private;
  65. u32 retval;
  66. if (gma_power_begin(dev, false)) {
  67. retval = ((REG_READ(BLC_PWM_CTL) &
  68. BACKLIGHT_MODULATION_FREQ_MASK) >>
  69. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  70. gma_power_end(dev);
  71. } else
  72. retval = ((dev_priv->regs.saveBLC_PWM_CTL &
  73. BACKLIGHT_MODULATION_FREQ_MASK) >>
  74. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  75. return retval;
  76. }
  77. #if 0
  78. /*
  79. * Set LVDS backlight level by I2C command
  80. */
  81. static int cdv_lvds_i2c_set_brightness(struct drm_device *dev,
  82. unsigned int level)
  83. {
  84. struct drm_psb_private *dev_priv = dev->dev_private;
  85. struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
  86. u8 out_buf[2];
  87. unsigned int blc_i2c_brightness;
  88. struct i2c_msg msgs[] = {
  89. {
  90. .addr = lvds_i2c_bus->slave_addr,
  91. .flags = 0,
  92. .len = 2,
  93. .buf = out_buf,
  94. }
  95. };
  96. blc_i2c_brightness = BRIGHTNESS_MASK & ((unsigned int)level *
  97. BRIGHTNESS_MASK /
  98. BRIGHTNESS_MAX_LEVEL);
  99. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  100. blc_i2c_brightness = BRIGHTNESS_MASK - blc_i2c_brightness;
  101. out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
  102. out_buf[1] = (u8)blc_i2c_brightness;
  103. if (i2c_transfer(&lvds_i2c_bus->adapter, msgs, 1) == 1)
  104. return 0;
  105. DRM_ERROR("I2C transfer error\n");
  106. return -1;
  107. }
  108. static int cdv_lvds_pwm_set_brightness(struct drm_device *dev, int level)
  109. {
  110. struct drm_psb_private *dev_priv = dev->dev_private;
  111. u32 max_pwm_blc;
  112. u32 blc_pwm_duty_cycle;
  113. max_pwm_blc = cdv_intel_lvds_get_max_backlight(dev);
  114. /*BLC_PWM_CTL Should be initiated while backlight device init*/
  115. BUG_ON((max_pwm_blc & PSB_BLC_MAX_PWM_REG_FREQ) == 0);
  116. blc_pwm_duty_cycle = level * max_pwm_blc / BRIGHTNESS_MAX_LEVEL;
  117. if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
  118. blc_pwm_duty_cycle = max_pwm_blc - blc_pwm_duty_cycle;
  119. blc_pwm_duty_cycle &= PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR;
  120. REG_WRITE(BLC_PWM_CTL,
  121. (max_pwm_blc << PSB_BACKLIGHT_PWM_CTL_SHIFT) |
  122. (blc_pwm_duty_cycle));
  123. return 0;
  124. }
  125. /*
  126. * Set LVDS backlight level either by I2C or PWM
  127. */
  128. void cdv_intel_lvds_set_brightness(struct drm_device *dev, int level)
  129. {
  130. struct drm_psb_private *dev_priv = dev->dev_private;
  131. if (!dev_priv->lvds_bl) {
  132. DRM_ERROR("NO LVDS Backlight Info\n");
  133. return;
  134. }
  135. if (dev_priv->lvds_bl->type == BLC_I2C_TYPE)
  136. cdv_lvds_i2c_set_brightness(dev, level);
  137. else
  138. cdv_lvds_pwm_set_brightness(dev, level);
  139. }
  140. #endif
  141. /**
  142. * Sets the backlight level.
  143. *
  144. * level backlight level, from 0 to cdv_intel_lvds_get_max_backlight().
  145. */
  146. static void cdv_intel_lvds_set_backlight(struct drm_device *dev, int level)
  147. {
  148. struct drm_psb_private *dev_priv = dev->dev_private;
  149. u32 blc_pwm_ctl;
  150. if (gma_power_begin(dev, false)) {
  151. blc_pwm_ctl =
  152. REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  153. REG_WRITE(BLC_PWM_CTL,
  154. (blc_pwm_ctl |
  155. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  156. gma_power_end(dev);
  157. } else {
  158. blc_pwm_ctl = dev_priv->regs.saveBLC_PWM_CTL &
  159. ~BACKLIGHT_DUTY_CYCLE_MASK;
  160. dev_priv->regs.saveBLC_PWM_CTL = (blc_pwm_ctl |
  161. (level << BACKLIGHT_DUTY_CYCLE_SHIFT));
  162. }
  163. }
  164. /**
  165. * Sets the power state for the panel.
  166. */
  167. static void cdv_intel_lvds_set_power(struct drm_device *dev,
  168. struct drm_encoder *encoder, bool on)
  169. {
  170. struct drm_psb_private *dev_priv = dev->dev_private;
  171. u32 pp_status;
  172. if (!gma_power_begin(dev, true))
  173. return;
  174. if (on) {
  175. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) |
  176. POWER_TARGET_ON);
  177. do {
  178. pp_status = REG_READ(PP_STATUS);
  179. } while ((pp_status & PP_ON) == 0);
  180. cdv_intel_lvds_set_backlight(dev,
  181. dev_priv->mode_dev.backlight_duty_cycle);
  182. } else {
  183. cdv_intel_lvds_set_backlight(dev, 0);
  184. REG_WRITE(PP_CONTROL, REG_READ(PP_CONTROL) &
  185. ~POWER_TARGET_ON);
  186. do {
  187. pp_status = REG_READ(PP_STATUS);
  188. } while (pp_status & PP_ON);
  189. }
  190. gma_power_end(dev);
  191. }
  192. static void cdv_intel_lvds_encoder_dpms(struct drm_encoder *encoder, int mode)
  193. {
  194. struct drm_device *dev = encoder->dev;
  195. if (mode == DRM_MODE_DPMS_ON)
  196. cdv_intel_lvds_set_power(dev, encoder, true);
  197. else
  198. cdv_intel_lvds_set_power(dev, encoder, false);
  199. /* XXX: We never power down the LVDS pairs. */
  200. }
  201. static void cdv_intel_lvds_save(struct drm_connector *connector)
  202. {
  203. }
  204. static void cdv_intel_lvds_restore(struct drm_connector *connector)
  205. {
  206. }
  207. static int cdv_intel_lvds_mode_valid(struct drm_connector *connector,
  208. struct drm_display_mode *mode)
  209. {
  210. struct drm_device *dev = connector->dev;
  211. struct drm_psb_private *dev_priv = dev->dev_private;
  212. struct drm_display_mode *fixed_mode =
  213. dev_priv->mode_dev.panel_fixed_mode;
  214. /* just in case */
  215. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  216. return MODE_NO_DBLESCAN;
  217. /* just in case */
  218. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  219. return MODE_NO_INTERLACE;
  220. if (fixed_mode) {
  221. if (mode->hdisplay > fixed_mode->hdisplay)
  222. return MODE_PANEL;
  223. if (mode->vdisplay > fixed_mode->vdisplay)
  224. return MODE_PANEL;
  225. }
  226. return MODE_OK;
  227. }
  228. static bool cdv_intel_lvds_mode_fixup(struct drm_encoder *encoder,
  229. const struct drm_display_mode *mode,
  230. struct drm_display_mode *adjusted_mode)
  231. {
  232. struct drm_device *dev = encoder->dev;
  233. struct drm_psb_private *dev_priv = dev->dev_private;
  234. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  235. struct drm_encoder *tmp_encoder;
  236. struct drm_display_mode *panel_fixed_mode = mode_dev->panel_fixed_mode;
  237. /* Should never happen!! */
  238. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list,
  239. head) {
  240. if (tmp_encoder != encoder
  241. && tmp_encoder->crtc == encoder->crtc) {
  242. pr_err("Can't enable LVDS and another encoder on the same pipe\n");
  243. return false;
  244. }
  245. }
  246. /*
  247. * If we have timings from the BIOS for the panel, put them in
  248. * to the adjusted mode. The CRTC will be set up for this mode,
  249. * with the panel scaling set up to source from the H/VDisplay
  250. * of the original mode.
  251. */
  252. if (panel_fixed_mode != NULL) {
  253. adjusted_mode->hdisplay = panel_fixed_mode->hdisplay;
  254. adjusted_mode->hsync_start = panel_fixed_mode->hsync_start;
  255. adjusted_mode->hsync_end = panel_fixed_mode->hsync_end;
  256. adjusted_mode->htotal = panel_fixed_mode->htotal;
  257. adjusted_mode->vdisplay = panel_fixed_mode->vdisplay;
  258. adjusted_mode->vsync_start = panel_fixed_mode->vsync_start;
  259. adjusted_mode->vsync_end = panel_fixed_mode->vsync_end;
  260. adjusted_mode->vtotal = panel_fixed_mode->vtotal;
  261. adjusted_mode->clock = panel_fixed_mode->clock;
  262. drm_mode_set_crtcinfo(adjusted_mode,
  263. CRTC_INTERLACE_HALVE_V);
  264. }
  265. /*
  266. * XXX: It would be nice to support lower refresh rates on the
  267. * panels to reduce power consumption, and perhaps match the
  268. * user's requested refresh rate.
  269. */
  270. return true;
  271. }
  272. static void cdv_intel_lvds_prepare(struct drm_encoder *encoder)
  273. {
  274. struct drm_device *dev = encoder->dev;
  275. struct drm_psb_private *dev_priv = dev->dev_private;
  276. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  277. if (!gma_power_begin(dev, true))
  278. return;
  279. mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL);
  280. mode_dev->backlight_duty_cycle = (mode_dev->saveBLC_PWM_CTL &
  281. BACKLIGHT_DUTY_CYCLE_MASK);
  282. cdv_intel_lvds_set_power(dev, encoder, false);
  283. gma_power_end(dev);
  284. }
  285. static void cdv_intel_lvds_commit(struct drm_encoder *encoder)
  286. {
  287. struct drm_device *dev = encoder->dev;
  288. struct drm_psb_private *dev_priv = dev->dev_private;
  289. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  290. if (mode_dev->backlight_duty_cycle == 0)
  291. mode_dev->backlight_duty_cycle =
  292. cdv_intel_lvds_get_max_backlight(dev);
  293. cdv_intel_lvds_set_power(dev, encoder, true);
  294. }
  295. static void cdv_intel_lvds_mode_set(struct drm_encoder *encoder,
  296. struct drm_display_mode *mode,
  297. struct drm_display_mode *adjusted_mode)
  298. {
  299. struct drm_device *dev = encoder->dev;
  300. struct drm_psb_private *dev_priv = dev->dev_private;
  301. struct gma_crtc *gma_crtc = to_gma_crtc(encoder->crtc);
  302. u32 pfit_control;
  303. /*
  304. * The LVDS pin pair will already have been turned on in the
  305. * cdv_intel_crtc_mode_set since it has a large impact on the DPLL
  306. * settings.
  307. */
  308. /*
  309. * Enable automatic panel scaling so that non-native modes fill the
  310. * screen. Should be enabled before the pipe is enabled, according to
  311. * register description and PRM.
  312. */
  313. if (mode->hdisplay != adjusted_mode->hdisplay ||
  314. mode->vdisplay != adjusted_mode->vdisplay)
  315. pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE |
  316. HORIZ_AUTO_SCALE | VERT_INTERP_BILINEAR |
  317. HORIZ_INTERP_BILINEAR);
  318. else
  319. pfit_control = 0;
  320. pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT;
  321. if (dev_priv->lvds_dither)
  322. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  323. REG_WRITE(PFIT_CONTROL, pfit_control);
  324. }
  325. /**
  326. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  327. */
  328. static int cdv_intel_lvds_get_modes(struct drm_connector *connector)
  329. {
  330. struct drm_device *dev = connector->dev;
  331. struct drm_psb_private *dev_priv = dev->dev_private;
  332. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  333. struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev;
  334. int ret;
  335. ret = psb_intel_ddc_get_modes(connector, &gma_encoder->i2c_bus->adapter);
  336. if (ret)
  337. return ret;
  338. if (mode_dev->panel_fixed_mode != NULL) {
  339. struct drm_display_mode *mode =
  340. drm_mode_duplicate(dev, mode_dev->panel_fixed_mode);
  341. drm_mode_probed_add(connector, mode);
  342. return 1;
  343. }
  344. return 0;
  345. }
  346. /**
  347. * cdv_intel_lvds_destroy - unregister and free LVDS structures
  348. * @connector: connector to free
  349. *
  350. * Unregister the DDC bus for this connector then free the driver private
  351. * structure.
  352. */
  353. static void cdv_intel_lvds_destroy(struct drm_connector *connector)
  354. {
  355. struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
  356. psb_intel_i2c_destroy(gma_encoder->i2c_bus);
  357. drm_connector_unregister(connector);
  358. drm_connector_cleanup(connector);
  359. kfree(connector);
  360. }
  361. static int cdv_intel_lvds_set_property(struct drm_connector *connector,
  362. struct drm_property *property,
  363. uint64_t value)
  364. {
  365. struct drm_encoder *encoder = connector->encoder;
  366. if (!strcmp(property->name, "scaling mode") && encoder) {
  367. struct gma_crtc *crtc = to_gma_crtc(encoder->crtc);
  368. uint64_t curValue;
  369. if (!crtc)
  370. return -1;
  371. switch (value) {
  372. case DRM_MODE_SCALE_FULLSCREEN:
  373. break;
  374. case DRM_MODE_SCALE_NO_SCALE:
  375. break;
  376. case DRM_MODE_SCALE_ASPECT:
  377. break;
  378. default:
  379. return -1;
  380. }
  381. if (drm_object_property_get_value(&connector->base,
  382. property,
  383. &curValue))
  384. return -1;
  385. if (curValue == value)
  386. return 0;
  387. if (drm_object_property_set_value(&connector->base,
  388. property,
  389. value))
  390. return -1;
  391. if (crtc->saved_mode.hdisplay != 0 &&
  392. crtc->saved_mode.vdisplay != 0) {
  393. if (!drm_crtc_helper_set_mode(encoder->crtc,
  394. &crtc->saved_mode,
  395. encoder->crtc->x,
  396. encoder->crtc->y,
  397. encoder->crtc->primary->fb))
  398. return -1;
  399. }
  400. } else if (!strcmp(property->name, "backlight") && encoder) {
  401. if (drm_object_property_set_value(&connector->base,
  402. property,
  403. value))
  404. return -1;
  405. else
  406. gma_backlight_set(encoder->dev, value);
  407. } else if (!strcmp(property->name, "DPMS") && encoder) {
  408. const struct drm_encoder_helper_funcs *helpers =
  409. encoder->helper_private;
  410. helpers->dpms(encoder, value);
  411. }
  412. return 0;
  413. }
  414. static const struct drm_encoder_helper_funcs
  415. cdv_intel_lvds_helper_funcs = {
  416. .dpms = cdv_intel_lvds_encoder_dpms,
  417. .mode_fixup = cdv_intel_lvds_mode_fixup,
  418. .prepare = cdv_intel_lvds_prepare,
  419. .mode_set = cdv_intel_lvds_mode_set,
  420. .commit = cdv_intel_lvds_commit,
  421. };
  422. static const struct drm_connector_helper_funcs
  423. cdv_intel_lvds_connector_helper_funcs = {
  424. .get_modes = cdv_intel_lvds_get_modes,
  425. .mode_valid = cdv_intel_lvds_mode_valid,
  426. .best_encoder = gma_best_encoder,
  427. };
  428. static const struct drm_connector_funcs cdv_intel_lvds_connector_funcs = {
  429. .dpms = drm_helper_connector_dpms,
  430. .fill_modes = drm_helper_probe_single_connector_modes,
  431. .set_property = cdv_intel_lvds_set_property,
  432. .destroy = cdv_intel_lvds_destroy,
  433. };
  434. static void cdv_intel_lvds_enc_destroy(struct drm_encoder *encoder)
  435. {
  436. drm_encoder_cleanup(encoder);
  437. }
  438. static const struct drm_encoder_funcs cdv_intel_lvds_enc_funcs = {
  439. .destroy = cdv_intel_lvds_enc_destroy,
  440. };
  441. /*
  442. * Enumerate the child dev array parsed from VBT to check whether
  443. * the LVDS is present.
  444. * If it is present, return 1.
  445. * If it is not present, return false.
  446. * If no child dev is parsed from VBT, it assumes that the LVDS is present.
  447. */
  448. static bool lvds_is_present_in_vbt(struct drm_device *dev,
  449. u8 *i2c_pin)
  450. {
  451. struct drm_psb_private *dev_priv = dev->dev_private;
  452. int i;
  453. if (!dev_priv->child_dev_num)
  454. return true;
  455. for (i = 0; i < dev_priv->child_dev_num; i++) {
  456. struct child_device_config *child = dev_priv->child_dev + i;
  457. /* If the device type is not LFP, continue.
  458. * We have to check both the new identifiers as well as the
  459. * old for compatibility with some BIOSes.
  460. */
  461. if (child->device_type != DEVICE_TYPE_INT_LFP &&
  462. child->device_type != DEVICE_TYPE_LFP)
  463. continue;
  464. if (child->i2c_pin)
  465. *i2c_pin = child->i2c_pin;
  466. /* However, we cannot trust the BIOS writers to populate
  467. * the VBT correctly. Since LVDS requires additional
  468. * information from AIM blocks, a non-zero addin offset is
  469. * a good indicator that the LVDS is actually present.
  470. */
  471. if (child->addin_offset)
  472. return true;
  473. /* But even then some BIOS writers perform some black magic
  474. * and instantiate the device without reference to any
  475. * additional data. Trust that if the VBT was written into
  476. * the OpRegion then they have validated the LVDS's existence.
  477. */
  478. if (dev_priv->opregion.vbt)
  479. return true;
  480. }
  481. return false;
  482. }
  483. /**
  484. * cdv_intel_lvds_init - setup LVDS connectors on this device
  485. * @dev: drm device
  486. *
  487. * Create the connector, register the LVDS DDC bus, and try to figure out what
  488. * modes we can display on the LVDS panel (if present).
  489. */
  490. void cdv_intel_lvds_init(struct drm_device *dev,
  491. struct psb_intel_mode_device *mode_dev)
  492. {
  493. struct gma_encoder *gma_encoder;
  494. struct gma_connector *gma_connector;
  495. struct cdv_intel_lvds_priv *lvds_priv;
  496. struct drm_connector *connector;
  497. struct drm_encoder *encoder;
  498. struct drm_display_mode *scan;
  499. struct drm_crtc *crtc;
  500. struct drm_psb_private *dev_priv = dev->dev_private;
  501. u32 lvds;
  502. int pipe;
  503. u8 pin;
  504. pin = GMBUS_PORT_PANEL;
  505. if (!lvds_is_present_in_vbt(dev, &pin)) {
  506. DRM_DEBUG_KMS("LVDS is not present in VBT\n");
  507. return;
  508. }
  509. gma_encoder = kzalloc(sizeof(struct gma_encoder),
  510. GFP_KERNEL);
  511. if (!gma_encoder)
  512. return;
  513. gma_connector = kzalloc(sizeof(struct gma_connector),
  514. GFP_KERNEL);
  515. if (!gma_connector)
  516. goto failed_connector;
  517. lvds_priv = kzalloc(sizeof(struct cdv_intel_lvds_priv), GFP_KERNEL);
  518. if (!lvds_priv)
  519. goto failed_lvds_priv;
  520. gma_encoder->dev_priv = lvds_priv;
  521. connector = &gma_connector->base;
  522. gma_connector->save = cdv_intel_lvds_save;
  523. gma_connector->restore = cdv_intel_lvds_restore;
  524. encoder = &gma_encoder->base;
  525. drm_connector_init(dev, connector,
  526. &cdv_intel_lvds_connector_funcs,
  527. DRM_MODE_CONNECTOR_LVDS);
  528. drm_encoder_init(dev, encoder,
  529. &cdv_intel_lvds_enc_funcs,
  530. DRM_MODE_ENCODER_LVDS, NULL);
  531. gma_connector_attach_encoder(gma_connector, gma_encoder);
  532. gma_encoder->type = INTEL_OUTPUT_LVDS;
  533. drm_encoder_helper_add(encoder, &cdv_intel_lvds_helper_funcs);
  534. drm_connector_helper_add(connector,
  535. &cdv_intel_lvds_connector_helper_funcs);
  536. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  537. connector->interlace_allowed = false;
  538. connector->doublescan_allowed = false;
  539. /*Attach connector properties*/
  540. drm_object_attach_property(&connector->base,
  541. dev->mode_config.scaling_mode_property,
  542. DRM_MODE_SCALE_FULLSCREEN);
  543. drm_object_attach_property(&connector->base,
  544. dev_priv->backlight_property,
  545. BRIGHTNESS_MAX_LEVEL);
  546. /**
  547. * Set up I2C bus
  548. * FIXME: distroy i2c_bus when exit
  549. */
  550. gma_encoder->i2c_bus = psb_intel_i2c_create(dev,
  551. GPIOB,
  552. "LVDSBLC_B");
  553. if (!gma_encoder->i2c_bus) {
  554. dev_printk(KERN_ERR,
  555. &dev->pdev->dev, "I2C bus registration failed.\n");
  556. goto failed_blc_i2c;
  557. }
  558. gma_encoder->i2c_bus->slave_addr = 0x2C;
  559. dev_priv->lvds_i2c_bus = gma_encoder->i2c_bus;
  560. /*
  561. * LVDS discovery:
  562. * 1) check for EDID on DDC
  563. * 2) check for VBT data
  564. * 3) check to see if LVDS is already on
  565. * if none of the above, no panel
  566. * 4) make sure lid is open
  567. * if closed, act like it's not there for now
  568. */
  569. /* Set up the DDC bus. */
  570. gma_encoder->ddc_bus = psb_intel_i2c_create(dev,
  571. GPIOC,
  572. "LVDSDDC_C");
  573. if (!gma_encoder->ddc_bus) {
  574. dev_printk(KERN_ERR, &dev->pdev->dev,
  575. "DDC bus registration " "failed.\n");
  576. goto failed_ddc;
  577. }
  578. /*
  579. * Attempt to get the fixed panel mode from DDC. Assume that the
  580. * preferred mode is the right one.
  581. */
  582. mutex_lock(&dev->mode_config.mutex);
  583. psb_intel_ddc_get_modes(connector,
  584. &gma_encoder->ddc_bus->adapter);
  585. list_for_each_entry(scan, &connector->probed_modes, head) {
  586. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  587. mode_dev->panel_fixed_mode =
  588. drm_mode_duplicate(dev, scan);
  589. goto out; /* FIXME: check for quirks */
  590. }
  591. }
  592. /* Failed to get EDID, what about VBT? do we need this?*/
  593. if (dev_priv->lfp_lvds_vbt_mode) {
  594. mode_dev->panel_fixed_mode =
  595. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  596. if (mode_dev->panel_fixed_mode) {
  597. mode_dev->panel_fixed_mode->type |=
  598. DRM_MODE_TYPE_PREFERRED;
  599. goto out; /* FIXME: check for quirks */
  600. }
  601. }
  602. /*
  603. * If we didn't get EDID, try checking if the panel is already turned
  604. * on. If so, assume that whatever is currently programmed is the
  605. * correct mode.
  606. */
  607. lvds = REG_READ(LVDS);
  608. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  609. crtc = psb_intel_get_crtc_from_pipe(dev, pipe);
  610. if (crtc && (lvds & LVDS_PORT_EN)) {
  611. mode_dev->panel_fixed_mode =
  612. cdv_intel_crtc_mode_get(dev, crtc);
  613. if (mode_dev->panel_fixed_mode) {
  614. mode_dev->panel_fixed_mode->type |=
  615. DRM_MODE_TYPE_PREFERRED;
  616. goto out; /* FIXME: check for quirks */
  617. }
  618. }
  619. /* If we still don't have a mode after all that, give up. */
  620. if (!mode_dev->panel_fixed_mode) {
  621. DRM_DEBUG
  622. ("Found no modes on the lvds, ignoring the LVDS\n");
  623. goto failed_find;
  624. }
  625. /* setup PWM */
  626. {
  627. u32 pwm;
  628. pwm = REG_READ(BLC_PWM_CTL2);
  629. if (pipe == 1)
  630. pwm |= PWM_PIPE_B;
  631. else
  632. pwm &= ~PWM_PIPE_B;
  633. pwm |= PWM_ENABLE;
  634. REG_WRITE(BLC_PWM_CTL2, pwm);
  635. }
  636. out:
  637. mutex_unlock(&dev->mode_config.mutex);
  638. drm_connector_register(connector);
  639. return;
  640. failed_find:
  641. mutex_unlock(&dev->mode_config.mutex);
  642. pr_err("Failed find\n");
  643. psb_intel_i2c_destroy(gma_encoder->ddc_bus);
  644. failed_ddc:
  645. pr_err("Failed DDC\n");
  646. psb_intel_i2c_destroy(gma_encoder->i2c_bus);
  647. failed_blc_i2c:
  648. pr_err("Failed BLC\n");
  649. drm_encoder_cleanup(encoder);
  650. drm_connector_cleanup(connector);
  651. kfree(lvds_priv);
  652. failed_lvds_priv:
  653. kfree(gma_connector);
  654. failed_connector:
  655. kfree(gma_encoder);
  656. }