gpio-xra1403.c 6.3 KB

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  1. /*
  2. * GPIO driver for EXAR XRA1403 16-bit GPIO expander
  3. *
  4. * Copyright (c) 2017, General Electric Company
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/bitops.h>
  19. #include <linux/gpio/driver.h>
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/mutex.h>
  23. #include <linux/of_device.h>
  24. #include <linux/of_gpio.h>
  25. #include <linux/seq_file.h>
  26. #include <linux/spi/spi.h>
  27. #include <linux/regmap.h>
  28. /* XRA1403 registers */
  29. #define XRA_GSR 0x00 /* GPIO State */
  30. #define XRA_OCR 0x02 /* Output Control */
  31. #define XRA_PIR 0x04 /* Input Polarity Inversion */
  32. #define XRA_GCR 0x06 /* GPIO Configuration */
  33. #define XRA_PUR 0x08 /* Input Internal Pull-up Resistor Enable/Disable */
  34. #define XRA_IER 0x0A /* Input Interrupt Enable */
  35. #define XRA_TSCR 0x0C /* Output Three-State Control */
  36. #define XRA_ISR 0x0E /* Input Interrupt Status */
  37. #define XRA_REIR 0x10 /* Input Rising Edge Interrupt Enable */
  38. #define XRA_FEIR 0x12 /* Input Falling Edge Interrupt Enable */
  39. #define XRA_IFR 0x14 /* Input Filter Enable/Disable */
  40. struct xra1403 {
  41. struct gpio_chip chip;
  42. struct regmap *regmap;
  43. };
  44. static const struct regmap_config xra1403_regmap_cfg = {
  45. .reg_bits = 7,
  46. .pad_bits = 1,
  47. .val_bits = 8,
  48. .max_register = XRA_IFR | 0x01,
  49. };
  50. static unsigned int to_reg(unsigned int reg, unsigned int offset)
  51. {
  52. return reg + (offset > 7);
  53. }
  54. static int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
  55. {
  56. struct xra1403 *xra = gpiochip_get_data(chip);
  57. return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
  58. BIT(offset % 8), BIT(offset % 8));
  59. }
  60. static int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
  61. int value)
  62. {
  63. int ret;
  64. struct xra1403 *xra = gpiochip_get_data(chip);
  65. ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
  66. BIT(offset % 8), 0);
  67. if (ret)
  68. return ret;
  69. ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
  70. BIT(offset % 8), value ? BIT(offset % 8) : 0);
  71. return ret;
  72. }
  73. static int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
  74. {
  75. int ret;
  76. unsigned int val;
  77. struct xra1403 *xra = gpiochip_get_data(chip);
  78. ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
  79. if (ret)
  80. return ret;
  81. return !!(val & BIT(offset % 8));
  82. }
  83. static int xra1403_get(struct gpio_chip *chip, unsigned int offset)
  84. {
  85. int ret;
  86. unsigned int val;
  87. struct xra1403 *xra = gpiochip_get_data(chip);
  88. ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
  89. if (ret)
  90. return ret;
  91. return !!(val & BIT(offset % 8));
  92. }
  93. static void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
  94. {
  95. int ret;
  96. struct xra1403 *xra = gpiochip_get_data(chip);
  97. ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
  98. BIT(offset % 8), value ? BIT(offset % 8) : 0);
  99. if (ret)
  100. dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
  101. offset, ret);
  102. }
  103. #ifdef CONFIG_DEBUG_FS
  104. static void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
  105. {
  106. int reg;
  107. struct xra1403 *xra = gpiochip_get_data(chip);
  108. int value[xra1403_regmap_cfg.max_register];
  109. int i;
  110. unsigned int gcr;
  111. unsigned int gsr;
  112. seq_puts(s, "xra reg:");
  113. for (reg = 0; reg <= xra1403_regmap_cfg.max_register; reg++)
  114. seq_printf(s, " %2.2x", reg);
  115. seq_puts(s, "\n value:");
  116. for (reg = 0; reg < xra1403_regmap_cfg.max_register; reg++) {
  117. regmap_read(xra->regmap, reg, &value[reg]);
  118. seq_printf(s, " %2.2x", value[reg]);
  119. }
  120. seq_puts(s, "\n");
  121. gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
  122. gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
  123. for (i = 0; i < chip->ngpio; i++) {
  124. const char *label = gpiochip_is_requested(chip, i);
  125. if (!label)
  126. continue;
  127. seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
  128. chip->base + i, label,
  129. (gcr & BIT(i)) ? "in" : "out",
  130. (gsr & BIT(i)) ? "hi" : "lo");
  131. }
  132. }
  133. #else
  134. #define xra1403_dbg_show NULL
  135. #endif
  136. static int xra1403_probe(struct spi_device *spi)
  137. {
  138. struct xra1403 *xra;
  139. struct gpio_desc *reset_gpio;
  140. int ret;
  141. xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
  142. if (!xra)
  143. return -ENOMEM;
  144. /* bring the chip out of reset if reset pin is provided*/
  145. reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
  146. if (IS_ERR(reset_gpio))
  147. dev_warn(&spi->dev, "Could not get reset-gpios\n");
  148. xra->chip.direction_input = xra1403_direction_input;
  149. xra->chip.direction_output = xra1403_direction_output;
  150. xra->chip.get_direction = xra1403_get_direction;
  151. xra->chip.get = xra1403_get;
  152. xra->chip.set = xra1403_set;
  153. xra->chip.dbg_show = xra1403_dbg_show;
  154. xra->chip.ngpio = 16;
  155. xra->chip.label = "xra1403";
  156. xra->chip.base = -1;
  157. xra->chip.can_sleep = true;
  158. xra->chip.parent = &spi->dev;
  159. xra->chip.owner = THIS_MODULE;
  160. xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
  161. if (IS_ERR(xra->regmap)) {
  162. ret = PTR_ERR(xra->regmap);
  163. dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
  164. return ret;
  165. }
  166. ret = devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
  167. if (ret < 0) {
  168. dev_err(&spi->dev, "Unable to register gpiochip\n");
  169. return ret;
  170. }
  171. spi_set_drvdata(spi, xra);
  172. return 0;
  173. }
  174. static const struct spi_device_id xra1403_ids[] = {
  175. { "xra1403" },
  176. {},
  177. };
  178. MODULE_DEVICE_TABLE(spi, xra1403_ids);
  179. static const struct of_device_id xra1403_spi_of_match[] = {
  180. { .compatible = "exar,xra1403" },
  181. {},
  182. };
  183. MODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
  184. static struct spi_driver xra1403_driver = {
  185. .probe = xra1403_probe,
  186. .id_table = xra1403_ids,
  187. .driver = {
  188. .name = "xra1403",
  189. .of_match_table = of_match_ptr(xra1403_spi_of_match),
  190. },
  191. };
  192. module_spi_driver(xra1403_driver);
  193. MODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
  194. MODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
  195. MODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
  196. MODULE_LICENSE("GPL v2");