powernv-cpufreq.c 29 KB

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  1. /*
  2. * POWERNV cpufreq driver for the IBM POWER processors
  3. *
  4. * (C) Copyright IBM 2014
  5. *
  6. * Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #define pr_fmt(fmt) "powernv-cpufreq: " fmt
  20. #include <linux/kernel.h>
  21. #include <linux/sysfs.h>
  22. #include <linux/cpumask.h>
  23. #include <linux/module.h>
  24. #include <linux/cpufreq.h>
  25. #include <linux/smp.h>
  26. #include <linux/of.h>
  27. #include <linux/reboot.h>
  28. #include <linux/slab.h>
  29. #include <linux/cpu.h>
  30. #include <trace/events/power.h>
  31. #include <asm/cputhreads.h>
  32. #include <asm/firmware.h>
  33. #include <asm/reg.h>
  34. #include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
  35. #include <asm/opal.h>
  36. #include <linux/timer.h>
  37. #define POWERNV_MAX_PSTATES 256
  38. #define PMSR_PSAFE_ENABLE (1UL << 30)
  39. #define PMSR_SPR_EM_DISABLE (1UL << 31)
  40. #define PMSR_MAX(x) ((x >> 32) & 0xFF)
  41. #define LPSTATE_SHIFT 48
  42. #define GPSTATE_SHIFT 56
  43. #define GET_LPSTATE(x) (((x) >> LPSTATE_SHIFT) & 0xFF)
  44. #define GET_GPSTATE(x) (((x) >> GPSTATE_SHIFT) & 0xFF)
  45. #define MAX_RAMP_DOWN_TIME 5120
  46. /*
  47. * On an idle system we want the global pstate to ramp-down from max value to
  48. * min over a span of ~5 secs. Also we want it to initially ramp-down slowly and
  49. * then ramp-down rapidly later on.
  50. *
  51. * This gives a percentage rampdown for time elapsed in milliseconds.
  52. * ramp_down_percentage = ((ms * ms) >> 18)
  53. * ~= 3.8 * (sec * sec)
  54. *
  55. * At 0 ms ramp_down_percent = 0
  56. * At 5120 ms ramp_down_percent = 100
  57. */
  58. #define ramp_down_percent(time) ((time * time) >> 18)
  59. /* Interval after which the timer is queued to bring down global pstate */
  60. #define GPSTATE_TIMER_INTERVAL 2000
  61. /**
  62. * struct global_pstate_info - Per policy data structure to maintain history of
  63. * global pstates
  64. * @highest_lpstate_idx: The local pstate index from which we are
  65. * ramping down
  66. * @elapsed_time: Time in ms spent in ramping down from
  67. * highest_lpstate_idx
  68. * @last_sampled_time: Time from boot in ms when global pstates were
  69. * last set
  70. * @last_lpstate_idx, Last set value of local pstate and global
  71. * last_gpstate_idx pstate in terms of cpufreq table index
  72. * @timer: Is used for ramping down if cpu goes idle for
  73. * a long time with global pstate held high
  74. * @gpstate_lock: A spinlock to maintain synchronization between
  75. * routines called by the timer handler and
  76. * governer's target_index calls
  77. */
  78. struct global_pstate_info {
  79. int highest_lpstate_idx;
  80. unsigned int elapsed_time;
  81. unsigned int last_sampled_time;
  82. int last_lpstate_idx;
  83. int last_gpstate_idx;
  84. spinlock_t gpstate_lock;
  85. struct timer_list timer;
  86. };
  87. static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
  88. static bool rebooting, throttled, occ_reset;
  89. static const char * const throttle_reason[] = {
  90. "No throttling",
  91. "Power Cap",
  92. "Processor Over Temperature",
  93. "Power Supply Failure",
  94. "Over Current",
  95. "OCC Reset"
  96. };
  97. enum throttle_reason_type {
  98. NO_THROTTLE = 0,
  99. POWERCAP,
  100. CPU_OVERTEMP,
  101. POWER_SUPPLY_FAILURE,
  102. OVERCURRENT,
  103. OCC_RESET_THROTTLE,
  104. OCC_MAX_REASON
  105. };
  106. static struct chip {
  107. unsigned int id;
  108. bool throttled;
  109. bool restore;
  110. u8 throttle_reason;
  111. cpumask_t mask;
  112. struct work_struct throttle;
  113. int throttle_turbo;
  114. int throttle_sub_turbo;
  115. int reason[OCC_MAX_REASON];
  116. } *chips;
  117. static int nr_chips;
  118. static DEFINE_PER_CPU(struct chip *, chip_info);
  119. /*
  120. * Note:
  121. * The set of pstates consists of contiguous integers.
  122. * powernv_pstate_info stores the index of the frequency table for
  123. * max, min and nominal frequencies. It also stores number of
  124. * available frequencies.
  125. *
  126. * powernv_pstate_info.nominal indicates the index to the highest
  127. * non-turbo frequency.
  128. */
  129. static struct powernv_pstate_info {
  130. unsigned int min;
  131. unsigned int max;
  132. unsigned int nominal;
  133. unsigned int nr_pstates;
  134. bool wof_enabled;
  135. } powernv_pstate_info;
  136. /* Use following macros for conversions between pstate_id and index */
  137. static inline int idx_to_pstate(unsigned int i)
  138. {
  139. if (unlikely(i >= powernv_pstate_info.nr_pstates)) {
  140. pr_warn_once("index %u is out of bound\n", i);
  141. return powernv_freqs[powernv_pstate_info.nominal].driver_data;
  142. }
  143. return powernv_freqs[i].driver_data;
  144. }
  145. static inline unsigned int pstate_to_idx(int pstate)
  146. {
  147. int min = powernv_freqs[powernv_pstate_info.min].driver_data;
  148. int max = powernv_freqs[powernv_pstate_info.max].driver_data;
  149. if (min > 0) {
  150. if (unlikely((pstate < max) || (pstate > min))) {
  151. pr_warn_once("pstate %d is out of bound\n", pstate);
  152. return powernv_pstate_info.nominal;
  153. }
  154. } else {
  155. if (unlikely((pstate > max) || (pstate < min))) {
  156. pr_warn_once("pstate %d is out of bound\n", pstate);
  157. return powernv_pstate_info.nominal;
  158. }
  159. }
  160. /*
  161. * abs() is deliberately used so that is works with
  162. * both monotonically increasing and decreasing
  163. * pstate values
  164. */
  165. return abs(pstate - idx_to_pstate(powernv_pstate_info.max));
  166. }
  167. static inline void reset_gpstates(struct cpufreq_policy *policy)
  168. {
  169. struct global_pstate_info *gpstates = policy->driver_data;
  170. gpstates->highest_lpstate_idx = 0;
  171. gpstates->elapsed_time = 0;
  172. gpstates->last_sampled_time = 0;
  173. gpstates->last_lpstate_idx = 0;
  174. gpstates->last_gpstate_idx = 0;
  175. }
  176. /*
  177. * Initialize the freq table based on data obtained
  178. * from the firmware passed via device-tree
  179. */
  180. static int init_powernv_pstates(void)
  181. {
  182. struct device_node *power_mgt;
  183. int i, nr_pstates = 0;
  184. const __be32 *pstate_ids, *pstate_freqs;
  185. u32 len_ids, len_freqs;
  186. u32 pstate_min, pstate_max, pstate_nominal;
  187. u32 pstate_turbo, pstate_ultra_turbo;
  188. power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
  189. if (!power_mgt) {
  190. pr_warn("power-mgt node not found\n");
  191. return -ENODEV;
  192. }
  193. if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
  194. pr_warn("ibm,pstate-min node not found\n");
  195. return -ENODEV;
  196. }
  197. if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
  198. pr_warn("ibm,pstate-max node not found\n");
  199. return -ENODEV;
  200. }
  201. if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
  202. &pstate_nominal)) {
  203. pr_warn("ibm,pstate-nominal not found\n");
  204. return -ENODEV;
  205. }
  206. if (of_property_read_u32(power_mgt, "ibm,pstate-ultra-turbo",
  207. &pstate_ultra_turbo)) {
  208. powernv_pstate_info.wof_enabled = false;
  209. goto next;
  210. }
  211. if (of_property_read_u32(power_mgt, "ibm,pstate-turbo",
  212. &pstate_turbo)) {
  213. powernv_pstate_info.wof_enabled = false;
  214. goto next;
  215. }
  216. if (pstate_turbo == pstate_ultra_turbo)
  217. powernv_pstate_info.wof_enabled = false;
  218. else
  219. powernv_pstate_info.wof_enabled = true;
  220. next:
  221. pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min,
  222. pstate_nominal, pstate_max);
  223. pr_info("Workload Optimized Frequency is %s in the platform\n",
  224. (powernv_pstate_info.wof_enabled) ? "enabled" : "disabled");
  225. pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
  226. if (!pstate_ids) {
  227. pr_warn("ibm,pstate-ids not found\n");
  228. return -ENODEV;
  229. }
  230. pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
  231. &len_freqs);
  232. if (!pstate_freqs) {
  233. pr_warn("ibm,pstate-frequencies-mhz not found\n");
  234. return -ENODEV;
  235. }
  236. if (len_ids != len_freqs) {
  237. pr_warn("Entries in ibm,pstate-ids and "
  238. "ibm,pstate-frequencies-mhz does not match\n");
  239. }
  240. nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
  241. if (!nr_pstates) {
  242. pr_warn("No PStates found\n");
  243. return -ENODEV;
  244. }
  245. powernv_pstate_info.nr_pstates = nr_pstates;
  246. pr_debug("NR PStates %d\n", nr_pstates);
  247. for (i = 0; i < nr_pstates; i++) {
  248. u32 id = be32_to_cpu(pstate_ids[i]);
  249. u32 freq = be32_to_cpu(pstate_freqs[i]);
  250. pr_debug("PState id %d freq %d MHz\n", id, freq);
  251. powernv_freqs[i].frequency = freq * 1000; /* kHz */
  252. powernv_freqs[i].driver_data = id;
  253. if (id == pstate_max)
  254. powernv_pstate_info.max = i;
  255. else if (id == pstate_nominal)
  256. powernv_pstate_info.nominal = i;
  257. else if (id == pstate_min)
  258. powernv_pstate_info.min = i;
  259. if (powernv_pstate_info.wof_enabled && id == pstate_turbo) {
  260. int j;
  261. for (j = i - 1; j >= (int)powernv_pstate_info.max; j--)
  262. powernv_freqs[j].flags = CPUFREQ_BOOST_FREQ;
  263. }
  264. }
  265. /* End of list marker entry */
  266. powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
  267. return 0;
  268. }
  269. /* Returns the CPU frequency corresponding to the pstate_id. */
  270. static unsigned int pstate_id_to_freq(int pstate_id)
  271. {
  272. int i;
  273. i = pstate_to_idx(pstate_id);
  274. if (i >= powernv_pstate_info.nr_pstates || i < 0) {
  275. pr_warn("PState id %d outside of PState table, "
  276. "reporting nominal id %d instead\n",
  277. pstate_id, idx_to_pstate(powernv_pstate_info.nominal));
  278. i = powernv_pstate_info.nominal;
  279. }
  280. return powernv_freqs[i].frequency;
  281. }
  282. /*
  283. * cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
  284. * the firmware
  285. */
  286. static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
  287. char *buf)
  288. {
  289. return sprintf(buf, "%u\n",
  290. powernv_freqs[powernv_pstate_info.nominal].frequency);
  291. }
  292. struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
  293. __ATTR_RO(cpuinfo_nominal_freq);
  294. #define SCALING_BOOST_FREQS_ATTR_INDEX 2
  295. static struct freq_attr *powernv_cpu_freq_attr[] = {
  296. &cpufreq_freq_attr_scaling_available_freqs,
  297. &cpufreq_freq_attr_cpuinfo_nominal_freq,
  298. &cpufreq_freq_attr_scaling_boost_freqs,
  299. NULL,
  300. };
  301. #define throttle_attr(name, member) \
  302. static ssize_t name##_show(struct cpufreq_policy *policy, char *buf) \
  303. { \
  304. struct chip *chip = per_cpu(chip_info, policy->cpu); \
  305. \
  306. return sprintf(buf, "%u\n", chip->member); \
  307. } \
  308. \
  309. static struct freq_attr throttle_attr_##name = __ATTR_RO(name) \
  310. throttle_attr(unthrottle, reason[NO_THROTTLE]);
  311. throttle_attr(powercap, reason[POWERCAP]);
  312. throttle_attr(overtemp, reason[CPU_OVERTEMP]);
  313. throttle_attr(supply_fault, reason[POWER_SUPPLY_FAILURE]);
  314. throttle_attr(overcurrent, reason[OVERCURRENT]);
  315. throttle_attr(occ_reset, reason[OCC_RESET_THROTTLE]);
  316. throttle_attr(turbo_stat, throttle_turbo);
  317. throttle_attr(sub_turbo_stat, throttle_sub_turbo);
  318. static struct attribute *throttle_attrs[] = {
  319. &throttle_attr_unthrottle.attr,
  320. &throttle_attr_powercap.attr,
  321. &throttle_attr_overtemp.attr,
  322. &throttle_attr_supply_fault.attr,
  323. &throttle_attr_overcurrent.attr,
  324. &throttle_attr_occ_reset.attr,
  325. &throttle_attr_turbo_stat.attr,
  326. &throttle_attr_sub_turbo_stat.attr,
  327. NULL,
  328. };
  329. static const struct attribute_group throttle_attr_grp = {
  330. .name = "throttle_stats",
  331. .attrs = throttle_attrs,
  332. };
  333. /* Helper routines */
  334. /* Access helpers to power mgt SPR */
  335. static inline unsigned long get_pmspr(unsigned long sprn)
  336. {
  337. switch (sprn) {
  338. case SPRN_PMCR:
  339. return mfspr(SPRN_PMCR);
  340. case SPRN_PMICR:
  341. return mfspr(SPRN_PMICR);
  342. case SPRN_PMSR:
  343. return mfspr(SPRN_PMSR);
  344. }
  345. BUG();
  346. }
  347. static inline void set_pmspr(unsigned long sprn, unsigned long val)
  348. {
  349. switch (sprn) {
  350. case SPRN_PMCR:
  351. mtspr(SPRN_PMCR, val);
  352. return;
  353. case SPRN_PMICR:
  354. mtspr(SPRN_PMICR, val);
  355. return;
  356. }
  357. BUG();
  358. }
  359. /*
  360. * Use objects of this type to query/update
  361. * pstates on a remote CPU via smp_call_function.
  362. */
  363. struct powernv_smp_call_data {
  364. unsigned int freq;
  365. int pstate_id;
  366. int gpstate_id;
  367. };
  368. /*
  369. * powernv_read_cpu_freq: Reads the current frequency on this CPU.
  370. *
  371. * Called via smp_call_function.
  372. *
  373. * Note: The caller of the smp_call_function should pass an argument of
  374. * the type 'struct powernv_smp_call_data *' along with this function.
  375. *
  376. * The current frequency on this CPU will be returned via
  377. * ((struct powernv_smp_call_data *)arg)->freq;
  378. */
  379. static void powernv_read_cpu_freq(void *arg)
  380. {
  381. unsigned long pmspr_val;
  382. s8 local_pstate_id;
  383. struct powernv_smp_call_data *freq_data = arg;
  384. pmspr_val = get_pmspr(SPRN_PMSR);
  385. /*
  386. * The local pstate id corresponds bits 48..55 in the PMSR.
  387. * Note: Watch out for the sign!
  388. */
  389. local_pstate_id = (pmspr_val >> 48) & 0xFF;
  390. freq_data->pstate_id = local_pstate_id;
  391. freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
  392. pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n",
  393. raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
  394. freq_data->freq);
  395. }
  396. /*
  397. * powernv_cpufreq_get: Returns the CPU frequency as reported by the
  398. * firmware for CPU 'cpu'. This value is reported through the sysfs
  399. * file cpuinfo_cur_freq.
  400. */
  401. static unsigned int powernv_cpufreq_get(unsigned int cpu)
  402. {
  403. struct powernv_smp_call_data freq_data;
  404. smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
  405. &freq_data, 1);
  406. return freq_data.freq;
  407. }
  408. /*
  409. * set_pstate: Sets the pstate on this CPU.
  410. *
  411. * This is called via an smp_call_function.
  412. *
  413. * The caller must ensure that freq_data is of the type
  414. * (struct powernv_smp_call_data *) and the pstate_id which needs to be set
  415. * on this CPU should be present in freq_data->pstate_id.
  416. */
  417. static void set_pstate(void *data)
  418. {
  419. unsigned long val;
  420. struct powernv_smp_call_data *freq_data = data;
  421. unsigned long pstate_ul = freq_data->pstate_id;
  422. unsigned long gpstate_ul = freq_data->gpstate_id;
  423. val = get_pmspr(SPRN_PMCR);
  424. val = val & 0x0000FFFFFFFFFFFFULL;
  425. pstate_ul = pstate_ul & 0xFF;
  426. gpstate_ul = gpstate_ul & 0xFF;
  427. /* Set both global(bits 56..63) and local(bits 48..55) PStates */
  428. val = val | (gpstate_ul << 56) | (pstate_ul << 48);
  429. pr_debug("Setting cpu %d pmcr to %016lX\n",
  430. raw_smp_processor_id(), val);
  431. set_pmspr(SPRN_PMCR, val);
  432. }
  433. /*
  434. * get_nominal_index: Returns the index corresponding to the nominal
  435. * pstate in the cpufreq table
  436. */
  437. static inline unsigned int get_nominal_index(void)
  438. {
  439. return powernv_pstate_info.nominal;
  440. }
  441. static void powernv_cpufreq_throttle_check(void *data)
  442. {
  443. struct chip *chip;
  444. unsigned int cpu = smp_processor_id();
  445. unsigned long pmsr;
  446. int pmsr_pmax;
  447. unsigned int pmsr_pmax_idx;
  448. pmsr = get_pmspr(SPRN_PMSR);
  449. chip = this_cpu_read(chip_info);
  450. /* Check for Pmax Capping */
  451. pmsr_pmax = (s8)PMSR_MAX(pmsr);
  452. pmsr_pmax_idx = pstate_to_idx(pmsr_pmax);
  453. if (pmsr_pmax_idx != powernv_pstate_info.max) {
  454. if (chip->throttled)
  455. goto next;
  456. chip->throttled = true;
  457. if (pmsr_pmax_idx > powernv_pstate_info.nominal) {
  458. pr_warn_once("CPU %d on Chip %u has Pmax(%d) reduced below nominal frequency(%d)\n",
  459. cpu, chip->id, pmsr_pmax,
  460. idx_to_pstate(powernv_pstate_info.nominal));
  461. chip->throttle_sub_turbo++;
  462. } else {
  463. chip->throttle_turbo++;
  464. }
  465. trace_powernv_throttle(chip->id,
  466. throttle_reason[chip->throttle_reason],
  467. pmsr_pmax);
  468. } else if (chip->throttled) {
  469. chip->throttled = false;
  470. trace_powernv_throttle(chip->id,
  471. throttle_reason[chip->throttle_reason],
  472. pmsr_pmax);
  473. }
  474. /* Check if Psafe_mode_active is set in PMSR. */
  475. next:
  476. if (pmsr & PMSR_PSAFE_ENABLE) {
  477. throttled = true;
  478. pr_info("Pstate set to safe frequency\n");
  479. }
  480. /* Check if SPR_EM_DISABLE is set in PMSR */
  481. if (pmsr & PMSR_SPR_EM_DISABLE) {
  482. throttled = true;
  483. pr_info("Frequency Control disabled from OS\n");
  484. }
  485. if (throttled) {
  486. pr_info("PMSR = %16lx\n", pmsr);
  487. pr_warn("CPU Frequency could be throttled\n");
  488. }
  489. }
  490. /**
  491. * calc_global_pstate - Calculate global pstate
  492. * @elapsed_time: Elapsed time in milliseconds
  493. * @local_pstate_idx: New local pstate
  494. * @highest_lpstate_idx: pstate from which its ramping down
  495. *
  496. * Finds the appropriate global pstate based on the pstate from which its
  497. * ramping down and the time elapsed in ramping down. It follows a quadratic
  498. * equation which ensures that it reaches ramping down to pmin in 5sec.
  499. */
  500. static inline int calc_global_pstate(unsigned int elapsed_time,
  501. int highest_lpstate_idx,
  502. int local_pstate_idx)
  503. {
  504. int index_diff;
  505. /*
  506. * Using ramp_down_percent we get the percentage of rampdown
  507. * that we are expecting to be dropping. Difference between
  508. * highest_lpstate_idx and powernv_pstate_info.min will give a absolute
  509. * number of how many pstates we will drop eventually by the end of
  510. * 5 seconds, then just scale it get the number pstates to be dropped.
  511. */
  512. index_diff = ((int)ramp_down_percent(elapsed_time) *
  513. (powernv_pstate_info.min - highest_lpstate_idx)) / 100;
  514. /* Ensure that global pstate is >= to local pstate */
  515. if (highest_lpstate_idx + index_diff >= local_pstate_idx)
  516. return local_pstate_idx;
  517. else
  518. return highest_lpstate_idx + index_diff;
  519. }
  520. static inline void queue_gpstate_timer(struct global_pstate_info *gpstates)
  521. {
  522. unsigned int timer_interval;
  523. /*
  524. * Setting up timer to fire after GPSTATE_TIMER_INTERVAL ms, But
  525. * if it exceeds MAX_RAMP_DOWN_TIME ms for ramp down time.
  526. * Set timer such that it fires exactly at MAX_RAMP_DOWN_TIME
  527. * seconds of ramp down time.
  528. */
  529. if ((gpstates->elapsed_time + GPSTATE_TIMER_INTERVAL)
  530. > MAX_RAMP_DOWN_TIME)
  531. timer_interval = MAX_RAMP_DOWN_TIME - gpstates->elapsed_time;
  532. else
  533. timer_interval = GPSTATE_TIMER_INTERVAL;
  534. mod_timer(&gpstates->timer, jiffies + msecs_to_jiffies(timer_interval));
  535. }
  536. /**
  537. * gpstate_timer_handler
  538. *
  539. * @data: pointer to cpufreq_policy on which timer was queued
  540. *
  541. * This handler brings down the global pstate closer to the local pstate
  542. * according quadratic equation. Queues a new timer if it is still not equal
  543. * to local pstate
  544. */
  545. void gpstate_timer_handler(unsigned long data)
  546. {
  547. struct cpufreq_policy *policy = (struct cpufreq_policy *)data;
  548. struct global_pstate_info *gpstates = policy->driver_data;
  549. int gpstate_idx, lpstate_idx;
  550. unsigned long val;
  551. unsigned int time_diff = jiffies_to_msecs(jiffies)
  552. - gpstates->last_sampled_time;
  553. struct powernv_smp_call_data freq_data;
  554. if (!spin_trylock(&gpstates->gpstate_lock))
  555. return;
  556. /*
  557. * If PMCR was last updated was using fast_swtich then
  558. * We may have wrong in gpstate->last_lpstate_idx
  559. * value. Hence, read from PMCR to get correct data.
  560. */
  561. val = get_pmspr(SPRN_PMCR);
  562. freq_data.gpstate_id = (s8)GET_GPSTATE(val);
  563. freq_data.pstate_id = (s8)GET_LPSTATE(val);
  564. if (freq_data.gpstate_id == freq_data.pstate_id) {
  565. reset_gpstates(policy);
  566. spin_unlock(&gpstates->gpstate_lock);
  567. return;
  568. }
  569. gpstates->last_sampled_time += time_diff;
  570. gpstates->elapsed_time += time_diff;
  571. if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
  572. gpstate_idx = pstate_to_idx(freq_data.pstate_id);
  573. lpstate_idx = gpstate_idx;
  574. reset_gpstates(policy);
  575. gpstates->highest_lpstate_idx = gpstate_idx;
  576. } else {
  577. lpstate_idx = pstate_to_idx(freq_data.pstate_id);
  578. gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
  579. gpstates->highest_lpstate_idx,
  580. lpstate_idx);
  581. }
  582. freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
  583. gpstates->last_gpstate_idx = gpstate_idx;
  584. gpstates->last_lpstate_idx = lpstate_idx;
  585. /*
  586. * If local pstate is equal to global pstate, rampdown is over
  587. * So timer is not required to be queued.
  588. */
  589. if (gpstate_idx != gpstates->last_lpstate_idx)
  590. queue_gpstate_timer(gpstates);
  591. spin_unlock(&gpstates->gpstate_lock);
  592. /* Timer may get migrated to a different cpu on cpu hot unplug */
  593. smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
  594. }
  595. /*
  596. * powernv_cpufreq_target_index: Sets the frequency corresponding to
  597. * the cpufreq table entry indexed by new_index on the cpus in the
  598. * mask policy->cpus
  599. */
  600. static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
  601. unsigned int new_index)
  602. {
  603. struct powernv_smp_call_data freq_data;
  604. unsigned int cur_msec, gpstate_idx;
  605. struct global_pstate_info *gpstates = policy->driver_data;
  606. if (unlikely(rebooting) && new_index != get_nominal_index())
  607. return 0;
  608. if (!throttled) {
  609. /* we don't want to be preempted while
  610. * checking if the CPU frequency has been throttled
  611. */
  612. preempt_disable();
  613. powernv_cpufreq_throttle_check(NULL);
  614. preempt_enable();
  615. }
  616. cur_msec = jiffies_to_msecs(get_jiffies_64());
  617. spin_lock(&gpstates->gpstate_lock);
  618. freq_data.pstate_id = idx_to_pstate(new_index);
  619. if (!gpstates->last_sampled_time) {
  620. gpstate_idx = new_index;
  621. gpstates->highest_lpstate_idx = new_index;
  622. goto gpstates_done;
  623. }
  624. if (gpstates->last_gpstate_idx < new_index) {
  625. gpstates->elapsed_time += cur_msec -
  626. gpstates->last_sampled_time;
  627. /*
  628. * If its has been ramping down for more than MAX_RAMP_DOWN_TIME
  629. * we should be resetting all global pstate related data. Set it
  630. * equal to local pstate to start fresh.
  631. */
  632. if (gpstates->elapsed_time > MAX_RAMP_DOWN_TIME) {
  633. reset_gpstates(policy);
  634. gpstates->highest_lpstate_idx = new_index;
  635. gpstate_idx = new_index;
  636. } else {
  637. /* Elaspsed_time is less than 5 seconds, continue to rampdown */
  638. gpstate_idx = calc_global_pstate(gpstates->elapsed_time,
  639. gpstates->highest_lpstate_idx,
  640. new_index);
  641. }
  642. } else {
  643. reset_gpstates(policy);
  644. gpstates->highest_lpstate_idx = new_index;
  645. gpstate_idx = new_index;
  646. }
  647. /*
  648. * If local pstate is equal to global pstate, rampdown is over
  649. * So timer is not required to be queued.
  650. */
  651. if (gpstate_idx != new_index)
  652. queue_gpstate_timer(gpstates);
  653. else
  654. del_timer_sync(&gpstates->timer);
  655. gpstates_done:
  656. freq_data.gpstate_id = idx_to_pstate(gpstate_idx);
  657. gpstates->last_sampled_time = cur_msec;
  658. gpstates->last_gpstate_idx = gpstate_idx;
  659. gpstates->last_lpstate_idx = new_index;
  660. spin_unlock(&gpstates->gpstate_lock);
  661. /*
  662. * Use smp_call_function to send IPI and execute the
  663. * mtspr on target CPU. We could do that without IPI
  664. * if current CPU is within policy->cpus (core)
  665. */
  666. smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
  667. return 0;
  668. }
  669. static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
  670. {
  671. int base, i, ret;
  672. struct kernfs_node *kn;
  673. struct global_pstate_info *gpstates;
  674. base = cpu_first_thread_sibling(policy->cpu);
  675. for (i = 0; i < threads_per_core; i++)
  676. cpumask_set_cpu(base + i, policy->cpus);
  677. kn = kernfs_find_and_get(policy->kobj.sd, throttle_attr_grp.name);
  678. if (!kn) {
  679. int ret;
  680. ret = sysfs_create_group(&policy->kobj, &throttle_attr_grp);
  681. if (ret) {
  682. pr_info("Failed to create throttle stats directory for cpu %d\n",
  683. policy->cpu);
  684. return ret;
  685. }
  686. } else {
  687. kernfs_put(kn);
  688. }
  689. gpstates = kzalloc(sizeof(*gpstates), GFP_KERNEL);
  690. if (!gpstates)
  691. return -ENOMEM;
  692. policy->driver_data = gpstates;
  693. /* initialize timer */
  694. init_timer_pinned_deferrable(&gpstates->timer);
  695. gpstates->timer.data = (unsigned long)policy;
  696. gpstates->timer.function = gpstate_timer_handler;
  697. gpstates->timer.expires = jiffies +
  698. msecs_to_jiffies(GPSTATE_TIMER_INTERVAL);
  699. spin_lock_init(&gpstates->gpstate_lock);
  700. ret = cpufreq_table_validate_and_show(policy, powernv_freqs);
  701. if (ret < 0) {
  702. kfree(policy->driver_data);
  703. return ret;
  704. }
  705. policy->fast_switch_possible = true;
  706. return ret;
  707. }
  708. static int powernv_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  709. {
  710. /* timer is deleted in cpufreq_cpu_stop() */
  711. kfree(policy->driver_data);
  712. return 0;
  713. }
  714. static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
  715. unsigned long action, void *unused)
  716. {
  717. int cpu;
  718. struct cpufreq_policy cpu_policy;
  719. rebooting = true;
  720. for_each_online_cpu(cpu) {
  721. cpufreq_get_policy(&cpu_policy, cpu);
  722. powernv_cpufreq_target_index(&cpu_policy, get_nominal_index());
  723. }
  724. return NOTIFY_DONE;
  725. }
  726. static struct notifier_block powernv_cpufreq_reboot_nb = {
  727. .notifier_call = powernv_cpufreq_reboot_notifier,
  728. };
  729. void powernv_cpufreq_work_fn(struct work_struct *work)
  730. {
  731. struct chip *chip = container_of(work, struct chip, throttle);
  732. unsigned int cpu;
  733. cpumask_t mask;
  734. get_online_cpus();
  735. cpumask_and(&mask, &chip->mask, cpu_online_mask);
  736. smp_call_function_any(&mask,
  737. powernv_cpufreq_throttle_check, NULL, 0);
  738. if (!chip->restore)
  739. goto out;
  740. chip->restore = false;
  741. for_each_cpu(cpu, &mask) {
  742. int index;
  743. struct cpufreq_policy policy;
  744. cpufreq_get_policy(&policy, cpu);
  745. index = cpufreq_table_find_index_c(&policy, policy.cur);
  746. powernv_cpufreq_target_index(&policy, index);
  747. cpumask_andnot(&mask, &mask, policy.cpus);
  748. }
  749. out:
  750. put_online_cpus();
  751. }
  752. static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
  753. unsigned long msg_type, void *_msg)
  754. {
  755. struct opal_msg *msg = _msg;
  756. struct opal_occ_msg omsg;
  757. int i;
  758. if (msg_type != OPAL_MSG_OCC)
  759. return 0;
  760. omsg.type = be64_to_cpu(msg->params[0]);
  761. switch (omsg.type) {
  762. case OCC_RESET:
  763. occ_reset = true;
  764. pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
  765. /*
  766. * powernv_cpufreq_throttle_check() is called in
  767. * target() callback which can detect the throttle state
  768. * for governors like ondemand.
  769. * But static governors will not call target() often thus
  770. * report throttling here.
  771. */
  772. if (!throttled) {
  773. throttled = true;
  774. pr_warn("CPU frequency is throttled for duration\n");
  775. }
  776. break;
  777. case OCC_LOAD:
  778. pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
  779. break;
  780. case OCC_THROTTLE:
  781. omsg.chip = be64_to_cpu(msg->params[1]);
  782. omsg.throttle_status = be64_to_cpu(msg->params[2]);
  783. if (occ_reset) {
  784. occ_reset = false;
  785. throttled = false;
  786. pr_info("OCC Active, CPU frequency is no longer throttled\n");
  787. for (i = 0; i < nr_chips; i++) {
  788. chips[i].restore = true;
  789. schedule_work(&chips[i].throttle);
  790. }
  791. return 0;
  792. }
  793. for (i = 0; i < nr_chips; i++)
  794. if (chips[i].id == omsg.chip)
  795. break;
  796. if (omsg.throttle_status >= 0 &&
  797. omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS) {
  798. chips[i].throttle_reason = omsg.throttle_status;
  799. chips[i].reason[omsg.throttle_status]++;
  800. }
  801. if (!omsg.throttle_status)
  802. chips[i].restore = true;
  803. schedule_work(&chips[i].throttle);
  804. }
  805. return 0;
  806. }
  807. static struct notifier_block powernv_cpufreq_opal_nb = {
  808. .notifier_call = powernv_cpufreq_occ_msg,
  809. .next = NULL,
  810. .priority = 0,
  811. };
  812. static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy)
  813. {
  814. struct powernv_smp_call_data freq_data;
  815. struct global_pstate_info *gpstates = policy->driver_data;
  816. freq_data.pstate_id = idx_to_pstate(powernv_pstate_info.min);
  817. freq_data.gpstate_id = idx_to_pstate(powernv_pstate_info.min);
  818. smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
  819. del_timer_sync(&gpstates->timer);
  820. }
  821. static unsigned int powernv_fast_switch(struct cpufreq_policy *policy,
  822. unsigned int target_freq)
  823. {
  824. int index;
  825. struct powernv_smp_call_data freq_data;
  826. index = cpufreq_table_find_index_dl(policy, target_freq);
  827. freq_data.pstate_id = powernv_freqs[index].driver_data;
  828. freq_data.gpstate_id = powernv_freqs[index].driver_data;
  829. set_pstate(&freq_data);
  830. return powernv_freqs[index].frequency;
  831. }
  832. static struct cpufreq_driver powernv_cpufreq_driver = {
  833. .name = "powernv-cpufreq",
  834. .flags = CPUFREQ_CONST_LOOPS,
  835. .init = powernv_cpufreq_cpu_init,
  836. .exit = powernv_cpufreq_cpu_exit,
  837. .verify = cpufreq_generic_frequency_table_verify,
  838. .target_index = powernv_cpufreq_target_index,
  839. .fast_switch = powernv_fast_switch,
  840. .get = powernv_cpufreq_get,
  841. .stop_cpu = powernv_cpufreq_stop_cpu,
  842. .attr = powernv_cpu_freq_attr,
  843. };
  844. static int init_chip_info(void)
  845. {
  846. unsigned int chip[256];
  847. unsigned int cpu, i;
  848. unsigned int prev_chip_id = UINT_MAX;
  849. for_each_possible_cpu(cpu) {
  850. unsigned int id = cpu_to_chip_id(cpu);
  851. if (prev_chip_id != id) {
  852. prev_chip_id = id;
  853. chip[nr_chips++] = id;
  854. }
  855. }
  856. chips = kcalloc(nr_chips, sizeof(struct chip), GFP_KERNEL);
  857. if (!chips)
  858. return -ENOMEM;
  859. for (i = 0; i < nr_chips; i++) {
  860. chips[i].id = chip[i];
  861. cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i]));
  862. INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
  863. for_each_cpu(cpu, &chips[i].mask)
  864. per_cpu(chip_info, cpu) = &chips[i];
  865. }
  866. return 0;
  867. }
  868. static inline void clean_chip_info(void)
  869. {
  870. kfree(chips);
  871. }
  872. static inline void unregister_all_notifiers(void)
  873. {
  874. opal_message_notifier_unregister(OPAL_MSG_OCC,
  875. &powernv_cpufreq_opal_nb);
  876. unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
  877. }
  878. static int __init powernv_cpufreq_init(void)
  879. {
  880. int rc = 0;
  881. /* Don't probe on pseries (guest) platforms */
  882. if (!firmware_has_feature(FW_FEATURE_OPAL))
  883. return -ENODEV;
  884. /* Discover pstates from device tree and init */
  885. rc = init_powernv_pstates();
  886. if (rc)
  887. goto out;
  888. /* Populate chip info */
  889. rc = init_chip_info();
  890. if (rc)
  891. goto out;
  892. register_reboot_notifier(&powernv_cpufreq_reboot_nb);
  893. opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
  894. if (powernv_pstate_info.wof_enabled)
  895. powernv_cpufreq_driver.boost_enabled = true;
  896. else
  897. powernv_cpu_freq_attr[SCALING_BOOST_FREQS_ATTR_INDEX] = NULL;
  898. rc = cpufreq_register_driver(&powernv_cpufreq_driver);
  899. if (rc) {
  900. pr_info("Failed to register the cpufreq driver (%d)\n", rc);
  901. goto cleanup_notifiers;
  902. }
  903. if (powernv_pstate_info.wof_enabled)
  904. cpufreq_enable_boost_support();
  905. return 0;
  906. cleanup_notifiers:
  907. unregister_all_notifiers();
  908. clean_chip_info();
  909. out:
  910. pr_info("Platform driver disabled. System does not support PState control\n");
  911. return rc;
  912. }
  913. module_init(powernv_cpufreq_init);
  914. static void __exit powernv_cpufreq_exit(void)
  915. {
  916. cpufreq_unregister_driver(&powernv_cpufreq_driver);
  917. unregister_all_notifiers();
  918. clean_chip_info();
  919. }
  920. module_exit(powernv_cpufreq_exit);
  921. MODULE_LICENSE("GPL");
  922. MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");