vmwgfx_execbuf.c 123 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR MIT
  2. /**************************************************************************
  3. *
  4. * Copyright 2009 - 2015 VMware, Inc., Palo Alto, CA., USA
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include <linux/sync_file.h>
  28. #include "vmwgfx_drv.h"
  29. #include "vmwgfx_reg.h"
  30. #include <drm/ttm/ttm_bo_api.h>
  31. #include <drm/ttm/ttm_placement.h>
  32. #include "vmwgfx_so.h"
  33. #include "vmwgfx_binding.h"
  34. #define VMW_RES_HT_ORDER 12
  35. /*
  36. * struct vmw_relocation - Buffer object relocation
  37. *
  38. * @head: List head for the command submission context's relocation list
  39. * @vbo: Non ref-counted pointer to buffer object
  40. * @mob_loc: Pointer to location for mob id to be modified
  41. * @location: Pointer to location for guest pointer to be modified
  42. */
  43. struct vmw_relocation {
  44. struct list_head head;
  45. struct vmw_buffer_object *vbo;
  46. union {
  47. SVGAMobId *mob_loc;
  48. SVGAGuestPtr *location;
  49. };
  50. };
  51. /**
  52. * enum vmw_resource_relocation_type - Relocation type for resources
  53. *
  54. * @vmw_res_rel_normal: Traditional relocation. The resource id in the
  55. * command stream is replaced with the actual id after validation.
  56. * @vmw_res_rel_nop: NOP relocation. The command is unconditionally replaced
  57. * with a NOP.
  58. * @vmw_res_rel_cond_nop: Conditional NOP relocation. If the resource id
  59. * after validation is -1, the command is replaced with a NOP. Otherwise no
  60. * action.
  61. */
  62. enum vmw_resource_relocation_type {
  63. vmw_res_rel_normal,
  64. vmw_res_rel_nop,
  65. vmw_res_rel_cond_nop,
  66. vmw_res_rel_max
  67. };
  68. /**
  69. * struct vmw_resource_relocation - Relocation info for resources
  70. *
  71. * @head: List head for the software context's relocation list.
  72. * @res: Non-ref-counted pointer to the resource.
  73. * @offset: Offset of single byte entries into the command buffer where the
  74. * id that needs fixup is located.
  75. * @rel_type: Type of relocation.
  76. */
  77. struct vmw_resource_relocation {
  78. struct list_head head;
  79. const struct vmw_resource *res;
  80. u32 offset:29;
  81. enum vmw_resource_relocation_type rel_type:3;
  82. };
  83. /*
  84. * struct vmw_ctx_validation_info - Extra validation metadata for contexts
  85. * @head: List head of context list
  86. * @ctx: The context resource
  87. * @cur: The context's persistent binding state
  88. * @staged: The binding state changes of this command buffer
  89. */
  90. struct vmw_ctx_validation_info {
  91. struct list_head head;
  92. struct vmw_resource *ctx;
  93. struct vmw_ctx_binding_state *cur;
  94. struct vmw_ctx_binding_state *staged;
  95. };
  96. /**
  97. * struct vmw_cmd_entry - Describe a command for the verifier
  98. *
  99. * @user_allow: Whether allowed from the execbuf ioctl.
  100. * @gb_disable: Whether disabled if guest-backed objects are available.
  101. * @gb_enable: Whether enabled iff guest-backed objects are available.
  102. */
  103. struct vmw_cmd_entry {
  104. int (*func) (struct vmw_private *, struct vmw_sw_context *,
  105. SVGA3dCmdHeader *);
  106. bool user_allow;
  107. bool gb_disable;
  108. bool gb_enable;
  109. const char *cmd_name;
  110. };
  111. #define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable) \
  112. [(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\
  113. (_gb_disable), (_gb_enable), #_cmd}
  114. static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
  115. struct vmw_sw_context *sw_context,
  116. struct vmw_resource *ctx);
  117. static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
  118. struct vmw_sw_context *sw_context,
  119. SVGAMobId *id,
  120. struct vmw_buffer_object **vmw_bo_p);
  121. /**
  122. * vmw_ptr_diff - Compute the offset from a to b in bytes
  123. *
  124. * @a: A starting pointer.
  125. * @b: A pointer offset in the same address space.
  126. *
  127. * Returns: The offset in bytes between the two pointers.
  128. */
  129. static size_t vmw_ptr_diff(void *a, void *b)
  130. {
  131. return (unsigned long) b - (unsigned long) a;
  132. }
  133. /**
  134. * vmw_execbuf_bindings_commit - Commit modified binding state
  135. * @sw_context: The command submission context
  136. * @backoff: Whether this is part of the error path and binding state
  137. * changes should be ignored
  138. */
  139. static void vmw_execbuf_bindings_commit(struct vmw_sw_context *sw_context,
  140. bool backoff)
  141. {
  142. struct vmw_ctx_validation_info *entry;
  143. list_for_each_entry(entry, &sw_context->ctx_list, head) {
  144. if (!backoff)
  145. vmw_binding_state_commit(entry->cur, entry->staged);
  146. if (entry->staged != sw_context->staged_bindings)
  147. vmw_binding_state_free(entry->staged);
  148. else
  149. sw_context->staged_bindings_inuse = false;
  150. }
  151. /* List entries are freed with the validation context */
  152. INIT_LIST_HEAD(&sw_context->ctx_list);
  153. }
  154. /**
  155. * vmw_bind_dx_query_mob - Bind the DX query MOB if referenced
  156. * @sw_context: The command submission context
  157. */
  158. static void vmw_bind_dx_query_mob(struct vmw_sw_context *sw_context)
  159. {
  160. if (sw_context->dx_query_mob)
  161. vmw_context_bind_dx_query(sw_context->dx_query_ctx,
  162. sw_context->dx_query_mob);
  163. }
  164. /**
  165. * vmw_cmd_ctx_first_setup - Perform the setup needed when a context is
  166. * added to the validate list.
  167. *
  168. * @dev_priv: Pointer to the device private:
  169. * @sw_context: The command submission context
  170. * @node: The validation node holding the context resource metadata
  171. */
  172. static int vmw_cmd_ctx_first_setup(struct vmw_private *dev_priv,
  173. struct vmw_sw_context *sw_context,
  174. struct vmw_resource *res,
  175. struct vmw_ctx_validation_info *node)
  176. {
  177. int ret;
  178. ret = vmw_resource_context_res_add(dev_priv, sw_context, res);
  179. if (unlikely(ret != 0))
  180. goto out_err;
  181. if (!sw_context->staged_bindings) {
  182. sw_context->staged_bindings =
  183. vmw_binding_state_alloc(dev_priv);
  184. if (IS_ERR(sw_context->staged_bindings)) {
  185. DRM_ERROR("Failed to allocate context binding "
  186. "information.\n");
  187. ret = PTR_ERR(sw_context->staged_bindings);
  188. sw_context->staged_bindings = NULL;
  189. goto out_err;
  190. }
  191. }
  192. if (sw_context->staged_bindings_inuse) {
  193. node->staged = vmw_binding_state_alloc(dev_priv);
  194. if (IS_ERR(node->staged)) {
  195. DRM_ERROR("Failed to allocate context binding "
  196. "information.\n");
  197. ret = PTR_ERR(node->staged);
  198. node->staged = NULL;
  199. goto out_err;
  200. }
  201. } else {
  202. node->staged = sw_context->staged_bindings;
  203. sw_context->staged_bindings_inuse = true;
  204. }
  205. node->ctx = res;
  206. node->cur = vmw_context_binding_state(res);
  207. list_add_tail(&node->head, &sw_context->ctx_list);
  208. return 0;
  209. out_err:
  210. return ret;
  211. }
  212. /**
  213. * vmw_execbuf_res_size - calculate extra size fore the resource validation
  214. * node
  215. * @dev_priv: Pointer to the device private struct.
  216. * @res_type: The resource type.
  217. *
  218. * Guest-backed contexts and DX contexts require extra size to store
  219. * execbuf private information in the validation node. Typically the
  220. * binding manager associated data structures.
  221. *
  222. * Returns: The extra size requirement based on resource type.
  223. */
  224. static unsigned int vmw_execbuf_res_size(struct vmw_private *dev_priv,
  225. enum vmw_res_type res_type)
  226. {
  227. return (res_type == vmw_res_dx_context ||
  228. (res_type == vmw_res_context && dev_priv->has_mob)) ?
  229. sizeof(struct vmw_ctx_validation_info) : 0;
  230. }
  231. /**
  232. * vmw_execbuf_rcache_update - Update a resource-node cache entry
  233. *
  234. * @rcache: Pointer to the entry to update.
  235. * @res: Pointer to the resource.
  236. * @private: Pointer to the execbuf-private space in the resource
  237. * validation node.
  238. */
  239. static void vmw_execbuf_rcache_update(struct vmw_res_cache_entry *rcache,
  240. struct vmw_resource *res,
  241. void *private)
  242. {
  243. rcache->res = res;
  244. rcache->private = private;
  245. rcache->valid = 1;
  246. rcache->valid_handle = 0;
  247. }
  248. /**
  249. * vmw_execbuf_res_noref_val_add - Add a resource described by an
  250. * unreferenced rcu-protected pointer to the validation list.
  251. * @sw_context: Pointer to the software context.
  252. * @res: Unreferenced rcu-protected pointer to the resource.
  253. *
  254. * Returns: 0 on success. Negative error code on failure. Typical error
  255. * codes are %-EINVAL on inconsistency and %-ESRCH if the resource was
  256. * doomed.
  257. */
  258. static int vmw_execbuf_res_noref_val_add(struct vmw_sw_context *sw_context,
  259. struct vmw_resource *res)
  260. {
  261. struct vmw_private *dev_priv = res->dev_priv;
  262. int ret;
  263. enum vmw_res_type res_type = vmw_res_type(res);
  264. struct vmw_res_cache_entry *rcache;
  265. struct vmw_ctx_validation_info *ctx_info;
  266. bool first_usage;
  267. unsigned int priv_size;
  268. rcache = &sw_context->res_cache[res_type];
  269. if (likely(rcache->valid && rcache->res == res)) {
  270. vmw_user_resource_noref_release();
  271. return 0;
  272. }
  273. priv_size = vmw_execbuf_res_size(dev_priv, res_type);
  274. ret = vmw_validation_add_resource(sw_context->ctx, res, priv_size,
  275. (void **)&ctx_info, &first_usage);
  276. vmw_user_resource_noref_release();
  277. if (ret)
  278. return ret;
  279. if (priv_size && first_usage) {
  280. ret = vmw_cmd_ctx_first_setup(dev_priv, sw_context, res,
  281. ctx_info);
  282. if (ret)
  283. return ret;
  284. }
  285. vmw_execbuf_rcache_update(rcache, res, ctx_info);
  286. return 0;
  287. }
  288. /**
  289. * vmw_execbuf_res_noctx_val_add - Add a non-context resource to the resource
  290. * validation list if it's not already on it
  291. * @sw_context: Pointer to the software context.
  292. * @res: Pointer to the resource.
  293. *
  294. * Returns: Zero on success. Negative error code on failure.
  295. */
  296. static int vmw_execbuf_res_noctx_val_add(struct vmw_sw_context *sw_context,
  297. struct vmw_resource *res)
  298. {
  299. struct vmw_res_cache_entry *rcache;
  300. enum vmw_res_type res_type = vmw_res_type(res);
  301. void *ptr;
  302. int ret;
  303. rcache = &sw_context->res_cache[res_type];
  304. if (likely(rcache->valid && rcache->res == res))
  305. return 0;
  306. ret = vmw_validation_add_resource(sw_context->ctx, res, 0, &ptr, NULL);
  307. if (ret)
  308. return ret;
  309. vmw_execbuf_rcache_update(rcache, res, ptr);
  310. return 0;
  311. }
  312. /**
  313. * vmw_view_res_val_add - Add a view and the surface it's pointing to
  314. * to the validation list
  315. *
  316. * @sw_context: The software context holding the validation list.
  317. * @view: Pointer to the view resource.
  318. *
  319. * Returns 0 if success, negative error code otherwise.
  320. */
  321. static int vmw_view_res_val_add(struct vmw_sw_context *sw_context,
  322. struct vmw_resource *view)
  323. {
  324. int ret;
  325. /*
  326. * First add the resource the view is pointing to, otherwise
  327. * it may be swapped out when the view is validated.
  328. */
  329. ret = vmw_execbuf_res_noctx_val_add(sw_context, vmw_view_srf(view));
  330. if (ret)
  331. return ret;
  332. return vmw_execbuf_res_noctx_val_add(sw_context, view);
  333. }
  334. /**
  335. * vmw_view_id_val_add - Look up a view and add it and the surface it's
  336. * pointing to to the validation list.
  337. *
  338. * @sw_context: The software context holding the validation list.
  339. * @view_type: The view type to look up.
  340. * @id: view id of the view.
  341. *
  342. * The view is represented by a view id and the DX context it's created on,
  343. * or scheduled for creation on. If there is no DX context set, the function
  344. * will return an -EINVAL error pointer.
  345. *
  346. * Returns: Unreferenced pointer to the resource on success, negative error
  347. * pointer on failure.
  348. */
  349. static struct vmw_resource *
  350. vmw_view_id_val_add(struct vmw_sw_context *sw_context,
  351. enum vmw_view_type view_type, u32 id)
  352. {
  353. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  354. struct vmw_resource *view;
  355. int ret;
  356. if (!ctx_node) {
  357. DRM_ERROR("DX Context not set.\n");
  358. return ERR_PTR(-EINVAL);
  359. }
  360. view = vmw_view_lookup(sw_context->man, view_type, id);
  361. if (IS_ERR(view))
  362. return view;
  363. ret = vmw_view_res_val_add(sw_context, view);
  364. if (ret)
  365. return ERR_PTR(ret);
  366. return view;
  367. }
  368. /**
  369. * vmw_resource_context_res_add - Put resources previously bound to a context on
  370. * the validation list
  371. *
  372. * @dev_priv: Pointer to a device private structure
  373. * @sw_context: Pointer to a software context used for this command submission
  374. * @ctx: Pointer to the context resource
  375. *
  376. * This function puts all resources that were previously bound to @ctx on
  377. * the resource validation list. This is part of the context state reemission
  378. */
  379. static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
  380. struct vmw_sw_context *sw_context,
  381. struct vmw_resource *ctx)
  382. {
  383. struct list_head *binding_list;
  384. struct vmw_ctx_bindinfo *entry;
  385. int ret = 0;
  386. struct vmw_resource *res;
  387. u32 i;
  388. /* Add all cotables to the validation list. */
  389. if (dev_priv->has_dx && vmw_res_type(ctx) == vmw_res_dx_context) {
  390. for (i = 0; i < SVGA_COTABLE_DX10_MAX; ++i) {
  391. res = vmw_context_cotable(ctx, i);
  392. if (IS_ERR(res))
  393. continue;
  394. ret = vmw_execbuf_res_noctx_val_add(sw_context, res);
  395. if (unlikely(ret != 0))
  396. return ret;
  397. }
  398. }
  399. /* Add all resources bound to the context to the validation list */
  400. mutex_lock(&dev_priv->binding_mutex);
  401. binding_list = vmw_context_binding_list(ctx);
  402. list_for_each_entry(entry, binding_list, ctx_list) {
  403. if (vmw_res_type(entry->res) == vmw_res_view)
  404. ret = vmw_view_res_val_add(sw_context, entry->res);
  405. else
  406. ret = vmw_execbuf_res_noctx_val_add(sw_context,
  407. entry->res);
  408. if (unlikely(ret != 0))
  409. break;
  410. }
  411. if (dev_priv->has_dx && vmw_res_type(ctx) == vmw_res_dx_context) {
  412. struct vmw_buffer_object *dx_query_mob;
  413. dx_query_mob = vmw_context_get_dx_query_mob(ctx);
  414. if (dx_query_mob)
  415. ret = vmw_validation_add_bo(sw_context->ctx,
  416. dx_query_mob, true, false);
  417. }
  418. mutex_unlock(&dev_priv->binding_mutex);
  419. return ret;
  420. }
  421. /**
  422. * vmw_resource_relocation_add - Add a relocation to the relocation list
  423. *
  424. * @list: Pointer to head of relocation list.
  425. * @res: The resource.
  426. * @offset: Offset into the command buffer currently being parsed where the
  427. * id that needs fixup is located. Granularity is one byte.
  428. * @rel_type: Relocation type.
  429. */
  430. static int vmw_resource_relocation_add(struct vmw_sw_context *sw_context,
  431. const struct vmw_resource *res,
  432. unsigned long offset,
  433. enum vmw_resource_relocation_type
  434. rel_type)
  435. {
  436. struct vmw_resource_relocation *rel;
  437. rel = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*rel));
  438. if (unlikely(!rel)) {
  439. DRM_ERROR("Failed to allocate a resource relocation.\n");
  440. return -ENOMEM;
  441. }
  442. rel->res = res;
  443. rel->offset = offset;
  444. rel->rel_type = rel_type;
  445. list_add_tail(&rel->head, &sw_context->res_relocations);
  446. return 0;
  447. }
  448. /**
  449. * vmw_resource_relocations_free - Free all relocations on a list
  450. *
  451. * @list: Pointer to the head of the relocation list
  452. */
  453. static void vmw_resource_relocations_free(struct list_head *list)
  454. {
  455. /* Memory is validation context memory, so no need to free it */
  456. INIT_LIST_HEAD(list);
  457. }
  458. /**
  459. * vmw_resource_relocations_apply - Apply all relocations on a list
  460. *
  461. * @cb: Pointer to the start of the command buffer bein patch. This need
  462. * not be the same buffer as the one being parsed when the relocation
  463. * list was built, but the contents must be the same modulo the
  464. * resource ids.
  465. * @list: Pointer to the head of the relocation list.
  466. */
  467. static void vmw_resource_relocations_apply(uint32_t *cb,
  468. struct list_head *list)
  469. {
  470. struct vmw_resource_relocation *rel;
  471. /* Validate the struct vmw_resource_relocation member size */
  472. BUILD_BUG_ON(SVGA_CB_MAX_SIZE >= (1 << 29));
  473. BUILD_BUG_ON(vmw_res_rel_max >= (1 << 3));
  474. list_for_each_entry(rel, list, head) {
  475. u32 *addr = (u32 *)((unsigned long) cb + rel->offset);
  476. switch (rel->rel_type) {
  477. case vmw_res_rel_normal:
  478. *addr = rel->res->id;
  479. break;
  480. case vmw_res_rel_nop:
  481. *addr = SVGA_3D_CMD_NOP;
  482. break;
  483. default:
  484. if (rel->res->id == -1)
  485. *addr = SVGA_3D_CMD_NOP;
  486. break;
  487. }
  488. }
  489. }
  490. static int vmw_cmd_invalid(struct vmw_private *dev_priv,
  491. struct vmw_sw_context *sw_context,
  492. SVGA3dCmdHeader *header)
  493. {
  494. return -EINVAL;
  495. }
  496. static int vmw_cmd_ok(struct vmw_private *dev_priv,
  497. struct vmw_sw_context *sw_context,
  498. SVGA3dCmdHeader *header)
  499. {
  500. return 0;
  501. }
  502. /**
  503. * vmw_resources_reserve - Reserve all resources on the sw_context's
  504. * resource list.
  505. *
  506. * @sw_context: Pointer to the software context.
  507. *
  508. * Note that since vmware's command submission currently is protected by
  509. * the cmdbuf mutex, no fancy deadlock avoidance is required for resources,
  510. * since only a single thread at once will attempt this.
  511. */
  512. static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
  513. {
  514. int ret;
  515. ret = vmw_validation_res_reserve(sw_context->ctx, true);
  516. if (ret)
  517. return ret;
  518. if (sw_context->dx_query_mob) {
  519. struct vmw_buffer_object *expected_dx_query_mob;
  520. expected_dx_query_mob =
  521. vmw_context_get_dx_query_mob(sw_context->dx_query_ctx);
  522. if (expected_dx_query_mob &&
  523. expected_dx_query_mob != sw_context->dx_query_mob) {
  524. ret = -EINVAL;
  525. }
  526. }
  527. return ret;
  528. }
  529. /**
  530. * vmw_cmd_res_check - Check that a resource is present and if so, put it
  531. * on the resource validate list unless it's already there.
  532. *
  533. * @dev_priv: Pointer to a device private structure.
  534. * @sw_context: Pointer to the software context.
  535. * @res_type: Resource type.
  536. * @converter: User-space visisble type specific information.
  537. * @id_loc: Pointer to the location in the command buffer currently being
  538. * parsed from where the user-space resource id handle is located.
  539. * @p_val: Pointer to pointer to resource validalidation node. Populated
  540. * on exit.
  541. */
  542. static int
  543. vmw_cmd_res_check(struct vmw_private *dev_priv,
  544. struct vmw_sw_context *sw_context,
  545. enum vmw_res_type res_type,
  546. const struct vmw_user_resource_conv *converter,
  547. uint32_t *id_loc,
  548. struct vmw_resource **p_res)
  549. {
  550. struct vmw_res_cache_entry *rcache = &sw_context->res_cache[res_type];
  551. struct vmw_resource *res;
  552. int ret;
  553. if (p_res)
  554. *p_res = NULL;
  555. if (*id_loc == SVGA3D_INVALID_ID) {
  556. if (res_type == vmw_res_context) {
  557. DRM_ERROR("Illegal context invalid id.\n");
  558. return -EINVAL;
  559. }
  560. return 0;
  561. }
  562. if (likely(rcache->valid_handle && *id_loc == rcache->handle)) {
  563. res = rcache->res;
  564. } else {
  565. unsigned int size = vmw_execbuf_res_size(dev_priv, res_type);
  566. ret = vmw_validation_preload_res(sw_context->ctx, size);
  567. if (ret)
  568. return ret;
  569. res = vmw_user_resource_noref_lookup_handle
  570. (dev_priv, sw_context->fp->tfile, *id_loc, converter);
  571. if (unlikely(IS_ERR(res))) {
  572. DRM_ERROR("Could not find or use resource 0x%08x.\n",
  573. (unsigned int) *id_loc);
  574. return PTR_ERR(res);
  575. }
  576. ret = vmw_execbuf_res_noref_val_add(sw_context, res);
  577. if (unlikely(ret != 0))
  578. return ret;
  579. if (rcache->valid && rcache->res == res) {
  580. rcache->valid_handle = true;
  581. rcache->handle = *id_loc;
  582. }
  583. }
  584. ret = vmw_resource_relocation_add(sw_context, res,
  585. vmw_ptr_diff(sw_context->buf_start,
  586. id_loc),
  587. vmw_res_rel_normal);
  588. if (p_res)
  589. *p_res = res;
  590. return 0;
  591. }
  592. /**
  593. * vmw_rebind_dx_query - Rebind DX query associated with the context
  594. *
  595. * @ctx_res: context the query belongs to
  596. *
  597. * This function assumes binding_mutex is held.
  598. */
  599. static int vmw_rebind_all_dx_query(struct vmw_resource *ctx_res)
  600. {
  601. struct vmw_private *dev_priv = ctx_res->dev_priv;
  602. struct vmw_buffer_object *dx_query_mob;
  603. struct {
  604. SVGA3dCmdHeader header;
  605. SVGA3dCmdDXBindAllQuery body;
  606. } *cmd;
  607. dx_query_mob = vmw_context_get_dx_query_mob(ctx_res);
  608. if (!dx_query_mob || dx_query_mob->dx_query_ctx)
  609. return 0;
  610. cmd = vmw_fifo_reserve_dx(dev_priv, sizeof(*cmd), ctx_res->id);
  611. if (cmd == NULL) {
  612. DRM_ERROR("Failed to rebind queries.\n");
  613. return -ENOMEM;
  614. }
  615. cmd->header.id = SVGA_3D_CMD_DX_BIND_ALL_QUERY;
  616. cmd->header.size = sizeof(cmd->body);
  617. cmd->body.cid = ctx_res->id;
  618. cmd->body.mobid = dx_query_mob->base.mem.start;
  619. vmw_fifo_commit(dev_priv, sizeof(*cmd));
  620. vmw_context_bind_dx_query(ctx_res, dx_query_mob);
  621. return 0;
  622. }
  623. /**
  624. * vmw_rebind_contexts - Rebind all resources previously bound to
  625. * referenced contexts.
  626. *
  627. * @sw_context: Pointer to the software context.
  628. *
  629. * Rebind context binding points that have been scrubbed because of eviction.
  630. */
  631. static int vmw_rebind_contexts(struct vmw_sw_context *sw_context)
  632. {
  633. struct vmw_ctx_validation_info *val;
  634. int ret;
  635. list_for_each_entry(val, &sw_context->ctx_list, head) {
  636. ret = vmw_binding_rebind_all(val->cur);
  637. if (unlikely(ret != 0)) {
  638. if (ret != -ERESTARTSYS)
  639. DRM_ERROR("Failed to rebind context.\n");
  640. return ret;
  641. }
  642. ret = vmw_rebind_all_dx_query(val->ctx);
  643. if (ret != 0)
  644. return ret;
  645. }
  646. return 0;
  647. }
  648. /**
  649. * vmw_view_bindings_add - Add an array of view bindings to a context
  650. * binding state tracker.
  651. *
  652. * @sw_context: The execbuf state used for this command.
  653. * @view_type: View type for the bindings.
  654. * @binding_type: Binding type for the bindings.
  655. * @shader_slot: The shader slot to user for the bindings.
  656. * @view_ids: Array of view ids to be bound.
  657. * @num_views: Number of view ids in @view_ids.
  658. * @first_slot: The binding slot to be used for the first view id in @view_ids.
  659. */
  660. static int vmw_view_bindings_add(struct vmw_sw_context *sw_context,
  661. enum vmw_view_type view_type,
  662. enum vmw_ctx_binding_type binding_type,
  663. uint32 shader_slot,
  664. uint32 view_ids[], u32 num_views,
  665. u32 first_slot)
  666. {
  667. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  668. u32 i;
  669. if (!ctx_node) {
  670. DRM_ERROR("DX Context not set.\n");
  671. return -EINVAL;
  672. }
  673. for (i = 0; i < num_views; ++i) {
  674. struct vmw_ctx_bindinfo_view binding;
  675. struct vmw_resource *view = NULL;
  676. if (view_ids[i] != SVGA3D_INVALID_ID) {
  677. view = vmw_view_id_val_add(sw_context, view_type,
  678. view_ids[i]);
  679. if (IS_ERR(view)) {
  680. DRM_ERROR("View not found.\n");
  681. return PTR_ERR(view);
  682. }
  683. }
  684. binding.bi.ctx = ctx_node->ctx;
  685. binding.bi.res = view;
  686. binding.bi.bt = binding_type;
  687. binding.shader_slot = shader_slot;
  688. binding.slot = first_slot + i;
  689. vmw_binding_add(ctx_node->staged, &binding.bi,
  690. shader_slot, binding.slot);
  691. }
  692. return 0;
  693. }
  694. /**
  695. * vmw_cmd_cid_check - Check a command header for valid context information.
  696. *
  697. * @dev_priv: Pointer to a device private structure.
  698. * @sw_context: Pointer to the software context.
  699. * @header: A command header with an embedded user-space context handle.
  700. *
  701. * Convenience function: Call vmw_cmd_res_check with the user-space context
  702. * handle embedded in @header.
  703. */
  704. static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
  705. struct vmw_sw_context *sw_context,
  706. SVGA3dCmdHeader *header)
  707. {
  708. struct vmw_cid_cmd {
  709. SVGA3dCmdHeader header;
  710. uint32_t cid;
  711. } *cmd;
  712. cmd = container_of(header, struct vmw_cid_cmd, header);
  713. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  714. user_context_converter, &cmd->cid, NULL);
  715. }
  716. /**
  717. * vmw_execbuf_info_from_res - Get the private validation metadata for a
  718. * recently validated resource
  719. * @sw_context: Pointer to the command submission context
  720. * @res: The resource
  721. *
  722. * The resource pointed to by @res needs to be present in the command submission
  723. * context's resource cache and hence the last resource of that type to be
  724. * processed by the validation code.
  725. *
  726. * Return: a pointer to the private metadata of the resource, or NULL
  727. * if it wasn't found
  728. */
  729. static struct vmw_ctx_validation_info *
  730. vmw_execbuf_info_from_res(struct vmw_sw_context *sw_context,
  731. struct vmw_resource *res)
  732. {
  733. struct vmw_res_cache_entry *rcache =
  734. &sw_context->res_cache[vmw_res_type(res)];
  735. if (rcache->valid && rcache->res == res)
  736. return rcache->private;
  737. WARN_ON_ONCE(true);
  738. return NULL;
  739. }
  740. static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
  741. struct vmw_sw_context *sw_context,
  742. SVGA3dCmdHeader *header)
  743. {
  744. struct vmw_sid_cmd {
  745. SVGA3dCmdHeader header;
  746. SVGA3dCmdSetRenderTarget body;
  747. } *cmd;
  748. struct vmw_resource *ctx;
  749. struct vmw_resource *res;
  750. int ret;
  751. cmd = container_of(header, struct vmw_sid_cmd, header);
  752. if (cmd->body.type >= SVGA3D_RT_MAX) {
  753. DRM_ERROR("Illegal render target type %u.\n",
  754. (unsigned) cmd->body.type);
  755. return -EINVAL;
  756. }
  757. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  758. user_context_converter, &cmd->body.cid,
  759. &ctx);
  760. if (unlikely(ret != 0))
  761. return ret;
  762. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  763. user_surface_converter, &cmd->body.target.sid,
  764. &res);
  765. if (unlikely(ret))
  766. return ret;
  767. if (dev_priv->has_mob) {
  768. struct vmw_ctx_bindinfo_view binding;
  769. struct vmw_ctx_validation_info *node;
  770. node = vmw_execbuf_info_from_res(sw_context, ctx);
  771. if (!node)
  772. return -EINVAL;
  773. binding.bi.ctx = ctx;
  774. binding.bi.res = res;
  775. binding.bi.bt = vmw_ctx_binding_rt;
  776. binding.slot = cmd->body.type;
  777. vmw_binding_add(node->staged, &binding.bi, 0, binding.slot);
  778. }
  779. return 0;
  780. }
  781. static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
  782. struct vmw_sw_context *sw_context,
  783. SVGA3dCmdHeader *header)
  784. {
  785. struct vmw_sid_cmd {
  786. SVGA3dCmdHeader header;
  787. SVGA3dCmdSurfaceCopy body;
  788. } *cmd;
  789. int ret;
  790. cmd = container_of(header, struct vmw_sid_cmd, header);
  791. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  792. user_surface_converter,
  793. &cmd->body.src.sid, NULL);
  794. if (ret)
  795. return ret;
  796. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  797. user_surface_converter,
  798. &cmd->body.dest.sid, NULL);
  799. }
  800. static int vmw_cmd_buffer_copy_check(struct vmw_private *dev_priv,
  801. struct vmw_sw_context *sw_context,
  802. SVGA3dCmdHeader *header)
  803. {
  804. struct {
  805. SVGA3dCmdHeader header;
  806. SVGA3dCmdDXBufferCopy body;
  807. } *cmd;
  808. int ret;
  809. cmd = container_of(header, typeof(*cmd), header);
  810. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  811. user_surface_converter,
  812. &cmd->body.src, NULL);
  813. if (ret != 0)
  814. return ret;
  815. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  816. user_surface_converter,
  817. &cmd->body.dest, NULL);
  818. }
  819. static int vmw_cmd_pred_copy_check(struct vmw_private *dev_priv,
  820. struct vmw_sw_context *sw_context,
  821. SVGA3dCmdHeader *header)
  822. {
  823. struct {
  824. SVGA3dCmdHeader header;
  825. SVGA3dCmdDXPredCopyRegion body;
  826. } *cmd;
  827. int ret;
  828. cmd = container_of(header, typeof(*cmd), header);
  829. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  830. user_surface_converter,
  831. &cmd->body.srcSid, NULL);
  832. if (ret != 0)
  833. return ret;
  834. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  835. user_surface_converter,
  836. &cmd->body.dstSid, NULL);
  837. }
  838. static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
  839. struct vmw_sw_context *sw_context,
  840. SVGA3dCmdHeader *header)
  841. {
  842. struct vmw_sid_cmd {
  843. SVGA3dCmdHeader header;
  844. SVGA3dCmdSurfaceStretchBlt body;
  845. } *cmd;
  846. int ret;
  847. cmd = container_of(header, struct vmw_sid_cmd, header);
  848. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  849. user_surface_converter,
  850. &cmd->body.src.sid, NULL);
  851. if (unlikely(ret != 0))
  852. return ret;
  853. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  854. user_surface_converter,
  855. &cmd->body.dest.sid, NULL);
  856. }
  857. static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
  858. struct vmw_sw_context *sw_context,
  859. SVGA3dCmdHeader *header)
  860. {
  861. struct vmw_sid_cmd {
  862. SVGA3dCmdHeader header;
  863. SVGA3dCmdBlitSurfaceToScreen body;
  864. } *cmd;
  865. cmd = container_of(header, struct vmw_sid_cmd, header);
  866. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  867. user_surface_converter,
  868. &cmd->body.srcImage.sid, NULL);
  869. }
  870. static int vmw_cmd_present_check(struct vmw_private *dev_priv,
  871. struct vmw_sw_context *sw_context,
  872. SVGA3dCmdHeader *header)
  873. {
  874. struct vmw_sid_cmd {
  875. SVGA3dCmdHeader header;
  876. SVGA3dCmdPresent body;
  877. } *cmd;
  878. cmd = container_of(header, struct vmw_sid_cmd, header);
  879. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  880. user_surface_converter, &cmd->body.sid,
  881. NULL);
  882. }
  883. /**
  884. * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
  885. *
  886. * @dev_priv: The device private structure.
  887. * @new_query_bo: The new buffer holding query results.
  888. * @sw_context: The software context used for this command submission.
  889. *
  890. * This function checks whether @new_query_bo is suitable for holding
  891. * query results, and if another buffer currently is pinned for query
  892. * results. If so, the function prepares the state of @sw_context for
  893. * switching pinned buffers after successful submission of the current
  894. * command batch.
  895. */
  896. static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
  897. struct vmw_buffer_object *new_query_bo,
  898. struct vmw_sw_context *sw_context)
  899. {
  900. struct vmw_res_cache_entry *ctx_entry =
  901. &sw_context->res_cache[vmw_res_context];
  902. int ret;
  903. BUG_ON(!ctx_entry->valid);
  904. sw_context->last_query_ctx = ctx_entry->res;
  905. if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
  906. if (unlikely(new_query_bo->base.num_pages > 4)) {
  907. DRM_ERROR("Query buffer too large.\n");
  908. return -EINVAL;
  909. }
  910. if (unlikely(sw_context->cur_query_bo != NULL)) {
  911. sw_context->needs_post_query_barrier = true;
  912. ret = vmw_validation_add_bo(sw_context->ctx,
  913. sw_context->cur_query_bo,
  914. dev_priv->has_mob, false);
  915. if (unlikely(ret != 0))
  916. return ret;
  917. }
  918. sw_context->cur_query_bo = new_query_bo;
  919. ret = vmw_validation_add_bo(sw_context->ctx,
  920. dev_priv->dummy_query_bo,
  921. dev_priv->has_mob, false);
  922. if (unlikely(ret != 0))
  923. return ret;
  924. }
  925. return 0;
  926. }
  927. /**
  928. * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
  929. *
  930. * @dev_priv: The device private structure.
  931. * @sw_context: The software context used for this command submission batch.
  932. *
  933. * This function will check if we're switching query buffers, and will then,
  934. * issue a dummy occlusion query wait used as a query barrier. When the fence
  935. * object following that query wait has signaled, we are sure that all
  936. * preceding queries have finished, and the old query buffer can be unpinned.
  937. * However, since both the new query buffer and the old one are fenced with
  938. * that fence, we can do an asynchronus unpin now, and be sure that the
  939. * old query buffer won't be moved until the fence has signaled.
  940. *
  941. * As mentioned above, both the new - and old query buffers need to be fenced
  942. * using a sequence emitted *after* calling this function.
  943. */
  944. static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
  945. struct vmw_sw_context *sw_context)
  946. {
  947. /*
  948. * The validate list should still hold references to all
  949. * contexts here.
  950. */
  951. if (sw_context->needs_post_query_barrier) {
  952. struct vmw_res_cache_entry *ctx_entry =
  953. &sw_context->res_cache[vmw_res_context];
  954. struct vmw_resource *ctx;
  955. int ret;
  956. BUG_ON(!ctx_entry->valid);
  957. ctx = ctx_entry->res;
  958. ret = vmw_fifo_emit_dummy_query(dev_priv, ctx->id);
  959. if (unlikely(ret != 0))
  960. DRM_ERROR("Out of fifo space for dummy query.\n");
  961. }
  962. if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
  963. if (dev_priv->pinned_bo) {
  964. vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
  965. vmw_bo_unreference(&dev_priv->pinned_bo);
  966. }
  967. if (!sw_context->needs_post_query_barrier) {
  968. vmw_bo_pin_reserved(sw_context->cur_query_bo, true);
  969. /*
  970. * We pin also the dummy_query_bo buffer so that we
  971. * don't need to validate it when emitting
  972. * dummy queries in context destroy paths.
  973. */
  974. if (!dev_priv->dummy_query_bo_pinned) {
  975. vmw_bo_pin_reserved(dev_priv->dummy_query_bo,
  976. true);
  977. dev_priv->dummy_query_bo_pinned = true;
  978. }
  979. BUG_ON(sw_context->last_query_ctx == NULL);
  980. dev_priv->query_cid = sw_context->last_query_ctx->id;
  981. dev_priv->query_cid_valid = true;
  982. dev_priv->pinned_bo =
  983. vmw_bo_reference(sw_context->cur_query_bo);
  984. }
  985. }
  986. }
  987. /**
  988. * vmw_translate_mob_pointer - Prepare to translate a user-space buffer
  989. * handle to a MOB id.
  990. *
  991. * @dev_priv: Pointer to a device private structure.
  992. * @sw_context: The software context used for this command batch validation.
  993. * @id: Pointer to the user-space handle to be translated.
  994. * @vmw_bo_p: Points to a location that, on successful return will carry
  995. * a non-reference-counted pointer to the buffer object identified by the
  996. * user-space handle in @id.
  997. *
  998. * This function saves information needed to translate a user-space buffer
  999. * handle to a MOB id. The translation does not take place immediately, but
  1000. * during a call to vmw_apply_relocations(). This function builds a relocation
  1001. * list and a list of buffers to validate. The former needs to be freed using
  1002. * either vmw_apply_relocations() or vmw_free_relocations(). The latter
  1003. * needs to be freed using vmw_clear_validations.
  1004. */
  1005. static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
  1006. struct vmw_sw_context *sw_context,
  1007. SVGAMobId *id,
  1008. struct vmw_buffer_object **vmw_bo_p)
  1009. {
  1010. struct vmw_buffer_object *vmw_bo;
  1011. uint32_t handle = *id;
  1012. struct vmw_relocation *reloc;
  1013. int ret;
  1014. vmw_validation_preload_bo(sw_context->ctx);
  1015. vmw_bo = vmw_user_bo_noref_lookup(sw_context->fp->tfile, handle);
  1016. if (IS_ERR(vmw_bo)) {
  1017. DRM_ERROR("Could not find or use MOB buffer.\n");
  1018. return PTR_ERR(vmw_bo);
  1019. }
  1020. ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo, true, false);
  1021. vmw_user_bo_noref_release();
  1022. if (unlikely(ret != 0))
  1023. return ret;
  1024. reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc));
  1025. if (!reloc)
  1026. return -ENOMEM;
  1027. reloc->mob_loc = id;
  1028. reloc->vbo = vmw_bo;
  1029. *vmw_bo_p = vmw_bo;
  1030. list_add_tail(&reloc->head, &sw_context->bo_relocations);
  1031. return 0;
  1032. }
  1033. /**
  1034. * vmw_translate_guest_pointer - Prepare to translate a user-space buffer
  1035. * handle to a valid SVGAGuestPtr
  1036. *
  1037. * @dev_priv: Pointer to a device private structure.
  1038. * @sw_context: The software context used for this command batch validation.
  1039. * @ptr: Pointer to the user-space handle to be translated.
  1040. * @vmw_bo_p: Points to a location that, on successful return will carry
  1041. * a non-reference-counted pointer to the DMA buffer identified by the
  1042. * user-space handle in @id.
  1043. *
  1044. * This function saves information needed to translate a user-space buffer
  1045. * handle to a valid SVGAGuestPtr. The translation does not take place
  1046. * immediately, but during a call to vmw_apply_relocations().
  1047. * This function builds a relocation list and a list of buffers to validate.
  1048. * The former needs to be freed using either vmw_apply_relocations() or
  1049. * vmw_free_relocations(). The latter needs to be freed using
  1050. * vmw_clear_validations.
  1051. */
  1052. static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
  1053. struct vmw_sw_context *sw_context,
  1054. SVGAGuestPtr *ptr,
  1055. struct vmw_buffer_object **vmw_bo_p)
  1056. {
  1057. struct vmw_buffer_object *vmw_bo;
  1058. uint32_t handle = ptr->gmrId;
  1059. struct vmw_relocation *reloc;
  1060. int ret;
  1061. vmw_validation_preload_bo(sw_context->ctx);
  1062. vmw_bo = vmw_user_bo_noref_lookup(sw_context->fp->tfile, handle);
  1063. if (IS_ERR(vmw_bo)) {
  1064. DRM_ERROR("Could not find or use GMR region.\n");
  1065. return PTR_ERR(vmw_bo);
  1066. }
  1067. ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo, false, false);
  1068. vmw_user_bo_noref_release();
  1069. if (unlikely(ret != 0))
  1070. return ret;
  1071. reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc));
  1072. if (!reloc)
  1073. return -ENOMEM;
  1074. reloc->location = ptr;
  1075. reloc->vbo = vmw_bo;
  1076. *vmw_bo_p = vmw_bo;
  1077. list_add_tail(&reloc->head, &sw_context->bo_relocations);
  1078. return 0;
  1079. }
  1080. /**
  1081. * vmw_cmd_dx_define_query - validate a SVGA_3D_CMD_DX_DEFINE_QUERY command.
  1082. *
  1083. * @dev_priv: Pointer to a device private struct.
  1084. * @sw_context: The software context used for this command submission.
  1085. * @header: Pointer to the command header in the command stream.
  1086. *
  1087. * This function adds the new query into the query COTABLE
  1088. */
  1089. static int vmw_cmd_dx_define_query(struct vmw_private *dev_priv,
  1090. struct vmw_sw_context *sw_context,
  1091. SVGA3dCmdHeader *header)
  1092. {
  1093. struct vmw_dx_define_query_cmd {
  1094. SVGA3dCmdHeader header;
  1095. SVGA3dCmdDXDefineQuery q;
  1096. } *cmd;
  1097. int ret;
  1098. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  1099. struct vmw_resource *cotable_res;
  1100. if (ctx_node == NULL) {
  1101. DRM_ERROR("DX Context not set for query.\n");
  1102. return -EINVAL;
  1103. }
  1104. cmd = container_of(header, struct vmw_dx_define_query_cmd, header);
  1105. if (cmd->q.type < SVGA3D_QUERYTYPE_MIN ||
  1106. cmd->q.type >= SVGA3D_QUERYTYPE_MAX)
  1107. return -EINVAL;
  1108. cotable_res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXQUERY);
  1109. ret = vmw_cotable_notify(cotable_res, cmd->q.queryId);
  1110. return ret;
  1111. }
  1112. /**
  1113. * vmw_cmd_dx_bind_query - validate a SVGA_3D_CMD_DX_BIND_QUERY command.
  1114. *
  1115. * @dev_priv: Pointer to a device private struct.
  1116. * @sw_context: The software context used for this command submission.
  1117. * @header: Pointer to the command header in the command stream.
  1118. *
  1119. * The query bind operation will eventually associate the query ID
  1120. * with its backing MOB. In this function, we take the user mode
  1121. * MOB ID and use vmw_translate_mob_ptr() to translate it to its
  1122. * kernel mode equivalent.
  1123. */
  1124. static int vmw_cmd_dx_bind_query(struct vmw_private *dev_priv,
  1125. struct vmw_sw_context *sw_context,
  1126. SVGA3dCmdHeader *header)
  1127. {
  1128. struct vmw_dx_bind_query_cmd {
  1129. SVGA3dCmdHeader header;
  1130. SVGA3dCmdDXBindQuery q;
  1131. } *cmd;
  1132. struct vmw_buffer_object *vmw_bo;
  1133. int ret;
  1134. cmd = container_of(header, struct vmw_dx_bind_query_cmd, header);
  1135. /*
  1136. * Look up the buffer pointed to by q.mobid, put it on the relocation
  1137. * list so its kernel mode MOB ID can be filled in later
  1138. */
  1139. ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->q.mobid,
  1140. &vmw_bo);
  1141. if (ret != 0)
  1142. return ret;
  1143. sw_context->dx_query_mob = vmw_bo;
  1144. sw_context->dx_query_ctx = sw_context->dx_ctx_node->ctx;
  1145. return 0;
  1146. }
  1147. /**
  1148. * vmw_cmd_begin_gb_query - validate a SVGA_3D_CMD_BEGIN_GB_QUERY command.
  1149. *
  1150. * @dev_priv: Pointer to a device private struct.
  1151. * @sw_context: The software context used for this command submission.
  1152. * @header: Pointer to the command header in the command stream.
  1153. */
  1154. static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv,
  1155. struct vmw_sw_context *sw_context,
  1156. SVGA3dCmdHeader *header)
  1157. {
  1158. struct vmw_begin_gb_query_cmd {
  1159. SVGA3dCmdHeader header;
  1160. SVGA3dCmdBeginGBQuery q;
  1161. } *cmd;
  1162. cmd = container_of(header, struct vmw_begin_gb_query_cmd,
  1163. header);
  1164. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1165. user_context_converter, &cmd->q.cid,
  1166. NULL);
  1167. }
  1168. /**
  1169. * vmw_cmd_begin_query - validate a SVGA_3D_CMD_BEGIN_QUERY command.
  1170. *
  1171. * @dev_priv: Pointer to a device private struct.
  1172. * @sw_context: The software context used for this command submission.
  1173. * @header: Pointer to the command header in the command stream.
  1174. */
  1175. static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
  1176. struct vmw_sw_context *sw_context,
  1177. SVGA3dCmdHeader *header)
  1178. {
  1179. struct vmw_begin_query_cmd {
  1180. SVGA3dCmdHeader header;
  1181. SVGA3dCmdBeginQuery q;
  1182. } *cmd;
  1183. cmd = container_of(header, struct vmw_begin_query_cmd,
  1184. header);
  1185. if (unlikely(dev_priv->has_mob)) {
  1186. struct {
  1187. SVGA3dCmdHeader header;
  1188. SVGA3dCmdBeginGBQuery q;
  1189. } gb_cmd;
  1190. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1191. gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY;
  1192. gb_cmd.header.size = cmd->header.size;
  1193. gb_cmd.q.cid = cmd->q.cid;
  1194. gb_cmd.q.type = cmd->q.type;
  1195. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1196. return vmw_cmd_begin_gb_query(dev_priv, sw_context, header);
  1197. }
  1198. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1199. user_context_converter, &cmd->q.cid,
  1200. NULL);
  1201. }
  1202. /**
  1203. * vmw_cmd_end_gb_query - validate a SVGA_3D_CMD_END_GB_QUERY command.
  1204. *
  1205. * @dev_priv: Pointer to a device private struct.
  1206. * @sw_context: The software context used for this command submission.
  1207. * @header: Pointer to the command header in the command stream.
  1208. */
  1209. static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv,
  1210. struct vmw_sw_context *sw_context,
  1211. SVGA3dCmdHeader *header)
  1212. {
  1213. struct vmw_buffer_object *vmw_bo;
  1214. struct vmw_query_cmd {
  1215. SVGA3dCmdHeader header;
  1216. SVGA3dCmdEndGBQuery q;
  1217. } *cmd;
  1218. int ret;
  1219. cmd = container_of(header, struct vmw_query_cmd, header);
  1220. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1221. if (unlikely(ret != 0))
  1222. return ret;
  1223. ret = vmw_translate_mob_ptr(dev_priv, sw_context,
  1224. &cmd->q.mobid,
  1225. &vmw_bo);
  1226. if (unlikely(ret != 0))
  1227. return ret;
  1228. ret = vmw_query_bo_switch_prepare(dev_priv, vmw_bo, sw_context);
  1229. return ret;
  1230. }
  1231. /**
  1232. * vmw_cmd_end_query - validate a SVGA_3D_CMD_END_QUERY command.
  1233. *
  1234. * @dev_priv: Pointer to a device private struct.
  1235. * @sw_context: The software context used for this command submission.
  1236. * @header: Pointer to the command header in the command stream.
  1237. */
  1238. static int vmw_cmd_end_query(struct vmw_private *dev_priv,
  1239. struct vmw_sw_context *sw_context,
  1240. SVGA3dCmdHeader *header)
  1241. {
  1242. struct vmw_buffer_object *vmw_bo;
  1243. struct vmw_query_cmd {
  1244. SVGA3dCmdHeader header;
  1245. SVGA3dCmdEndQuery q;
  1246. } *cmd;
  1247. int ret;
  1248. cmd = container_of(header, struct vmw_query_cmd, header);
  1249. if (dev_priv->has_mob) {
  1250. struct {
  1251. SVGA3dCmdHeader header;
  1252. SVGA3dCmdEndGBQuery q;
  1253. } gb_cmd;
  1254. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1255. gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY;
  1256. gb_cmd.header.size = cmd->header.size;
  1257. gb_cmd.q.cid = cmd->q.cid;
  1258. gb_cmd.q.type = cmd->q.type;
  1259. gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
  1260. gb_cmd.q.offset = cmd->q.guestResult.offset;
  1261. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1262. return vmw_cmd_end_gb_query(dev_priv, sw_context, header);
  1263. }
  1264. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1265. if (unlikely(ret != 0))
  1266. return ret;
  1267. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1268. &cmd->q.guestResult,
  1269. &vmw_bo);
  1270. if (unlikely(ret != 0))
  1271. return ret;
  1272. ret = vmw_query_bo_switch_prepare(dev_priv, vmw_bo, sw_context);
  1273. return ret;
  1274. }
  1275. /**
  1276. * vmw_cmd_wait_gb_query - validate a SVGA_3D_CMD_WAIT_GB_QUERY command.
  1277. *
  1278. * @dev_priv: Pointer to a device private struct.
  1279. * @sw_context: The software context used for this command submission.
  1280. * @header: Pointer to the command header in the command stream.
  1281. */
  1282. static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv,
  1283. struct vmw_sw_context *sw_context,
  1284. SVGA3dCmdHeader *header)
  1285. {
  1286. struct vmw_buffer_object *vmw_bo;
  1287. struct vmw_query_cmd {
  1288. SVGA3dCmdHeader header;
  1289. SVGA3dCmdWaitForGBQuery q;
  1290. } *cmd;
  1291. int ret;
  1292. cmd = container_of(header, struct vmw_query_cmd, header);
  1293. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1294. if (unlikely(ret != 0))
  1295. return ret;
  1296. ret = vmw_translate_mob_ptr(dev_priv, sw_context,
  1297. &cmd->q.mobid,
  1298. &vmw_bo);
  1299. if (unlikely(ret != 0))
  1300. return ret;
  1301. return 0;
  1302. }
  1303. /**
  1304. * vmw_cmd_wait_query - validate a SVGA_3D_CMD_WAIT_QUERY command.
  1305. *
  1306. * @dev_priv: Pointer to a device private struct.
  1307. * @sw_context: The software context used for this command submission.
  1308. * @header: Pointer to the command header in the command stream.
  1309. */
  1310. static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
  1311. struct vmw_sw_context *sw_context,
  1312. SVGA3dCmdHeader *header)
  1313. {
  1314. struct vmw_buffer_object *vmw_bo;
  1315. struct vmw_query_cmd {
  1316. SVGA3dCmdHeader header;
  1317. SVGA3dCmdWaitForQuery q;
  1318. } *cmd;
  1319. int ret;
  1320. cmd = container_of(header, struct vmw_query_cmd, header);
  1321. if (dev_priv->has_mob) {
  1322. struct {
  1323. SVGA3dCmdHeader header;
  1324. SVGA3dCmdWaitForGBQuery q;
  1325. } gb_cmd;
  1326. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1327. gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
  1328. gb_cmd.header.size = cmd->header.size;
  1329. gb_cmd.q.cid = cmd->q.cid;
  1330. gb_cmd.q.type = cmd->q.type;
  1331. gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
  1332. gb_cmd.q.offset = cmd->q.guestResult.offset;
  1333. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1334. return vmw_cmd_wait_gb_query(dev_priv, sw_context, header);
  1335. }
  1336. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1337. if (unlikely(ret != 0))
  1338. return ret;
  1339. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1340. &cmd->q.guestResult,
  1341. &vmw_bo);
  1342. if (unlikely(ret != 0))
  1343. return ret;
  1344. return 0;
  1345. }
  1346. static int vmw_cmd_dma(struct vmw_private *dev_priv,
  1347. struct vmw_sw_context *sw_context,
  1348. SVGA3dCmdHeader *header)
  1349. {
  1350. struct vmw_buffer_object *vmw_bo = NULL;
  1351. struct vmw_surface *srf = NULL;
  1352. struct vmw_dma_cmd {
  1353. SVGA3dCmdHeader header;
  1354. SVGA3dCmdSurfaceDMA dma;
  1355. } *cmd;
  1356. int ret;
  1357. SVGA3dCmdSurfaceDMASuffix *suffix;
  1358. uint32_t bo_size;
  1359. cmd = container_of(header, struct vmw_dma_cmd, header);
  1360. suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->dma +
  1361. header->size - sizeof(*suffix));
  1362. /* Make sure device and verifier stays in sync. */
  1363. if (unlikely(suffix->suffixSize != sizeof(*suffix))) {
  1364. DRM_ERROR("Invalid DMA suffix size.\n");
  1365. return -EINVAL;
  1366. }
  1367. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1368. &cmd->dma.guest.ptr,
  1369. &vmw_bo);
  1370. if (unlikely(ret != 0))
  1371. return ret;
  1372. /* Make sure DMA doesn't cross BO boundaries. */
  1373. bo_size = vmw_bo->base.num_pages * PAGE_SIZE;
  1374. if (unlikely(cmd->dma.guest.ptr.offset > bo_size)) {
  1375. DRM_ERROR("Invalid DMA offset.\n");
  1376. return -EINVAL;
  1377. }
  1378. bo_size -= cmd->dma.guest.ptr.offset;
  1379. if (unlikely(suffix->maximumOffset > bo_size))
  1380. suffix->maximumOffset = bo_size;
  1381. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1382. user_surface_converter, &cmd->dma.host.sid,
  1383. NULL);
  1384. if (unlikely(ret != 0)) {
  1385. if (unlikely(ret != -ERESTARTSYS))
  1386. DRM_ERROR("could not find surface for DMA.\n");
  1387. return ret;
  1388. }
  1389. srf = vmw_res_to_srf(sw_context->res_cache[vmw_res_surface].res);
  1390. vmw_kms_cursor_snoop(srf, sw_context->fp->tfile, &vmw_bo->base,
  1391. header);
  1392. return 0;
  1393. }
  1394. static int vmw_cmd_draw(struct vmw_private *dev_priv,
  1395. struct vmw_sw_context *sw_context,
  1396. SVGA3dCmdHeader *header)
  1397. {
  1398. struct vmw_draw_cmd {
  1399. SVGA3dCmdHeader header;
  1400. SVGA3dCmdDrawPrimitives body;
  1401. } *cmd;
  1402. SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
  1403. (unsigned long)header + sizeof(*cmd));
  1404. SVGA3dPrimitiveRange *range;
  1405. uint32_t i;
  1406. uint32_t maxnum;
  1407. int ret;
  1408. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1409. if (unlikely(ret != 0))
  1410. return ret;
  1411. cmd = container_of(header, struct vmw_draw_cmd, header);
  1412. maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
  1413. if (unlikely(cmd->body.numVertexDecls > maxnum)) {
  1414. DRM_ERROR("Illegal number of vertex declarations.\n");
  1415. return -EINVAL;
  1416. }
  1417. for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
  1418. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1419. user_surface_converter,
  1420. &decl->array.surfaceId, NULL);
  1421. if (unlikely(ret != 0))
  1422. return ret;
  1423. }
  1424. maxnum = (header->size - sizeof(cmd->body) -
  1425. cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
  1426. if (unlikely(cmd->body.numRanges > maxnum)) {
  1427. DRM_ERROR("Illegal number of index ranges.\n");
  1428. return -EINVAL;
  1429. }
  1430. range = (SVGA3dPrimitiveRange *) decl;
  1431. for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
  1432. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1433. user_surface_converter,
  1434. &range->indexArray.surfaceId, NULL);
  1435. if (unlikely(ret != 0))
  1436. return ret;
  1437. }
  1438. return 0;
  1439. }
  1440. static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
  1441. struct vmw_sw_context *sw_context,
  1442. SVGA3dCmdHeader *header)
  1443. {
  1444. struct vmw_tex_state_cmd {
  1445. SVGA3dCmdHeader header;
  1446. SVGA3dCmdSetTextureState state;
  1447. } *cmd;
  1448. SVGA3dTextureState *last_state = (SVGA3dTextureState *)
  1449. ((unsigned long) header + header->size + sizeof(header));
  1450. SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
  1451. ((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
  1452. struct vmw_resource *ctx;
  1453. struct vmw_resource *res;
  1454. int ret;
  1455. cmd = container_of(header, struct vmw_tex_state_cmd,
  1456. header);
  1457. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1458. user_context_converter, &cmd->state.cid,
  1459. &ctx);
  1460. if (unlikely(ret != 0))
  1461. return ret;
  1462. for (; cur_state < last_state; ++cur_state) {
  1463. if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
  1464. continue;
  1465. if (cur_state->stage >= SVGA3D_NUM_TEXTURE_UNITS) {
  1466. DRM_ERROR("Illegal texture/sampler unit %u.\n",
  1467. (unsigned) cur_state->stage);
  1468. return -EINVAL;
  1469. }
  1470. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1471. user_surface_converter,
  1472. &cur_state->value, &res);
  1473. if (unlikely(ret != 0))
  1474. return ret;
  1475. if (dev_priv->has_mob) {
  1476. struct vmw_ctx_bindinfo_tex binding;
  1477. struct vmw_ctx_validation_info *node;
  1478. node = vmw_execbuf_info_from_res(sw_context, ctx);
  1479. if (!node)
  1480. return -EINVAL;
  1481. binding.bi.ctx = ctx;
  1482. binding.bi.res = res;
  1483. binding.bi.bt = vmw_ctx_binding_tex;
  1484. binding.texture_stage = cur_state->stage;
  1485. vmw_binding_add(node->staged, &binding.bi, 0,
  1486. binding.texture_stage);
  1487. }
  1488. }
  1489. return 0;
  1490. }
  1491. static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
  1492. struct vmw_sw_context *sw_context,
  1493. void *buf)
  1494. {
  1495. struct vmw_buffer_object *vmw_bo;
  1496. int ret;
  1497. struct {
  1498. uint32_t header;
  1499. SVGAFifoCmdDefineGMRFB body;
  1500. } *cmd = buf;
  1501. return vmw_translate_guest_ptr(dev_priv, sw_context,
  1502. &cmd->body.ptr,
  1503. &vmw_bo);
  1504. return ret;
  1505. }
  1506. /**
  1507. * vmw_cmd_res_switch_backup - Utility function to handle backup buffer
  1508. * switching
  1509. *
  1510. * @dev_priv: Pointer to a device private struct.
  1511. * @sw_context: The software context being used for this batch.
  1512. * @val_node: The validation node representing the resource.
  1513. * @buf_id: Pointer to the user-space backup buffer handle in the command
  1514. * stream.
  1515. * @backup_offset: Offset of backup into MOB.
  1516. *
  1517. * This function prepares for registering a switch of backup buffers
  1518. * in the resource metadata just prior to unreserving. It's basically a wrapper
  1519. * around vmw_cmd_res_switch_backup with a different interface.
  1520. */
  1521. static int vmw_cmd_res_switch_backup(struct vmw_private *dev_priv,
  1522. struct vmw_sw_context *sw_context,
  1523. struct vmw_resource *res,
  1524. uint32_t *buf_id,
  1525. unsigned long backup_offset)
  1526. {
  1527. struct vmw_buffer_object *vbo;
  1528. void *info;
  1529. int ret;
  1530. info = vmw_execbuf_info_from_res(sw_context, res);
  1531. if (!info)
  1532. return -EINVAL;
  1533. ret = vmw_translate_mob_ptr(dev_priv, sw_context, buf_id, &vbo);
  1534. if (ret)
  1535. return ret;
  1536. vmw_validation_res_switch_backup(sw_context->ctx, info, vbo,
  1537. backup_offset);
  1538. return 0;
  1539. }
  1540. /**
  1541. * vmw_cmd_switch_backup - Utility function to handle backup buffer switching
  1542. *
  1543. * @dev_priv: Pointer to a device private struct.
  1544. * @sw_context: The software context being used for this batch.
  1545. * @res_type: The resource type.
  1546. * @converter: Information about user-space binding for this resource type.
  1547. * @res_id: Pointer to the user-space resource handle in the command stream.
  1548. * @buf_id: Pointer to the user-space backup buffer handle in the command
  1549. * stream.
  1550. * @backup_offset: Offset of backup into MOB.
  1551. *
  1552. * This function prepares for registering a switch of backup buffers
  1553. * in the resource metadata just prior to unreserving. It's basically a wrapper
  1554. * around vmw_cmd_res_switch_backup with a different interface.
  1555. */
  1556. static int vmw_cmd_switch_backup(struct vmw_private *dev_priv,
  1557. struct vmw_sw_context *sw_context,
  1558. enum vmw_res_type res_type,
  1559. const struct vmw_user_resource_conv
  1560. *converter,
  1561. uint32_t *res_id,
  1562. uint32_t *buf_id,
  1563. unsigned long backup_offset)
  1564. {
  1565. struct vmw_resource *res;
  1566. int ret;
  1567. ret = vmw_cmd_res_check(dev_priv, sw_context, res_type,
  1568. converter, res_id, &res);
  1569. if (ret)
  1570. return ret;
  1571. return vmw_cmd_res_switch_backup(dev_priv, sw_context, res,
  1572. buf_id, backup_offset);
  1573. }
  1574. /**
  1575. * vmw_cmd_bind_gb_surface - Validate an SVGA_3D_CMD_BIND_GB_SURFACE
  1576. * command
  1577. *
  1578. * @dev_priv: Pointer to a device private struct.
  1579. * @sw_context: The software context being used for this batch.
  1580. * @header: Pointer to the command header in the command stream.
  1581. */
  1582. static int vmw_cmd_bind_gb_surface(struct vmw_private *dev_priv,
  1583. struct vmw_sw_context *sw_context,
  1584. SVGA3dCmdHeader *header)
  1585. {
  1586. struct vmw_bind_gb_surface_cmd {
  1587. SVGA3dCmdHeader header;
  1588. SVGA3dCmdBindGBSurface body;
  1589. } *cmd;
  1590. cmd = container_of(header, struct vmw_bind_gb_surface_cmd, header);
  1591. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_surface,
  1592. user_surface_converter,
  1593. &cmd->body.sid, &cmd->body.mobid,
  1594. 0);
  1595. }
  1596. /**
  1597. * vmw_cmd_update_gb_image - Validate an SVGA_3D_CMD_UPDATE_GB_IMAGE
  1598. * command
  1599. *
  1600. * @dev_priv: Pointer to a device private struct.
  1601. * @sw_context: The software context being used for this batch.
  1602. * @header: Pointer to the command header in the command stream.
  1603. */
  1604. static int vmw_cmd_update_gb_image(struct vmw_private *dev_priv,
  1605. struct vmw_sw_context *sw_context,
  1606. SVGA3dCmdHeader *header)
  1607. {
  1608. struct vmw_gb_surface_cmd {
  1609. SVGA3dCmdHeader header;
  1610. SVGA3dCmdUpdateGBImage body;
  1611. } *cmd;
  1612. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1613. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1614. user_surface_converter,
  1615. &cmd->body.image.sid, NULL);
  1616. }
  1617. /**
  1618. * vmw_cmd_update_gb_surface - Validate an SVGA_3D_CMD_UPDATE_GB_SURFACE
  1619. * command
  1620. *
  1621. * @dev_priv: Pointer to a device private struct.
  1622. * @sw_context: The software context being used for this batch.
  1623. * @header: Pointer to the command header in the command stream.
  1624. */
  1625. static int vmw_cmd_update_gb_surface(struct vmw_private *dev_priv,
  1626. struct vmw_sw_context *sw_context,
  1627. SVGA3dCmdHeader *header)
  1628. {
  1629. struct vmw_gb_surface_cmd {
  1630. SVGA3dCmdHeader header;
  1631. SVGA3dCmdUpdateGBSurface body;
  1632. } *cmd;
  1633. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1634. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1635. user_surface_converter,
  1636. &cmd->body.sid, NULL);
  1637. }
  1638. /**
  1639. * vmw_cmd_readback_gb_image - Validate an SVGA_3D_CMD_READBACK_GB_IMAGE
  1640. * command
  1641. *
  1642. * @dev_priv: Pointer to a device private struct.
  1643. * @sw_context: The software context being used for this batch.
  1644. * @header: Pointer to the command header in the command stream.
  1645. */
  1646. static int vmw_cmd_readback_gb_image(struct vmw_private *dev_priv,
  1647. struct vmw_sw_context *sw_context,
  1648. SVGA3dCmdHeader *header)
  1649. {
  1650. struct vmw_gb_surface_cmd {
  1651. SVGA3dCmdHeader header;
  1652. SVGA3dCmdReadbackGBImage body;
  1653. } *cmd;
  1654. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1655. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1656. user_surface_converter,
  1657. &cmd->body.image.sid, NULL);
  1658. }
  1659. /**
  1660. * vmw_cmd_readback_gb_surface - Validate an SVGA_3D_CMD_READBACK_GB_SURFACE
  1661. * command
  1662. *
  1663. * @dev_priv: Pointer to a device private struct.
  1664. * @sw_context: The software context being used for this batch.
  1665. * @header: Pointer to the command header in the command stream.
  1666. */
  1667. static int vmw_cmd_readback_gb_surface(struct vmw_private *dev_priv,
  1668. struct vmw_sw_context *sw_context,
  1669. SVGA3dCmdHeader *header)
  1670. {
  1671. struct vmw_gb_surface_cmd {
  1672. SVGA3dCmdHeader header;
  1673. SVGA3dCmdReadbackGBSurface body;
  1674. } *cmd;
  1675. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1676. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1677. user_surface_converter,
  1678. &cmd->body.sid, NULL);
  1679. }
  1680. /**
  1681. * vmw_cmd_invalidate_gb_image - Validate an SVGA_3D_CMD_INVALIDATE_GB_IMAGE
  1682. * command
  1683. *
  1684. * @dev_priv: Pointer to a device private struct.
  1685. * @sw_context: The software context being used for this batch.
  1686. * @header: Pointer to the command header in the command stream.
  1687. */
  1688. static int vmw_cmd_invalidate_gb_image(struct vmw_private *dev_priv,
  1689. struct vmw_sw_context *sw_context,
  1690. SVGA3dCmdHeader *header)
  1691. {
  1692. struct vmw_gb_surface_cmd {
  1693. SVGA3dCmdHeader header;
  1694. SVGA3dCmdInvalidateGBImage body;
  1695. } *cmd;
  1696. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1697. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1698. user_surface_converter,
  1699. &cmd->body.image.sid, NULL);
  1700. }
  1701. /**
  1702. * vmw_cmd_invalidate_gb_surface - Validate an
  1703. * SVGA_3D_CMD_INVALIDATE_GB_SURFACE command
  1704. *
  1705. * @dev_priv: Pointer to a device private struct.
  1706. * @sw_context: The software context being used for this batch.
  1707. * @header: Pointer to the command header in the command stream.
  1708. */
  1709. static int vmw_cmd_invalidate_gb_surface(struct vmw_private *dev_priv,
  1710. struct vmw_sw_context *sw_context,
  1711. SVGA3dCmdHeader *header)
  1712. {
  1713. struct vmw_gb_surface_cmd {
  1714. SVGA3dCmdHeader header;
  1715. SVGA3dCmdInvalidateGBSurface body;
  1716. } *cmd;
  1717. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1718. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1719. user_surface_converter,
  1720. &cmd->body.sid, NULL);
  1721. }
  1722. /**
  1723. * vmw_cmd_shader_define - Validate an SVGA_3D_CMD_SHADER_DEFINE
  1724. * command
  1725. *
  1726. * @dev_priv: Pointer to a device private struct.
  1727. * @sw_context: The software context being used for this batch.
  1728. * @header: Pointer to the command header in the command stream.
  1729. */
  1730. static int vmw_cmd_shader_define(struct vmw_private *dev_priv,
  1731. struct vmw_sw_context *sw_context,
  1732. SVGA3dCmdHeader *header)
  1733. {
  1734. struct vmw_shader_define_cmd {
  1735. SVGA3dCmdHeader header;
  1736. SVGA3dCmdDefineShader body;
  1737. } *cmd;
  1738. int ret;
  1739. size_t size;
  1740. struct vmw_resource *ctx;
  1741. cmd = container_of(header, struct vmw_shader_define_cmd,
  1742. header);
  1743. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1744. user_context_converter, &cmd->body.cid,
  1745. &ctx);
  1746. if (unlikely(ret != 0))
  1747. return ret;
  1748. if (unlikely(!dev_priv->has_mob))
  1749. return 0;
  1750. size = cmd->header.size - sizeof(cmd->body);
  1751. ret = vmw_compat_shader_add(dev_priv,
  1752. vmw_context_res_man(ctx),
  1753. cmd->body.shid, cmd + 1,
  1754. cmd->body.type, size,
  1755. &sw_context->staged_cmd_res);
  1756. if (unlikely(ret != 0))
  1757. return ret;
  1758. return vmw_resource_relocation_add(sw_context,
  1759. NULL,
  1760. vmw_ptr_diff(sw_context->buf_start,
  1761. &cmd->header.id),
  1762. vmw_res_rel_nop);
  1763. }
  1764. /**
  1765. * vmw_cmd_shader_destroy - Validate an SVGA_3D_CMD_SHADER_DESTROY
  1766. * command
  1767. *
  1768. * @dev_priv: Pointer to a device private struct.
  1769. * @sw_context: The software context being used for this batch.
  1770. * @header: Pointer to the command header in the command stream.
  1771. */
  1772. static int vmw_cmd_shader_destroy(struct vmw_private *dev_priv,
  1773. struct vmw_sw_context *sw_context,
  1774. SVGA3dCmdHeader *header)
  1775. {
  1776. struct vmw_shader_destroy_cmd {
  1777. SVGA3dCmdHeader header;
  1778. SVGA3dCmdDestroyShader body;
  1779. } *cmd;
  1780. int ret;
  1781. struct vmw_resource *ctx;
  1782. cmd = container_of(header, struct vmw_shader_destroy_cmd,
  1783. header);
  1784. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1785. user_context_converter, &cmd->body.cid,
  1786. &ctx);
  1787. if (unlikely(ret != 0))
  1788. return ret;
  1789. if (unlikely(!dev_priv->has_mob))
  1790. return 0;
  1791. ret = vmw_shader_remove(vmw_context_res_man(ctx),
  1792. cmd->body.shid,
  1793. cmd->body.type,
  1794. &sw_context->staged_cmd_res);
  1795. if (unlikely(ret != 0))
  1796. return ret;
  1797. return vmw_resource_relocation_add(sw_context,
  1798. NULL,
  1799. vmw_ptr_diff(sw_context->buf_start,
  1800. &cmd->header.id),
  1801. vmw_res_rel_nop);
  1802. }
  1803. /**
  1804. * vmw_cmd_set_shader - Validate an SVGA_3D_CMD_SET_SHADER
  1805. * command
  1806. *
  1807. * @dev_priv: Pointer to a device private struct.
  1808. * @sw_context: The software context being used for this batch.
  1809. * @header: Pointer to the command header in the command stream.
  1810. */
  1811. static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
  1812. struct vmw_sw_context *sw_context,
  1813. SVGA3dCmdHeader *header)
  1814. {
  1815. struct vmw_set_shader_cmd {
  1816. SVGA3dCmdHeader header;
  1817. SVGA3dCmdSetShader body;
  1818. } *cmd;
  1819. struct vmw_ctx_bindinfo_shader binding;
  1820. struct vmw_resource *ctx, *res = NULL;
  1821. struct vmw_ctx_validation_info *ctx_info;
  1822. int ret;
  1823. cmd = container_of(header, struct vmw_set_shader_cmd,
  1824. header);
  1825. if (cmd->body.type >= SVGA3D_SHADERTYPE_PREDX_MAX) {
  1826. DRM_ERROR("Illegal shader type %u.\n",
  1827. (unsigned) cmd->body.type);
  1828. return -EINVAL;
  1829. }
  1830. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1831. user_context_converter, &cmd->body.cid,
  1832. &ctx);
  1833. if (unlikely(ret != 0))
  1834. return ret;
  1835. if (!dev_priv->has_mob)
  1836. return 0;
  1837. if (cmd->body.shid != SVGA3D_INVALID_ID) {
  1838. res = vmw_shader_lookup(vmw_context_res_man(ctx),
  1839. cmd->body.shid,
  1840. cmd->body.type);
  1841. if (!IS_ERR(res)) {
  1842. ret = vmw_execbuf_res_noctx_val_add(sw_context, res);
  1843. if (unlikely(ret != 0))
  1844. return ret;
  1845. }
  1846. }
  1847. if (IS_ERR_OR_NULL(res)) {
  1848. ret = vmw_cmd_res_check(dev_priv, sw_context,
  1849. vmw_res_shader,
  1850. user_shader_converter,
  1851. &cmd->body.shid, &res);
  1852. if (unlikely(ret != 0))
  1853. return ret;
  1854. }
  1855. ctx_info = vmw_execbuf_info_from_res(sw_context, ctx);
  1856. if (!ctx_info)
  1857. return -EINVAL;
  1858. binding.bi.ctx = ctx;
  1859. binding.bi.res = res;
  1860. binding.bi.bt = vmw_ctx_binding_shader;
  1861. binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
  1862. vmw_binding_add(ctx_info->staged, &binding.bi,
  1863. binding.shader_slot, 0);
  1864. return 0;
  1865. }
  1866. /**
  1867. * vmw_cmd_set_shader_const - Validate an SVGA_3D_CMD_SET_SHADER_CONST
  1868. * command
  1869. *
  1870. * @dev_priv: Pointer to a device private struct.
  1871. * @sw_context: The software context being used for this batch.
  1872. * @header: Pointer to the command header in the command stream.
  1873. */
  1874. static int vmw_cmd_set_shader_const(struct vmw_private *dev_priv,
  1875. struct vmw_sw_context *sw_context,
  1876. SVGA3dCmdHeader *header)
  1877. {
  1878. struct vmw_set_shader_const_cmd {
  1879. SVGA3dCmdHeader header;
  1880. SVGA3dCmdSetShaderConst body;
  1881. } *cmd;
  1882. int ret;
  1883. cmd = container_of(header, struct vmw_set_shader_const_cmd,
  1884. header);
  1885. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1886. user_context_converter, &cmd->body.cid,
  1887. NULL);
  1888. if (unlikely(ret != 0))
  1889. return ret;
  1890. if (dev_priv->has_mob)
  1891. header->id = SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE;
  1892. return 0;
  1893. }
  1894. /**
  1895. * vmw_cmd_bind_gb_shader - Validate an SVGA_3D_CMD_BIND_GB_SHADER
  1896. * command
  1897. *
  1898. * @dev_priv: Pointer to a device private struct.
  1899. * @sw_context: The software context being used for this batch.
  1900. * @header: Pointer to the command header in the command stream.
  1901. */
  1902. static int vmw_cmd_bind_gb_shader(struct vmw_private *dev_priv,
  1903. struct vmw_sw_context *sw_context,
  1904. SVGA3dCmdHeader *header)
  1905. {
  1906. struct vmw_bind_gb_shader_cmd {
  1907. SVGA3dCmdHeader header;
  1908. SVGA3dCmdBindGBShader body;
  1909. } *cmd;
  1910. cmd = container_of(header, struct vmw_bind_gb_shader_cmd,
  1911. header);
  1912. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_shader,
  1913. user_shader_converter,
  1914. &cmd->body.shid, &cmd->body.mobid,
  1915. cmd->body.offsetInBytes);
  1916. }
  1917. /**
  1918. * vmw_cmd_dx_set_single_constant_buffer - Validate an
  1919. * SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER command.
  1920. *
  1921. * @dev_priv: Pointer to a device private struct.
  1922. * @sw_context: The software context being used for this batch.
  1923. * @header: Pointer to the command header in the command stream.
  1924. */
  1925. static int
  1926. vmw_cmd_dx_set_single_constant_buffer(struct vmw_private *dev_priv,
  1927. struct vmw_sw_context *sw_context,
  1928. SVGA3dCmdHeader *header)
  1929. {
  1930. struct {
  1931. SVGA3dCmdHeader header;
  1932. SVGA3dCmdDXSetSingleConstantBuffer body;
  1933. } *cmd;
  1934. struct vmw_resource *res = NULL;
  1935. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  1936. struct vmw_ctx_bindinfo_cb binding;
  1937. int ret;
  1938. if (unlikely(ctx_node == NULL)) {
  1939. DRM_ERROR("DX Context not set.\n");
  1940. return -EINVAL;
  1941. }
  1942. cmd = container_of(header, typeof(*cmd), header);
  1943. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1944. user_surface_converter,
  1945. &cmd->body.sid, &res);
  1946. if (unlikely(ret != 0))
  1947. return ret;
  1948. binding.bi.ctx = ctx_node->ctx;
  1949. binding.bi.res = res;
  1950. binding.bi.bt = vmw_ctx_binding_cb;
  1951. binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
  1952. binding.offset = cmd->body.offsetInBytes;
  1953. binding.size = cmd->body.sizeInBytes;
  1954. binding.slot = cmd->body.slot;
  1955. if (binding.shader_slot >= SVGA3D_NUM_SHADERTYPE_DX10 ||
  1956. binding.slot >= SVGA3D_DX_MAX_CONSTBUFFERS) {
  1957. DRM_ERROR("Illegal const buffer shader %u slot %u.\n",
  1958. (unsigned) cmd->body.type,
  1959. (unsigned) binding.slot);
  1960. return -EINVAL;
  1961. }
  1962. vmw_binding_add(ctx_node->staged, &binding.bi,
  1963. binding.shader_slot, binding.slot);
  1964. return 0;
  1965. }
  1966. /**
  1967. * vmw_cmd_dx_set_shader_res - Validate an
  1968. * SVGA_3D_CMD_DX_SET_SHADER_RESOURCES command
  1969. *
  1970. * @dev_priv: Pointer to a device private struct.
  1971. * @sw_context: The software context being used for this batch.
  1972. * @header: Pointer to the command header in the command stream.
  1973. */
  1974. static int vmw_cmd_dx_set_shader_res(struct vmw_private *dev_priv,
  1975. struct vmw_sw_context *sw_context,
  1976. SVGA3dCmdHeader *header)
  1977. {
  1978. struct {
  1979. SVGA3dCmdHeader header;
  1980. SVGA3dCmdDXSetShaderResources body;
  1981. } *cmd = container_of(header, typeof(*cmd), header);
  1982. u32 num_sr_view = (cmd->header.size - sizeof(cmd->body)) /
  1983. sizeof(SVGA3dShaderResourceViewId);
  1984. if ((u64) cmd->body.startView + (u64) num_sr_view >
  1985. (u64) SVGA3D_DX_MAX_SRVIEWS ||
  1986. cmd->body.type >= SVGA3D_SHADERTYPE_DX10_MAX) {
  1987. DRM_ERROR("Invalid shader binding.\n");
  1988. return -EINVAL;
  1989. }
  1990. return vmw_view_bindings_add(sw_context, vmw_view_sr,
  1991. vmw_ctx_binding_sr,
  1992. cmd->body.type - SVGA3D_SHADERTYPE_MIN,
  1993. (void *) &cmd[1], num_sr_view,
  1994. cmd->body.startView);
  1995. }
  1996. /**
  1997. * vmw_cmd_dx_set_shader - Validate an SVGA_3D_CMD_DX_SET_SHADER
  1998. * command
  1999. *
  2000. * @dev_priv: Pointer to a device private struct.
  2001. * @sw_context: The software context being used for this batch.
  2002. * @header: Pointer to the command header in the command stream.
  2003. */
  2004. static int vmw_cmd_dx_set_shader(struct vmw_private *dev_priv,
  2005. struct vmw_sw_context *sw_context,
  2006. SVGA3dCmdHeader *header)
  2007. {
  2008. struct {
  2009. SVGA3dCmdHeader header;
  2010. SVGA3dCmdDXSetShader body;
  2011. } *cmd;
  2012. struct vmw_resource *res = NULL;
  2013. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2014. struct vmw_ctx_bindinfo_shader binding;
  2015. int ret = 0;
  2016. if (unlikely(ctx_node == NULL)) {
  2017. DRM_ERROR("DX Context not set.\n");
  2018. return -EINVAL;
  2019. }
  2020. cmd = container_of(header, typeof(*cmd), header);
  2021. if (cmd->body.type >= SVGA3D_SHADERTYPE_DX10_MAX) {
  2022. DRM_ERROR("Illegal shader type %u.\n",
  2023. (unsigned) cmd->body.type);
  2024. return -EINVAL;
  2025. }
  2026. if (cmd->body.shaderId != SVGA3D_INVALID_ID) {
  2027. res = vmw_shader_lookup(sw_context->man, cmd->body.shaderId, 0);
  2028. if (IS_ERR(res)) {
  2029. DRM_ERROR("Could not find shader for binding.\n");
  2030. return PTR_ERR(res);
  2031. }
  2032. ret = vmw_execbuf_res_noctx_val_add(sw_context, res);
  2033. if (ret)
  2034. return ret;
  2035. }
  2036. binding.bi.ctx = ctx_node->ctx;
  2037. binding.bi.res = res;
  2038. binding.bi.bt = vmw_ctx_binding_dx_shader;
  2039. binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
  2040. vmw_binding_add(ctx_node->staged, &binding.bi,
  2041. binding.shader_slot, 0);
  2042. return 0;
  2043. }
  2044. /**
  2045. * vmw_cmd_dx_set_vertex_buffers - Validates an
  2046. * SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS command
  2047. *
  2048. * @dev_priv: Pointer to a device private struct.
  2049. * @sw_context: The software context being used for this batch.
  2050. * @header: Pointer to the command header in the command stream.
  2051. */
  2052. static int vmw_cmd_dx_set_vertex_buffers(struct vmw_private *dev_priv,
  2053. struct vmw_sw_context *sw_context,
  2054. SVGA3dCmdHeader *header)
  2055. {
  2056. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2057. struct vmw_ctx_bindinfo_vb binding;
  2058. struct vmw_resource *res;
  2059. struct {
  2060. SVGA3dCmdHeader header;
  2061. SVGA3dCmdDXSetVertexBuffers body;
  2062. SVGA3dVertexBuffer buf[];
  2063. } *cmd;
  2064. int i, ret, num;
  2065. if (unlikely(ctx_node == NULL)) {
  2066. DRM_ERROR("DX Context not set.\n");
  2067. return -EINVAL;
  2068. }
  2069. cmd = container_of(header, typeof(*cmd), header);
  2070. num = (cmd->header.size - sizeof(cmd->body)) /
  2071. sizeof(SVGA3dVertexBuffer);
  2072. if ((u64)num + (u64)cmd->body.startBuffer >
  2073. (u64)SVGA3D_DX_MAX_VERTEXBUFFERS) {
  2074. DRM_ERROR("Invalid number of vertex buffers.\n");
  2075. return -EINVAL;
  2076. }
  2077. for (i = 0; i < num; i++) {
  2078. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2079. user_surface_converter,
  2080. &cmd->buf[i].sid, &res);
  2081. if (unlikely(ret != 0))
  2082. return ret;
  2083. binding.bi.ctx = ctx_node->ctx;
  2084. binding.bi.bt = vmw_ctx_binding_vb;
  2085. binding.bi.res = res;
  2086. binding.offset = cmd->buf[i].offset;
  2087. binding.stride = cmd->buf[i].stride;
  2088. binding.slot = i + cmd->body.startBuffer;
  2089. vmw_binding_add(ctx_node->staged, &binding.bi,
  2090. 0, binding.slot);
  2091. }
  2092. return 0;
  2093. }
  2094. /**
  2095. * vmw_cmd_dx_ia_set_vertex_buffers - Validate an
  2096. * SVGA_3D_CMD_DX_IA_SET_INDEX_BUFFER command.
  2097. *
  2098. * @dev_priv: Pointer to a device private struct.
  2099. * @sw_context: The software context being used for this batch.
  2100. * @header: Pointer to the command header in the command stream.
  2101. */
  2102. static int vmw_cmd_dx_set_index_buffer(struct vmw_private *dev_priv,
  2103. struct vmw_sw_context *sw_context,
  2104. SVGA3dCmdHeader *header)
  2105. {
  2106. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2107. struct vmw_ctx_bindinfo_ib binding;
  2108. struct vmw_resource *res;
  2109. struct {
  2110. SVGA3dCmdHeader header;
  2111. SVGA3dCmdDXSetIndexBuffer body;
  2112. } *cmd;
  2113. int ret;
  2114. if (unlikely(ctx_node == NULL)) {
  2115. DRM_ERROR("DX Context not set.\n");
  2116. return -EINVAL;
  2117. }
  2118. cmd = container_of(header, typeof(*cmd), header);
  2119. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2120. user_surface_converter,
  2121. &cmd->body.sid, &res);
  2122. if (unlikely(ret != 0))
  2123. return ret;
  2124. binding.bi.ctx = ctx_node->ctx;
  2125. binding.bi.res = res;
  2126. binding.bi.bt = vmw_ctx_binding_ib;
  2127. binding.offset = cmd->body.offset;
  2128. binding.format = cmd->body.format;
  2129. vmw_binding_add(ctx_node->staged, &binding.bi, 0, 0);
  2130. return 0;
  2131. }
  2132. /**
  2133. * vmw_cmd_dx_set_rendertarget - Validate an
  2134. * SVGA_3D_CMD_DX_SET_RENDERTARGETS command
  2135. *
  2136. * @dev_priv: Pointer to a device private struct.
  2137. * @sw_context: The software context being used for this batch.
  2138. * @header: Pointer to the command header in the command stream.
  2139. */
  2140. static int vmw_cmd_dx_set_rendertargets(struct vmw_private *dev_priv,
  2141. struct vmw_sw_context *sw_context,
  2142. SVGA3dCmdHeader *header)
  2143. {
  2144. struct {
  2145. SVGA3dCmdHeader header;
  2146. SVGA3dCmdDXSetRenderTargets body;
  2147. } *cmd = container_of(header, typeof(*cmd), header);
  2148. int ret;
  2149. u32 num_rt_view = (cmd->header.size - sizeof(cmd->body)) /
  2150. sizeof(SVGA3dRenderTargetViewId);
  2151. if (num_rt_view > SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS) {
  2152. DRM_ERROR("Invalid DX Rendertarget binding.\n");
  2153. return -EINVAL;
  2154. }
  2155. ret = vmw_view_bindings_add(sw_context, vmw_view_ds,
  2156. vmw_ctx_binding_ds, 0,
  2157. &cmd->body.depthStencilViewId, 1, 0);
  2158. if (ret)
  2159. return ret;
  2160. return vmw_view_bindings_add(sw_context, vmw_view_rt,
  2161. vmw_ctx_binding_dx_rt, 0,
  2162. (void *)&cmd[1], num_rt_view, 0);
  2163. }
  2164. /**
  2165. * vmw_cmd_dx_clear_rendertarget_view - Validate an
  2166. * SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW command
  2167. *
  2168. * @dev_priv: Pointer to a device private struct.
  2169. * @sw_context: The software context being used for this batch.
  2170. * @header: Pointer to the command header in the command stream.
  2171. */
  2172. static int vmw_cmd_dx_clear_rendertarget_view(struct vmw_private *dev_priv,
  2173. struct vmw_sw_context *sw_context,
  2174. SVGA3dCmdHeader *header)
  2175. {
  2176. struct {
  2177. SVGA3dCmdHeader header;
  2178. SVGA3dCmdDXClearRenderTargetView body;
  2179. } *cmd = container_of(header, typeof(*cmd), header);
  2180. return PTR_RET(vmw_view_id_val_add(sw_context, vmw_view_rt,
  2181. cmd->body.renderTargetViewId));
  2182. }
  2183. /**
  2184. * vmw_cmd_dx_clear_rendertarget_view - Validate an
  2185. * SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW command
  2186. *
  2187. * @dev_priv: Pointer to a device private struct.
  2188. * @sw_context: The software context being used for this batch.
  2189. * @header: Pointer to the command header in the command stream.
  2190. */
  2191. static int vmw_cmd_dx_clear_depthstencil_view(struct vmw_private *dev_priv,
  2192. struct vmw_sw_context *sw_context,
  2193. SVGA3dCmdHeader *header)
  2194. {
  2195. struct {
  2196. SVGA3dCmdHeader header;
  2197. SVGA3dCmdDXClearDepthStencilView body;
  2198. } *cmd = container_of(header, typeof(*cmd), header);
  2199. return PTR_RET(vmw_view_id_val_add(sw_context, vmw_view_ds,
  2200. cmd->body.depthStencilViewId));
  2201. }
  2202. static int vmw_cmd_dx_view_define(struct vmw_private *dev_priv,
  2203. struct vmw_sw_context *sw_context,
  2204. SVGA3dCmdHeader *header)
  2205. {
  2206. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2207. struct vmw_resource *srf;
  2208. struct vmw_resource *res;
  2209. enum vmw_view_type view_type;
  2210. int ret;
  2211. /*
  2212. * This is based on the fact that all affected define commands have
  2213. * the same initial command body layout.
  2214. */
  2215. struct {
  2216. SVGA3dCmdHeader header;
  2217. uint32 defined_id;
  2218. uint32 sid;
  2219. } *cmd;
  2220. if (unlikely(ctx_node == NULL)) {
  2221. DRM_ERROR("DX Context not set.\n");
  2222. return -EINVAL;
  2223. }
  2224. view_type = vmw_view_cmd_to_type(header->id);
  2225. if (view_type == vmw_view_max)
  2226. return -EINVAL;
  2227. cmd = container_of(header, typeof(*cmd), header);
  2228. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2229. user_surface_converter,
  2230. &cmd->sid, &srf);
  2231. if (unlikely(ret != 0))
  2232. return ret;
  2233. res = vmw_context_cotable(ctx_node->ctx, vmw_view_cotables[view_type]);
  2234. ret = vmw_cotable_notify(res, cmd->defined_id);
  2235. if (unlikely(ret != 0))
  2236. return ret;
  2237. return vmw_view_add(sw_context->man,
  2238. ctx_node->ctx,
  2239. srf,
  2240. view_type,
  2241. cmd->defined_id,
  2242. header,
  2243. header->size + sizeof(*header),
  2244. &sw_context->staged_cmd_res);
  2245. }
  2246. /**
  2247. * vmw_cmd_dx_set_so_targets - Validate an
  2248. * SVGA_3D_CMD_DX_SET_SOTARGETS command.
  2249. *
  2250. * @dev_priv: Pointer to a device private struct.
  2251. * @sw_context: The software context being used for this batch.
  2252. * @header: Pointer to the command header in the command stream.
  2253. */
  2254. static int vmw_cmd_dx_set_so_targets(struct vmw_private *dev_priv,
  2255. struct vmw_sw_context *sw_context,
  2256. SVGA3dCmdHeader *header)
  2257. {
  2258. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2259. struct vmw_ctx_bindinfo_so binding;
  2260. struct vmw_resource *res;
  2261. struct {
  2262. SVGA3dCmdHeader header;
  2263. SVGA3dCmdDXSetSOTargets body;
  2264. SVGA3dSoTarget targets[];
  2265. } *cmd;
  2266. int i, ret, num;
  2267. if (unlikely(ctx_node == NULL)) {
  2268. DRM_ERROR("DX Context not set.\n");
  2269. return -EINVAL;
  2270. }
  2271. cmd = container_of(header, typeof(*cmd), header);
  2272. num = (cmd->header.size - sizeof(cmd->body)) /
  2273. sizeof(SVGA3dSoTarget);
  2274. if (num > SVGA3D_DX_MAX_SOTARGETS) {
  2275. DRM_ERROR("Invalid DX SO binding.\n");
  2276. return -EINVAL;
  2277. }
  2278. for (i = 0; i < num; i++) {
  2279. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2280. user_surface_converter,
  2281. &cmd->targets[i].sid, &res);
  2282. if (unlikely(ret != 0))
  2283. return ret;
  2284. binding.bi.ctx = ctx_node->ctx;
  2285. binding.bi.res = res;
  2286. binding.bi.bt = vmw_ctx_binding_so,
  2287. binding.offset = cmd->targets[i].offset;
  2288. binding.size = cmd->targets[i].sizeInBytes;
  2289. binding.slot = i;
  2290. vmw_binding_add(ctx_node->staged, &binding.bi,
  2291. 0, binding.slot);
  2292. }
  2293. return 0;
  2294. }
  2295. static int vmw_cmd_dx_so_define(struct vmw_private *dev_priv,
  2296. struct vmw_sw_context *sw_context,
  2297. SVGA3dCmdHeader *header)
  2298. {
  2299. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2300. struct vmw_resource *res;
  2301. /*
  2302. * This is based on the fact that all affected define commands have
  2303. * the same initial command body layout.
  2304. */
  2305. struct {
  2306. SVGA3dCmdHeader header;
  2307. uint32 defined_id;
  2308. } *cmd;
  2309. enum vmw_so_type so_type;
  2310. int ret;
  2311. if (unlikely(ctx_node == NULL)) {
  2312. DRM_ERROR("DX Context not set.\n");
  2313. return -EINVAL;
  2314. }
  2315. so_type = vmw_so_cmd_to_type(header->id);
  2316. res = vmw_context_cotable(ctx_node->ctx, vmw_so_cotables[so_type]);
  2317. cmd = container_of(header, typeof(*cmd), header);
  2318. ret = vmw_cotable_notify(res, cmd->defined_id);
  2319. return ret;
  2320. }
  2321. /**
  2322. * vmw_cmd_dx_check_subresource - Validate an
  2323. * SVGA_3D_CMD_DX_[X]_SUBRESOURCE command
  2324. *
  2325. * @dev_priv: Pointer to a device private struct.
  2326. * @sw_context: The software context being used for this batch.
  2327. * @header: Pointer to the command header in the command stream.
  2328. */
  2329. static int vmw_cmd_dx_check_subresource(struct vmw_private *dev_priv,
  2330. struct vmw_sw_context *sw_context,
  2331. SVGA3dCmdHeader *header)
  2332. {
  2333. struct {
  2334. SVGA3dCmdHeader header;
  2335. union {
  2336. SVGA3dCmdDXReadbackSubResource r_body;
  2337. SVGA3dCmdDXInvalidateSubResource i_body;
  2338. SVGA3dCmdDXUpdateSubResource u_body;
  2339. SVGA3dSurfaceId sid;
  2340. };
  2341. } *cmd;
  2342. BUILD_BUG_ON(offsetof(typeof(*cmd), r_body.sid) !=
  2343. offsetof(typeof(*cmd), sid));
  2344. BUILD_BUG_ON(offsetof(typeof(*cmd), i_body.sid) !=
  2345. offsetof(typeof(*cmd), sid));
  2346. BUILD_BUG_ON(offsetof(typeof(*cmd), u_body.sid) !=
  2347. offsetof(typeof(*cmd), sid));
  2348. cmd = container_of(header, typeof(*cmd), header);
  2349. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2350. user_surface_converter,
  2351. &cmd->sid, NULL);
  2352. }
  2353. static int vmw_cmd_dx_cid_check(struct vmw_private *dev_priv,
  2354. struct vmw_sw_context *sw_context,
  2355. SVGA3dCmdHeader *header)
  2356. {
  2357. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2358. if (unlikely(ctx_node == NULL)) {
  2359. DRM_ERROR("DX Context not set.\n");
  2360. return -EINVAL;
  2361. }
  2362. return 0;
  2363. }
  2364. /**
  2365. * vmw_cmd_dx_view_remove - validate a view remove command and
  2366. * schedule the view resource for removal.
  2367. *
  2368. * @dev_priv: Pointer to a device private struct.
  2369. * @sw_context: The software context being used for this batch.
  2370. * @header: Pointer to the command header in the command stream.
  2371. *
  2372. * Check that the view exists, and if it was not created using this
  2373. * command batch, conditionally make this command a NOP.
  2374. */
  2375. static int vmw_cmd_dx_view_remove(struct vmw_private *dev_priv,
  2376. struct vmw_sw_context *sw_context,
  2377. SVGA3dCmdHeader *header)
  2378. {
  2379. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2380. struct {
  2381. SVGA3dCmdHeader header;
  2382. union vmw_view_destroy body;
  2383. } *cmd = container_of(header, typeof(*cmd), header);
  2384. enum vmw_view_type view_type = vmw_view_cmd_to_type(header->id);
  2385. struct vmw_resource *view;
  2386. int ret;
  2387. if (!ctx_node) {
  2388. DRM_ERROR("DX Context not set.\n");
  2389. return -EINVAL;
  2390. }
  2391. ret = vmw_view_remove(sw_context->man,
  2392. cmd->body.view_id, view_type,
  2393. &sw_context->staged_cmd_res,
  2394. &view);
  2395. if (ret || !view)
  2396. return ret;
  2397. /*
  2398. * If the view wasn't created during this command batch, it might
  2399. * have been removed due to a context swapout, so add a
  2400. * relocation to conditionally make this command a NOP to avoid
  2401. * device errors.
  2402. */
  2403. return vmw_resource_relocation_add(sw_context,
  2404. view,
  2405. vmw_ptr_diff(sw_context->buf_start,
  2406. &cmd->header.id),
  2407. vmw_res_rel_cond_nop);
  2408. }
  2409. /**
  2410. * vmw_cmd_dx_define_shader - Validate an SVGA_3D_CMD_DX_DEFINE_SHADER
  2411. * command
  2412. *
  2413. * @dev_priv: Pointer to a device private struct.
  2414. * @sw_context: The software context being used for this batch.
  2415. * @header: Pointer to the command header in the command stream.
  2416. */
  2417. static int vmw_cmd_dx_define_shader(struct vmw_private *dev_priv,
  2418. struct vmw_sw_context *sw_context,
  2419. SVGA3dCmdHeader *header)
  2420. {
  2421. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2422. struct vmw_resource *res;
  2423. struct {
  2424. SVGA3dCmdHeader header;
  2425. SVGA3dCmdDXDefineShader body;
  2426. } *cmd = container_of(header, typeof(*cmd), header);
  2427. int ret;
  2428. if (!ctx_node) {
  2429. DRM_ERROR("DX Context not set.\n");
  2430. return -EINVAL;
  2431. }
  2432. res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXSHADER);
  2433. ret = vmw_cotable_notify(res, cmd->body.shaderId);
  2434. if (ret)
  2435. return ret;
  2436. return vmw_dx_shader_add(sw_context->man, ctx_node->ctx,
  2437. cmd->body.shaderId, cmd->body.type,
  2438. &sw_context->staged_cmd_res);
  2439. }
  2440. /**
  2441. * vmw_cmd_dx_destroy_shader - Validate an SVGA_3D_CMD_DX_DESTROY_SHADER
  2442. * command
  2443. *
  2444. * @dev_priv: Pointer to a device private struct.
  2445. * @sw_context: The software context being used for this batch.
  2446. * @header: Pointer to the command header in the command stream.
  2447. */
  2448. static int vmw_cmd_dx_destroy_shader(struct vmw_private *dev_priv,
  2449. struct vmw_sw_context *sw_context,
  2450. SVGA3dCmdHeader *header)
  2451. {
  2452. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2453. struct {
  2454. SVGA3dCmdHeader header;
  2455. SVGA3dCmdDXDestroyShader body;
  2456. } *cmd = container_of(header, typeof(*cmd), header);
  2457. int ret;
  2458. if (!ctx_node) {
  2459. DRM_ERROR("DX Context not set.\n");
  2460. return -EINVAL;
  2461. }
  2462. ret = vmw_shader_remove(sw_context->man, cmd->body.shaderId, 0,
  2463. &sw_context->staged_cmd_res);
  2464. if (ret)
  2465. DRM_ERROR("Could not find shader to remove.\n");
  2466. return ret;
  2467. }
  2468. /**
  2469. * vmw_cmd_dx_bind_shader - Validate an SVGA_3D_CMD_DX_BIND_SHADER
  2470. * command
  2471. *
  2472. * @dev_priv: Pointer to a device private struct.
  2473. * @sw_context: The software context being used for this batch.
  2474. * @header: Pointer to the command header in the command stream.
  2475. */
  2476. static int vmw_cmd_dx_bind_shader(struct vmw_private *dev_priv,
  2477. struct vmw_sw_context *sw_context,
  2478. SVGA3dCmdHeader *header)
  2479. {
  2480. struct vmw_resource *ctx;
  2481. struct vmw_resource *res;
  2482. struct {
  2483. SVGA3dCmdHeader header;
  2484. SVGA3dCmdDXBindShader body;
  2485. } *cmd = container_of(header, typeof(*cmd), header);
  2486. int ret;
  2487. if (cmd->body.cid != SVGA3D_INVALID_ID) {
  2488. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  2489. user_context_converter,
  2490. &cmd->body.cid, &ctx);
  2491. if (ret)
  2492. return ret;
  2493. } else {
  2494. if (!sw_context->dx_ctx_node) {
  2495. DRM_ERROR("DX Context not set.\n");
  2496. return -EINVAL;
  2497. }
  2498. ctx = sw_context->dx_ctx_node->ctx;
  2499. }
  2500. res = vmw_shader_lookup(vmw_context_res_man(ctx),
  2501. cmd->body.shid, 0);
  2502. if (IS_ERR(res)) {
  2503. DRM_ERROR("Could not find shader to bind.\n");
  2504. return PTR_ERR(res);
  2505. }
  2506. ret = vmw_execbuf_res_noctx_val_add(sw_context, res);
  2507. if (ret) {
  2508. DRM_ERROR("Error creating resource validation node.\n");
  2509. return ret;
  2510. }
  2511. return vmw_cmd_res_switch_backup(dev_priv, sw_context, res,
  2512. &cmd->body.mobid,
  2513. cmd->body.offsetInBytes);
  2514. }
  2515. /**
  2516. * vmw_cmd_dx_genmips - Validate an SVGA_3D_CMD_DX_GENMIPS command
  2517. *
  2518. * @dev_priv: Pointer to a device private struct.
  2519. * @sw_context: The software context being used for this batch.
  2520. * @header: Pointer to the command header in the command stream.
  2521. */
  2522. static int vmw_cmd_dx_genmips(struct vmw_private *dev_priv,
  2523. struct vmw_sw_context *sw_context,
  2524. SVGA3dCmdHeader *header)
  2525. {
  2526. struct {
  2527. SVGA3dCmdHeader header;
  2528. SVGA3dCmdDXGenMips body;
  2529. } *cmd = container_of(header, typeof(*cmd), header);
  2530. return PTR_RET(vmw_view_id_val_add(sw_context, vmw_view_sr,
  2531. cmd->body.shaderResourceViewId));
  2532. }
  2533. /**
  2534. * vmw_cmd_dx_transfer_from_buffer -
  2535. * Validate an SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER command
  2536. *
  2537. * @dev_priv: Pointer to a device private struct.
  2538. * @sw_context: The software context being used for this batch.
  2539. * @header: Pointer to the command header in the command stream.
  2540. */
  2541. static int vmw_cmd_dx_transfer_from_buffer(struct vmw_private *dev_priv,
  2542. struct vmw_sw_context *sw_context,
  2543. SVGA3dCmdHeader *header)
  2544. {
  2545. struct {
  2546. SVGA3dCmdHeader header;
  2547. SVGA3dCmdDXTransferFromBuffer body;
  2548. } *cmd = container_of(header, typeof(*cmd), header);
  2549. int ret;
  2550. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2551. user_surface_converter,
  2552. &cmd->body.srcSid, NULL);
  2553. if (ret != 0)
  2554. return ret;
  2555. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2556. user_surface_converter,
  2557. &cmd->body.destSid, NULL);
  2558. }
  2559. /**
  2560. * vmw_cmd_intra_surface_copy -
  2561. * Validate an SVGA_3D_CMD_INTRA_SURFACE_COPY command
  2562. *
  2563. * @dev_priv: Pointer to a device private struct.
  2564. * @sw_context: The software context being used for this batch.
  2565. * @header: Pointer to the command header in the command stream.
  2566. */
  2567. static int vmw_cmd_intra_surface_copy(struct vmw_private *dev_priv,
  2568. struct vmw_sw_context *sw_context,
  2569. SVGA3dCmdHeader *header)
  2570. {
  2571. struct {
  2572. SVGA3dCmdHeader header;
  2573. SVGA3dCmdIntraSurfaceCopy body;
  2574. } *cmd = container_of(header, typeof(*cmd), header);
  2575. if (!(dev_priv->capabilities2 & SVGA_CAP2_INTRA_SURFACE_COPY))
  2576. return -EINVAL;
  2577. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2578. user_surface_converter,
  2579. &cmd->body.surface.sid, NULL);
  2580. }
  2581. static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
  2582. struct vmw_sw_context *sw_context,
  2583. void *buf, uint32_t *size)
  2584. {
  2585. uint32_t size_remaining = *size;
  2586. uint32_t cmd_id;
  2587. cmd_id = ((uint32_t *)buf)[0];
  2588. switch (cmd_id) {
  2589. case SVGA_CMD_UPDATE:
  2590. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
  2591. break;
  2592. case SVGA_CMD_DEFINE_GMRFB:
  2593. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
  2594. break;
  2595. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  2596. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  2597. break;
  2598. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  2599. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  2600. break;
  2601. default:
  2602. DRM_ERROR("Unsupported SVGA command: %u.\n", cmd_id);
  2603. return -EINVAL;
  2604. }
  2605. if (*size > size_remaining) {
  2606. DRM_ERROR("Invalid SVGA command (size mismatch):"
  2607. " %u.\n", cmd_id);
  2608. return -EINVAL;
  2609. }
  2610. if (unlikely(!sw_context->kernel)) {
  2611. DRM_ERROR("Kernel only SVGA command: %u.\n", cmd_id);
  2612. return -EPERM;
  2613. }
  2614. if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
  2615. return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
  2616. return 0;
  2617. }
  2618. static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
  2619. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid,
  2620. false, false, false),
  2621. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid,
  2622. false, false, false),
  2623. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check,
  2624. true, false, false),
  2625. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check,
  2626. true, false, false),
  2627. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma,
  2628. true, false, false),
  2629. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid,
  2630. false, false, false),
  2631. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid,
  2632. false, false, false),
  2633. VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check,
  2634. true, false, false),
  2635. VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check,
  2636. true, false, false),
  2637. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check,
  2638. true, false, false),
  2639. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
  2640. &vmw_cmd_set_render_target_check, true, false, false),
  2641. VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state,
  2642. true, false, false),
  2643. VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check,
  2644. true, false, false),
  2645. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check,
  2646. true, false, false),
  2647. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check,
  2648. true, false, false),
  2649. VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check,
  2650. true, false, false),
  2651. VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check,
  2652. true, false, false),
  2653. VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check,
  2654. true, false, false),
  2655. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check,
  2656. false, false, false),
  2657. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_shader_define,
  2658. true, false, false),
  2659. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_shader_destroy,
  2660. true, false, false),
  2661. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader,
  2662. true, false, false),
  2663. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_set_shader_const,
  2664. true, false, false),
  2665. VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw,
  2666. true, false, false),
  2667. VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check,
  2668. true, false, false),
  2669. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query,
  2670. true, false, false),
  2671. VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query,
  2672. true, false, false),
  2673. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query,
  2674. true, false, false),
  2675. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok,
  2676. true, false, false),
  2677. VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
  2678. &vmw_cmd_blt_surf_screen_check, false, false, false),
  2679. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid,
  2680. false, false, false),
  2681. VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid,
  2682. false, false, false),
  2683. VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid,
  2684. false, false, false),
  2685. VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid,
  2686. false, false, false),
  2687. VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid,
  2688. false, false, false),
  2689. VMW_CMD_DEF(SVGA_3D_CMD_DEAD1, &vmw_cmd_invalid,
  2690. false, false, false),
  2691. VMW_CMD_DEF(SVGA_3D_CMD_DEAD2, &vmw_cmd_invalid,
  2692. false, false, false),
  2693. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_BITBLT, &vmw_cmd_invalid,
  2694. false, false, false),
  2695. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_TRANSBLT, &vmw_cmd_invalid,
  2696. false, false, false),
  2697. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_STRETCHBLT, &vmw_cmd_invalid,
  2698. false, false, false),
  2699. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_COLORFILL, &vmw_cmd_invalid,
  2700. false, false, false),
  2701. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_ALPHABLEND, &vmw_cmd_invalid,
  2702. false, false, false),
  2703. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND, &vmw_cmd_invalid,
  2704. false, false, false),
  2705. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid,
  2706. false, false, true),
  2707. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid,
  2708. false, false, true),
  2709. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid,
  2710. false, false, true),
  2711. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid,
  2712. false, false, true),
  2713. VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB64, &vmw_cmd_invalid,
  2714. false, false, true),
  2715. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid,
  2716. false, false, true),
  2717. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid,
  2718. false, false, true),
  2719. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid,
  2720. false, false, true),
  2721. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface,
  2722. true, false, true),
  2723. VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid,
  2724. false, false, true),
  2725. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image,
  2726. true, false, true),
  2727. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE,
  2728. &vmw_cmd_update_gb_surface, true, false, true),
  2729. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE,
  2730. &vmw_cmd_readback_gb_image, true, false, true),
  2731. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE,
  2732. &vmw_cmd_readback_gb_surface, true, false, true),
  2733. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
  2734. &vmw_cmd_invalidate_gb_image, true, false, true),
  2735. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE,
  2736. &vmw_cmd_invalidate_gb_surface, true, false, true),
  2737. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid,
  2738. false, false, true),
  2739. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid,
  2740. false, false, true),
  2741. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid,
  2742. false, false, true),
  2743. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid,
  2744. false, false, true),
  2745. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid,
  2746. false, false, true),
  2747. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid,
  2748. false, false, true),
  2749. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader,
  2750. true, false, true),
  2751. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid,
  2752. false, false, true),
  2753. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE64, &vmw_cmd_invalid,
  2754. false, false, false),
  2755. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query,
  2756. true, false, true),
  2757. VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query,
  2758. true, false, true),
  2759. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query,
  2760. true, false, true),
  2761. VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok,
  2762. true, false, true),
  2763. VMW_CMD_DEF(SVGA_3D_CMD_NOP_ERROR, &vmw_cmd_ok,
  2764. true, false, true),
  2765. VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid,
  2766. false, false, true),
  2767. VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid,
  2768. false, false, true),
  2769. VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid,
  2770. false, false, true),
  2771. VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid,
  2772. false, false, true),
  2773. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid,
  2774. false, false, true),
  2775. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid,
  2776. false, false, true),
  2777. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid,
  2778. false, false, true),
  2779. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid,
  2780. false, false, true),
  2781. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  2782. false, false, true),
  2783. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  2784. false, false, true),
  2785. VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check,
  2786. true, false, true),
  2787. VMW_CMD_DEF(SVGA_3D_CMD_GB_SCREEN_DMA, &vmw_cmd_invalid,
  2788. false, false, true),
  2789. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH, &vmw_cmd_invalid,
  2790. false, false, true),
  2791. VMW_CMD_DEF(SVGA_3D_CMD_GB_MOB_FENCE, &vmw_cmd_invalid,
  2792. false, false, true),
  2793. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE_V2, &vmw_cmd_invalid,
  2794. false, false, true),
  2795. /*
  2796. * DX commands
  2797. */
  2798. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_CONTEXT, &vmw_cmd_invalid,
  2799. false, false, true),
  2800. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_CONTEXT, &vmw_cmd_invalid,
  2801. false, false, true),
  2802. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_CONTEXT, &vmw_cmd_invalid,
  2803. false, false, true),
  2804. VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_CONTEXT, &vmw_cmd_invalid,
  2805. false, false, true),
  2806. VMW_CMD_DEF(SVGA_3D_CMD_DX_INVALIDATE_CONTEXT, &vmw_cmd_invalid,
  2807. false, false, true),
  2808. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER,
  2809. &vmw_cmd_dx_set_single_constant_buffer, true, false, true),
  2810. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
  2811. &vmw_cmd_dx_set_shader_res, true, false, true),
  2812. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SHADER, &vmw_cmd_dx_set_shader,
  2813. true, false, true),
  2814. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SAMPLERS, &vmw_cmd_dx_cid_check,
  2815. true, false, true),
  2816. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW, &vmw_cmd_dx_cid_check,
  2817. true, false, true),
  2818. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED, &vmw_cmd_dx_cid_check,
  2819. true, false, true),
  2820. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INSTANCED, &vmw_cmd_dx_cid_check,
  2821. true, false, true),
  2822. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED,
  2823. &vmw_cmd_dx_cid_check, true, false, true),
  2824. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_AUTO, &vmw_cmd_dx_cid_check,
  2825. true, false, true),
  2826. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS,
  2827. &vmw_cmd_dx_set_vertex_buffers, true, false, true),
  2828. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_INDEX_BUFFER,
  2829. &vmw_cmd_dx_set_index_buffer, true, false, true),
  2830. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_RENDERTARGETS,
  2831. &vmw_cmd_dx_set_rendertargets, true, false, true),
  2832. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_BLEND_STATE, &vmw_cmd_dx_cid_check,
  2833. true, false, true),
  2834. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE,
  2835. &vmw_cmd_dx_cid_check, true, false, true),
  2836. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_RASTERIZER_STATE,
  2837. &vmw_cmd_dx_cid_check, true, false, true),
  2838. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_QUERY, &vmw_cmd_dx_define_query,
  2839. true, false, true),
  2840. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_dx_cid_check,
  2841. true, false, true),
  2842. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_QUERY, &vmw_cmd_dx_bind_query,
  2843. true, false, true),
  2844. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_QUERY_OFFSET,
  2845. &vmw_cmd_dx_cid_check, true, false, true),
  2846. VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_dx_cid_check,
  2847. true, false, true),
  2848. VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_dx_cid_check,
  2849. true, false, true),
  2850. VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_QUERY, &vmw_cmd_invalid,
  2851. true, false, true),
  2852. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_dx_cid_check,
  2853. true, false, true),
  2854. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VIEWPORTS, &vmw_cmd_dx_cid_check,
  2855. true, false, true),
  2856. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SCISSORRECTS, &vmw_cmd_dx_cid_check,
  2857. true, false, true),
  2858. VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW,
  2859. &vmw_cmd_dx_clear_rendertarget_view, true, false, true),
  2860. VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW,
  2861. &vmw_cmd_dx_clear_depthstencil_view, true, false, true),
  2862. VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY, &vmw_cmd_invalid,
  2863. true, false, true),
  2864. VMW_CMD_DEF(SVGA_3D_CMD_DX_GENMIPS, &vmw_cmd_dx_genmips,
  2865. true, false, true),
  2866. VMW_CMD_DEF(SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE,
  2867. &vmw_cmd_dx_check_subresource, true, false, true),
  2868. VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_SUBRESOURCE,
  2869. &vmw_cmd_dx_check_subresource, true, false, true),
  2870. VMW_CMD_DEF(SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE,
  2871. &vmw_cmd_dx_check_subresource, true, false, true),
  2872. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW,
  2873. &vmw_cmd_dx_view_define, true, false, true),
  2874. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW,
  2875. &vmw_cmd_dx_view_remove, true, false, true),
  2876. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
  2877. &vmw_cmd_dx_view_define, true, false, true),
  2878. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW,
  2879. &vmw_cmd_dx_view_remove, true, false, true),
  2880. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW,
  2881. &vmw_cmd_dx_view_define, true, false, true),
  2882. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW,
  2883. &vmw_cmd_dx_view_remove, true, false, true),
  2884. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT,
  2885. &vmw_cmd_dx_so_define, true, false, true),
  2886. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT,
  2887. &vmw_cmd_dx_cid_check, true, false, true),
  2888. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_BLEND_STATE,
  2889. &vmw_cmd_dx_so_define, true, false, true),
  2890. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_BLEND_STATE,
  2891. &vmw_cmd_dx_cid_check, true, false, true),
  2892. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE,
  2893. &vmw_cmd_dx_so_define, true, false, true),
  2894. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE,
  2895. &vmw_cmd_dx_cid_check, true, false, true),
  2896. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE,
  2897. &vmw_cmd_dx_so_define, true, false, true),
  2898. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE,
  2899. &vmw_cmd_dx_cid_check, true, false, true),
  2900. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE,
  2901. &vmw_cmd_dx_so_define, true, false, true),
  2902. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE,
  2903. &vmw_cmd_dx_cid_check, true, false, true),
  2904. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SHADER,
  2905. &vmw_cmd_dx_define_shader, true, false, true),
  2906. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SHADER,
  2907. &vmw_cmd_dx_destroy_shader, true, false, true),
  2908. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_SHADER,
  2909. &vmw_cmd_dx_bind_shader, true, false, true),
  2910. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT,
  2911. &vmw_cmd_dx_so_define, true, false, true),
  2912. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT,
  2913. &vmw_cmd_dx_cid_check, true, false, true),
  2914. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_STREAMOUTPUT, &vmw_cmd_dx_cid_check,
  2915. true, false, true),
  2916. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SOTARGETS,
  2917. &vmw_cmd_dx_set_so_targets, true, false, true),
  2918. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_INPUT_LAYOUT,
  2919. &vmw_cmd_dx_cid_check, true, false, true),
  2920. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_TOPOLOGY,
  2921. &vmw_cmd_dx_cid_check, true, false, true),
  2922. VMW_CMD_DEF(SVGA_3D_CMD_DX_BUFFER_COPY,
  2923. &vmw_cmd_buffer_copy_check, true, false, true),
  2924. VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY_REGION,
  2925. &vmw_cmd_pred_copy_check, true, false, true),
  2926. VMW_CMD_DEF(SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,
  2927. &vmw_cmd_dx_transfer_from_buffer,
  2928. true, false, true),
  2929. VMW_CMD_DEF(SVGA_3D_CMD_INTRA_SURFACE_COPY, &vmw_cmd_intra_surface_copy,
  2930. true, false, true),
  2931. };
  2932. bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd)
  2933. {
  2934. u32 cmd_id = ((u32 *) buf)[0];
  2935. if (cmd_id >= SVGA_CMD_MAX) {
  2936. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  2937. const struct vmw_cmd_entry *entry;
  2938. *size = header->size + sizeof(SVGA3dCmdHeader);
  2939. cmd_id = header->id;
  2940. if (cmd_id >= SVGA_3D_CMD_MAX)
  2941. return false;
  2942. cmd_id -= SVGA_3D_CMD_BASE;
  2943. entry = &vmw_cmd_entries[cmd_id];
  2944. *cmd = entry->cmd_name;
  2945. return true;
  2946. }
  2947. switch (cmd_id) {
  2948. case SVGA_CMD_UPDATE:
  2949. *cmd = "SVGA_CMD_UPDATE";
  2950. *size = sizeof(u32) + sizeof(SVGAFifoCmdUpdate);
  2951. break;
  2952. case SVGA_CMD_DEFINE_GMRFB:
  2953. *cmd = "SVGA_CMD_DEFINE_GMRFB";
  2954. *size = sizeof(u32) + sizeof(SVGAFifoCmdDefineGMRFB);
  2955. break;
  2956. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  2957. *cmd = "SVGA_CMD_BLIT_GMRFB_TO_SCREEN";
  2958. *size = sizeof(u32) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  2959. break;
  2960. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  2961. *cmd = "SVGA_CMD_BLIT_SCREEN_TO_GMRFB";
  2962. *size = sizeof(u32) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  2963. break;
  2964. default:
  2965. *cmd = "UNKNOWN";
  2966. *size = 0;
  2967. return false;
  2968. }
  2969. return true;
  2970. }
  2971. static int vmw_cmd_check(struct vmw_private *dev_priv,
  2972. struct vmw_sw_context *sw_context,
  2973. void *buf, uint32_t *size)
  2974. {
  2975. uint32_t cmd_id;
  2976. uint32_t size_remaining = *size;
  2977. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  2978. int ret;
  2979. const struct vmw_cmd_entry *entry;
  2980. bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS;
  2981. cmd_id = ((uint32_t *)buf)[0];
  2982. /* Handle any none 3D commands */
  2983. if (unlikely(cmd_id < SVGA_CMD_MAX))
  2984. return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
  2985. cmd_id = header->id;
  2986. *size = header->size + sizeof(SVGA3dCmdHeader);
  2987. cmd_id -= SVGA_3D_CMD_BASE;
  2988. if (unlikely(*size > size_remaining))
  2989. goto out_invalid;
  2990. if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
  2991. goto out_invalid;
  2992. entry = &vmw_cmd_entries[cmd_id];
  2993. if (unlikely(!entry->func))
  2994. goto out_invalid;
  2995. if (unlikely(!entry->user_allow && !sw_context->kernel))
  2996. goto out_privileged;
  2997. if (unlikely(entry->gb_disable && gb))
  2998. goto out_old;
  2999. if (unlikely(entry->gb_enable && !gb))
  3000. goto out_new;
  3001. ret = entry->func(dev_priv, sw_context, header);
  3002. if (unlikely(ret != 0))
  3003. goto out_invalid;
  3004. return 0;
  3005. out_invalid:
  3006. DRM_ERROR("Invalid SVGA3D command: %d\n",
  3007. cmd_id + SVGA_3D_CMD_BASE);
  3008. return -EINVAL;
  3009. out_privileged:
  3010. DRM_ERROR("Privileged SVGA3D command: %d\n",
  3011. cmd_id + SVGA_3D_CMD_BASE);
  3012. return -EPERM;
  3013. out_old:
  3014. DRM_ERROR("Deprecated (disallowed) SVGA3D command: %d\n",
  3015. cmd_id + SVGA_3D_CMD_BASE);
  3016. return -EINVAL;
  3017. out_new:
  3018. DRM_ERROR("SVGA3D command: %d not supported by virtual hardware.\n",
  3019. cmd_id + SVGA_3D_CMD_BASE);
  3020. return -EINVAL;
  3021. }
  3022. static int vmw_cmd_check_all(struct vmw_private *dev_priv,
  3023. struct vmw_sw_context *sw_context,
  3024. void *buf,
  3025. uint32_t size)
  3026. {
  3027. int32_t cur_size = size;
  3028. int ret;
  3029. sw_context->buf_start = buf;
  3030. while (cur_size > 0) {
  3031. size = cur_size;
  3032. ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
  3033. if (unlikely(ret != 0))
  3034. return ret;
  3035. buf = (void *)((unsigned long) buf + size);
  3036. cur_size -= size;
  3037. }
  3038. if (unlikely(cur_size != 0)) {
  3039. DRM_ERROR("Command verifier out of sync.\n");
  3040. return -EINVAL;
  3041. }
  3042. return 0;
  3043. }
  3044. static void vmw_free_relocations(struct vmw_sw_context *sw_context)
  3045. {
  3046. /* Memory is validation context memory, so no need to free it */
  3047. INIT_LIST_HEAD(&sw_context->bo_relocations);
  3048. }
  3049. static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
  3050. {
  3051. struct vmw_relocation *reloc;
  3052. struct ttm_buffer_object *bo;
  3053. list_for_each_entry(reloc, &sw_context->bo_relocations, head) {
  3054. bo = &reloc->vbo->base;
  3055. switch (bo->mem.mem_type) {
  3056. case TTM_PL_VRAM:
  3057. reloc->location->offset += bo->offset;
  3058. reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
  3059. break;
  3060. case VMW_PL_GMR:
  3061. reloc->location->gmrId = bo->mem.start;
  3062. break;
  3063. case VMW_PL_MOB:
  3064. *reloc->mob_loc = bo->mem.start;
  3065. break;
  3066. default:
  3067. BUG();
  3068. }
  3069. }
  3070. vmw_free_relocations(sw_context);
  3071. }
  3072. static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
  3073. uint32_t size)
  3074. {
  3075. if (likely(sw_context->cmd_bounce_size >= size))
  3076. return 0;
  3077. if (sw_context->cmd_bounce_size == 0)
  3078. sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
  3079. while (sw_context->cmd_bounce_size < size) {
  3080. sw_context->cmd_bounce_size =
  3081. PAGE_ALIGN(sw_context->cmd_bounce_size +
  3082. (sw_context->cmd_bounce_size >> 1));
  3083. }
  3084. vfree(sw_context->cmd_bounce);
  3085. sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
  3086. if (sw_context->cmd_bounce == NULL) {
  3087. DRM_ERROR("Failed to allocate command bounce buffer.\n");
  3088. sw_context->cmd_bounce_size = 0;
  3089. return -ENOMEM;
  3090. }
  3091. return 0;
  3092. }
  3093. /**
  3094. * vmw_execbuf_fence_commands - create and submit a command stream fence
  3095. *
  3096. * Creates a fence object and submits a command stream marker.
  3097. * If this fails for some reason, We sync the fifo and return NULL.
  3098. * It is then safe to fence buffers with a NULL pointer.
  3099. *
  3100. * If @p_handle is not NULL @file_priv must also not be NULL. Creates
  3101. * a userspace handle if @p_handle is not NULL, otherwise not.
  3102. */
  3103. int vmw_execbuf_fence_commands(struct drm_file *file_priv,
  3104. struct vmw_private *dev_priv,
  3105. struct vmw_fence_obj **p_fence,
  3106. uint32_t *p_handle)
  3107. {
  3108. uint32_t sequence;
  3109. int ret;
  3110. bool synced = false;
  3111. /* p_handle implies file_priv. */
  3112. BUG_ON(p_handle != NULL && file_priv == NULL);
  3113. ret = vmw_fifo_send_fence(dev_priv, &sequence);
  3114. if (unlikely(ret != 0)) {
  3115. DRM_ERROR("Fence submission error. Syncing.\n");
  3116. synced = true;
  3117. }
  3118. if (p_handle != NULL)
  3119. ret = vmw_user_fence_create(file_priv, dev_priv->fman,
  3120. sequence, p_fence, p_handle);
  3121. else
  3122. ret = vmw_fence_create(dev_priv->fman, sequence, p_fence);
  3123. if (unlikely(ret != 0 && !synced)) {
  3124. (void) vmw_fallback_wait(dev_priv, false, false,
  3125. sequence, false,
  3126. VMW_FENCE_WAIT_TIMEOUT);
  3127. *p_fence = NULL;
  3128. }
  3129. return 0;
  3130. }
  3131. /**
  3132. * vmw_execbuf_copy_fence_user - copy fence object information to
  3133. * user-space.
  3134. *
  3135. * @dev_priv: Pointer to a vmw_private struct.
  3136. * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
  3137. * @ret: Return value from fence object creation.
  3138. * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to
  3139. * which the information should be copied.
  3140. * @fence: Pointer to the fenc object.
  3141. * @fence_handle: User-space fence handle.
  3142. * @out_fence_fd: exported file descriptor for the fence. -1 if not used
  3143. * @sync_file: Only used to clean up in case of an error in this function.
  3144. *
  3145. * This function copies fence information to user-space. If copying fails,
  3146. * The user-space struct drm_vmw_fence_rep::error member is hopefully
  3147. * left untouched, and if it's preloaded with an -EFAULT by user-space,
  3148. * the error will hopefully be detected.
  3149. * Also if copying fails, user-space will be unable to signal the fence
  3150. * object so we wait for it immediately, and then unreference the
  3151. * user-space reference.
  3152. */
  3153. void
  3154. vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
  3155. struct vmw_fpriv *vmw_fp,
  3156. int ret,
  3157. struct drm_vmw_fence_rep __user *user_fence_rep,
  3158. struct vmw_fence_obj *fence,
  3159. uint32_t fence_handle,
  3160. int32_t out_fence_fd,
  3161. struct sync_file *sync_file)
  3162. {
  3163. struct drm_vmw_fence_rep fence_rep;
  3164. if (user_fence_rep == NULL)
  3165. return;
  3166. memset(&fence_rep, 0, sizeof(fence_rep));
  3167. fence_rep.error = ret;
  3168. fence_rep.fd = out_fence_fd;
  3169. if (ret == 0) {
  3170. BUG_ON(fence == NULL);
  3171. fence_rep.handle = fence_handle;
  3172. fence_rep.seqno = fence->base.seqno;
  3173. vmw_update_seqno(dev_priv, &dev_priv->fifo);
  3174. fence_rep.passed_seqno = dev_priv->last_read_seqno;
  3175. }
  3176. /*
  3177. * copy_to_user errors will be detected by user space not
  3178. * seeing fence_rep::error filled in. Typically
  3179. * user-space would have pre-set that member to -EFAULT.
  3180. */
  3181. ret = copy_to_user(user_fence_rep, &fence_rep,
  3182. sizeof(fence_rep));
  3183. /*
  3184. * User-space lost the fence object. We need to sync
  3185. * and unreference the handle.
  3186. */
  3187. if (unlikely(ret != 0) && (fence_rep.error == 0)) {
  3188. if (sync_file)
  3189. fput(sync_file->file);
  3190. if (fence_rep.fd != -1) {
  3191. put_unused_fd(fence_rep.fd);
  3192. fence_rep.fd = -1;
  3193. }
  3194. ttm_ref_object_base_unref(vmw_fp->tfile,
  3195. fence_handle, TTM_REF_USAGE);
  3196. DRM_ERROR("Fence copy error. Syncing.\n");
  3197. (void) vmw_fence_obj_wait(fence, false, false,
  3198. VMW_FENCE_WAIT_TIMEOUT);
  3199. }
  3200. }
  3201. /**
  3202. * vmw_execbuf_submit_fifo - Patch a command batch and submit it using
  3203. * the fifo.
  3204. *
  3205. * @dev_priv: Pointer to a device private structure.
  3206. * @kernel_commands: Pointer to the unpatched command batch.
  3207. * @command_size: Size of the unpatched command batch.
  3208. * @sw_context: Structure holding the relocation lists.
  3209. *
  3210. * Side effects: If this function returns 0, then the command batch
  3211. * pointed to by @kernel_commands will have been modified.
  3212. */
  3213. static int vmw_execbuf_submit_fifo(struct vmw_private *dev_priv,
  3214. void *kernel_commands,
  3215. u32 command_size,
  3216. struct vmw_sw_context *sw_context)
  3217. {
  3218. void *cmd;
  3219. if (sw_context->dx_ctx_node)
  3220. cmd = vmw_fifo_reserve_dx(dev_priv, command_size,
  3221. sw_context->dx_ctx_node->ctx->id);
  3222. else
  3223. cmd = vmw_fifo_reserve(dev_priv, command_size);
  3224. if (!cmd) {
  3225. DRM_ERROR("Failed reserving fifo space for commands.\n");
  3226. return -ENOMEM;
  3227. }
  3228. vmw_apply_relocations(sw_context);
  3229. memcpy(cmd, kernel_commands, command_size);
  3230. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  3231. vmw_resource_relocations_free(&sw_context->res_relocations);
  3232. vmw_fifo_commit(dev_priv, command_size);
  3233. return 0;
  3234. }
  3235. /**
  3236. * vmw_execbuf_submit_cmdbuf - Patch a command batch and submit it using
  3237. * the command buffer manager.
  3238. *
  3239. * @dev_priv: Pointer to a device private structure.
  3240. * @header: Opaque handle to the command buffer allocation.
  3241. * @command_size: Size of the unpatched command batch.
  3242. * @sw_context: Structure holding the relocation lists.
  3243. *
  3244. * Side effects: If this function returns 0, then the command buffer
  3245. * represented by @header will have been modified.
  3246. */
  3247. static int vmw_execbuf_submit_cmdbuf(struct vmw_private *dev_priv,
  3248. struct vmw_cmdbuf_header *header,
  3249. u32 command_size,
  3250. struct vmw_sw_context *sw_context)
  3251. {
  3252. u32 id = ((sw_context->dx_ctx_node) ? sw_context->dx_ctx_node->ctx->id :
  3253. SVGA3D_INVALID_ID);
  3254. void *cmd = vmw_cmdbuf_reserve(dev_priv->cman, command_size,
  3255. id, false, header);
  3256. vmw_apply_relocations(sw_context);
  3257. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  3258. vmw_resource_relocations_free(&sw_context->res_relocations);
  3259. vmw_cmdbuf_commit(dev_priv->cman, command_size, header, false);
  3260. return 0;
  3261. }
  3262. /**
  3263. * vmw_execbuf_cmdbuf - Prepare, if possible, a user-space command batch for
  3264. * submission using a command buffer.
  3265. *
  3266. * @dev_priv: Pointer to a device private structure.
  3267. * @user_commands: User-space pointer to the commands to be submitted.
  3268. * @command_size: Size of the unpatched command batch.
  3269. * @header: Out parameter returning the opaque pointer to the command buffer.
  3270. *
  3271. * This function checks whether we can use the command buffer manager for
  3272. * submission and if so, creates a command buffer of suitable size and
  3273. * copies the user data into that buffer.
  3274. *
  3275. * On successful return, the function returns a pointer to the data in the
  3276. * command buffer and *@header is set to non-NULL.
  3277. * If command buffers could not be used, the function will return the value
  3278. * of @kernel_commands on function call. That value may be NULL. In that case,
  3279. * the value of *@header will be set to NULL.
  3280. * If an error is encountered, the function will return a pointer error value.
  3281. * If the function is interrupted by a signal while sleeping, it will return
  3282. * -ERESTARTSYS casted to a pointer error value.
  3283. */
  3284. static void *vmw_execbuf_cmdbuf(struct vmw_private *dev_priv,
  3285. void __user *user_commands,
  3286. void *kernel_commands,
  3287. u32 command_size,
  3288. struct vmw_cmdbuf_header **header)
  3289. {
  3290. size_t cmdbuf_size;
  3291. int ret;
  3292. *header = NULL;
  3293. if (command_size > SVGA_CB_MAX_SIZE) {
  3294. DRM_ERROR("Command buffer is too large.\n");
  3295. return ERR_PTR(-EINVAL);
  3296. }
  3297. if (!dev_priv->cman || kernel_commands)
  3298. return kernel_commands;
  3299. /* If possible, add a little space for fencing. */
  3300. cmdbuf_size = command_size + 512;
  3301. cmdbuf_size = min_t(size_t, cmdbuf_size, SVGA_CB_MAX_SIZE);
  3302. kernel_commands = vmw_cmdbuf_alloc(dev_priv->cman, cmdbuf_size,
  3303. true, header);
  3304. if (IS_ERR(kernel_commands))
  3305. return kernel_commands;
  3306. ret = copy_from_user(kernel_commands, user_commands,
  3307. command_size);
  3308. if (ret) {
  3309. DRM_ERROR("Failed copying commands.\n");
  3310. vmw_cmdbuf_header_free(*header);
  3311. *header = NULL;
  3312. return ERR_PTR(-EFAULT);
  3313. }
  3314. return kernel_commands;
  3315. }
  3316. static int vmw_execbuf_tie_context(struct vmw_private *dev_priv,
  3317. struct vmw_sw_context *sw_context,
  3318. uint32_t handle)
  3319. {
  3320. struct vmw_resource *res;
  3321. int ret;
  3322. unsigned int size;
  3323. if (handle == SVGA3D_INVALID_ID)
  3324. return 0;
  3325. size = vmw_execbuf_res_size(dev_priv, vmw_res_dx_context);
  3326. ret = vmw_validation_preload_res(sw_context->ctx, size);
  3327. if (ret)
  3328. return ret;
  3329. res = vmw_user_resource_noref_lookup_handle
  3330. (dev_priv, sw_context->fp->tfile, handle,
  3331. user_context_converter);
  3332. if (unlikely(IS_ERR(res))) {
  3333. DRM_ERROR("Could not find or user DX context 0x%08x.\n",
  3334. (unsigned) handle);
  3335. return PTR_ERR(res);
  3336. }
  3337. ret = vmw_execbuf_res_noref_val_add(sw_context, res);
  3338. if (unlikely(ret != 0))
  3339. return ret;
  3340. sw_context->dx_ctx_node = vmw_execbuf_info_from_res(sw_context, res);
  3341. sw_context->man = vmw_context_res_man(res);
  3342. return 0;
  3343. }
  3344. int vmw_execbuf_process(struct drm_file *file_priv,
  3345. struct vmw_private *dev_priv,
  3346. void __user *user_commands,
  3347. void *kernel_commands,
  3348. uint32_t command_size,
  3349. uint64_t throttle_us,
  3350. uint32_t dx_context_handle,
  3351. struct drm_vmw_fence_rep __user *user_fence_rep,
  3352. struct vmw_fence_obj **out_fence,
  3353. uint32_t flags)
  3354. {
  3355. struct vmw_sw_context *sw_context = &dev_priv->ctx;
  3356. struct vmw_fence_obj *fence = NULL;
  3357. struct vmw_cmdbuf_header *header;
  3358. uint32_t handle;
  3359. int ret;
  3360. int32_t out_fence_fd = -1;
  3361. struct sync_file *sync_file = NULL;
  3362. DECLARE_VAL_CONTEXT(val_ctx, &sw_context->res_ht, 1);
  3363. if (flags & DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD) {
  3364. out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
  3365. if (out_fence_fd < 0) {
  3366. DRM_ERROR("Failed to get a fence file descriptor.\n");
  3367. return out_fence_fd;
  3368. }
  3369. }
  3370. if (throttle_us) {
  3371. ret = vmw_wait_lag(dev_priv, &dev_priv->fifo.marker_queue,
  3372. throttle_us);
  3373. if (ret)
  3374. goto out_free_fence_fd;
  3375. }
  3376. kernel_commands = vmw_execbuf_cmdbuf(dev_priv, user_commands,
  3377. kernel_commands, command_size,
  3378. &header);
  3379. if (IS_ERR(kernel_commands)) {
  3380. ret = PTR_ERR(kernel_commands);
  3381. goto out_free_fence_fd;
  3382. }
  3383. ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
  3384. if (ret) {
  3385. ret = -ERESTARTSYS;
  3386. goto out_free_header;
  3387. }
  3388. sw_context->kernel = false;
  3389. if (kernel_commands == NULL) {
  3390. ret = vmw_resize_cmd_bounce(sw_context, command_size);
  3391. if (unlikely(ret != 0))
  3392. goto out_unlock;
  3393. ret = copy_from_user(sw_context->cmd_bounce,
  3394. user_commands, command_size);
  3395. if (unlikely(ret != 0)) {
  3396. ret = -EFAULT;
  3397. DRM_ERROR("Failed copying commands.\n");
  3398. goto out_unlock;
  3399. }
  3400. kernel_commands = sw_context->cmd_bounce;
  3401. } else if (!header)
  3402. sw_context->kernel = true;
  3403. sw_context->fp = vmw_fpriv(file_priv);
  3404. INIT_LIST_HEAD(&sw_context->ctx_list);
  3405. sw_context->cur_query_bo = dev_priv->pinned_bo;
  3406. sw_context->last_query_ctx = NULL;
  3407. sw_context->needs_post_query_barrier = false;
  3408. sw_context->dx_ctx_node = NULL;
  3409. sw_context->dx_query_mob = NULL;
  3410. sw_context->dx_query_ctx = NULL;
  3411. memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
  3412. INIT_LIST_HEAD(&sw_context->res_relocations);
  3413. INIT_LIST_HEAD(&sw_context->bo_relocations);
  3414. if (sw_context->staged_bindings)
  3415. vmw_binding_state_reset(sw_context->staged_bindings);
  3416. if (!sw_context->res_ht_initialized) {
  3417. ret = drm_ht_create(&sw_context->res_ht, VMW_RES_HT_ORDER);
  3418. if (unlikely(ret != 0))
  3419. goto out_unlock;
  3420. sw_context->res_ht_initialized = true;
  3421. }
  3422. INIT_LIST_HEAD(&sw_context->staged_cmd_res);
  3423. sw_context->ctx = &val_ctx;
  3424. ret = vmw_execbuf_tie_context(dev_priv, sw_context, dx_context_handle);
  3425. if (unlikely(ret != 0))
  3426. goto out_err_nores;
  3427. ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
  3428. command_size);
  3429. if (unlikely(ret != 0))
  3430. goto out_err_nores;
  3431. ret = vmw_resources_reserve(sw_context);
  3432. if (unlikely(ret != 0))
  3433. goto out_err_nores;
  3434. ret = vmw_validation_bo_reserve(&val_ctx, true);
  3435. if (unlikely(ret != 0))
  3436. goto out_err_nores;
  3437. ret = vmw_validation_bo_validate(&val_ctx, true);
  3438. if (unlikely(ret != 0))
  3439. goto out_err;
  3440. ret = vmw_validation_res_validate(&val_ctx, true);
  3441. if (unlikely(ret != 0))
  3442. goto out_err;
  3443. vmw_validation_drop_ht(&val_ctx);
  3444. ret = mutex_lock_interruptible(&dev_priv->binding_mutex);
  3445. if (unlikely(ret != 0)) {
  3446. ret = -ERESTARTSYS;
  3447. goto out_err;
  3448. }
  3449. if (dev_priv->has_mob) {
  3450. ret = vmw_rebind_contexts(sw_context);
  3451. if (unlikely(ret != 0))
  3452. goto out_unlock_binding;
  3453. }
  3454. if (!header) {
  3455. ret = vmw_execbuf_submit_fifo(dev_priv, kernel_commands,
  3456. command_size, sw_context);
  3457. } else {
  3458. ret = vmw_execbuf_submit_cmdbuf(dev_priv, header, command_size,
  3459. sw_context);
  3460. header = NULL;
  3461. }
  3462. mutex_unlock(&dev_priv->binding_mutex);
  3463. if (ret)
  3464. goto out_err;
  3465. vmw_query_bo_switch_commit(dev_priv, sw_context);
  3466. ret = vmw_execbuf_fence_commands(file_priv, dev_priv,
  3467. &fence,
  3468. (user_fence_rep) ? &handle : NULL);
  3469. /*
  3470. * This error is harmless, because if fence submission fails,
  3471. * vmw_fifo_send_fence will sync. The error will be propagated to
  3472. * user-space in @fence_rep
  3473. */
  3474. if (ret != 0)
  3475. DRM_ERROR("Fence submission error. Syncing.\n");
  3476. vmw_execbuf_bindings_commit(sw_context, false);
  3477. vmw_bind_dx_query_mob(sw_context);
  3478. vmw_validation_res_unreserve(&val_ctx, false);
  3479. vmw_validation_bo_fence(sw_context->ctx, fence);
  3480. if (unlikely(dev_priv->pinned_bo != NULL &&
  3481. !dev_priv->query_cid_valid))
  3482. __vmw_execbuf_release_pinned_bo(dev_priv, fence);
  3483. /*
  3484. * If anything fails here, give up trying to export the fence
  3485. * and do a sync since the user mode will not be able to sync
  3486. * the fence itself. This ensures we are still functionally
  3487. * correct.
  3488. */
  3489. if (flags & DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD) {
  3490. sync_file = sync_file_create(&fence->base);
  3491. if (!sync_file) {
  3492. DRM_ERROR("Unable to create sync file for fence\n");
  3493. put_unused_fd(out_fence_fd);
  3494. out_fence_fd = -1;
  3495. (void) vmw_fence_obj_wait(fence, false, false,
  3496. VMW_FENCE_WAIT_TIMEOUT);
  3497. } else {
  3498. /* Link the fence with the FD created earlier */
  3499. fd_install(out_fence_fd, sync_file->file);
  3500. }
  3501. }
  3502. vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
  3503. user_fence_rep, fence, handle,
  3504. out_fence_fd, sync_file);
  3505. /* Don't unreference when handing fence out */
  3506. if (unlikely(out_fence != NULL)) {
  3507. *out_fence = fence;
  3508. fence = NULL;
  3509. } else if (likely(fence != NULL)) {
  3510. vmw_fence_obj_unreference(&fence);
  3511. }
  3512. vmw_cmdbuf_res_commit(&sw_context->staged_cmd_res);
  3513. mutex_unlock(&dev_priv->cmdbuf_mutex);
  3514. /*
  3515. * Unreference resources outside of the cmdbuf_mutex to
  3516. * avoid deadlocks in resource destruction paths.
  3517. */
  3518. vmw_validation_unref_lists(&val_ctx);
  3519. return 0;
  3520. out_unlock_binding:
  3521. mutex_unlock(&dev_priv->binding_mutex);
  3522. out_err:
  3523. vmw_validation_bo_backoff(&val_ctx);
  3524. out_err_nores:
  3525. vmw_execbuf_bindings_commit(sw_context, true);
  3526. vmw_validation_res_unreserve(&val_ctx, true);
  3527. vmw_resource_relocations_free(&sw_context->res_relocations);
  3528. vmw_free_relocations(sw_context);
  3529. if (unlikely(dev_priv->pinned_bo != NULL &&
  3530. !dev_priv->query_cid_valid))
  3531. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  3532. out_unlock:
  3533. vmw_cmdbuf_res_revert(&sw_context->staged_cmd_res);
  3534. vmw_validation_drop_ht(&val_ctx);
  3535. WARN_ON(!list_empty(&sw_context->ctx_list));
  3536. mutex_unlock(&dev_priv->cmdbuf_mutex);
  3537. /*
  3538. * Unreference resources outside of the cmdbuf_mutex to
  3539. * avoid deadlocks in resource destruction paths.
  3540. */
  3541. vmw_validation_unref_lists(&val_ctx);
  3542. out_free_header:
  3543. if (header)
  3544. vmw_cmdbuf_header_free(header);
  3545. out_free_fence_fd:
  3546. if (out_fence_fd >= 0)
  3547. put_unused_fd(out_fence_fd);
  3548. return ret;
  3549. }
  3550. /**
  3551. * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
  3552. *
  3553. * @dev_priv: The device private structure.
  3554. *
  3555. * This function is called to idle the fifo and unpin the query buffer
  3556. * if the normal way to do this hits an error, which should typically be
  3557. * extremely rare.
  3558. */
  3559. static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
  3560. {
  3561. DRM_ERROR("Can't unpin query buffer. Trying to recover.\n");
  3562. (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
  3563. vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
  3564. if (dev_priv->dummy_query_bo_pinned) {
  3565. vmw_bo_pin_reserved(dev_priv->dummy_query_bo, false);
  3566. dev_priv->dummy_query_bo_pinned = false;
  3567. }
  3568. }
  3569. /**
  3570. * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  3571. * query bo.
  3572. *
  3573. * @dev_priv: The device private structure.
  3574. * @fence: If non-NULL should point to a struct vmw_fence_obj issued
  3575. * _after_ a query barrier that flushes all queries touching the current
  3576. * buffer pointed to by @dev_priv->pinned_bo
  3577. *
  3578. * This function should be used to unpin the pinned query bo, or
  3579. * as a query barrier when we need to make sure that all queries have
  3580. * finished before the next fifo command. (For example on hardware
  3581. * context destructions where the hardware may otherwise leak unfinished
  3582. * queries).
  3583. *
  3584. * This function does not return any failure codes, but make attempts
  3585. * to do safe unpinning in case of errors.
  3586. *
  3587. * The function will synchronize on the previous query barrier, and will
  3588. * thus not finish until that barrier has executed.
  3589. *
  3590. * the @dev_priv->cmdbuf_mutex needs to be held by the current thread
  3591. * before calling this function.
  3592. */
  3593. void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
  3594. struct vmw_fence_obj *fence)
  3595. {
  3596. int ret = 0;
  3597. struct vmw_fence_obj *lfence = NULL;
  3598. DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
  3599. if (dev_priv->pinned_bo == NULL)
  3600. goto out_unlock;
  3601. ret = vmw_validation_add_bo(&val_ctx, dev_priv->pinned_bo, false,
  3602. false);
  3603. if (ret)
  3604. goto out_no_reserve;
  3605. ret = vmw_validation_add_bo(&val_ctx, dev_priv->dummy_query_bo, false,
  3606. false);
  3607. if (ret)
  3608. goto out_no_reserve;
  3609. ret = vmw_validation_bo_reserve(&val_ctx, false);
  3610. if (ret)
  3611. goto out_no_reserve;
  3612. if (dev_priv->query_cid_valid) {
  3613. BUG_ON(fence != NULL);
  3614. ret = vmw_fifo_emit_dummy_query(dev_priv, dev_priv->query_cid);
  3615. if (ret)
  3616. goto out_no_emit;
  3617. dev_priv->query_cid_valid = false;
  3618. }
  3619. vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
  3620. if (dev_priv->dummy_query_bo_pinned) {
  3621. vmw_bo_pin_reserved(dev_priv->dummy_query_bo, false);
  3622. dev_priv->dummy_query_bo_pinned = false;
  3623. }
  3624. if (fence == NULL) {
  3625. (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
  3626. NULL);
  3627. fence = lfence;
  3628. }
  3629. vmw_validation_bo_fence(&val_ctx, fence);
  3630. if (lfence != NULL)
  3631. vmw_fence_obj_unreference(&lfence);
  3632. vmw_validation_unref_lists(&val_ctx);
  3633. vmw_bo_unreference(&dev_priv->pinned_bo);
  3634. out_unlock:
  3635. return;
  3636. out_no_emit:
  3637. vmw_validation_bo_backoff(&val_ctx);
  3638. out_no_reserve:
  3639. vmw_validation_unref_lists(&val_ctx);
  3640. vmw_execbuf_unpin_panic(dev_priv);
  3641. vmw_bo_unreference(&dev_priv->pinned_bo);
  3642. }
  3643. /**
  3644. * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  3645. * query bo.
  3646. *
  3647. * @dev_priv: The device private structure.
  3648. *
  3649. * This function should be used to unpin the pinned query bo, or
  3650. * as a query barrier when we need to make sure that all queries have
  3651. * finished before the next fifo command. (For example on hardware
  3652. * context destructions where the hardware may otherwise leak unfinished
  3653. * queries).
  3654. *
  3655. * This function does not return any failure codes, but make attempts
  3656. * to do safe unpinning in case of errors.
  3657. *
  3658. * The function will synchronize on the previous query barrier, and will
  3659. * thus not finish until that barrier has executed.
  3660. */
  3661. void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
  3662. {
  3663. mutex_lock(&dev_priv->cmdbuf_mutex);
  3664. if (dev_priv->query_cid_valid)
  3665. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  3666. mutex_unlock(&dev_priv->cmdbuf_mutex);
  3667. }
  3668. int vmw_execbuf_ioctl(struct drm_device *dev, unsigned long data,
  3669. struct drm_file *file_priv, size_t size)
  3670. {
  3671. struct vmw_private *dev_priv = vmw_priv(dev);
  3672. struct drm_vmw_execbuf_arg arg;
  3673. int ret;
  3674. static const size_t copy_offset[] = {
  3675. offsetof(struct drm_vmw_execbuf_arg, context_handle),
  3676. sizeof(struct drm_vmw_execbuf_arg)};
  3677. struct dma_fence *in_fence = NULL;
  3678. if (unlikely(size < copy_offset[0])) {
  3679. DRM_ERROR("Invalid command size, ioctl %d\n",
  3680. DRM_VMW_EXECBUF);
  3681. return -EINVAL;
  3682. }
  3683. if (copy_from_user(&arg, (void __user *) data, copy_offset[0]) != 0)
  3684. return -EFAULT;
  3685. /*
  3686. * Extend the ioctl argument while
  3687. * maintaining backwards compatibility:
  3688. * We take different code paths depending on the value of
  3689. * arg.version.
  3690. */
  3691. if (unlikely(arg.version > DRM_VMW_EXECBUF_VERSION ||
  3692. arg.version == 0)) {
  3693. DRM_ERROR("Incorrect execbuf version.\n");
  3694. return -EINVAL;
  3695. }
  3696. if (arg.version > 1 &&
  3697. copy_from_user(&arg.context_handle,
  3698. (void __user *) (data + copy_offset[0]),
  3699. copy_offset[arg.version - 1] -
  3700. copy_offset[0]) != 0)
  3701. return -EFAULT;
  3702. switch (arg.version) {
  3703. case 1:
  3704. arg.context_handle = (uint32_t) -1;
  3705. break;
  3706. case 2:
  3707. default:
  3708. break;
  3709. }
  3710. /* If imported a fence FD from elsewhere, then wait on it */
  3711. if (arg.flags & DRM_VMW_EXECBUF_FLAG_IMPORT_FENCE_FD) {
  3712. in_fence = sync_file_get_fence(arg.imported_fence_fd);
  3713. if (!in_fence) {
  3714. DRM_ERROR("Cannot get imported fence\n");
  3715. return -EINVAL;
  3716. }
  3717. ret = vmw_wait_dma_fence(dev_priv->fman, in_fence);
  3718. if (ret)
  3719. goto out;
  3720. }
  3721. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  3722. if (unlikely(ret != 0))
  3723. return ret;
  3724. ret = vmw_execbuf_process(file_priv, dev_priv,
  3725. (void __user *)(unsigned long)arg.commands,
  3726. NULL, arg.command_size, arg.throttle_us,
  3727. arg.context_handle,
  3728. (void __user *)(unsigned long)arg.fence_rep,
  3729. NULL,
  3730. arg.flags);
  3731. ttm_read_unlock(&dev_priv->reservation_sem);
  3732. if (unlikely(ret != 0))
  3733. goto out;
  3734. vmw_kms_cursor_post_execbuf(dev_priv);
  3735. out:
  3736. if (in_fence)
  3737. dma_fence_put(in_fence);
  3738. return ret;
  3739. }