gpu_scheduler.c 28 KB

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  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. /**
  24. * DOC: Overview
  25. *
  26. * The GPU scheduler provides entities which allow userspace to push jobs
  27. * into software queues which are then scheduled on a hardware run queue.
  28. * The software queues have a priority among them. The scheduler selects the entities
  29. * from the run queue using a FIFO. The scheduler provides dependency handling
  30. * features among jobs. The driver is supposed to provide callback functions for
  31. * backend operations to the scheduler like submitting a job to hardware run queue,
  32. * returning the dependencies of a job etc.
  33. *
  34. * The organisation of the scheduler is the following:
  35. *
  36. * 1. Each hw run queue has one scheduler
  37. * 2. Each scheduler has multiple run queues with different priorities
  38. * (e.g., HIGH_HW,HIGH_SW, KERNEL, NORMAL)
  39. * 3. Each scheduler run queue has a queue of entities to schedule
  40. * 4. Entities themselves maintain a queue of jobs that will be scheduled on
  41. * the hardware.
  42. *
  43. * The jobs in a entity are always scheduled in the order that they were pushed.
  44. */
  45. #include <linux/kthread.h>
  46. #include <linux/wait.h>
  47. #include <linux/sched.h>
  48. #include <uapi/linux/sched/types.h>
  49. #include <drm/drmP.h>
  50. #include <drm/gpu_scheduler.h>
  51. #include <drm/spsc_queue.h>
  52. #define CREATE_TRACE_POINTS
  53. #include "gpu_scheduler_trace.h"
  54. #define to_drm_sched_job(sched_job) \
  55. container_of((sched_job), struct drm_sched_job, queue_node)
  56. static bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
  57. static void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
  58. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb);
  59. /**
  60. * drm_sched_rq_init - initialize a given run queue struct
  61. *
  62. * @rq: scheduler run queue
  63. *
  64. * Initializes a scheduler runqueue.
  65. */
  66. static void drm_sched_rq_init(struct drm_gpu_scheduler *sched,
  67. struct drm_sched_rq *rq)
  68. {
  69. spin_lock_init(&rq->lock);
  70. INIT_LIST_HEAD(&rq->entities);
  71. rq->current_entity = NULL;
  72. rq->sched = sched;
  73. }
  74. /**
  75. * drm_sched_rq_add_entity - add an entity
  76. *
  77. * @rq: scheduler run queue
  78. * @entity: scheduler entity
  79. *
  80. * Adds a scheduler entity to the run queue.
  81. */
  82. static void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
  83. struct drm_sched_entity *entity)
  84. {
  85. if (!list_empty(&entity->list))
  86. return;
  87. spin_lock(&rq->lock);
  88. list_add_tail(&entity->list, &rq->entities);
  89. spin_unlock(&rq->lock);
  90. }
  91. /**
  92. * drm_sched_rq_remove_entity - remove an entity
  93. *
  94. * @rq: scheduler run queue
  95. * @entity: scheduler entity
  96. *
  97. * Removes a scheduler entity from the run queue.
  98. */
  99. static void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
  100. struct drm_sched_entity *entity)
  101. {
  102. if (list_empty(&entity->list))
  103. return;
  104. spin_lock(&rq->lock);
  105. list_del_init(&entity->list);
  106. if (rq->current_entity == entity)
  107. rq->current_entity = NULL;
  108. spin_unlock(&rq->lock);
  109. }
  110. /**
  111. * drm_sched_rq_select_entity - Select an entity which could provide a job to run
  112. *
  113. * @rq: scheduler run queue to check.
  114. *
  115. * Try to find a ready entity, returns NULL if none found.
  116. */
  117. static struct drm_sched_entity *
  118. drm_sched_rq_select_entity(struct drm_sched_rq *rq)
  119. {
  120. struct drm_sched_entity *entity;
  121. spin_lock(&rq->lock);
  122. entity = rq->current_entity;
  123. if (entity) {
  124. list_for_each_entry_continue(entity, &rq->entities, list) {
  125. if (drm_sched_entity_is_ready(entity)) {
  126. rq->current_entity = entity;
  127. spin_unlock(&rq->lock);
  128. return entity;
  129. }
  130. }
  131. }
  132. list_for_each_entry(entity, &rq->entities, list) {
  133. if (drm_sched_entity_is_ready(entity)) {
  134. rq->current_entity = entity;
  135. spin_unlock(&rq->lock);
  136. return entity;
  137. }
  138. if (entity == rq->current_entity)
  139. break;
  140. }
  141. spin_unlock(&rq->lock);
  142. return NULL;
  143. }
  144. /**
  145. * drm_sched_entity_init - Init a context entity used by scheduler when
  146. * submit to HW ring.
  147. *
  148. * @entity: scheduler entity to init
  149. * @rq_list: the list of run queue on which jobs from this
  150. * entity can be submitted
  151. * @num_rq_list: number of run queue in rq_list
  152. * @guilty: atomic_t set to 1 when a job on this queue
  153. * is found to be guilty causing a timeout
  154. *
  155. * Note: the rq_list should have atleast one element to schedule
  156. * the entity
  157. *
  158. * Returns 0 on success or a negative error code on failure.
  159. */
  160. int drm_sched_entity_init(struct drm_sched_entity *entity,
  161. struct drm_sched_rq **rq_list,
  162. unsigned int num_rq_list,
  163. atomic_t *guilty)
  164. {
  165. int i;
  166. if (!(entity && rq_list && num_rq_list > 0 && rq_list[0]))
  167. return -EINVAL;
  168. memset(entity, 0, sizeof(struct drm_sched_entity));
  169. INIT_LIST_HEAD(&entity->list);
  170. entity->rq = rq_list[0];
  171. entity->guilty = guilty;
  172. entity->num_rq_list = num_rq_list;
  173. entity->rq_list = kcalloc(num_rq_list, sizeof(struct drm_sched_rq *),
  174. GFP_KERNEL);
  175. for (i = 0; i < num_rq_list; ++i)
  176. entity->rq_list[i] = rq_list[i];
  177. entity->last_scheduled = NULL;
  178. spin_lock_init(&entity->rq_lock);
  179. spsc_queue_init(&entity->job_queue);
  180. atomic_set(&entity->fence_seq, 0);
  181. entity->fence_context = dma_fence_context_alloc(2);
  182. return 0;
  183. }
  184. EXPORT_SYMBOL(drm_sched_entity_init);
  185. /**
  186. * drm_sched_entity_is_idle - Check if entity is idle
  187. *
  188. * @entity: scheduler entity
  189. *
  190. * Returns true if the entity does not have any unscheduled jobs.
  191. */
  192. static bool drm_sched_entity_is_idle(struct drm_sched_entity *entity)
  193. {
  194. rmb();
  195. if (list_empty(&entity->list) ||
  196. spsc_queue_peek(&entity->job_queue) == NULL)
  197. return true;
  198. return false;
  199. }
  200. /**
  201. * drm_sched_entity_is_ready - Check if entity is ready
  202. *
  203. * @entity: scheduler entity
  204. *
  205. * Return true if entity could provide a job.
  206. */
  207. static bool drm_sched_entity_is_ready(struct drm_sched_entity *entity)
  208. {
  209. if (spsc_queue_peek(&entity->job_queue) == NULL)
  210. return false;
  211. if (READ_ONCE(entity->dependency))
  212. return false;
  213. return true;
  214. }
  215. /**
  216. * drm_sched_entity_get_free_sched - Get the rq from rq_list with least load
  217. *
  218. * @entity: scheduler entity
  219. *
  220. * Return the pointer to the rq with least load.
  221. */
  222. static struct drm_sched_rq *
  223. drm_sched_entity_get_free_sched(struct drm_sched_entity *entity)
  224. {
  225. struct drm_sched_rq *rq = NULL;
  226. unsigned int min_jobs = UINT_MAX, num_jobs;
  227. int i;
  228. for (i = 0; i < entity->num_rq_list; ++i) {
  229. num_jobs = atomic_read(&entity->rq_list[i]->sched->num_jobs);
  230. if (num_jobs < min_jobs) {
  231. min_jobs = num_jobs;
  232. rq = entity->rq_list[i];
  233. }
  234. }
  235. return rq;
  236. }
  237. static void drm_sched_entity_kill_jobs_cb(struct dma_fence *f,
  238. struct dma_fence_cb *cb)
  239. {
  240. struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
  241. finish_cb);
  242. drm_sched_fence_finished(job->s_fence);
  243. WARN_ON(job->s_fence->parent);
  244. dma_fence_put(&job->s_fence->finished);
  245. job->sched->ops->free_job(job);
  246. }
  247. /**
  248. * drm_sched_entity_flush - Flush a context entity
  249. *
  250. * @entity: scheduler entity
  251. * @timeout: time to wait in for Q to become empty in jiffies.
  252. *
  253. * Splitting drm_sched_entity_fini() into two functions, The first one does the waiting,
  254. * removes the entity from the runqueue and returns an error when the process was killed.
  255. *
  256. * Returns the remaining time in jiffies left from the input timeout
  257. */
  258. long drm_sched_entity_flush(struct drm_sched_entity *entity, long timeout)
  259. {
  260. struct drm_gpu_scheduler *sched;
  261. struct task_struct *last_user;
  262. long ret = timeout;
  263. sched = entity->rq->sched;
  264. /**
  265. * The client will not queue more IBs during this fini, consume existing
  266. * queued IBs or discard them on SIGKILL
  267. */
  268. if (current->flags & PF_EXITING) {
  269. if (timeout)
  270. ret = wait_event_timeout(
  271. sched->job_scheduled,
  272. drm_sched_entity_is_idle(entity),
  273. timeout);
  274. } else
  275. wait_event_killable(sched->job_scheduled, drm_sched_entity_is_idle(entity));
  276. /* For killed process disable any more IBs enqueue right now */
  277. last_user = cmpxchg(&entity->last_user, current->group_leader, NULL);
  278. if ((!last_user || last_user == current->group_leader) &&
  279. (current->flags & PF_EXITING) && (current->exit_code == SIGKILL))
  280. drm_sched_rq_remove_entity(entity->rq, entity);
  281. return ret;
  282. }
  283. EXPORT_SYMBOL(drm_sched_entity_flush);
  284. /**
  285. * drm_sched_entity_cleanup - Destroy a context entity
  286. *
  287. * @entity: scheduler entity
  288. *
  289. * This should be called after @drm_sched_entity_do_release. It goes over the
  290. * entity and signals all jobs with an error code if the process was killed.
  291. *
  292. */
  293. void drm_sched_entity_fini(struct drm_sched_entity *entity)
  294. {
  295. struct drm_gpu_scheduler *sched;
  296. sched = entity->rq->sched;
  297. drm_sched_rq_remove_entity(entity->rq, entity);
  298. /* Consumption of existing IBs wasn't completed. Forcefully
  299. * remove them here.
  300. */
  301. if (spsc_queue_peek(&entity->job_queue)) {
  302. struct drm_sched_job *job;
  303. int r;
  304. /* Park the kernel for a moment to make sure it isn't processing
  305. * our enity.
  306. */
  307. kthread_park(sched->thread);
  308. kthread_unpark(sched->thread);
  309. if (entity->dependency) {
  310. dma_fence_remove_callback(entity->dependency,
  311. &entity->cb);
  312. dma_fence_put(entity->dependency);
  313. entity->dependency = NULL;
  314. }
  315. while ((job = to_drm_sched_job(spsc_queue_pop(&entity->job_queue)))) {
  316. struct drm_sched_fence *s_fence = job->s_fence;
  317. drm_sched_fence_scheduled(s_fence);
  318. dma_fence_set_error(&s_fence->finished, -ESRCH);
  319. /*
  320. * When pipe is hanged by older entity, new entity might
  321. * not even have chance to submit it's first job to HW
  322. * and so entity->last_scheduled will remain NULL
  323. */
  324. if (!entity->last_scheduled) {
  325. drm_sched_entity_kill_jobs_cb(NULL, &job->finish_cb);
  326. } else {
  327. r = dma_fence_add_callback(entity->last_scheduled, &job->finish_cb,
  328. drm_sched_entity_kill_jobs_cb);
  329. if (r == -ENOENT)
  330. drm_sched_entity_kill_jobs_cb(NULL, &job->finish_cb);
  331. else if (r)
  332. DRM_ERROR("fence add callback failed (%d)\n", r);
  333. }
  334. }
  335. }
  336. dma_fence_put(entity->last_scheduled);
  337. entity->last_scheduled = NULL;
  338. kfree(entity->rq_list);
  339. }
  340. EXPORT_SYMBOL(drm_sched_entity_fini);
  341. /**
  342. * drm_sched_entity_fini - Destroy a context entity
  343. *
  344. * @entity: scheduler entity
  345. *
  346. * Calls drm_sched_entity_do_release() and drm_sched_entity_cleanup()
  347. */
  348. void drm_sched_entity_destroy(struct drm_sched_entity *entity)
  349. {
  350. drm_sched_entity_flush(entity, MAX_WAIT_SCHED_ENTITY_Q_EMPTY);
  351. drm_sched_entity_fini(entity);
  352. }
  353. EXPORT_SYMBOL(drm_sched_entity_destroy);
  354. static void drm_sched_entity_wakeup(struct dma_fence *f, struct dma_fence_cb *cb)
  355. {
  356. struct drm_sched_entity *entity =
  357. container_of(cb, struct drm_sched_entity, cb);
  358. entity->dependency = NULL;
  359. dma_fence_put(f);
  360. drm_sched_wakeup(entity->rq->sched);
  361. }
  362. static void drm_sched_entity_clear_dep(struct dma_fence *f, struct dma_fence_cb *cb)
  363. {
  364. struct drm_sched_entity *entity =
  365. container_of(cb, struct drm_sched_entity, cb);
  366. entity->dependency = NULL;
  367. dma_fence_put(f);
  368. }
  369. /**
  370. * drm_sched_entity_set_rq_priority - helper for drm_sched_entity_set_priority
  371. */
  372. static void drm_sched_entity_set_rq_priority(struct drm_sched_rq **rq,
  373. enum drm_sched_priority priority)
  374. {
  375. *rq = &(*rq)->sched->sched_rq[priority];
  376. }
  377. /**
  378. * drm_sched_entity_set_priority - Sets priority of the entity
  379. *
  380. * @entity: scheduler entity
  381. * @priority: scheduler priority
  382. *
  383. * Update the priority of runqueus used for the entity.
  384. */
  385. void drm_sched_entity_set_priority(struct drm_sched_entity *entity,
  386. enum drm_sched_priority priority)
  387. {
  388. unsigned int i;
  389. spin_lock(&entity->rq_lock);
  390. for (i = 0; i < entity->num_rq_list; ++i)
  391. drm_sched_entity_set_rq_priority(&entity->rq_list[i], priority);
  392. drm_sched_rq_remove_entity(entity->rq, entity);
  393. drm_sched_entity_set_rq_priority(&entity->rq, priority);
  394. drm_sched_rq_add_entity(entity->rq, entity);
  395. spin_unlock(&entity->rq_lock);
  396. }
  397. EXPORT_SYMBOL(drm_sched_entity_set_priority);
  398. /**
  399. * drm_sched_dependency_optimized
  400. *
  401. * @fence: the dependency fence
  402. * @entity: the entity which depends on the above fence
  403. *
  404. * Returns true if the dependency can be optimized and false otherwise
  405. */
  406. bool drm_sched_dependency_optimized(struct dma_fence* fence,
  407. struct drm_sched_entity *entity)
  408. {
  409. struct drm_gpu_scheduler *sched = entity->rq->sched;
  410. struct drm_sched_fence *s_fence;
  411. if (!fence || dma_fence_is_signaled(fence))
  412. return false;
  413. if (fence->context == entity->fence_context)
  414. return true;
  415. s_fence = to_drm_sched_fence(fence);
  416. if (s_fence && s_fence->sched == sched)
  417. return true;
  418. return false;
  419. }
  420. EXPORT_SYMBOL(drm_sched_dependency_optimized);
  421. static bool drm_sched_entity_add_dependency_cb(struct drm_sched_entity *entity)
  422. {
  423. struct drm_gpu_scheduler *sched = entity->rq->sched;
  424. struct dma_fence * fence = entity->dependency;
  425. struct drm_sched_fence *s_fence;
  426. if (fence->context == entity->fence_context ||
  427. fence->context == entity->fence_context + 1) {
  428. /*
  429. * Fence is a scheduled/finished fence from a job
  430. * which belongs to the same entity, we can ignore
  431. * fences from ourself
  432. */
  433. dma_fence_put(entity->dependency);
  434. return false;
  435. }
  436. s_fence = to_drm_sched_fence(fence);
  437. if (s_fence && s_fence->sched == sched) {
  438. /*
  439. * Fence is from the same scheduler, only need to wait for
  440. * it to be scheduled
  441. */
  442. fence = dma_fence_get(&s_fence->scheduled);
  443. dma_fence_put(entity->dependency);
  444. entity->dependency = fence;
  445. if (!dma_fence_add_callback(fence, &entity->cb,
  446. drm_sched_entity_clear_dep))
  447. return true;
  448. /* Ignore it when it is already scheduled */
  449. dma_fence_put(fence);
  450. return false;
  451. }
  452. if (!dma_fence_add_callback(entity->dependency, &entity->cb,
  453. drm_sched_entity_wakeup))
  454. return true;
  455. dma_fence_put(entity->dependency);
  456. return false;
  457. }
  458. static struct drm_sched_job *
  459. drm_sched_entity_pop_job(struct drm_sched_entity *entity)
  460. {
  461. struct drm_gpu_scheduler *sched = entity->rq->sched;
  462. struct drm_sched_job *sched_job = to_drm_sched_job(
  463. spsc_queue_peek(&entity->job_queue));
  464. if (!sched_job)
  465. return NULL;
  466. while ((entity->dependency = sched->ops->dependency(sched_job, entity))) {
  467. if (drm_sched_entity_add_dependency_cb(entity)) {
  468. trace_drm_sched_job_wait_dep(sched_job, entity->dependency);
  469. return NULL;
  470. }
  471. }
  472. /* skip jobs from entity that marked guilty */
  473. if (entity->guilty && atomic_read(entity->guilty))
  474. dma_fence_set_error(&sched_job->s_fence->finished, -ECANCELED);
  475. dma_fence_put(entity->last_scheduled);
  476. entity->last_scheduled = dma_fence_get(&sched_job->s_fence->finished);
  477. spsc_queue_pop(&entity->job_queue);
  478. return sched_job;
  479. }
  480. /**
  481. * drm_sched_entity_push_job - Submit a job to the entity's job queue
  482. *
  483. * @sched_job: job to submit
  484. * @entity: scheduler entity
  485. *
  486. * Note: To guarantee that the order of insertion to queue matches
  487. * the job's fence sequence number this function should be
  488. * called with drm_sched_job_init under common lock.
  489. *
  490. * Returns 0 for success, negative error code otherwise.
  491. */
  492. void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
  493. struct drm_sched_entity *entity)
  494. {
  495. struct drm_sched_rq *rq = entity->rq;
  496. bool first, reschedule, idle;
  497. idle = entity->last_scheduled == NULL ||
  498. dma_fence_is_signaled(entity->last_scheduled);
  499. first = spsc_queue_count(&entity->job_queue) == 0;
  500. reschedule = idle && first && (entity->num_rq_list > 1);
  501. if (reschedule) {
  502. rq = drm_sched_entity_get_free_sched(entity);
  503. spin_lock(&entity->rq_lock);
  504. drm_sched_rq_remove_entity(entity->rq, entity);
  505. entity->rq = rq;
  506. spin_unlock(&entity->rq_lock);
  507. }
  508. sched_job->sched = entity->rq->sched;
  509. sched_job->s_fence->sched = entity->rq->sched;
  510. trace_drm_sched_job(sched_job, entity);
  511. atomic_inc(&entity->rq->sched->num_jobs);
  512. WRITE_ONCE(entity->last_user, current->group_leader);
  513. first = spsc_queue_push(&entity->job_queue, &sched_job->queue_node);
  514. /* first job wakes up scheduler */
  515. if (first) {
  516. /* Add the entity to the run queue */
  517. spin_lock(&entity->rq_lock);
  518. if (!entity->rq) {
  519. DRM_ERROR("Trying to push to a killed entity\n");
  520. spin_unlock(&entity->rq_lock);
  521. return;
  522. }
  523. drm_sched_rq_add_entity(entity->rq, entity);
  524. spin_unlock(&entity->rq_lock);
  525. drm_sched_wakeup(entity->rq->sched);
  526. }
  527. }
  528. EXPORT_SYMBOL(drm_sched_entity_push_job);
  529. /* job_finish is called after hw fence signaled
  530. */
  531. static void drm_sched_job_finish(struct work_struct *work)
  532. {
  533. struct drm_sched_job *s_job = container_of(work, struct drm_sched_job,
  534. finish_work);
  535. struct drm_gpu_scheduler *sched = s_job->sched;
  536. /*
  537. * Canceling the timeout without removing our job from the ring mirror
  538. * list is safe, as we will only end up in this worker if our jobs
  539. * finished fence has been signaled. So even if some another worker
  540. * manages to find this job as the next job in the list, the fence
  541. * signaled check below will prevent the timeout to be restarted.
  542. */
  543. cancel_delayed_work_sync(&s_job->work_tdr);
  544. spin_lock(&sched->job_list_lock);
  545. /* queue TDR for next job */
  546. if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
  547. !list_is_last(&s_job->node, &sched->ring_mirror_list)) {
  548. struct drm_sched_job *next = list_next_entry(s_job, node);
  549. if (!dma_fence_is_signaled(&next->s_fence->finished))
  550. schedule_delayed_work(&next->work_tdr, sched->timeout);
  551. }
  552. /* remove job from ring_mirror_list */
  553. list_del(&s_job->node);
  554. spin_unlock(&sched->job_list_lock);
  555. dma_fence_put(&s_job->s_fence->finished);
  556. sched->ops->free_job(s_job);
  557. }
  558. static void drm_sched_job_finish_cb(struct dma_fence *f,
  559. struct dma_fence_cb *cb)
  560. {
  561. struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
  562. finish_cb);
  563. schedule_work(&job->finish_work);
  564. }
  565. static void drm_sched_job_begin(struct drm_sched_job *s_job)
  566. {
  567. struct drm_gpu_scheduler *sched = s_job->sched;
  568. dma_fence_add_callback(&s_job->s_fence->finished, &s_job->finish_cb,
  569. drm_sched_job_finish_cb);
  570. spin_lock(&sched->job_list_lock);
  571. list_add_tail(&s_job->node, &sched->ring_mirror_list);
  572. if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
  573. list_first_entry_or_null(&sched->ring_mirror_list,
  574. struct drm_sched_job, node) == s_job)
  575. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  576. spin_unlock(&sched->job_list_lock);
  577. }
  578. static void drm_sched_job_timedout(struct work_struct *work)
  579. {
  580. struct drm_sched_job *job = container_of(work, struct drm_sched_job,
  581. work_tdr.work);
  582. job->sched->ops->timedout_job(job);
  583. }
  584. /**
  585. * drm_sched_hw_job_reset - stop the scheduler if it contains the bad job
  586. *
  587. * @sched: scheduler instance
  588. * @bad: bad scheduler job
  589. *
  590. */
  591. void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
  592. {
  593. struct drm_sched_job *s_job;
  594. struct drm_sched_entity *entity, *tmp;
  595. int i;
  596. spin_lock(&sched->job_list_lock);
  597. list_for_each_entry_reverse(s_job, &sched->ring_mirror_list, node) {
  598. if (s_job->s_fence->parent &&
  599. dma_fence_remove_callback(s_job->s_fence->parent,
  600. &s_job->s_fence->cb)) {
  601. dma_fence_put(s_job->s_fence->parent);
  602. s_job->s_fence->parent = NULL;
  603. atomic_dec(&sched->hw_rq_count);
  604. }
  605. }
  606. spin_unlock(&sched->job_list_lock);
  607. if (bad && bad->s_priority != DRM_SCHED_PRIORITY_KERNEL) {
  608. atomic_inc(&bad->karma);
  609. /* don't increase @bad's karma if it's from KERNEL RQ,
  610. * becuase sometimes GPU hang would cause kernel jobs (like VM updating jobs)
  611. * corrupt but keep in mind that kernel jobs always considered good.
  612. */
  613. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_KERNEL; i++ ) {
  614. struct drm_sched_rq *rq = &sched->sched_rq[i];
  615. spin_lock(&rq->lock);
  616. list_for_each_entry_safe(entity, tmp, &rq->entities, list) {
  617. if (bad->s_fence->scheduled.context == entity->fence_context) {
  618. if (atomic_read(&bad->karma) > bad->sched->hang_limit)
  619. if (entity->guilty)
  620. atomic_set(entity->guilty, 1);
  621. break;
  622. }
  623. }
  624. spin_unlock(&rq->lock);
  625. if (&entity->list != &rq->entities)
  626. break;
  627. }
  628. }
  629. }
  630. EXPORT_SYMBOL(drm_sched_hw_job_reset);
  631. /**
  632. * drm_sched_job_recovery - recover jobs after a reset
  633. *
  634. * @sched: scheduler instance
  635. *
  636. */
  637. void drm_sched_job_recovery(struct drm_gpu_scheduler *sched)
  638. {
  639. struct drm_sched_job *s_job, *tmp;
  640. bool found_guilty = false;
  641. int r;
  642. spin_lock(&sched->job_list_lock);
  643. s_job = list_first_entry_or_null(&sched->ring_mirror_list,
  644. struct drm_sched_job, node);
  645. if (s_job && sched->timeout != MAX_SCHEDULE_TIMEOUT)
  646. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  647. list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
  648. struct drm_sched_fence *s_fence = s_job->s_fence;
  649. struct dma_fence *fence;
  650. uint64_t guilty_context;
  651. if (!found_guilty && atomic_read(&s_job->karma) > sched->hang_limit) {
  652. found_guilty = true;
  653. guilty_context = s_job->s_fence->scheduled.context;
  654. }
  655. if (found_guilty && s_job->s_fence->scheduled.context == guilty_context)
  656. dma_fence_set_error(&s_fence->finished, -ECANCELED);
  657. spin_unlock(&sched->job_list_lock);
  658. fence = sched->ops->run_job(s_job);
  659. atomic_inc(&sched->hw_rq_count);
  660. if (fence) {
  661. s_fence->parent = dma_fence_get(fence);
  662. r = dma_fence_add_callback(fence, &s_fence->cb,
  663. drm_sched_process_job);
  664. if (r == -ENOENT)
  665. drm_sched_process_job(fence, &s_fence->cb);
  666. else if (r)
  667. DRM_ERROR("fence add callback failed (%d)\n",
  668. r);
  669. dma_fence_put(fence);
  670. } else {
  671. drm_sched_process_job(NULL, &s_fence->cb);
  672. }
  673. spin_lock(&sched->job_list_lock);
  674. }
  675. spin_unlock(&sched->job_list_lock);
  676. }
  677. EXPORT_SYMBOL(drm_sched_job_recovery);
  678. /**
  679. * drm_sched_job_init - init a scheduler job
  680. *
  681. * @job: scheduler job to init
  682. * @entity: scheduler entity to use
  683. * @owner: job owner for debugging
  684. *
  685. * Refer to drm_sched_entity_push_job() documentation
  686. * for locking considerations.
  687. *
  688. * Returns 0 for success, negative error code otherwise.
  689. */
  690. int drm_sched_job_init(struct drm_sched_job *job,
  691. struct drm_sched_entity *entity,
  692. void *owner)
  693. {
  694. struct drm_gpu_scheduler *sched = entity->rq->sched;
  695. job->sched = sched;
  696. job->entity = entity;
  697. job->s_priority = entity->rq - sched->sched_rq;
  698. job->s_fence = drm_sched_fence_create(entity, owner);
  699. if (!job->s_fence)
  700. return -ENOMEM;
  701. job->id = atomic64_inc_return(&sched->job_id_count);
  702. INIT_WORK(&job->finish_work, drm_sched_job_finish);
  703. INIT_LIST_HEAD(&job->node);
  704. INIT_DELAYED_WORK(&job->work_tdr, drm_sched_job_timedout);
  705. return 0;
  706. }
  707. EXPORT_SYMBOL(drm_sched_job_init);
  708. /**
  709. * drm_sched_ready - is the scheduler ready
  710. *
  711. * @sched: scheduler instance
  712. *
  713. * Return true if we can push more jobs to the hw, otherwise false.
  714. */
  715. static bool drm_sched_ready(struct drm_gpu_scheduler *sched)
  716. {
  717. return atomic_read(&sched->hw_rq_count) <
  718. sched->hw_submission_limit;
  719. }
  720. /**
  721. * drm_sched_wakeup - Wake up the scheduler when it is ready
  722. *
  723. * @sched: scheduler instance
  724. *
  725. */
  726. static void drm_sched_wakeup(struct drm_gpu_scheduler *sched)
  727. {
  728. if (drm_sched_ready(sched))
  729. wake_up_interruptible(&sched->wake_up_worker);
  730. }
  731. /**
  732. * drm_sched_select_entity - Select next entity to process
  733. *
  734. * @sched: scheduler instance
  735. *
  736. * Returns the entity to process or NULL if none are found.
  737. */
  738. static struct drm_sched_entity *
  739. drm_sched_select_entity(struct drm_gpu_scheduler *sched)
  740. {
  741. struct drm_sched_entity *entity;
  742. int i;
  743. if (!drm_sched_ready(sched))
  744. return NULL;
  745. /* Kernel run queue has higher priority than normal run queue*/
  746. for (i = DRM_SCHED_PRIORITY_MAX - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
  747. entity = drm_sched_rq_select_entity(&sched->sched_rq[i]);
  748. if (entity)
  749. break;
  750. }
  751. return entity;
  752. }
  753. /**
  754. * drm_sched_process_job - process a job
  755. *
  756. * @f: fence
  757. * @cb: fence callbacks
  758. *
  759. * Called after job has finished execution.
  760. */
  761. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb)
  762. {
  763. struct drm_sched_fence *s_fence =
  764. container_of(cb, struct drm_sched_fence, cb);
  765. struct drm_gpu_scheduler *sched = s_fence->sched;
  766. dma_fence_get(&s_fence->finished);
  767. atomic_dec(&sched->hw_rq_count);
  768. atomic_dec(&sched->num_jobs);
  769. drm_sched_fence_finished(s_fence);
  770. trace_drm_sched_process_job(s_fence);
  771. dma_fence_put(&s_fence->finished);
  772. wake_up_interruptible(&sched->wake_up_worker);
  773. }
  774. /**
  775. * drm_sched_blocked - check if the scheduler is blocked
  776. *
  777. * @sched: scheduler instance
  778. *
  779. * Returns true if blocked, otherwise false.
  780. */
  781. static bool drm_sched_blocked(struct drm_gpu_scheduler *sched)
  782. {
  783. if (kthread_should_park()) {
  784. kthread_parkme();
  785. return true;
  786. }
  787. return false;
  788. }
  789. /**
  790. * drm_sched_main - main scheduler thread
  791. *
  792. * @param: scheduler instance
  793. *
  794. * Returns 0.
  795. */
  796. static int drm_sched_main(void *param)
  797. {
  798. struct sched_param sparam = {.sched_priority = 1};
  799. struct drm_gpu_scheduler *sched = (struct drm_gpu_scheduler *)param;
  800. int r;
  801. sched_setscheduler(current, SCHED_FIFO, &sparam);
  802. while (!kthread_should_stop()) {
  803. struct drm_sched_entity *entity = NULL;
  804. struct drm_sched_fence *s_fence;
  805. struct drm_sched_job *sched_job;
  806. struct dma_fence *fence;
  807. wait_event_interruptible(sched->wake_up_worker,
  808. (!drm_sched_blocked(sched) &&
  809. (entity = drm_sched_select_entity(sched))) ||
  810. kthread_should_stop());
  811. if (!entity)
  812. continue;
  813. sched_job = drm_sched_entity_pop_job(entity);
  814. if (!sched_job)
  815. continue;
  816. s_fence = sched_job->s_fence;
  817. atomic_inc(&sched->hw_rq_count);
  818. drm_sched_job_begin(sched_job);
  819. fence = sched->ops->run_job(sched_job);
  820. drm_sched_fence_scheduled(s_fence);
  821. if (fence) {
  822. s_fence->parent = dma_fence_get(fence);
  823. r = dma_fence_add_callback(fence, &s_fence->cb,
  824. drm_sched_process_job);
  825. if (r == -ENOENT)
  826. drm_sched_process_job(fence, &s_fence->cb);
  827. else if (r)
  828. DRM_ERROR("fence add callback failed (%d)\n",
  829. r);
  830. dma_fence_put(fence);
  831. } else {
  832. drm_sched_process_job(NULL, &s_fence->cb);
  833. }
  834. wake_up(&sched->job_scheduled);
  835. }
  836. return 0;
  837. }
  838. /**
  839. * drm_sched_init - Init a gpu scheduler instance
  840. *
  841. * @sched: scheduler instance
  842. * @ops: backend operations for this scheduler
  843. * @hw_submission: number of hw submissions that can be in flight
  844. * @hang_limit: number of times to allow a job to hang before dropping it
  845. * @timeout: timeout value in jiffies for the scheduler
  846. * @name: name used for debugging
  847. *
  848. * Return 0 on success, otherwise error code.
  849. */
  850. int drm_sched_init(struct drm_gpu_scheduler *sched,
  851. const struct drm_sched_backend_ops *ops,
  852. unsigned hw_submission,
  853. unsigned hang_limit,
  854. long timeout,
  855. const char *name)
  856. {
  857. int i;
  858. sched->ops = ops;
  859. sched->hw_submission_limit = hw_submission;
  860. sched->name = name;
  861. sched->timeout = timeout;
  862. sched->hang_limit = hang_limit;
  863. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_MAX; i++)
  864. drm_sched_rq_init(sched, &sched->sched_rq[i]);
  865. init_waitqueue_head(&sched->wake_up_worker);
  866. init_waitqueue_head(&sched->job_scheduled);
  867. INIT_LIST_HEAD(&sched->ring_mirror_list);
  868. spin_lock_init(&sched->job_list_lock);
  869. atomic_set(&sched->hw_rq_count, 0);
  870. atomic_set(&sched->num_jobs, 0);
  871. atomic64_set(&sched->job_id_count, 0);
  872. /* Each scheduler will run on a seperate kernel thread */
  873. sched->thread = kthread_run(drm_sched_main, sched, sched->name);
  874. if (IS_ERR(sched->thread)) {
  875. DRM_ERROR("Failed to create scheduler for %s.\n", name);
  876. return PTR_ERR(sched->thread);
  877. }
  878. return 0;
  879. }
  880. EXPORT_SYMBOL(drm_sched_init);
  881. /**
  882. * drm_sched_fini - Destroy a gpu scheduler
  883. *
  884. * @sched: scheduler instance
  885. *
  886. * Tears down and cleans up the scheduler.
  887. */
  888. void drm_sched_fini(struct drm_gpu_scheduler *sched)
  889. {
  890. if (sched->thread)
  891. kthread_stop(sched->thread);
  892. }
  893. EXPORT_SYMBOL(drm_sched_fini);