intel_dp_mst.c 18 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config)
  33. {
  34. struct drm_device *dev = encoder->base.dev;
  35. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  36. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  37. struct intel_dp *intel_dp = &intel_dig_port->dp;
  38. struct drm_atomic_state *state;
  39. int bpp, i;
  40. int lane_count, slots;
  41. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  42. struct drm_connector *drm_connector;
  43. struct intel_connector *connector, *found = NULL;
  44. struct drm_connector_state *connector_state;
  45. int mst_pbn;
  46. pipe_config->dp_encoder_is_mst = true;
  47. pipe_config->has_pch_encoder = false;
  48. pipe_config->has_dp_encoder = true;
  49. bpp = 24;
  50. /*
  51. * for MST we always configure max link bw - the spec doesn't
  52. * seem to suggest we should do otherwise.
  53. */
  54. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  55. pipe_config->lane_count = lane_count;
  56. pipe_config->pipe_bpp = 24;
  57. pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  58. state = pipe_config->base.state;
  59. for_each_connector_in_state(state, drm_connector, connector_state, i) {
  60. connector = to_intel_connector(drm_connector);
  61. if (connector_state->best_encoder == &encoder->base) {
  62. found = connector;
  63. break;
  64. }
  65. }
  66. if (!found) {
  67. DRM_ERROR("can't find connector\n");
  68. return false;
  69. }
  70. if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, found->port))
  71. pipe_config->has_audio = true;
  72. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
  73. pipe_config->pbn = mst_pbn;
  74. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  75. intel_link_compute_m_n(bpp, lane_count,
  76. adjusted_mode->crtc_clock,
  77. pipe_config->port_clock,
  78. &pipe_config->dp_m_n);
  79. pipe_config->dp_m_n.tu = slots;
  80. if (IS_HASWELL(dev) || IS_BROADWELL(dev))
  81. hsw_dp_set_ddi_pll_sel(pipe_config);
  82. return true;
  83. }
  84. static void intel_mst_disable_dp(struct intel_encoder *encoder)
  85. {
  86. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  87. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  88. struct intel_dp *intel_dp = &intel_dig_port->dp;
  89. struct drm_device *dev = encoder->base.dev;
  90. struct drm_i915_private *dev_priv = dev->dev_private;
  91. struct drm_crtc *crtc = encoder->base.crtc;
  92. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  93. int ret;
  94. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  95. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
  96. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  97. if (ret) {
  98. DRM_ERROR("failed to update payload %d\n", ret);
  99. }
  100. if (intel_crtc->config->has_audio) {
  101. intel_audio_codec_disable(encoder);
  102. intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO);
  103. }
  104. }
  105. static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
  106. {
  107. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  108. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  109. struct intel_dp *intel_dp = &intel_dig_port->dp;
  110. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  111. /* this can fail */
  112. drm_dp_check_act_status(&intel_dp->mst_mgr);
  113. /* and this can also fail */
  114. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  115. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
  116. intel_dp->active_mst_links--;
  117. intel_mst->port = NULL;
  118. if (intel_dp->active_mst_links == 0) {
  119. intel_dig_port->base.post_disable(&intel_dig_port->base);
  120. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  121. }
  122. }
  123. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
  124. {
  125. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  126. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  127. struct intel_dp *intel_dp = &intel_dig_port->dp;
  128. struct drm_device *dev = encoder->base.dev;
  129. struct drm_i915_private *dev_priv = dev->dev_private;
  130. enum port port = intel_dig_port->port;
  131. int ret;
  132. uint32_t temp;
  133. struct intel_connector *found = NULL, *connector;
  134. int slots;
  135. struct drm_crtc *crtc = encoder->base.crtc;
  136. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  137. for_each_intel_connector(dev, connector) {
  138. if (connector->base.state->best_encoder == &encoder->base) {
  139. found = connector;
  140. break;
  141. }
  142. }
  143. if (!found) {
  144. DRM_ERROR("can't find connector\n");
  145. return;
  146. }
  147. /* MST encoders are bound to a crtc, not to a connector,
  148. * force the mapping here for get_hw_state.
  149. */
  150. found->encoder = encoder;
  151. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  152. intel_mst->port = found->port;
  153. if (intel_dp->active_mst_links == 0) {
  154. intel_prepare_ddi_buffer(&intel_dig_port->base);
  155. intel_ddi_clk_select(&intel_dig_port->base, intel_crtc->config);
  156. intel_dp_set_link_params(intel_dp, intel_crtc->config);
  157. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  158. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  159. intel_dp_start_link_train(intel_dp);
  160. intel_dp_stop_link_train(intel_dp);
  161. }
  162. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  163. intel_mst->port,
  164. intel_crtc->config->pbn, &slots);
  165. if (ret == false) {
  166. DRM_ERROR("failed to allocate vcpi\n");
  167. return;
  168. }
  169. intel_dp->active_mst_links++;
  170. temp = I915_READ(DP_TP_STATUS(port));
  171. I915_WRITE(DP_TP_STATUS(port), temp);
  172. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  173. }
  174. static void intel_mst_enable_dp(struct intel_encoder *encoder)
  175. {
  176. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  177. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  178. struct intel_dp *intel_dp = &intel_dig_port->dp;
  179. struct drm_device *dev = intel_dig_port->base.base.dev;
  180. struct drm_i915_private *dev_priv = dev->dev_private;
  181. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  182. enum port port = intel_dig_port->port;
  183. int ret;
  184. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  185. if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
  186. 1))
  187. DRM_ERROR("Timed out waiting for ACT sent\n");
  188. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  189. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  190. if (crtc->config->has_audio) {
  191. DRM_DEBUG_DRIVER("Enabling DP audio on pipe %c\n",
  192. pipe_name(crtc->pipe));
  193. intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO);
  194. intel_audio_codec_enable(encoder);
  195. }
  196. }
  197. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  198. enum pipe *pipe)
  199. {
  200. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  201. *pipe = intel_mst->pipe;
  202. if (intel_mst->port)
  203. return true;
  204. return false;
  205. }
  206. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  207. struct intel_crtc_state *pipe_config)
  208. {
  209. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  210. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  211. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  212. struct drm_device *dev = encoder->base.dev;
  213. struct drm_i915_private *dev_priv = dev->dev_private;
  214. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  215. u32 temp, flags = 0;
  216. pipe_config->has_dp_encoder = true;
  217. pipe_config->has_audio =
  218. intel_ddi_is_audio_enabled(dev_priv, crtc);
  219. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  220. if (temp & TRANS_DDI_PHSYNC)
  221. flags |= DRM_MODE_FLAG_PHSYNC;
  222. else
  223. flags |= DRM_MODE_FLAG_NHSYNC;
  224. if (temp & TRANS_DDI_PVSYNC)
  225. flags |= DRM_MODE_FLAG_PVSYNC;
  226. else
  227. flags |= DRM_MODE_FLAG_NVSYNC;
  228. switch (temp & TRANS_DDI_BPC_MASK) {
  229. case TRANS_DDI_BPC_6:
  230. pipe_config->pipe_bpp = 18;
  231. break;
  232. case TRANS_DDI_BPC_8:
  233. pipe_config->pipe_bpp = 24;
  234. break;
  235. case TRANS_DDI_BPC_10:
  236. pipe_config->pipe_bpp = 30;
  237. break;
  238. case TRANS_DDI_BPC_12:
  239. pipe_config->pipe_bpp = 36;
  240. break;
  241. default:
  242. break;
  243. }
  244. pipe_config->base.adjusted_mode.flags |= flags;
  245. pipe_config->lane_count =
  246. ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  247. intel_dp_get_m_n(crtc, pipe_config);
  248. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  249. }
  250. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  251. {
  252. struct intel_connector *intel_connector = to_intel_connector(connector);
  253. struct intel_dp *intel_dp = intel_connector->mst_port;
  254. struct edid *edid;
  255. int ret;
  256. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  257. if (!edid)
  258. return 0;
  259. ret = intel_connector_update_modes(connector, edid);
  260. kfree(edid);
  261. return ret;
  262. }
  263. static enum drm_connector_status
  264. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  265. {
  266. struct intel_connector *intel_connector = to_intel_connector(connector);
  267. struct intel_dp *intel_dp = intel_connector->mst_port;
  268. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  269. }
  270. static int
  271. intel_dp_mst_set_property(struct drm_connector *connector,
  272. struct drm_property *property,
  273. uint64_t val)
  274. {
  275. return 0;
  276. }
  277. static void
  278. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  279. {
  280. struct intel_connector *intel_connector = to_intel_connector(connector);
  281. if (!IS_ERR_OR_NULL(intel_connector->edid))
  282. kfree(intel_connector->edid);
  283. drm_connector_cleanup(connector);
  284. kfree(connector);
  285. }
  286. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  287. .dpms = drm_atomic_helper_connector_dpms,
  288. .detect = intel_dp_mst_detect,
  289. .fill_modes = drm_helper_probe_single_connector_modes,
  290. .set_property = intel_dp_mst_set_property,
  291. .atomic_get_property = intel_connector_atomic_get_property,
  292. .destroy = intel_dp_mst_connector_destroy,
  293. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  294. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  295. };
  296. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  297. {
  298. return intel_dp_mst_get_ddc_modes(connector);
  299. }
  300. static enum drm_mode_status
  301. intel_dp_mst_mode_valid(struct drm_connector *connector,
  302. struct drm_display_mode *mode)
  303. {
  304. int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
  305. /* TODO - validate mode against available PBN for link */
  306. if (mode->clock < 10000)
  307. return MODE_CLOCK_LOW;
  308. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  309. return MODE_H_ILLEGAL;
  310. if (mode->clock > max_dotclk)
  311. return MODE_CLOCK_HIGH;
  312. return MODE_OK;
  313. }
  314. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  315. struct drm_connector_state *state)
  316. {
  317. struct intel_connector *intel_connector = to_intel_connector(connector);
  318. struct intel_dp *intel_dp = intel_connector->mst_port;
  319. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  320. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  321. }
  322. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  323. {
  324. struct intel_connector *intel_connector = to_intel_connector(connector);
  325. struct intel_dp *intel_dp = intel_connector->mst_port;
  326. return &intel_dp->mst_encoders[0]->base.base;
  327. }
  328. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  329. .get_modes = intel_dp_mst_get_modes,
  330. .mode_valid = intel_dp_mst_mode_valid,
  331. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  332. .best_encoder = intel_mst_best_encoder,
  333. };
  334. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  335. {
  336. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  337. drm_encoder_cleanup(encoder);
  338. kfree(intel_mst);
  339. }
  340. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  341. .destroy = intel_dp_mst_encoder_destroy,
  342. };
  343. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  344. {
  345. if (connector->encoder && connector->base.state->crtc) {
  346. enum pipe pipe;
  347. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  348. return false;
  349. return true;
  350. }
  351. return false;
  352. }
  353. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  354. {
  355. #ifdef CONFIG_DRM_FBDEV_EMULATION
  356. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  357. if (dev_priv->fbdev)
  358. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
  359. &connector->base);
  360. #endif
  361. }
  362. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  363. {
  364. #ifdef CONFIG_DRM_FBDEV_EMULATION
  365. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  366. if (dev_priv->fbdev)
  367. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
  368. &connector->base);
  369. #endif
  370. }
  371. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  372. {
  373. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  374. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  375. struct drm_device *dev = intel_dig_port->base.base.dev;
  376. struct intel_connector *intel_connector;
  377. struct drm_connector *connector;
  378. int i;
  379. intel_connector = intel_connector_alloc();
  380. if (!intel_connector)
  381. return NULL;
  382. connector = &intel_connector->base;
  383. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  384. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  385. intel_connector->unregister = intel_connector_unregister;
  386. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  387. intel_connector->mst_port = intel_dp;
  388. intel_connector->port = port;
  389. for (i = PIPE_A; i <= PIPE_C; i++) {
  390. drm_mode_connector_attach_encoder(&intel_connector->base,
  391. &intel_dp->mst_encoders[i]->base.base);
  392. }
  393. intel_dp_add_properties(intel_dp, connector);
  394. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  395. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  396. drm_mode_connector_set_path_property(connector, pathprop);
  397. return connector;
  398. }
  399. static void intel_dp_register_mst_connector(struct drm_connector *connector)
  400. {
  401. struct intel_connector *intel_connector = to_intel_connector(connector);
  402. struct drm_device *dev = connector->dev;
  403. drm_modeset_lock_all(dev);
  404. intel_connector_add_to_fbdev(intel_connector);
  405. drm_modeset_unlock_all(dev);
  406. drm_connector_register(&intel_connector->base);
  407. }
  408. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  409. struct drm_connector *connector)
  410. {
  411. struct intel_connector *intel_connector = to_intel_connector(connector);
  412. struct drm_device *dev = connector->dev;
  413. intel_connector->unregister(intel_connector);
  414. /* need to nuke the connector */
  415. drm_modeset_lock_all(dev);
  416. if (connector->state->crtc) {
  417. struct drm_mode_set set;
  418. int ret;
  419. memset(&set, 0, sizeof(set));
  420. set.crtc = connector->state->crtc,
  421. ret = drm_atomic_helper_set_config(&set);
  422. WARN(ret, "Disabling mst crtc failed with %i\n", ret);
  423. }
  424. intel_connector_remove_from_fbdev(intel_connector);
  425. drm_connector_cleanup(connector);
  426. drm_modeset_unlock_all(dev);
  427. kfree(intel_connector);
  428. DRM_DEBUG_KMS("\n");
  429. }
  430. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  431. {
  432. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  433. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  434. struct drm_device *dev = intel_dig_port->base.base.dev;
  435. drm_kms_helper_hotplug_event(dev);
  436. }
  437. static const struct drm_dp_mst_topology_cbs mst_cbs = {
  438. .add_connector = intel_dp_add_mst_connector,
  439. .register_connector = intel_dp_register_mst_connector,
  440. .destroy_connector = intel_dp_destroy_mst_connector,
  441. .hotplug = intel_dp_mst_hotplug,
  442. };
  443. static struct intel_dp_mst_encoder *
  444. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  445. {
  446. struct intel_dp_mst_encoder *intel_mst;
  447. struct intel_encoder *intel_encoder;
  448. struct drm_device *dev = intel_dig_port->base.base.dev;
  449. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  450. if (!intel_mst)
  451. return NULL;
  452. intel_mst->pipe = pipe;
  453. intel_encoder = &intel_mst->base;
  454. intel_mst->primary = intel_dig_port;
  455. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  456. DRM_MODE_ENCODER_DPMST, NULL);
  457. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  458. intel_encoder->crtc_mask = 0x7;
  459. intel_encoder->cloneable = 0;
  460. intel_encoder->compute_config = intel_dp_mst_compute_config;
  461. intel_encoder->disable = intel_mst_disable_dp;
  462. intel_encoder->post_disable = intel_mst_post_disable_dp;
  463. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  464. intel_encoder->enable = intel_mst_enable_dp;
  465. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  466. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  467. return intel_mst;
  468. }
  469. static bool
  470. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  471. {
  472. int i;
  473. struct intel_dp *intel_dp = &intel_dig_port->dp;
  474. for (i = PIPE_A; i <= PIPE_C; i++)
  475. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  476. return true;
  477. }
  478. int
  479. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  480. {
  481. struct intel_dp *intel_dp = &intel_dig_port->dp;
  482. struct drm_device *dev = intel_dig_port->base.base.dev;
  483. int ret;
  484. intel_dp->can_mst = true;
  485. intel_dp->mst_mgr.cbs = &mst_cbs;
  486. /* create encoders */
  487. intel_dp_create_fake_mst_encoders(intel_dig_port);
  488. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  489. if (ret) {
  490. intel_dp->can_mst = false;
  491. return ret;
  492. }
  493. return 0;
  494. }
  495. void
  496. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  497. {
  498. struct intel_dp *intel_dp = &intel_dig_port->dp;
  499. if (!intel_dp->can_mst)
  500. return;
  501. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  502. /* encoders will get killed by normal cleanup */
  503. }