mmu_context.h 5.2 KB

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  1. #ifndef __PPC64_MMU_CONTEXT_H
  2. #define __PPC64_MMU_CONTEXT_H
  3. #include <linux/config.h>
  4. #include <linux/kernel.h>
  5. #include <linux/mm.h>
  6. #include <asm/mmu.h>
  7. #include <asm/cputable.h>
  8. /*
  9. * Copyright (C) 2001 PPC 64 Team, IBM Corp
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version
  14. * 2 of the License, or (at your option) any later version.
  15. */
  16. /*
  17. * Every architecture must define this function. It's the fastest
  18. * way of searching a 140-bit bitmap where the first 100 bits are
  19. * unlikely to be set. It's guaranteed that at least one of the 140
  20. * bits is cleared.
  21. */
  22. static inline int sched_find_first_bit(unsigned long *b)
  23. {
  24. if (unlikely(b[0]))
  25. return __ffs(b[0]);
  26. if (unlikely(b[1]))
  27. return __ffs(b[1]) + 64;
  28. return __ffs(b[2]) + 128;
  29. }
  30. static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
  31. {
  32. }
  33. #define NO_CONTEXT 0
  34. #define MAX_CONTEXT (0x100000-1)
  35. extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
  36. extern void destroy_context(struct mm_struct *mm);
  37. extern void switch_stab(struct task_struct *tsk, struct mm_struct *mm);
  38. extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm);
  39. /*
  40. * switch_mm is the entry point called from the architecture independent
  41. * code in kernel/sched.c
  42. */
  43. static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
  44. struct task_struct *tsk)
  45. {
  46. if (!cpu_isset(smp_processor_id(), next->cpu_vm_mask))
  47. cpu_set(smp_processor_id(), next->cpu_vm_mask);
  48. /* No need to flush userspace segments if the mm doesnt change */
  49. if (prev == next)
  50. return;
  51. #ifdef CONFIG_ALTIVEC
  52. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  53. asm volatile ("dssall");
  54. #endif /* CONFIG_ALTIVEC */
  55. if (cpu_has_feature(CPU_FTR_SLB))
  56. switch_slb(tsk, next);
  57. else
  58. switch_stab(tsk, next);
  59. }
  60. #define deactivate_mm(tsk,mm) do { } while (0)
  61. /*
  62. * After we have set current->mm to a new value, this activates
  63. * the context for the new mm so we see the new mappings.
  64. */
  65. static inline void activate_mm(struct mm_struct *prev, struct mm_struct *next)
  66. {
  67. unsigned long flags;
  68. local_irq_save(flags);
  69. switch_mm(prev, next, current);
  70. local_irq_restore(flags);
  71. }
  72. /* VSID allocation
  73. * ===============
  74. *
  75. * We first generate a 36-bit "proto-VSID". For kernel addresses this
  76. * is equal to the ESID, for user addresses it is:
  77. * (context << 15) | (esid & 0x7fff)
  78. *
  79. * The two forms are distinguishable because the top bit is 0 for user
  80. * addresses, whereas the top two bits are 1 for kernel addresses.
  81. * Proto-VSIDs with the top two bits equal to 0b10 are reserved for
  82. * now.
  83. *
  84. * The proto-VSIDs are then scrambled into real VSIDs with the
  85. * multiplicative hash:
  86. *
  87. * VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS
  88. * where VSID_MULTIPLIER = 268435399 = 0xFFFFFC7
  89. * VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF
  90. *
  91. * This scramble is only well defined for proto-VSIDs below
  92. * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are
  93. * reserved. VSID_MULTIPLIER is prime, so in particular it is
  94. * co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
  95. * Because the modulus is 2^n-1 we can compute it efficiently without
  96. * a divide or extra multiply (see below).
  97. *
  98. * This scheme has several advantages over older methods:
  99. *
  100. * - We have VSIDs allocated for every kernel address
  101. * (i.e. everything above 0xC000000000000000), except the very top
  102. * segment, which simplifies several things.
  103. *
  104. * - We allow for 15 significant bits of ESID and 20 bits of
  105. * context for user addresses. i.e. 8T (43 bits) of address space for
  106. * up to 1M contexts (although the page table structure and context
  107. * allocation will need changes to take advantage of this).
  108. *
  109. * - The scramble function gives robust scattering in the hash
  110. * table (at least based on some initial results). The previous
  111. * method was more susceptible to pathological cases giving excessive
  112. * hash collisions.
  113. */
  114. /*
  115. * WARNING - If you change these you must make sure the asm
  116. * implementations in slb_allocate(), do_stab_bolted and mmu.h
  117. * (ASM_VSID_SCRAMBLE macro) are changed accordingly.
  118. *
  119. * You'll also need to change the precomputed VSID values in head.S
  120. * which are used by the iSeries firmware.
  121. */
  122. static inline unsigned long vsid_scramble(unsigned long protovsid)
  123. {
  124. #if 0
  125. /* The code below is equivalent to this function for arguments
  126. * < 2^VSID_BITS, which is all this should ever be called
  127. * with. However gcc is not clever enough to compute the
  128. * modulus (2^n-1) without a second multiply. */
  129. return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
  130. #else /* 1 */
  131. unsigned long x;
  132. x = protovsid * VSID_MULTIPLIER;
  133. x = (x >> VSID_BITS) + (x & VSID_MODULUS);
  134. return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
  135. #endif /* 1 */
  136. }
  137. /* This is only valid for addresses >= KERNELBASE */
  138. static inline unsigned long get_kernel_vsid(unsigned long ea)
  139. {
  140. return vsid_scramble(ea >> SID_SHIFT);
  141. }
  142. /* This is only valid for user addresses (which are below 2^41) */
  143. static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
  144. {
  145. return vsid_scramble((context << USER_ESID_BITS)
  146. | (ea >> SID_SHIFT));
  147. }
  148. #endif /* __PPC64_MMU_CONTEXT_H */