amdgpu_sync.c 8.5 KB

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  1. /*
  2. * Copyright 2014 Advanced Micro Devices, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sub license, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20. *
  21. * The above copyright notice and this permission notice (including the
  22. * next paragraph) shall be included in all copies or substantial portions
  23. * of the Software.
  24. *
  25. */
  26. /*
  27. * Authors:
  28. * Christian König <christian.koenig@amd.com>
  29. */
  30. #include <drm/drmP.h>
  31. #include "amdgpu.h"
  32. #include "amdgpu_trace.h"
  33. struct amdgpu_sync_entry {
  34. struct hlist_node node;
  35. struct fence *fence;
  36. };
  37. /**
  38. * amdgpu_sync_create - zero init sync object
  39. *
  40. * @sync: sync object to initialize
  41. *
  42. * Just clear the sync object for now.
  43. */
  44. void amdgpu_sync_create(struct amdgpu_sync *sync)
  45. {
  46. unsigned i;
  47. for (i = 0; i < AMDGPU_NUM_SYNCS; ++i)
  48. sync->semaphores[i] = NULL;
  49. for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
  50. sync->sync_to[i] = NULL;
  51. hash_init(sync->fences);
  52. sync->last_vm_update = NULL;
  53. }
  54. static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, struct fence *f)
  55. {
  56. struct amdgpu_fence *a_fence = to_amdgpu_fence(f);
  57. struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
  58. if (a_fence)
  59. return a_fence->ring->adev == adev;
  60. if (s_fence)
  61. return (struct amdgpu_device *)s_fence->scheduler->priv == adev;
  62. return false;
  63. }
  64. static bool amdgpu_sync_test_owner(struct fence *f, void *owner)
  65. {
  66. struct amdgpu_fence *a_fence = to_amdgpu_fence(f);
  67. struct amd_sched_fence *s_fence = to_amd_sched_fence(f);
  68. if (s_fence)
  69. return s_fence->owner == owner;
  70. if (a_fence)
  71. return a_fence->owner == owner;
  72. return false;
  73. }
  74. /**
  75. * amdgpu_sync_fence - remember to sync to this fence
  76. *
  77. * @sync: sync object to add fence to
  78. * @fence: fence to sync to
  79. *
  80. */
  81. int amdgpu_sync_fence(struct amdgpu_device *adev, struct amdgpu_sync *sync,
  82. struct fence *f)
  83. {
  84. struct amdgpu_sync_entry *e;
  85. struct amdgpu_fence *fence;
  86. struct amdgpu_fence *other;
  87. struct fence *tmp, *later;
  88. if (!f)
  89. return 0;
  90. if (amdgpu_sync_same_dev(adev, f) &&
  91. amdgpu_sync_test_owner(f, AMDGPU_FENCE_OWNER_VM)) {
  92. if (sync->last_vm_update) {
  93. tmp = sync->last_vm_update;
  94. BUG_ON(f->context != tmp->context);
  95. later = (f->seqno - tmp->seqno <= INT_MAX) ? f : tmp;
  96. sync->last_vm_update = fence_get(later);
  97. fence_put(tmp);
  98. } else
  99. sync->last_vm_update = fence_get(f);
  100. }
  101. fence = to_amdgpu_fence(f);
  102. if (!fence || fence->ring->adev != adev) {
  103. hash_for_each_possible(sync->fences, e, node, f->context) {
  104. struct fence *new;
  105. if (unlikely(e->fence->context != f->context))
  106. continue;
  107. new = fence_get(fence_later(e->fence, f));
  108. if (new) {
  109. fence_put(e->fence);
  110. e->fence = new;
  111. }
  112. return 0;
  113. }
  114. e = kmalloc(sizeof(struct amdgpu_sync_entry), GFP_KERNEL);
  115. if (!e)
  116. return -ENOMEM;
  117. hash_add(sync->fences, &e->node, f->context);
  118. e->fence = fence_get(f);
  119. return 0;
  120. }
  121. other = sync->sync_to[fence->ring->idx];
  122. sync->sync_to[fence->ring->idx] = amdgpu_fence_ref(
  123. amdgpu_fence_later(fence, other));
  124. amdgpu_fence_unref(&other);
  125. return 0;
  126. }
  127. /**
  128. * amdgpu_sync_resv - use the semaphores to sync to a reservation object
  129. *
  130. * @sync: sync object to add fences from reservation object to
  131. * @resv: reservation object with embedded fence
  132. * @shared: true if we should only sync to the exclusive fence
  133. *
  134. * Sync to the fence using the semaphore objects
  135. */
  136. int amdgpu_sync_resv(struct amdgpu_device *adev,
  137. struct amdgpu_sync *sync,
  138. struct reservation_object *resv,
  139. void *owner)
  140. {
  141. struct reservation_object_list *flist;
  142. struct fence *f;
  143. struct amdgpu_fence *fence;
  144. unsigned i;
  145. int r = 0;
  146. if (resv == NULL)
  147. return -EINVAL;
  148. /* always sync to the exclusive fence */
  149. f = reservation_object_get_excl(resv);
  150. r = amdgpu_sync_fence(adev, sync, f);
  151. flist = reservation_object_get_list(resv);
  152. if (!flist || r)
  153. return r;
  154. for (i = 0; i < flist->shared_count; ++i) {
  155. f = rcu_dereference_protected(flist->shared[i],
  156. reservation_object_held(resv));
  157. fence = f ? to_amdgpu_fence(f) : NULL;
  158. if (fence && fence->ring->adev == adev) {
  159. /* VM updates are only interesting
  160. * for other VM updates and moves.
  161. */
  162. if ((owner != AMDGPU_FENCE_OWNER_MOVE) &&
  163. (fence->owner != AMDGPU_FENCE_OWNER_MOVE) &&
  164. ((owner == AMDGPU_FENCE_OWNER_VM) !=
  165. (fence->owner == AMDGPU_FENCE_OWNER_VM)))
  166. continue;
  167. /* Ignore fence from the same owner as
  168. * long as it isn't undefined.
  169. */
  170. if (owner != AMDGPU_FENCE_OWNER_UNDEFINED &&
  171. fence->owner == owner)
  172. continue;
  173. }
  174. r = amdgpu_sync_fence(adev, sync, f);
  175. if (r)
  176. break;
  177. }
  178. return r;
  179. }
  180. struct fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync)
  181. {
  182. struct amdgpu_sync_entry *e;
  183. struct hlist_node *tmp;
  184. struct fence *f;
  185. int i;
  186. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  187. f = e->fence;
  188. hash_del(&e->node);
  189. kfree(e);
  190. if (!fence_is_signaled(f))
  191. return f;
  192. fence_put(f);
  193. }
  194. return NULL;
  195. }
  196. int amdgpu_sync_wait(struct amdgpu_sync *sync)
  197. {
  198. struct amdgpu_sync_entry *e;
  199. struct hlist_node *tmp;
  200. int i, r;
  201. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  202. r = fence_wait(e->fence, false);
  203. if (r)
  204. return r;
  205. hash_del(&e->node);
  206. fence_put(e->fence);
  207. kfree(e);
  208. }
  209. return 0;
  210. }
  211. /**
  212. * amdgpu_sync_rings - sync ring to all registered fences
  213. *
  214. * @sync: sync object to use
  215. * @ring: ring that needs sync
  216. *
  217. * Ensure that all registered fences are signaled before letting
  218. * the ring continue. The caller must hold the ring lock.
  219. */
  220. int amdgpu_sync_rings(struct amdgpu_sync *sync,
  221. struct amdgpu_ring *ring)
  222. {
  223. struct amdgpu_device *adev = ring->adev;
  224. unsigned count = 0;
  225. int i, r;
  226. for (i = 0; i < AMDGPU_MAX_RINGS; ++i) {
  227. struct amdgpu_fence *fence = sync->sync_to[i];
  228. struct amdgpu_semaphore *semaphore;
  229. struct amdgpu_ring *other = adev->rings[i];
  230. /* check if we really need to sync */
  231. if (!amdgpu_fence_need_sync(fence, ring))
  232. continue;
  233. /* prevent GPU deadlocks */
  234. if (!other->ready) {
  235. dev_err(adev->dev, "Syncing to a disabled ring!");
  236. return -EINVAL;
  237. }
  238. if (amdgpu_enable_scheduler || (count >= AMDGPU_NUM_SYNCS)) {
  239. /* not enough room, wait manually */
  240. r = fence_wait(&fence->base, false);
  241. if (r)
  242. return r;
  243. continue;
  244. }
  245. r = amdgpu_semaphore_create(adev, &semaphore);
  246. if (r)
  247. return r;
  248. sync->semaphores[count++] = semaphore;
  249. /* allocate enough space for sync command */
  250. r = amdgpu_ring_alloc(other, 16);
  251. if (r)
  252. return r;
  253. /* emit the signal semaphore */
  254. if (!amdgpu_semaphore_emit_signal(other, semaphore)) {
  255. /* signaling wasn't successful wait manually */
  256. amdgpu_ring_undo(other);
  257. r = fence_wait(&fence->base, false);
  258. if (r)
  259. return r;
  260. continue;
  261. }
  262. /* we assume caller has already allocated space on waiters ring */
  263. if (!amdgpu_semaphore_emit_wait(ring, semaphore)) {
  264. /* waiting wasn't successful wait manually */
  265. amdgpu_ring_undo(other);
  266. r = fence_wait(&fence->base, false);
  267. if (r)
  268. return r;
  269. continue;
  270. }
  271. amdgpu_ring_commit(other);
  272. amdgpu_fence_note_sync(fence, ring);
  273. }
  274. return 0;
  275. }
  276. /**
  277. * amdgpu_sync_free - free the sync object
  278. *
  279. * @adev: amdgpu_device pointer
  280. * @sync: sync object to use
  281. * @fence: fence to use for the free
  282. *
  283. * Free the sync object by freeing all semaphores in it.
  284. */
  285. void amdgpu_sync_free(struct amdgpu_device *adev,
  286. struct amdgpu_sync *sync,
  287. struct fence *fence)
  288. {
  289. struct amdgpu_sync_entry *e;
  290. struct hlist_node *tmp;
  291. unsigned i;
  292. hash_for_each_safe(sync->fences, i, tmp, e, node) {
  293. hash_del(&e->node);
  294. fence_put(e->fence);
  295. kfree(e);
  296. }
  297. for (i = 0; i < AMDGPU_NUM_SYNCS; ++i)
  298. amdgpu_semaphore_free(adev, &sync->semaphores[i], fence);
  299. for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
  300. amdgpu_fence_unref(&sync->sync_to[i]);
  301. fence_put(sync->last_vm_update);
  302. }