rt2500usb.c 61 KB

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  1. /*
  2. Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, see <http://www.gnu.org/licenses/>.
  14. */
  15. /*
  16. Module: rt2500usb
  17. Abstract: rt2500usb device specific routines.
  18. Supported chipsets: RT2570.
  19. */
  20. #include <linux/delay.h>
  21. #include <linux/etherdevice.h>
  22. #include <linux/init.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/slab.h>
  26. #include <linux/usb.h>
  27. #include "rt2x00.h"
  28. #include "rt2x00usb.h"
  29. #include "rt2500usb.h"
  30. /*
  31. * Allow hardware encryption to be disabled.
  32. */
  33. static bool modparam_nohwcrypt;
  34. module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
  35. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
  36. /*
  37. * Register access.
  38. * All access to the CSR registers will go through the methods
  39. * rt2500usb_register_read and rt2500usb_register_write.
  40. * BBP and RF register require indirect register access,
  41. * and use the CSR registers BBPCSR and RFCSR to achieve this.
  42. * These indirect registers work with busy bits,
  43. * and we will try maximal REGISTER_BUSY_COUNT times to access
  44. * the register while taking a REGISTER_BUSY_DELAY us delay
  45. * between each attampt. When the busy bit is still set at that time,
  46. * the access attempt is considered to have failed,
  47. * and we will print an error.
  48. * If the csr_mutex is already held then the _lock variants must
  49. * be used instead.
  50. */
  51. static inline void rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  52. const unsigned int offset,
  53. u16 *value)
  54. {
  55. __le16 reg;
  56. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  57. USB_VENDOR_REQUEST_IN, offset,
  58. &reg, sizeof(reg), REGISTER_TIMEOUT);
  59. *value = le16_to_cpu(reg);
  60. }
  61. static inline void rt2500usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  62. const unsigned int offset,
  63. u16 *value)
  64. {
  65. __le16 reg;
  66. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  67. USB_VENDOR_REQUEST_IN, offset,
  68. &reg, sizeof(reg), REGISTER_TIMEOUT);
  69. *value = le16_to_cpu(reg);
  70. }
  71. static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  72. const unsigned int offset,
  73. void *value, const u16 length)
  74. {
  75. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  76. USB_VENDOR_REQUEST_IN, offset,
  77. value, length,
  78. REGISTER_TIMEOUT16(length));
  79. }
  80. static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  81. const unsigned int offset,
  82. u16 value)
  83. {
  84. __le16 reg = cpu_to_le16(value);
  85. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  86. USB_VENDOR_REQUEST_OUT, offset,
  87. &reg, sizeof(reg), REGISTER_TIMEOUT);
  88. }
  89. static inline void rt2500usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  90. const unsigned int offset,
  91. u16 value)
  92. {
  93. __le16 reg = cpu_to_le16(value);
  94. rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  95. USB_VENDOR_REQUEST_OUT, offset,
  96. &reg, sizeof(reg), REGISTER_TIMEOUT);
  97. }
  98. static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
  99. const unsigned int offset,
  100. void *value, const u16 length)
  101. {
  102. rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  103. USB_VENDOR_REQUEST_OUT, offset,
  104. value, length,
  105. REGISTER_TIMEOUT16(length));
  106. }
  107. static int rt2500usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
  108. const unsigned int offset,
  109. struct rt2x00_field16 field,
  110. u16 *reg)
  111. {
  112. unsigned int i;
  113. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  114. rt2500usb_register_read_lock(rt2x00dev, offset, reg);
  115. if (!rt2x00_get_field16(*reg, field))
  116. return 1;
  117. udelay(REGISTER_BUSY_DELAY);
  118. }
  119. rt2x00_err(rt2x00dev, "Indirect register access failed: offset=0x%.08x, value=0x%.08x\n",
  120. offset, *reg);
  121. *reg = ~0;
  122. return 0;
  123. }
  124. #define WAIT_FOR_BBP(__dev, __reg) \
  125. rt2500usb_regbusy_read((__dev), PHY_CSR8, PHY_CSR8_BUSY, (__reg))
  126. #define WAIT_FOR_RF(__dev, __reg) \
  127. rt2500usb_regbusy_read((__dev), PHY_CSR10, PHY_CSR10_RF_BUSY, (__reg))
  128. static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev,
  129. const unsigned int word, const u8 value)
  130. {
  131. u16 reg;
  132. mutex_lock(&rt2x00dev->csr_mutex);
  133. /*
  134. * Wait until the BBP becomes available, afterwards we
  135. * can safely write the new data into the register.
  136. */
  137. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  138. reg = 0;
  139. rt2x00_set_field16(&reg, PHY_CSR7_DATA, value);
  140. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  141. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 0);
  142. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  143. }
  144. mutex_unlock(&rt2x00dev->csr_mutex);
  145. }
  146. static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev,
  147. const unsigned int word, u8 *value)
  148. {
  149. u16 reg;
  150. mutex_lock(&rt2x00dev->csr_mutex);
  151. /*
  152. * Wait until the BBP becomes available, afterwards we
  153. * can safely write the read request into the register.
  154. * After the data has been written, we wait until hardware
  155. * returns the correct value, if at any time the register
  156. * doesn't become available in time, reg will be 0xffffffff
  157. * which means we return 0xff to the caller.
  158. */
  159. if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
  160. reg = 0;
  161. rt2x00_set_field16(&reg, PHY_CSR7_REG_ID, word);
  162. rt2x00_set_field16(&reg, PHY_CSR7_READ_CONTROL, 1);
  163. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg);
  164. if (WAIT_FOR_BBP(rt2x00dev, &reg))
  165. rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, &reg);
  166. }
  167. *value = rt2x00_get_field16(reg, PHY_CSR7_DATA);
  168. mutex_unlock(&rt2x00dev->csr_mutex);
  169. }
  170. static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev,
  171. const unsigned int word, const u32 value)
  172. {
  173. u16 reg;
  174. mutex_lock(&rt2x00dev->csr_mutex);
  175. /*
  176. * Wait until the RF becomes available, afterwards we
  177. * can safely write the new data into the register.
  178. */
  179. if (WAIT_FOR_RF(rt2x00dev, &reg)) {
  180. reg = 0;
  181. rt2x00_set_field16(&reg, PHY_CSR9_RF_VALUE, value);
  182. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR9, reg);
  183. reg = 0;
  184. rt2x00_set_field16(&reg, PHY_CSR10_RF_VALUE, value >> 16);
  185. rt2x00_set_field16(&reg, PHY_CSR10_RF_NUMBER_OF_BITS, 20);
  186. rt2x00_set_field16(&reg, PHY_CSR10_RF_IF_SELECT, 0);
  187. rt2x00_set_field16(&reg, PHY_CSR10_RF_BUSY, 1);
  188. rt2500usb_register_write_lock(rt2x00dev, PHY_CSR10, reg);
  189. rt2x00_rf_write(rt2x00dev, word, value);
  190. }
  191. mutex_unlock(&rt2x00dev->csr_mutex);
  192. }
  193. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  194. static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
  195. const unsigned int offset,
  196. u32 *value)
  197. {
  198. rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
  199. }
  200. static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
  201. const unsigned int offset,
  202. u32 value)
  203. {
  204. rt2500usb_register_write(rt2x00dev, offset, value);
  205. }
  206. static const struct rt2x00debug rt2500usb_rt2x00debug = {
  207. .owner = THIS_MODULE,
  208. .csr = {
  209. .read = _rt2500usb_register_read,
  210. .write = _rt2500usb_register_write,
  211. .flags = RT2X00DEBUGFS_OFFSET,
  212. .word_base = CSR_REG_BASE,
  213. .word_size = sizeof(u16),
  214. .word_count = CSR_REG_SIZE / sizeof(u16),
  215. },
  216. .eeprom = {
  217. .read = rt2x00_eeprom_read,
  218. .write = rt2x00_eeprom_write,
  219. .word_base = EEPROM_BASE,
  220. .word_size = sizeof(u16),
  221. .word_count = EEPROM_SIZE / sizeof(u16),
  222. },
  223. .bbp = {
  224. .read = rt2500usb_bbp_read,
  225. .write = rt2500usb_bbp_write,
  226. .word_base = BBP_BASE,
  227. .word_size = sizeof(u8),
  228. .word_count = BBP_SIZE / sizeof(u8),
  229. },
  230. .rf = {
  231. .read = rt2x00_rf_read,
  232. .write = rt2500usb_rf_write,
  233. .word_base = RF_BASE,
  234. .word_size = sizeof(u32),
  235. .word_count = RF_SIZE / sizeof(u32),
  236. },
  237. };
  238. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  239. static int rt2500usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
  240. {
  241. u16 reg;
  242. rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
  243. return rt2x00_get_field16(reg, MAC_CSR19_VAL7);
  244. }
  245. #ifdef CONFIG_RT2X00_LIB_LEDS
  246. static void rt2500usb_brightness_set(struct led_classdev *led_cdev,
  247. enum led_brightness brightness)
  248. {
  249. struct rt2x00_led *led =
  250. container_of(led_cdev, struct rt2x00_led, led_dev);
  251. unsigned int enabled = brightness != LED_OFF;
  252. u16 reg;
  253. rt2500usb_register_read(led->rt2x00dev, MAC_CSR20, &reg);
  254. if (led->type == LED_TYPE_RADIO || led->type == LED_TYPE_ASSOC)
  255. rt2x00_set_field16(&reg, MAC_CSR20_LINK, enabled);
  256. else if (led->type == LED_TYPE_ACTIVITY)
  257. rt2x00_set_field16(&reg, MAC_CSR20_ACTIVITY, enabled);
  258. rt2500usb_register_write(led->rt2x00dev, MAC_CSR20, reg);
  259. }
  260. static int rt2500usb_blink_set(struct led_classdev *led_cdev,
  261. unsigned long *delay_on,
  262. unsigned long *delay_off)
  263. {
  264. struct rt2x00_led *led =
  265. container_of(led_cdev, struct rt2x00_led, led_dev);
  266. u16 reg;
  267. rt2500usb_register_read(led->rt2x00dev, MAC_CSR21, &reg);
  268. rt2x00_set_field16(&reg, MAC_CSR21_ON_PERIOD, *delay_on);
  269. rt2x00_set_field16(&reg, MAC_CSR21_OFF_PERIOD, *delay_off);
  270. rt2500usb_register_write(led->rt2x00dev, MAC_CSR21, reg);
  271. return 0;
  272. }
  273. static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev,
  274. struct rt2x00_led *led,
  275. enum led_type type)
  276. {
  277. led->rt2x00dev = rt2x00dev;
  278. led->type = type;
  279. led->led_dev.brightness_set = rt2500usb_brightness_set;
  280. led->led_dev.blink_set = rt2500usb_blink_set;
  281. led->flags = LED_INITIALIZED;
  282. }
  283. #endif /* CONFIG_RT2X00_LIB_LEDS */
  284. /*
  285. * Configuration handlers.
  286. */
  287. /*
  288. * rt2500usb does not differentiate between shared and pairwise
  289. * keys, so we should use the same function for both key types.
  290. */
  291. static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
  292. struct rt2x00lib_crypto *crypto,
  293. struct ieee80211_key_conf *key)
  294. {
  295. u32 mask;
  296. u16 reg;
  297. enum cipher curr_cipher;
  298. if (crypto->cmd == SET_KEY) {
  299. /*
  300. * Disallow to set WEP key other than with index 0,
  301. * it is known that not work at least on some hardware.
  302. * SW crypto will be used in that case.
  303. */
  304. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  305. key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
  306. key->keyidx != 0)
  307. return -EOPNOTSUPP;
  308. /*
  309. * Pairwise key will always be entry 0, but this
  310. * could collide with a shared key on the same
  311. * position...
  312. */
  313. mask = TXRX_CSR0_KEY_ID.bit_mask;
  314. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  315. curr_cipher = rt2x00_get_field16(reg, TXRX_CSR0_ALGORITHM);
  316. reg &= mask;
  317. if (reg && reg == mask)
  318. return -ENOSPC;
  319. reg = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  320. key->hw_key_idx += reg ? ffz(reg) : 0;
  321. /*
  322. * Hardware requires that all keys use the same cipher
  323. * (e.g. TKIP-only, AES-only, but not TKIP+AES).
  324. * If this is not the first key, compare the cipher with the
  325. * first one and fall back to SW crypto if not the same.
  326. */
  327. if (key->hw_key_idx > 0 && crypto->cipher != curr_cipher)
  328. return -EOPNOTSUPP;
  329. rt2500usb_register_multiwrite(rt2x00dev, KEY_ENTRY(key->hw_key_idx),
  330. crypto->key, sizeof(crypto->key));
  331. /*
  332. * The driver does not support the IV/EIV generation
  333. * in hardware. However it demands the data to be provided
  334. * both separately as well as inside the frame.
  335. * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
  336. * to ensure rt2x00lib will not strip the data from the
  337. * frame after the copy, now we must tell mac80211
  338. * to generate the IV/EIV data.
  339. */
  340. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  341. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  342. }
  343. /*
  344. * TXRX_CSR0_KEY_ID contains only single-bit fields to indicate
  345. * a particular key is valid.
  346. */
  347. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  348. rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, crypto->cipher);
  349. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  350. mask = rt2x00_get_field16(reg, TXRX_CSR0_KEY_ID);
  351. if (crypto->cmd == SET_KEY)
  352. mask |= 1 << key->hw_key_idx;
  353. else if (crypto->cmd == DISABLE_KEY)
  354. mask &= ~(1 << key->hw_key_idx);
  355. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, mask);
  356. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  357. return 0;
  358. }
  359. static void rt2500usb_config_filter(struct rt2x00_dev *rt2x00dev,
  360. const unsigned int filter_flags)
  361. {
  362. u16 reg;
  363. /*
  364. * Start configuration steps.
  365. * Note that the version error will always be dropped
  366. * and broadcast frames will always be accepted since
  367. * there is no filter for it at this time.
  368. */
  369. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  370. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CRC,
  371. !(filter_flags & FIF_FCSFAIL));
  372. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_PHYSICAL,
  373. !(filter_flags & FIF_PLCPFAIL));
  374. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_CONTROL,
  375. !(filter_flags & FIF_CONTROL));
  376. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_NOT_TO_ME,
  377. !(filter_flags & FIF_PROMISC_IN_BSS));
  378. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_TODS,
  379. !(filter_flags & FIF_PROMISC_IN_BSS) &&
  380. !rt2x00dev->intf_ap_count);
  381. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_VERSION_ERROR, 1);
  382. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_MULTICAST,
  383. !(filter_flags & FIF_ALLMULTI));
  384. rt2x00_set_field16(&reg, TXRX_CSR2_DROP_BROADCAST, 0);
  385. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  386. }
  387. static void rt2500usb_config_intf(struct rt2x00_dev *rt2x00dev,
  388. struct rt2x00_intf *intf,
  389. struct rt2x00intf_conf *conf,
  390. const unsigned int flags)
  391. {
  392. unsigned int bcn_preload;
  393. u16 reg;
  394. if (flags & CONFIG_UPDATE_TYPE) {
  395. /*
  396. * Enable beacon config
  397. */
  398. bcn_preload = PREAMBLE + GET_DURATION(IEEE80211_HEADER, 20);
  399. rt2500usb_register_read(rt2x00dev, TXRX_CSR20, &reg);
  400. rt2x00_set_field16(&reg, TXRX_CSR20_OFFSET, bcn_preload >> 6);
  401. rt2x00_set_field16(&reg, TXRX_CSR20_BCN_EXPECT_WINDOW,
  402. 2 * (conf->type != NL80211_IFTYPE_STATION));
  403. rt2500usb_register_write(rt2x00dev, TXRX_CSR20, reg);
  404. /*
  405. * Enable synchronisation.
  406. */
  407. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  408. rt2x00_set_field16(&reg, TXRX_CSR18_OFFSET, 0);
  409. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  410. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  411. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, conf->sync);
  412. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  413. }
  414. if (flags & CONFIG_UPDATE_MAC)
  415. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR2, conf->mac,
  416. (3 * sizeof(__le16)));
  417. if (flags & CONFIG_UPDATE_BSSID)
  418. rt2500usb_register_multiwrite(rt2x00dev, MAC_CSR5, conf->bssid,
  419. (3 * sizeof(__le16)));
  420. }
  421. static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
  422. struct rt2x00lib_erp *erp,
  423. u32 changed)
  424. {
  425. u16 reg;
  426. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  427. rt2500usb_register_read(rt2x00dev, TXRX_CSR10, &reg);
  428. rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
  429. !!erp->short_preamble);
  430. rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
  431. }
  432. if (changed & BSS_CHANGED_BASIC_RATES)
  433. rt2500usb_register_write(rt2x00dev, TXRX_CSR11,
  434. erp->basic_rates);
  435. if (changed & BSS_CHANGED_BEACON_INT) {
  436. rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
  437. rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
  438. erp->beacon_int * 4);
  439. rt2500usb_register_write(rt2x00dev, TXRX_CSR18, reg);
  440. }
  441. if (changed & BSS_CHANGED_ERP_SLOT) {
  442. rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
  443. rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
  444. rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
  445. }
  446. }
  447. static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
  448. struct antenna_setup *ant)
  449. {
  450. u8 r2;
  451. u8 r14;
  452. u16 csr5;
  453. u16 csr6;
  454. /*
  455. * We should never come here because rt2x00lib is supposed
  456. * to catch this and send us the correct antenna explicitely.
  457. */
  458. BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
  459. ant->tx == ANTENNA_SW_DIVERSITY);
  460. rt2500usb_bbp_read(rt2x00dev, 2, &r2);
  461. rt2500usb_bbp_read(rt2x00dev, 14, &r14);
  462. rt2500usb_register_read(rt2x00dev, PHY_CSR5, &csr5);
  463. rt2500usb_register_read(rt2x00dev, PHY_CSR6, &csr6);
  464. /*
  465. * Configure the TX antenna.
  466. */
  467. switch (ant->tx) {
  468. case ANTENNA_HW_DIVERSITY:
  469. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 1);
  470. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 1);
  471. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 1);
  472. break;
  473. case ANTENNA_A:
  474. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
  475. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 0);
  476. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 0);
  477. break;
  478. case ANTENNA_B:
  479. default:
  480. rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
  481. rt2x00_set_field16(&csr5, PHY_CSR5_CCK, 2);
  482. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM, 2);
  483. break;
  484. }
  485. /*
  486. * Configure the RX antenna.
  487. */
  488. switch (ant->rx) {
  489. case ANTENNA_HW_DIVERSITY:
  490. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 1);
  491. break;
  492. case ANTENNA_A:
  493. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
  494. break;
  495. case ANTENNA_B:
  496. default:
  497. rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
  498. break;
  499. }
  500. /*
  501. * RT2525E and RT5222 need to flip TX I/Q
  502. */
  503. if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
  504. rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
  505. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
  506. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
  507. /*
  508. * RT2525E does not need RX I/Q Flip.
  509. */
  510. if (rt2x00_rf(rt2x00dev, RF2525E))
  511. rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
  512. } else {
  513. rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
  514. rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 0);
  515. }
  516. rt2500usb_bbp_write(rt2x00dev, 2, r2);
  517. rt2500usb_bbp_write(rt2x00dev, 14, r14);
  518. rt2500usb_register_write(rt2x00dev, PHY_CSR5, csr5);
  519. rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
  520. }
  521. static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
  522. struct rf_channel *rf, const int txpower)
  523. {
  524. /*
  525. * Set TXpower.
  526. */
  527. rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  528. /*
  529. * For RT2525E we should first set the channel to half band higher.
  530. */
  531. if (rt2x00_rf(rt2x00dev, RF2525E)) {
  532. static const u32 vals[] = {
  533. 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
  534. 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
  535. 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
  536. 0x00000902, 0x00000906
  537. };
  538. rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
  539. if (rf->rf4)
  540. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  541. }
  542. rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
  543. rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
  544. rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
  545. if (rf->rf4)
  546. rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
  547. }
  548. static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
  549. const int txpower)
  550. {
  551. u32 rf3;
  552. rt2x00_rf_read(rt2x00dev, 3, &rf3);
  553. rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
  554. rt2500usb_rf_write(rt2x00dev, 3, rf3);
  555. }
  556. static void rt2500usb_config_ps(struct rt2x00_dev *rt2x00dev,
  557. struct rt2x00lib_conf *libconf)
  558. {
  559. enum dev_state state =
  560. (libconf->conf->flags & IEEE80211_CONF_PS) ?
  561. STATE_SLEEP : STATE_AWAKE;
  562. u16 reg;
  563. if (state == STATE_SLEEP) {
  564. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  565. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON,
  566. rt2x00dev->beacon_int - 20);
  567. rt2x00_set_field16(&reg, MAC_CSR18_BEACONS_BEFORE_WAKEUP,
  568. libconf->conf->listen_interval - 1);
  569. /* We must first disable autowake before it can be enabled */
  570. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
  571. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  572. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 1);
  573. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  574. } else {
  575. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  576. rt2x00_set_field16(&reg, MAC_CSR18_AUTO_WAKE, 0);
  577. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  578. }
  579. rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
  580. }
  581. static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
  582. struct rt2x00lib_conf *libconf,
  583. const unsigned int flags)
  584. {
  585. if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
  586. rt2500usb_config_channel(rt2x00dev, &libconf->rf,
  587. libconf->conf->power_level);
  588. if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
  589. !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
  590. rt2500usb_config_txpower(rt2x00dev,
  591. libconf->conf->power_level);
  592. if (flags & IEEE80211_CONF_CHANGE_PS)
  593. rt2500usb_config_ps(rt2x00dev, libconf);
  594. }
  595. /*
  596. * Link tuning
  597. */
  598. static void rt2500usb_link_stats(struct rt2x00_dev *rt2x00dev,
  599. struct link_qual *qual)
  600. {
  601. u16 reg;
  602. /*
  603. * Update FCS error count from register.
  604. */
  605. rt2500usb_register_read(rt2x00dev, STA_CSR0, &reg);
  606. qual->rx_failed = rt2x00_get_field16(reg, STA_CSR0_FCS_ERROR);
  607. /*
  608. * Update False CCA count from register.
  609. */
  610. rt2500usb_register_read(rt2x00dev, STA_CSR3, &reg);
  611. qual->false_cca = rt2x00_get_field16(reg, STA_CSR3_FALSE_CCA_ERROR);
  612. }
  613. static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
  614. struct link_qual *qual)
  615. {
  616. u16 eeprom;
  617. u16 value;
  618. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &eeprom);
  619. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R24_LOW);
  620. rt2500usb_bbp_write(rt2x00dev, 24, value);
  621. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &eeprom);
  622. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R25_LOW);
  623. rt2500usb_bbp_write(rt2x00dev, 25, value);
  624. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &eeprom);
  625. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_R61_LOW);
  626. rt2500usb_bbp_write(rt2x00dev, 61, value);
  627. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &eeprom);
  628. value = rt2x00_get_field16(eeprom, EEPROM_BBPTUNE_VGCUPPER);
  629. rt2500usb_bbp_write(rt2x00dev, 17, value);
  630. qual->vgc_level = value;
  631. }
  632. /*
  633. * Queue handlers.
  634. */
  635. static void rt2500usb_start_queue(struct data_queue *queue)
  636. {
  637. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  638. u16 reg;
  639. switch (queue->qid) {
  640. case QID_RX:
  641. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  642. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 0);
  643. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  644. break;
  645. case QID_BEACON:
  646. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  647. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  648. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  649. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  650. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  651. break;
  652. default:
  653. break;
  654. }
  655. }
  656. static void rt2500usb_stop_queue(struct data_queue *queue)
  657. {
  658. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  659. u16 reg;
  660. switch (queue->qid) {
  661. case QID_RX:
  662. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  663. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  664. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  665. break;
  666. case QID_BEACON:
  667. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  668. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  669. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  670. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  671. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  672. break;
  673. default:
  674. break;
  675. }
  676. }
  677. /*
  678. * Initialization functions.
  679. */
  680. static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
  681. {
  682. u16 reg;
  683. rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0x0001,
  684. USB_MODE_TEST, REGISTER_TIMEOUT);
  685. rt2x00usb_vendor_request_sw(rt2x00dev, USB_SINGLE_WRITE, 0x0308,
  686. 0x00f0, REGISTER_TIMEOUT);
  687. rt2500usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
  688. rt2x00_set_field16(&reg, TXRX_CSR2_DISABLE_RX, 1);
  689. rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg);
  690. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x1111);
  691. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x1e11);
  692. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  693. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 1);
  694. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 1);
  695. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  696. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  697. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  698. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  699. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  700. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 0);
  701. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  702. rt2500usb_register_read(rt2x00dev, TXRX_CSR5, &reg);
  703. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0, 13);
  704. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID0_VALID, 1);
  705. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1, 12);
  706. rt2x00_set_field16(&reg, TXRX_CSR5_BBP_ID1_VALID, 1);
  707. rt2500usb_register_write(rt2x00dev, TXRX_CSR5, reg);
  708. rt2500usb_register_read(rt2x00dev, TXRX_CSR6, &reg);
  709. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0, 10);
  710. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID0_VALID, 1);
  711. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1, 11);
  712. rt2x00_set_field16(&reg, TXRX_CSR6_BBP_ID1_VALID, 1);
  713. rt2500usb_register_write(rt2x00dev, TXRX_CSR6, reg);
  714. rt2500usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
  715. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0, 7);
  716. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID0_VALID, 1);
  717. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1, 6);
  718. rt2x00_set_field16(&reg, TXRX_CSR7_BBP_ID1_VALID, 1);
  719. rt2500usb_register_write(rt2x00dev, TXRX_CSR7, reg);
  720. rt2500usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
  721. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0, 5);
  722. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID0_VALID, 1);
  723. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1, 0);
  724. rt2x00_set_field16(&reg, TXRX_CSR8_BBP_ID1_VALID, 0);
  725. rt2500usb_register_write(rt2x00dev, TXRX_CSR8, reg);
  726. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  727. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 0);
  728. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_SYNC, 0);
  729. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 0);
  730. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  731. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  732. rt2500usb_register_write(rt2x00dev, TXRX_CSR21, 0xe78f);
  733. rt2500usb_register_write(rt2x00dev, MAC_CSR9, 0xff1d);
  734. if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
  735. return -EBUSY;
  736. rt2500usb_register_read(rt2x00dev, MAC_CSR1, &reg);
  737. rt2x00_set_field16(&reg, MAC_CSR1_SOFT_RESET, 0);
  738. rt2x00_set_field16(&reg, MAC_CSR1_BBP_RESET, 0);
  739. rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
  740. rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
  741. if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
  742. rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
  743. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
  744. } else {
  745. reg = 0;
  746. rt2x00_set_field16(&reg, PHY_CSR2_LNA, 1);
  747. rt2x00_set_field16(&reg, PHY_CSR2_LNA_MODE, 3);
  748. }
  749. rt2500usb_register_write(rt2x00dev, PHY_CSR2, reg);
  750. rt2500usb_register_write(rt2x00dev, MAC_CSR11, 0x0002);
  751. rt2500usb_register_write(rt2x00dev, MAC_CSR22, 0x0053);
  752. rt2500usb_register_write(rt2x00dev, MAC_CSR15, 0x01ee);
  753. rt2500usb_register_write(rt2x00dev, MAC_CSR16, 0x0000);
  754. rt2500usb_register_read(rt2x00dev, MAC_CSR8, &reg);
  755. rt2x00_set_field16(&reg, MAC_CSR8_MAX_FRAME_UNIT,
  756. rt2x00dev->rx->data_size);
  757. rt2500usb_register_write(rt2x00dev, MAC_CSR8, reg);
  758. rt2500usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
  759. rt2x00_set_field16(&reg, TXRX_CSR0_ALGORITHM, CIPHER_NONE);
  760. rt2x00_set_field16(&reg, TXRX_CSR0_IV_OFFSET, IEEE80211_HEADER);
  761. rt2x00_set_field16(&reg, TXRX_CSR0_KEY_ID, 0);
  762. rt2500usb_register_write(rt2x00dev, TXRX_CSR0, reg);
  763. rt2500usb_register_read(rt2x00dev, MAC_CSR18, &reg);
  764. rt2x00_set_field16(&reg, MAC_CSR18_DELAY_AFTER_BEACON, 90);
  765. rt2500usb_register_write(rt2x00dev, MAC_CSR18, reg);
  766. rt2500usb_register_read(rt2x00dev, PHY_CSR4, &reg);
  767. rt2x00_set_field16(&reg, PHY_CSR4_LOW_RF_LE, 1);
  768. rt2500usb_register_write(rt2x00dev, PHY_CSR4, reg);
  769. rt2500usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
  770. rt2x00_set_field16(&reg, TXRX_CSR1_AUTO_SEQUENCE, 1);
  771. rt2500usb_register_write(rt2x00dev, TXRX_CSR1, reg);
  772. return 0;
  773. }
  774. static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
  775. {
  776. unsigned int i;
  777. u8 value;
  778. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  779. rt2500usb_bbp_read(rt2x00dev, 0, &value);
  780. if ((value != 0xff) && (value != 0x00))
  781. return 0;
  782. udelay(REGISTER_BUSY_DELAY);
  783. }
  784. rt2x00_err(rt2x00dev, "BBP register access failed, aborting\n");
  785. return -EACCES;
  786. }
  787. static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev)
  788. {
  789. unsigned int i;
  790. u16 eeprom;
  791. u8 value;
  792. u8 reg_id;
  793. if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev)))
  794. return -EACCES;
  795. rt2500usb_bbp_write(rt2x00dev, 3, 0x02);
  796. rt2500usb_bbp_write(rt2x00dev, 4, 0x19);
  797. rt2500usb_bbp_write(rt2x00dev, 14, 0x1c);
  798. rt2500usb_bbp_write(rt2x00dev, 15, 0x30);
  799. rt2500usb_bbp_write(rt2x00dev, 16, 0xac);
  800. rt2500usb_bbp_write(rt2x00dev, 18, 0x18);
  801. rt2500usb_bbp_write(rt2x00dev, 19, 0xff);
  802. rt2500usb_bbp_write(rt2x00dev, 20, 0x1e);
  803. rt2500usb_bbp_write(rt2x00dev, 21, 0x08);
  804. rt2500usb_bbp_write(rt2x00dev, 22, 0x08);
  805. rt2500usb_bbp_write(rt2x00dev, 23, 0x08);
  806. rt2500usb_bbp_write(rt2x00dev, 24, 0x80);
  807. rt2500usb_bbp_write(rt2x00dev, 25, 0x50);
  808. rt2500usb_bbp_write(rt2x00dev, 26, 0x08);
  809. rt2500usb_bbp_write(rt2x00dev, 27, 0x23);
  810. rt2500usb_bbp_write(rt2x00dev, 30, 0x10);
  811. rt2500usb_bbp_write(rt2x00dev, 31, 0x2b);
  812. rt2500usb_bbp_write(rt2x00dev, 32, 0xb9);
  813. rt2500usb_bbp_write(rt2x00dev, 34, 0x12);
  814. rt2500usb_bbp_write(rt2x00dev, 35, 0x50);
  815. rt2500usb_bbp_write(rt2x00dev, 39, 0xc4);
  816. rt2500usb_bbp_write(rt2x00dev, 40, 0x02);
  817. rt2500usb_bbp_write(rt2x00dev, 41, 0x60);
  818. rt2500usb_bbp_write(rt2x00dev, 53, 0x10);
  819. rt2500usb_bbp_write(rt2x00dev, 54, 0x18);
  820. rt2500usb_bbp_write(rt2x00dev, 56, 0x08);
  821. rt2500usb_bbp_write(rt2x00dev, 57, 0x10);
  822. rt2500usb_bbp_write(rt2x00dev, 58, 0x08);
  823. rt2500usb_bbp_write(rt2x00dev, 61, 0x60);
  824. rt2500usb_bbp_write(rt2x00dev, 62, 0x10);
  825. rt2500usb_bbp_write(rt2x00dev, 75, 0xff);
  826. for (i = 0; i < EEPROM_BBP_SIZE; i++) {
  827. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
  828. if (eeprom != 0xffff && eeprom != 0x0000) {
  829. reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
  830. value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
  831. rt2500usb_bbp_write(rt2x00dev, reg_id, value);
  832. }
  833. }
  834. return 0;
  835. }
  836. /*
  837. * Device state switch handlers.
  838. */
  839. static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev)
  840. {
  841. /*
  842. * Initialize all registers.
  843. */
  844. if (unlikely(rt2500usb_init_registers(rt2x00dev) ||
  845. rt2500usb_init_bbp(rt2x00dev)))
  846. return -EIO;
  847. return 0;
  848. }
  849. static void rt2500usb_disable_radio(struct rt2x00_dev *rt2x00dev)
  850. {
  851. rt2500usb_register_write(rt2x00dev, MAC_CSR13, 0x2121);
  852. rt2500usb_register_write(rt2x00dev, MAC_CSR14, 0x2121);
  853. /*
  854. * Disable synchronisation.
  855. */
  856. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, 0);
  857. rt2x00usb_disable_radio(rt2x00dev);
  858. }
  859. static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev,
  860. enum dev_state state)
  861. {
  862. u16 reg;
  863. u16 reg2;
  864. unsigned int i;
  865. char put_to_sleep;
  866. char bbp_state;
  867. char rf_state;
  868. put_to_sleep = (state != STATE_AWAKE);
  869. reg = 0;
  870. rt2x00_set_field16(&reg, MAC_CSR17_BBP_DESIRE_STATE, state);
  871. rt2x00_set_field16(&reg, MAC_CSR17_RF_DESIRE_STATE, state);
  872. rt2x00_set_field16(&reg, MAC_CSR17_PUT_TO_SLEEP, put_to_sleep);
  873. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  874. rt2x00_set_field16(&reg, MAC_CSR17_SET_STATE, 1);
  875. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  876. /*
  877. * Device is not guaranteed to be in the requested state yet.
  878. * We must wait until the register indicates that the
  879. * device has entered the correct state.
  880. */
  881. for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
  882. rt2500usb_register_read(rt2x00dev, MAC_CSR17, &reg2);
  883. bbp_state = rt2x00_get_field16(reg2, MAC_CSR17_BBP_CURR_STATE);
  884. rf_state = rt2x00_get_field16(reg2, MAC_CSR17_RF_CURR_STATE);
  885. if (bbp_state == state && rf_state == state)
  886. return 0;
  887. rt2500usb_register_write(rt2x00dev, MAC_CSR17, reg);
  888. msleep(30);
  889. }
  890. return -EBUSY;
  891. }
  892. static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev,
  893. enum dev_state state)
  894. {
  895. int retval = 0;
  896. switch (state) {
  897. case STATE_RADIO_ON:
  898. retval = rt2500usb_enable_radio(rt2x00dev);
  899. break;
  900. case STATE_RADIO_OFF:
  901. rt2500usb_disable_radio(rt2x00dev);
  902. break;
  903. case STATE_RADIO_IRQ_ON:
  904. case STATE_RADIO_IRQ_OFF:
  905. /* No support, but no error either */
  906. break;
  907. case STATE_DEEP_SLEEP:
  908. case STATE_SLEEP:
  909. case STATE_STANDBY:
  910. case STATE_AWAKE:
  911. retval = rt2500usb_set_state(rt2x00dev, state);
  912. break;
  913. default:
  914. retval = -ENOTSUPP;
  915. break;
  916. }
  917. if (unlikely(retval))
  918. rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
  919. state, retval);
  920. return retval;
  921. }
  922. /*
  923. * TX descriptor initialization
  924. */
  925. static void rt2500usb_write_tx_desc(struct queue_entry *entry,
  926. struct txentry_desc *txdesc)
  927. {
  928. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  929. __le32 *txd = (__le32 *) entry->skb->data;
  930. u32 word;
  931. /*
  932. * Start writing the descriptor words.
  933. */
  934. rt2x00_desc_read(txd, 0, &word);
  935. rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit);
  936. rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
  937. test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
  938. rt2x00_set_field32(&word, TXD_W0_ACK,
  939. test_bit(ENTRY_TXD_ACK, &txdesc->flags));
  940. rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
  941. test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
  942. rt2x00_set_field32(&word, TXD_W0_OFDM,
  943. (txdesc->rate_mode == RATE_MODE_OFDM));
  944. rt2x00_set_field32(&word, TXD_W0_NEW_SEQ,
  945. test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags));
  946. rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->u.plcp.ifs);
  947. rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, txdesc->length);
  948. rt2x00_set_field32(&word, TXD_W0_CIPHER, !!txdesc->cipher);
  949. rt2x00_set_field32(&word, TXD_W0_KEY_ID, txdesc->key_idx);
  950. rt2x00_desc_write(txd, 0, word);
  951. rt2x00_desc_read(txd, 1, &word);
  952. rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, txdesc->iv_offset);
  953. rt2x00_set_field32(&word, TXD_W1_AIFS, entry->queue->aifs);
  954. rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->queue->cw_min);
  955. rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->queue->cw_max);
  956. rt2x00_desc_write(txd, 1, word);
  957. rt2x00_desc_read(txd, 2, &word);
  958. rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->u.plcp.signal);
  959. rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->u.plcp.service);
  960. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW,
  961. txdesc->u.plcp.length_low);
  962. rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH,
  963. txdesc->u.plcp.length_high);
  964. rt2x00_desc_write(txd, 2, word);
  965. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags)) {
  966. _rt2x00_desc_write(txd, 3, skbdesc->iv[0]);
  967. _rt2x00_desc_write(txd, 4, skbdesc->iv[1]);
  968. }
  969. /*
  970. * Register descriptor details in skb frame descriptor.
  971. */
  972. skbdesc->flags |= SKBDESC_DESC_IN_SKB;
  973. skbdesc->desc = txd;
  974. skbdesc->desc_len = TXD_DESC_SIZE;
  975. }
  976. /*
  977. * TX data initialization
  978. */
  979. static void rt2500usb_beacondone(struct urb *urb);
  980. static void rt2500usb_write_beacon(struct queue_entry *entry,
  981. struct txentry_desc *txdesc)
  982. {
  983. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  984. struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev);
  985. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  986. int pipe = usb_sndbulkpipe(usb_dev, entry->queue->usb_endpoint);
  987. int length;
  988. u16 reg, reg0;
  989. /*
  990. * Disable beaconing while we are reloading the beacon data,
  991. * otherwise we might be sending out invalid data.
  992. */
  993. rt2500usb_register_read(rt2x00dev, TXRX_CSR19, &reg);
  994. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 0);
  995. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  996. /*
  997. * Add space for the descriptor in front of the skb.
  998. */
  999. skb_push(entry->skb, TXD_DESC_SIZE);
  1000. memset(entry->skb->data, 0, TXD_DESC_SIZE);
  1001. /*
  1002. * Write the TX descriptor for the beacon.
  1003. */
  1004. rt2500usb_write_tx_desc(entry, txdesc);
  1005. /*
  1006. * Dump beacon to userspace through debugfs.
  1007. */
  1008. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_BEACON, entry->skb);
  1009. /*
  1010. * USB devices cannot blindly pass the skb->len as the
  1011. * length of the data to usb_fill_bulk_urb. Pass the skb
  1012. * to the driver to determine what the length should be.
  1013. */
  1014. length = rt2x00dev->ops->lib->get_tx_data_len(entry);
  1015. usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe,
  1016. entry->skb->data, length, rt2500usb_beacondone,
  1017. entry);
  1018. /*
  1019. * Second we need to create the guardian byte.
  1020. * We only need a single byte, so lets recycle
  1021. * the 'flags' field we are not using for beacons.
  1022. */
  1023. bcn_priv->guardian_data = 0;
  1024. usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe,
  1025. &bcn_priv->guardian_data, 1, rt2500usb_beacondone,
  1026. entry);
  1027. /*
  1028. * Send out the guardian byte.
  1029. */
  1030. usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC);
  1031. /*
  1032. * Enable beaconing again.
  1033. */
  1034. rt2x00_set_field16(&reg, TXRX_CSR19_TSF_COUNT, 1);
  1035. rt2x00_set_field16(&reg, TXRX_CSR19_TBCN, 1);
  1036. reg0 = reg;
  1037. rt2x00_set_field16(&reg, TXRX_CSR19_BEACON_GEN, 1);
  1038. /*
  1039. * Beacon generation will fail initially.
  1040. * To prevent this we need to change the TXRX_CSR19
  1041. * register several times (reg0 is the same as reg
  1042. * except for TXRX_CSR19_BEACON_GEN, which is 0 in reg0
  1043. * and 1 in reg).
  1044. */
  1045. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1046. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
  1047. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1048. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg0);
  1049. rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg);
  1050. }
  1051. static int rt2500usb_get_tx_data_len(struct queue_entry *entry)
  1052. {
  1053. int length;
  1054. /*
  1055. * The length _must_ be a multiple of 2,
  1056. * but it must _not_ be a multiple of the USB packet size.
  1057. */
  1058. length = roundup(entry->skb->len, 2);
  1059. length += (2 * !(length % entry->queue->usb_maxpacket));
  1060. return length;
  1061. }
  1062. /*
  1063. * RX control handlers
  1064. */
  1065. static void rt2500usb_fill_rxdone(struct queue_entry *entry,
  1066. struct rxdone_entry_desc *rxdesc)
  1067. {
  1068. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  1069. struct queue_entry_priv_usb *entry_priv = entry->priv_data;
  1070. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  1071. __le32 *rxd =
  1072. (__le32 *)(entry->skb->data +
  1073. (entry_priv->urb->actual_length -
  1074. entry->queue->desc_size));
  1075. u32 word0;
  1076. u32 word1;
  1077. /*
  1078. * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
  1079. * frame data in rt2x00usb.
  1080. */
  1081. memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
  1082. rxd = (__le32 *)skbdesc->desc;
  1083. /*
  1084. * It is now safe to read the descriptor on all architectures.
  1085. */
  1086. rt2x00_desc_read(rxd, 0, &word0);
  1087. rt2x00_desc_read(rxd, 1, &word1);
  1088. if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
  1089. rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
  1090. if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR))
  1091. rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC;
  1092. rxdesc->cipher = rt2x00_get_field32(word0, RXD_W0_CIPHER);
  1093. if (rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
  1094. rxdesc->cipher_status = RX_CRYPTO_FAIL_KEY;
  1095. if (rxdesc->cipher != CIPHER_NONE) {
  1096. _rt2x00_desc_read(rxd, 2, &rxdesc->iv[0]);
  1097. _rt2x00_desc_read(rxd, 3, &rxdesc->iv[1]);
  1098. rxdesc->dev_flags |= RXDONE_CRYPTO_IV;
  1099. /* ICV is located at the end of frame */
  1100. rxdesc->flags |= RX_FLAG_MMIC_STRIPPED;
  1101. if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
  1102. rxdesc->flags |= RX_FLAG_DECRYPTED;
  1103. else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
  1104. rxdesc->flags |= RX_FLAG_MMIC_ERROR;
  1105. }
  1106. /*
  1107. * Obtain the status about this packet.
  1108. * When frame was received with an OFDM bitrate,
  1109. * the signal is the PLCP value. If it was received with
  1110. * a CCK bitrate the signal is the rate in 100kbit/s.
  1111. */
  1112. rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
  1113. rxdesc->rssi =
  1114. rt2x00_get_field32(word1, RXD_W1_RSSI) - rt2x00dev->rssi_offset;
  1115. rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
  1116. if (rt2x00_get_field32(word0, RXD_W0_OFDM))
  1117. rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
  1118. else
  1119. rxdesc->dev_flags |= RXDONE_SIGNAL_BITRATE;
  1120. if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
  1121. rxdesc->dev_flags |= RXDONE_MY_BSS;
  1122. /*
  1123. * Adjust the skb memory window to the frame boundaries.
  1124. */
  1125. skb_trim(entry->skb, rxdesc->size);
  1126. }
  1127. /*
  1128. * Interrupt functions.
  1129. */
  1130. static void rt2500usb_beacondone(struct urb *urb)
  1131. {
  1132. struct queue_entry *entry = (struct queue_entry *)urb->context;
  1133. struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data;
  1134. if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags))
  1135. return;
  1136. /*
  1137. * Check if this was the guardian beacon,
  1138. * if that was the case we need to send the real beacon now.
  1139. * Otherwise we should free the sk_buffer, the device
  1140. * should be doing the rest of the work now.
  1141. */
  1142. if (bcn_priv->guardian_urb == urb) {
  1143. usb_submit_urb(bcn_priv->urb, GFP_ATOMIC);
  1144. } else if (bcn_priv->urb == urb) {
  1145. dev_kfree_skb(entry->skb);
  1146. entry->skb = NULL;
  1147. }
  1148. }
  1149. /*
  1150. * Device probe functions.
  1151. */
  1152. static int rt2500usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
  1153. {
  1154. u16 word;
  1155. u8 *mac;
  1156. u8 bbp;
  1157. rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
  1158. /*
  1159. * Start validation of the data that has been read.
  1160. */
  1161. mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
  1162. if (!is_valid_ether_addr(mac)) {
  1163. eth_random_addr(mac);
  1164. rt2x00_eeprom_dbg(rt2x00dev, "MAC: %pM\n", mac);
  1165. }
  1166. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
  1167. if (word == 0xffff) {
  1168. rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
  1169. rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
  1170. ANTENNA_SW_DIVERSITY);
  1171. rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
  1172. ANTENNA_SW_DIVERSITY);
  1173. rt2x00_set_field16(&word, EEPROM_ANTENNA_LED_MODE,
  1174. LED_MODE_DEFAULT);
  1175. rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
  1176. rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
  1177. rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2522);
  1178. rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
  1179. rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
  1180. }
  1181. rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
  1182. if (word == 0xffff) {
  1183. rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
  1184. rt2x00_set_field16(&word, EEPROM_NIC_DYN_BBP_TUNE, 0);
  1185. rt2x00_set_field16(&word, EEPROM_NIC_CCK_TX_POWER, 0);
  1186. rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
  1187. rt2x00_eeprom_dbg(rt2x00dev, "NIC: 0x%04x\n", word);
  1188. }
  1189. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &word);
  1190. if (word == 0xffff) {
  1191. rt2x00_set_field16(&word, EEPROM_CALIBRATE_OFFSET_RSSI,
  1192. DEFAULT_RSSI_OFFSET);
  1193. rt2x00_eeprom_write(rt2x00dev, EEPROM_CALIBRATE_OFFSET, word);
  1194. rt2x00_eeprom_dbg(rt2x00dev, "Calibrate offset: 0x%04x\n",
  1195. word);
  1196. }
  1197. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &word);
  1198. if (word == 0xffff) {
  1199. rt2x00_set_field16(&word, EEPROM_BBPTUNE_THRESHOLD, 45);
  1200. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE, word);
  1201. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune: 0x%04x\n", word);
  1202. }
  1203. /*
  1204. * Switch lower vgc bound to current BBP R17 value,
  1205. * lower the value a bit for better quality.
  1206. */
  1207. rt2500usb_bbp_read(rt2x00dev, 17, &bbp);
  1208. bbp -= 6;
  1209. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &word);
  1210. if (word == 0xffff) {
  1211. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCUPPER, 0x40);
  1212. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1213. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1214. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune vgc: 0x%04x\n", word);
  1215. } else {
  1216. rt2x00_set_field16(&word, EEPROM_BBPTUNE_VGCLOWER, bbp);
  1217. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_VGC, word);
  1218. }
  1219. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &word);
  1220. if (word == 0xffff) {
  1221. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_LOW, 0x48);
  1222. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R17_HIGH, 0x41);
  1223. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R17, word);
  1224. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r17: 0x%04x\n", word);
  1225. }
  1226. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &word);
  1227. if (word == 0xffff) {
  1228. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_LOW, 0x40);
  1229. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R24_HIGH, 0x80);
  1230. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R24, word);
  1231. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r24: 0x%04x\n", word);
  1232. }
  1233. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &word);
  1234. if (word == 0xffff) {
  1235. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_LOW, 0x40);
  1236. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R25_HIGH, 0x50);
  1237. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R25, word);
  1238. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r25: 0x%04x\n", word);
  1239. }
  1240. rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &word);
  1241. if (word == 0xffff) {
  1242. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_LOW, 0x60);
  1243. rt2x00_set_field16(&word, EEPROM_BBPTUNE_R61_HIGH, 0x6d);
  1244. rt2x00_eeprom_write(rt2x00dev, EEPROM_BBPTUNE_R61, word);
  1245. rt2x00_eeprom_dbg(rt2x00dev, "BBPtune r61: 0x%04x\n", word);
  1246. }
  1247. return 0;
  1248. }
  1249. static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
  1250. {
  1251. u16 reg;
  1252. u16 value;
  1253. u16 eeprom;
  1254. /*
  1255. * Read EEPROM word for configuration.
  1256. */
  1257. rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
  1258. /*
  1259. * Identify RF chipset.
  1260. */
  1261. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
  1262. rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
  1263. rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
  1264. if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
  1265. rt2x00_err(rt2x00dev, "Invalid RT chipset detected\n");
  1266. return -ENODEV;
  1267. }
  1268. if (!rt2x00_rf(rt2x00dev, RF2522) &&
  1269. !rt2x00_rf(rt2x00dev, RF2523) &&
  1270. !rt2x00_rf(rt2x00dev, RF2524) &&
  1271. !rt2x00_rf(rt2x00dev, RF2525) &&
  1272. !rt2x00_rf(rt2x00dev, RF2525E) &&
  1273. !rt2x00_rf(rt2x00dev, RF5222)) {
  1274. rt2x00_err(rt2x00dev, "Invalid RF chipset detected\n");
  1275. return -ENODEV;
  1276. }
  1277. /*
  1278. * Identify default antenna configuration.
  1279. */
  1280. rt2x00dev->default_ant.tx =
  1281. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
  1282. rt2x00dev->default_ant.rx =
  1283. rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
  1284. /*
  1285. * When the eeprom indicates SW_DIVERSITY use HW_DIVERSITY instead.
  1286. * I am not 100% sure about this, but the legacy drivers do not
  1287. * indicate antenna swapping in software is required when
  1288. * diversity is enabled.
  1289. */
  1290. if (rt2x00dev->default_ant.tx == ANTENNA_SW_DIVERSITY)
  1291. rt2x00dev->default_ant.tx = ANTENNA_HW_DIVERSITY;
  1292. if (rt2x00dev->default_ant.rx == ANTENNA_SW_DIVERSITY)
  1293. rt2x00dev->default_ant.rx = ANTENNA_HW_DIVERSITY;
  1294. /*
  1295. * Store led mode, for correct led behaviour.
  1296. */
  1297. #ifdef CONFIG_RT2X00_LIB_LEDS
  1298. value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE);
  1299. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
  1300. if (value == LED_MODE_TXRX_ACTIVITY ||
  1301. value == LED_MODE_DEFAULT ||
  1302. value == LED_MODE_ASUS)
  1303. rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
  1304. LED_TYPE_ACTIVITY);
  1305. #endif /* CONFIG_RT2X00_LIB_LEDS */
  1306. /*
  1307. * Detect if this device has an hardware controlled radio.
  1308. */
  1309. if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
  1310. __set_bit(CAPABILITY_HW_BUTTON, &rt2x00dev->cap_flags);
  1311. /*
  1312. * Read the RSSI <-> dBm offset information.
  1313. */
  1314. rt2x00_eeprom_read(rt2x00dev, EEPROM_CALIBRATE_OFFSET, &eeprom);
  1315. rt2x00dev->rssi_offset =
  1316. rt2x00_get_field16(eeprom, EEPROM_CALIBRATE_OFFSET_RSSI);
  1317. return 0;
  1318. }
  1319. /*
  1320. * RF value list for RF2522
  1321. * Supports: 2.4 GHz
  1322. */
  1323. static const struct rf_channel rf_vals_bg_2522[] = {
  1324. { 1, 0x00002050, 0x000c1fda, 0x00000101, 0 },
  1325. { 2, 0x00002050, 0x000c1fee, 0x00000101, 0 },
  1326. { 3, 0x00002050, 0x000c2002, 0x00000101, 0 },
  1327. { 4, 0x00002050, 0x000c2016, 0x00000101, 0 },
  1328. { 5, 0x00002050, 0x000c202a, 0x00000101, 0 },
  1329. { 6, 0x00002050, 0x000c203e, 0x00000101, 0 },
  1330. { 7, 0x00002050, 0x000c2052, 0x00000101, 0 },
  1331. { 8, 0x00002050, 0x000c2066, 0x00000101, 0 },
  1332. { 9, 0x00002050, 0x000c207a, 0x00000101, 0 },
  1333. { 10, 0x00002050, 0x000c208e, 0x00000101, 0 },
  1334. { 11, 0x00002050, 0x000c20a2, 0x00000101, 0 },
  1335. { 12, 0x00002050, 0x000c20b6, 0x00000101, 0 },
  1336. { 13, 0x00002050, 0x000c20ca, 0x00000101, 0 },
  1337. { 14, 0x00002050, 0x000c20fa, 0x00000101, 0 },
  1338. };
  1339. /*
  1340. * RF value list for RF2523
  1341. * Supports: 2.4 GHz
  1342. */
  1343. static const struct rf_channel rf_vals_bg_2523[] = {
  1344. { 1, 0x00022010, 0x00000c9e, 0x000e0111, 0x00000a1b },
  1345. { 2, 0x00022010, 0x00000ca2, 0x000e0111, 0x00000a1b },
  1346. { 3, 0x00022010, 0x00000ca6, 0x000e0111, 0x00000a1b },
  1347. { 4, 0x00022010, 0x00000caa, 0x000e0111, 0x00000a1b },
  1348. { 5, 0x00022010, 0x00000cae, 0x000e0111, 0x00000a1b },
  1349. { 6, 0x00022010, 0x00000cb2, 0x000e0111, 0x00000a1b },
  1350. { 7, 0x00022010, 0x00000cb6, 0x000e0111, 0x00000a1b },
  1351. { 8, 0x00022010, 0x00000cba, 0x000e0111, 0x00000a1b },
  1352. { 9, 0x00022010, 0x00000cbe, 0x000e0111, 0x00000a1b },
  1353. { 10, 0x00022010, 0x00000d02, 0x000e0111, 0x00000a1b },
  1354. { 11, 0x00022010, 0x00000d06, 0x000e0111, 0x00000a1b },
  1355. { 12, 0x00022010, 0x00000d0a, 0x000e0111, 0x00000a1b },
  1356. { 13, 0x00022010, 0x00000d0e, 0x000e0111, 0x00000a1b },
  1357. { 14, 0x00022010, 0x00000d1a, 0x000e0111, 0x00000a03 },
  1358. };
  1359. /*
  1360. * RF value list for RF2524
  1361. * Supports: 2.4 GHz
  1362. */
  1363. static const struct rf_channel rf_vals_bg_2524[] = {
  1364. { 1, 0x00032020, 0x00000c9e, 0x00000101, 0x00000a1b },
  1365. { 2, 0x00032020, 0x00000ca2, 0x00000101, 0x00000a1b },
  1366. { 3, 0x00032020, 0x00000ca6, 0x00000101, 0x00000a1b },
  1367. { 4, 0x00032020, 0x00000caa, 0x00000101, 0x00000a1b },
  1368. { 5, 0x00032020, 0x00000cae, 0x00000101, 0x00000a1b },
  1369. { 6, 0x00032020, 0x00000cb2, 0x00000101, 0x00000a1b },
  1370. { 7, 0x00032020, 0x00000cb6, 0x00000101, 0x00000a1b },
  1371. { 8, 0x00032020, 0x00000cba, 0x00000101, 0x00000a1b },
  1372. { 9, 0x00032020, 0x00000cbe, 0x00000101, 0x00000a1b },
  1373. { 10, 0x00032020, 0x00000d02, 0x00000101, 0x00000a1b },
  1374. { 11, 0x00032020, 0x00000d06, 0x00000101, 0x00000a1b },
  1375. { 12, 0x00032020, 0x00000d0a, 0x00000101, 0x00000a1b },
  1376. { 13, 0x00032020, 0x00000d0e, 0x00000101, 0x00000a1b },
  1377. { 14, 0x00032020, 0x00000d1a, 0x00000101, 0x00000a03 },
  1378. };
  1379. /*
  1380. * RF value list for RF2525
  1381. * Supports: 2.4 GHz
  1382. */
  1383. static const struct rf_channel rf_vals_bg_2525[] = {
  1384. { 1, 0x00022020, 0x00080c9e, 0x00060111, 0x00000a1b },
  1385. { 2, 0x00022020, 0x00080ca2, 0x00060111, 0x00000a1b },
  1386. { 3, 0x00022020, 0x00080ca6, 0x00060111, 0x00000a1b },
  1387. { 4, 0x00022020, 0x00080caa, 0x00060111, 0x00000a1b },
  1388. { 5, 0x00022020, 0x00080cae, 0x00060111, 0x00000a1b },
  1389. { 6, 0x00022020, 0x00080cb2, 0x00060111, 0x00000a1b },
  1390. { 7, 0x00022020, 0x00080cb6, 0x00060111, 0x00000a1b },
  1391. { 8, 0x00022020, 0x00080cba, 0x00060111, 0x00000a1b },
  1392. { 9, 0x00022020, 0x00080cbe, 0x00060111, 0x00000a1b },
  1393. { 10, 0x00022020, 0x00080d02, 0x00060111, 0x00000a1b },
  1394. { 11, 0x00022020, 0x00080d06, 0x00060111, 0x00000a1b },
  1395. { 12, 0x00022020, 0x00080d0a, 0x00060111, 0x00000a1b },
  1396. { 13, 0x00022020, 0x00080d0e, 0x00060111, 0x00000a1b },
  1397. { 14, 0x00022020, 0x00080d1a, 0x00060111, 0x00000a03 },
  1398. };
  1399. /*
  1400. * RF value list for RF2525e
  1401. * Supports: 2.4 GHz
  1402. */
  1403. static const struct rf_channel rf_vals_bg_2525e[] = {
  1404. { 1, 0x00022010, 0x0000089a, 0x00060111, 0x00000e1b },
  1405. { 2, 0x00022010, 0x0000089e, 0x00060111, 0x00000e07 },
  1406. { 3, 0x00022010, 0x0000089e, 0x00060111, 0x00000e1b },
  1407. { 4, 0x00022010, 0x000008a2, 0x00060111, 0x00000e07 },
  1408. { 5, 0x00022010, 0x000008a2, 0x00060111, 0x00000e1b },
  1409. { 6, 0x00022010, 0x000008a6, 0x00060111, 0x00000e07 },
  1410. { 7, 0x00022010, 0x000008a6, 0x00060111, 0x00000e1b },
  1411. { 8, 0x00022010, 0x000008aa, 0x00060111, 0x00000e07 },
  1412. { 9, 0x00022010, 0x000008aa, 0x00060111, 0x00000e1b },
  1413. { 10, 0x00022010, 0x000008ae, 0x00060111, 0x00000e07 },
  1414. { 11, 0x00022010, 0x000008ae, 0x00060111, 0x00000e1b },
  1415. { 12, 0x00022010, 0x000008b2, 0x00060111, 0x00000e07 },
  1416. { 13, 0x00022010, 0x000008b2, 0x00060111, 0x00000e1b },
  1417. { 14, 0x00022010, 0x000008b6, 0x00060111, 0x00000e23 },
  1418. };
  1419. /*
  1420. * RF value list for RF5222
  1421. * Supports: 2.4 GHz & 5.2 GHz
  1422. */
  1423. static const struct rf_channel rf_vals_5222[] = {
  1424. { 1, 0x00022020, 0x00001136, 0x00000101, 0x00000a0b },
  1425. { 2, 0x00022020, 0x0000113a, 0x00000101, 0x00000a0b },
  1426. { 3, 0x00022020, 0x0000113e, 0x00000101, 0x00000a0b },
  1427. { 4, 0x00022020, 0x00001182, 0x00000101, 0x00000a0b },
  1428. { 5, 0x00022020, 0x00001186, 0x00000101, 0x00000a0b },
  1429. { 6, 0x00022020, 0x0000118a, 0x00000101, 0x00000a0b },
  1430. { 7, 0x00022020, 0x0000118e, 0x00000101, 0x00000a0b },
  1431. { 8, 0x00022020, 0x00001192, 0x00000101, 0x00000a0b },
  1432. { 9, 0x00022020, 0x00001196, 0x00000101, 0x00000a0b },
  1433. { 10, 0x00022020, 0x0000119a, 0x00000101, 0x00000a0b },
  1434. { 11, 0x00022020, 0x0000119e, 0x00000101, 0x00000a0b },
  1435. { 12, 0x00022020, 0x000011a2, 0x00000101, 0x00000a0b },
  1436. { 13, 0x00022020, 0x000011a6, 0x00000101, 0x00000a0b },
  1437. { 14, 0x00022020, 0x000011ae, 0x00000101, 0x00000a1b },
  1438. /* 802.11 UNI / HyperLan 2 */
  1439. { 36, 0x00022010, 0x00018896, 0x00000101, 0x00000a1f },
  1440. { 40, 0x00022010, 0x0001889a, 0x00000101, 0x00000a1f },
  1441. { 44, 0x00022010, 0x0001889e, 0x00000101, 0x00000a1f },
  1442. { 48, 0x00022010, 0x000188a2, 0x00000101, 0x00000a1f },
  1443. { 52, 0x00022010, 0x000188a6, 0x00000101, 0x00000a1f },
  1444. { 66, 0x00022010, 0x000188aa, 0x00000101, 0x00000a1f },
  1445. { 60, 0x00022010, 0x000188ae, 0x00000101, 0x00000a1f },
  1446. { 64, 0x00022010, 0x000188b2, 0x00000101, 0x00000a1f },
  1447. /* 802.11 HyperLan 2 */
  1448. { 100, 0x00022010, 0x00008802, 0x00000101, 0x00000a0f },
  1449. { 104, 0x00022010, 0x00008806, 0x00000101, 0x00000a0f },
  1450. { 108, 0x00022010, 0x0000880a, 0x00000101, 0x00000a0f },
  1451. { 112, 0x00022010, 0x0000880e, 0x00000101, 0x00000a0f },
  1452. { 116, 0x00022010, 0x00008812, 0x00000101, 0x00000a0f },
  1453. { 120, 0x00022010, 0x00008816, 0x00000101, 0x00000a0f },
  1454. { 124, 0x00022010, 0x0000881a, 0x00000101, 0x00000a0f },
  1455. { 128, 0x00022010, 0x0000881e, 0x00000101, 0x00000a0f },
  1456. { 132, 0x00022010, 0x00008822, 0x00000101, 0x00000a0f },
  1457. { 136, 0x00022010, 0x00008826, 0x00000101, 0x00000a0f },
  1458. /* 802.11 UNII */
  1459. { 140, 0x00022010, 0x0000882a, 0x00000101, 0x00000a0f },
  1460. { 149, 0x00022020, 0x000090a6, 0x00000101, 0x00000a07 },
  1461. { 153, 0x00022020, 0x000090ae, 0x00000101, 0x00000a07 },
  1462. { 157, 0x00022020, 0x000090b6, 0x00000101, 0x00000a07 },
  1463. { 161, 0x00022020, 0x000090be, 0x00000101, 0x00000a07 },
  1464. };
  1465. static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
  1466. {
  1467. struct hw_mode_spec *spec = &rt2x00dev->spec;
  1468. struct channel_info *info;
  1469. char *tx_power;
  1470. unsigned int i;
  1471. /*
  1472. * Initialize all hw fields.
  1473. *
  1474. * Don't set IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING unless we are
  1475. * capable of sending the buffered frames out after the DTIM
  1476. * transmission using rt2x00lib_beacondone. This will send out
  1477. * multicast and broadcast traffic immediately instead of buffering it
  1478. * infinitly and thus dropping it after some time.
  1479. */
  1480. rt2x00dev->hw->flags =
  1481. IEEE80211_HW_RX_INCLUDES_FCS |
  1482. IEEE80211_HW_SIGNAL_DBM |
  1483. IEEE80211_HW_SUPPORTS_PS |
  1484. IEEE80211_HW_PS_NULLFUNC_STACK;
  1485. SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
  1486. SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
  1487. rt2x00_eeprom_addr(rt2x00dev,
  1488. EEPROM_MAC_ADDR_0));
  1489. /*
  1490. * Initialize hw_mode information.
  1491. */
  1492. spec->supported_bands = SUPPORT_BAND_2GHZ;
  1493. spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
  1494. if (rt2x00_rf(rt2x00dev, RF2522)) {
  1495. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
  1496. spec->channels = rf_vals_bg_2522;
  1497. } else if (rt2x00_rf(rt2x00dev, RF2523)) {
  1498. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
  1499. spec->channels = rf_vals_bg_2523;
  1500. } else if (rt2x00_rf(rt2x00dev, RF2524)) {
  1501. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
  1502. spec->channels = rf_vals_bg_2524;
  1503. } else if (rt2x00_rf(rt2x00dev, RF2525)) {
  1504. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
  1505. spec->channels = rf_vals_bg_2525;
  1506. } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
  1507. spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
  1508. spec->channels = rf_vals_bg_2525e;
  1509. } else if (rt2x00_rf(rt2x00dev, RF5222)) {
  1510. spec->supported_bands |= SUPPORT_BAND_5GHZ;
  1511. spec->num_channels = ARRAY_SIZE(rf_vals_5222);
  1512. spec->channels = rf_vals_5222;
  1513. }
  1514. /*
  1515. * Create channel information array
  1516. */
  1517. info = kcalloc(spec->num_channels, sizeof(*info), GFP_KERNEL);
  1518. if (!info)
  1519. return -ENOMEM;
  1520. spec->channels_info = info;
  1521. tx_power = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_START);
  1522. for (i = 0; i < 14; i++) {
  1523. info[i].max_power = MAX_TXPOWER;
  1524. info[i].default_power1 = TXPOWER_FROM_DEV(tx_power[i]);
  1525. }
  1526. if (spec->num_channels > 14) {
  1527. for (i = 14; i < spec->num_channels; i++) {
  1528. info[i].max_power = MAX_TXPOWER;
  1529. info[i].default_power1 = DEFAULT_TXPOWER;
  1530. }
  1531. }
  1532. return 0;
  1533. }
  1534. static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev)
  1535. {
  1536. int retval;
  1537. u16 reg;
  1538. /*
  1539. * Allocate eeprom data.
  1540. */
  1541. retval = rt2500usb_validate_eeprom(rt2x00dev);
  1542. if (retval)
  1543. return retval;
  1544. retval = rt2500usb_init_eeprom(rt2x00dev);
  1545. if (retval)
  1546. return retval;
  1547. /*
  1548. * Enable rfkill polling by setting GPIO direction of the
  1549. * rfkill switch GPIO pin correctly.
  1550. */
  1551. rt2500usb_register_read(rt2x00dev, MAC_CSR19, &reg);
  1552. rt2x00_set_field16(&reg, MAC_CSR19_DIR0, 0);
  1553. rt2500usb_register_write(rt2x00dev, MAC_CSR19, reg);
  1554. /*
  1555. * Initialize hw specifications.
  1556. */
  1557. retval = rt2500usb_probe_hw_mode(rt2x00dev);
  1558. if (retval)
  1559. return retval;
  1560. /*
  1561. * This device requires the atim queue
  1562. */
  1563. __set_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
  1564. __set_bit(REQUIRE_BEACON_GUARD, &rt2x00dev->cap_flags);
  1565. if (!modparam_nohwcrypt) {
  1566. __set_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags);
  1567. __set_bit(REQUIRE_COPY_IV, &rt2x00dev->cap_flags);
  1568. }
  1569. __set_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags);
  1570. __set_bit(REQUIRE_PS_AUTOWAKE, &rt2x00dev->cap_flags);
  1571. /*
  1572. * Set the rssi offset.
  1573. */
  1574. rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
  1575. return 0;
  1576. }
  1577. static const struct ieee80211_ops rt2500usb_mac80211_ops = {
  1578. .tx = rt2x00mac_tx,
  1579. .start = rt2x00mac_start,
  1580. .stop = rt2x00mac_stop,
  1581. .add_interface = rt2x00mac_add_interface,
  1582. .remove_interface = rt2x00mac_remove_interface,
  1583. .config = rt2x00mac_config,
  1584. .configure_filter = rt2x00mac_configure_filter,
  1585. .set_tim = rt2x00mac_set_tim,
  1586. .set_key = rt2x00mac_set_key,
  1587. .sw_scan_start = rt2x00mac_sw_scan_start,
  1588. .sw_scan_complete = rt2x00mac_sw_scan_complete,
  1589. .get_stats = rt2x00mac_get_stats,
  1590. .bss_info_changed = rt2x00mac_bss_info_changed,
  1591. .conf_tx = rt2x00mac_conf_tx,
  1592. .rfkill_poll = rt2x00mac_rfkill_poll,
  1593. .flush = rt2x00mac_flush,
  1594. .set_antenna = rt2x00mac_set_antenna,
  1595. .get_antenna = rt2x00mac_get_antenna,
  1596. .get_ringparam = rt2x00mac_get_ringparam,
  1597. .tx_frames_pending = rt2x00mac_tx_frames_pending,
  1598. };
  1599. static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
  1600. .probe_hw = rt2500usb_probe_hw,
  1601. .initialize = rt2x00usb_initialize,
  1602. .uninitialize = rt2x00usb_uninitialize,
  1603. .clear_entry = rt2x00usb_clear_entry,
  1604. .set_device_state = rt2500usb_set_device_state,
  1605. .rfkill_poll = rt2500usb_rfkill_poll,
  1606. .link_stats = rt2500usb_link_stats,
  1607. .reset_tuner = rt2500usb_reset_tuner,
  1608. .watchdog = rt2x00usb_watchdog,
  1609. .start_queue = rt2500usb_start_queue,
  1610. .kick_queue = rt2x00usb_kick_queue,
  1611. .stop_queue = rt2500usb_stop_queue,
  1612. .flush_queue = rt2x00usb_flush_queue,
  1613. .write_tx_desc = rt2500usb_write_tx_desc,
  1614. .write_beacon = rt2500usb_write_beacon,
  1615. .get_tx_data_len = rt2500usb_get_tx_data_len,
  1616. .fill_rxdone = rt2500usb_fill_rxdone,
  1617. .config_shared_key = rt2500usb_config_key,
  1618. .config_pairwise_key = rt2500usb_config_key,
  1619. .config_filter = rt2500usb_config_filter,
  1620. .config_intf = rt2500usb_config_intf,
  1621. .config_erp = rt2500usb_config_erp,
  1622. .config_ant = rt2500usb_config_ant,
  1623. .config = rt2500usb_config,
  1624. };
  1625. static void rt2500usb_queue_init(struct data_queue *queue)
  1626. {
  1627. switch (queue->qid) {
  1628. case QID_RX:
  1629. queue->limit = 32;
  1630. queue->data_size = DATA_FRAME_SIZE;
  1631. queue->desc_size = RXD_DESC_SIZE;
  1632. queue->priv_size = sizeof(struct queue_entry_priv_usb);
  1633. break;
  1634. case QID_AC_VO:
  1635. case QID_AC_VI:
  1636. case QID_AC_BE:
  1637. case QID_AC_BK:
  1638. queue->limit = 32;
  1639. queue->data_size = DATA_FRAME_SIZE;
  1640. queue->desc_size = TXD_DESC_SIZE;
  1641. queue->priv_size = sizeof(struct queue_entry_priv_usb);
  1642. break;
  1643. case QID_BEACON:
  1644. queue->limit = 1;
  1645. queue->data_size = MGMT_FRAME_SIZE;
  1646. queue->desc_size = TXD_DESC_SIZE;
  1647. queue->priv_size = sizeof(struct queue_entry_priv_usb_bcn);
  1648. break;
  1649. case QID_ATIM:
  1650. queue->limit = 8;
  1651. queue->data_size = DATA_FRAME_SIZE;
  1652. queue->desc_size = TXD_DESC_SIZE;
  1653. queue->priv_size = sizeof(struct queue_entry_priv_usb);
  1654. break;
  1655. default:
  1656. BUG();
  1657. break;
  1658. }
  1659. }
  1660. static const struct rt2x00_ops rt2500usb_ops = {
  1661. .name = KBUILD_MODNAME,
  1662. .max_ap_intf = 1,
  1663. .eeprom_size = EEPROM_SIZE,
  1664. .rf_size = RF_SIZE,
  1665. .tx_queues = NUM_TX_QUEUES,
  1666. .queue_init = rt2500usb_queue_init,
  1667. .lib = &rt2500usb_rt2x00_ops,
  1668. .hw = &rt2500usb_mac80211_ops,
  1669. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  1670. .debugfs = &rt2500usb_rt2x00debug,
  1671. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  1672. };
  1673. /*
  1674. * rt2500usb module information.
  1675. */
  1676. static struct usb_device_id rt2500usb_device_table[] = {
  1677. /* ASUS */
  1678. { USB_DEVICE(0x0b05, 0x1706) },
  1679. { USB_DEVICE(0x0b05, 0x1707) },
  1680. /* Belkin */
  1681. { USB_DEVICE(0x050d, 0x7050) }, /* FCC ID: K7SF5D7050A ver. 2.x */
  1682. { USB_DEVICE(0x050d, 0x7051) },
  1683. /* Cisco Systems */
  1684. { USB_DEVICE(0x13b1, 0x000d) },
  1685. { USB_DEVICE(0x13b1, 0x0011) },
  1686. { USB_DEVICE(0x13b1, 0x001a) },
  1687. /* Conceptronic */
  1688. { USB_DEVICE(0x14b2, 0x3c02) },
  1689. /* D-LINK */
  1690. { USB_DEVICE(0x2001, 0x3c00) },
  1691. /* Gigabyte */
  1692. { USB_DEVICE(0x1044, 0x8001) },
  1693. { USB_DEVICE(0x1044, 0x8007) },
  1694. /* Hercules */
  1695. { USB_DEVICE(0x06f8, 0xe000) },
  1696. /* Melco */
  1697. { USB_DEVICE(0x0411, 0x005e) },
  1698. { USB_DEVICE(0x0411, 0x0066) },
  1699. { USB_DEVICE(0x0411, 0x0067) },
  1700. { USB_DEVICE(0x0411, 0x008b) },
  1701. { USB_DEVICE(0x0411, 0x0097) },
  1702. /* MSI */
  1703. { USB_DEVICE(0x0db0, 0x6861) },
  1704. { USB_DEVICE(0x0db0, 0x6865) },
  1705. { USB_DEVICE(0x0db0, 0x6869) },
  1706. /* Ralink */
  1707. { USB_DEVICE(0x148f, 0x1706) },
  1708. { USB_DEVICE(0x148f, 0x2570) },
  1709. { USB_DEVICE(0x148f, 0x9020) },
  1710. /* Sagem */
  1711. { USB_DEVICE(0x079b, 0x004b) },
  1712. /* Siemens */
  1713. { USB_DEVICE(0x0681, 0x3c06) },
  1714. /* SMC */
  1715. { USB_DEVICE(0x0707, 0xee13) },
  1716. /* Spairon */
  1717. { USB_DEVICE(0x114b, 0x0110) },
  1718. /* SURECOM */
  1719. { USB_DEVICE(0x0769, 0x11f3) },
  1720. /* Trust */
  1721. { USB_DEVICE(0x0eb0, 0x9020) },
  1722. /* VTech */
  1723. { USB_DEVICE(0x0f88, 0x3012) },
  1724. /* Zinwell */
  1725. { USB_DEVICE(0x5a57, 0x0260) },
  1726. { 0, }
  1727. };
  1728. MODULE_AUTHOR(DRV_PROJECT);
  1729. MODULE_VERSION(DRV_VERSION);
  1730. MODULE_DESCRIPTION("Ralink RT2500 USB Wireless LAN driver.");
  1731. MODULE_SUPPORTED_DEVICE("Ralink RT2570 USB chipset based cards");
  1732. MODULE_DEVICE_TABLE(usb, rt2500usb_device_table);
  1733. MODULE_LICENSE("GPL");
  1734. static int rt2500usb_probe(struct usb_interface *usb_intf,
  1735. const struct usb_device_id *id)
  1736. {
  1737. return rt2x00usb_probe(usb_intf, &rt2500usb_ops);
  1738. }
  1739. static struct usb_driver rt2500usb_driver = {
  1740. .name = KBUILD_MODNAME,
  1741. .id_table = rt2500usb_device_table,
  1742. .probe = rt2500usb_probe,
  1743. .disconnect = rt2x00usb_disconnect,
  1744. .suspend = rt2x00usb_suspend,
  1745. .resume = rt2x00usb_resume,
  1746. .reset_resume = rt2x00usb_resume,
  1747. .disable_hub_initiated_lpm = 1,
  1748. };
  1749. module_usb_driver(rt2500usb_driver);