wmi.c 105 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/skbuff.h>
  18. #include "core.h"
  19. #include "htc.h"
  20. #include "debug.h"
  21. #include "wmi.h"
  22. #include "mac.h"
  23. /* MAIN WMI cmd track */
  24. static struct wmi_cmd_map wmi_cmd_map = {
  25. .init_cmdid = WMI_INIT_CMDID,
  26. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  27. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  28. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  29. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  30. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  31. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  32. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  33. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  34. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  35. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  36. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  37. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  38. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  39. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  40. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  41. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  42. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  43. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  44. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  45. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  46. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  47. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  48. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  49. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  50. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  51. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  52. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  53. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  54. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  55. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  56. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  57. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  58. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  59. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  60. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  61. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  62. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  63. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  64. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  65. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  66. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  67. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  68. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  69. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  70. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  71. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  72. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  73. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  74. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  75. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  76. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  77. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  78. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  79. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  80. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  81. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  82. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  83. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  84. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  85. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  86. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  87. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  88. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  89. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  90. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  91. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  92. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  93. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  94. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  95. .wlan_profile_set_hist_intvl_cmdid =
  96. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  97. .wlan_profile_get_profile_data_cmdid =
  98. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  99. .wlan_profile_enable_profile_id_cmdid =
  100. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  101. .wlan_profile_list_profile_id_cmdid =
  102. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  103. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  104. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  105. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  106. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  107. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  108. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  109. .wow_enable_disable_wake_event_cmdid =
  110. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  111. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  112. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  113. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  114. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  115. .vdev_spectral_scan_configure_cmdid =
  116. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  117. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  118. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  119. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  120. .network_list_offload_config_cmdid =
  121. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  122. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  123. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  124. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  125. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  126. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  127. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  128. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  129. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  130. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  131. .echo_cmdid = WMI_ECHO_CMDID,
  132. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  133. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  134. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  135. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  136. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  137. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  138. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  139. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  140. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  141. };
  142. /* 10.X WMI cmd track */
  143. static struct wmi_cmd_map wmi_10x_cmd_map = {
  144. .init_cmdid = WMI_10X_INIT_CMDID,
  145. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  146. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  147. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  148. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  149. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  150. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  151. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  152. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  153. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  154. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  155. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  156. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  157. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  158. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  159. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  160. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  161. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  162. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  163. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  164. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  165. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  166. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  167. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  168. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  169. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  170. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  171. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  172. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  173. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  174. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  175. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  176. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  177. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  178. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  179. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  180. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  181. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  182. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  183. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  184. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  185. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  186. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  187. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  188. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  189. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  190. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  191. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  192. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  193. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  194. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  195. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  196. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  197. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  198. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  199. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  200. .roam_scan_rssi_change_threshold =
  201. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  202. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  203. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  204. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  205. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  206. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  207. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  208. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  209. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  210. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  211. .ap_ps_peer_param_cmdid = WMI_CMD_UNSUPPORTED,
  212. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  213. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  214. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  215. .wlan_profile_set_hist_intvl_cmdid =
  216. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  217. .wlan_profile_get_profile_data_cmdid =
  218. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  219. .wlan_profile_enable_profile_id_cmdid =
  220. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  221. .wlan_profile_list_profile_id_cmdid =
  222. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  223. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  224. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  225. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  226. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  227. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  228. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  229. .wow_enable_disable_wake_event_cmdid =
  230. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  231. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  232. .wow_hostwakeup_from_sleep_cmdid =
  233. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  234. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  235. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  236. .vdev_spectral_scan_configure_cmdid =
  237. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  238. .vdev_spectral_scan_enable_cmdid =
  239. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  240. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  241. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  242. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  243. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  244. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  245. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  246. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  247. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  248. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  249. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  250. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  251. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  252. .echo_cmdid = WMI_10X_ECHO_CMDID,
  253. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  254. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  255. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  256. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  257. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  258. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  259. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  260. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  261. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  262. };
  263. /* MAIN WMI VDEV param map */
  264. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  265. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  266. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  267. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  268. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  269. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  270. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  271. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  272. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  273. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  274. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  275. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  276. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  277. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  278. .wmi_vdev_oc_scheduler_air_time_limit =
  279. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  280. .wds = WMI_VDEV_PARAM_WDS,
  281. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  282. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  283. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  284. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  285. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  286. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  287. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  288. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  289. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  290. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  291. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  292. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  293. .sgi = WMI_VDEV_PARAM_SGI,
  294. .ldpc = WMI_VDEV_PARAM_LDPC,
  295. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  296. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  297. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  298. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  299. .nss = WMI_VDEV_PARAM_NSS,
  300. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  301. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  302. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  303. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  304. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  305. .ap_keepalive_min_idle_inactive_time_secs =
  306. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  307. .ap_keepalive_max_idle_inactive_time_secs =
  308. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  309. .ap_keepalive_max_unresponsive_time_secs =
  310. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  311. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  312. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  313. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  314. .txbf = WMI_VDEV_PARAM_TXBF,
  315. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  316. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  317. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  318. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  319. WMI_VDEV_PARAM_UNSUPPORTED,
  320. };
  321. /* 10.X WMI VDEV param map */
  322. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  323. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  324. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  325. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  326. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  327. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  328. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  329. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  330. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  331. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  332. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  333. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  334. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  335. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  336. .wmi_vdev_oc_scheduler_air_time_limit =
  337. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  338. .wds = WMI_10X_VDEV_PARAM_WDS,
  339. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  340. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  341. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  342. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  343. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  344. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  345. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  346. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  347. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  348. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  349. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  350. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  351. .sgi = WMI_10X_VDEV_PARAM_SGI,
  352. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  353. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  354. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  355. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  356. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  357. .nss = WMI_10X_VDEV_PARAM_NSS,
  358. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  359. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  360. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  361. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  362. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  363. .ap_keepalive_min_idle_inactive_time_secs =
  364. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  365. .ap_keepalive_max_idle_inactive_time_secs =
  366. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  367. .ap_keepalive_max_unresponsive_time_secs =
  368. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  369. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  370. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  371. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  372. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  373. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  374. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  375. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  376. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  377. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  378. };
  379. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  380. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  381. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  382. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  383. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  384. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  385. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  386. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  387. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  388. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  389. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  390. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  391. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  392. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  393. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  394. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  395. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  396. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  397. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  398. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  399. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  400. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  401. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  402. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  403. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  404. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  405. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  406. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  407. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  408. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  409. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  410. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  411. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  412. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  413. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  414. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  415. .arpdhcp_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  416. .dcs = WMI_PDEV_PARAM_DCS,
  417. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  418. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  419. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  420. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  421. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  422. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  423. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  424. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  425. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  426. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  427. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  428. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  429. };
  430. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  431. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  432. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  433. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  434. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  435. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  436. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  437. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  438. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  439. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  440. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  441. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  442. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  443. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  444. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  445. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  446. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  447. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  448. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  449. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  450. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  451. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  452. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  453. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  454. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  455. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  456. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  457. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  458. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  459. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  460. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  461. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  462. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  463. .bcnflt_stats_update_period =
  464. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  465. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  466. .arp_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  467. .arpdhcp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  468. .dcs = WMI_10X_PDEV_PARAM_DCS,
  469. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  470. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  471. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  472. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  473. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  474. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  475. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  476. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  477. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  478. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  479. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  480. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  481. };
  482. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  483. {
  484. int ret;
  485. ret = wait_for_completion_timeout(&ar->wmi.service_ready,
  486. WMI_SERVICE_READY_TIMEOUT_HZ);
  487. return ret;
  488. }
  489. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  490. {
  491. int ret;
  492. ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
  493. WMI_UNIFIED_READY_TIMEOUT_HZ);
  494. return ret;
  495. }
  496. static struct sk_buff *ath10k_wmi_alloc_skb(u32 len)
  497. {
  498. struct sk_buff *skb;
  499. u32 round_len = roundup(len, 4);
  500. skb = ath10k_htc_alloc_skb(WMI_SKB_HEADROOM + round_len);
  501. if (!skb)
  502. return NULL;
  503. skb_reserve(skb, WMI_SKB_HEADROOM);
  504. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  505. ath10k_warn("Unaligned WMI skb\n");
  506. skb_put(skb, round_len);
  507. memset(skb->data, 0, round_len);
  508. return skb;
  509. }
  510. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  511. {
  512. dev_kfree_skb(skb);
  513. }
  514. static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  515. u32 cmd_id)
  516. {
  517. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  518. struct wmi_cmd_hdr *cmd_hdr;
  519. int ret;
  520. u32 cmd = 0;
  521. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  522. return -ENOMEM;
  523. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  524. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  525. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  526. memset(skb_cb, 0, sizeof(*skb_cb));
  527. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  528. trace_ath10k_wmi_cmd(cmd_id, skb->data, skb->len, ret);
  529. if (ret)
  530. goto err_pull;
  531. return 0;
  532. err_pull:
  533. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  534. return ret;
  535. }
  536. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  537. {
  538. struct wmi_bcn_tx_arg arg = {0};
  539. int ret;
  540. lockdep_assert_held(&arvif->ar->data_lock);
  541. if (arvif->beacon == NULL)
  542. return;
  543. arg.vdev_id = arvif->vdev_id;
  544. arg.tx_rate = 0;
  545. arg.tx_power = 0;
  546. arg.bcn = arvif->beacon->data;
  547. arg.bcn_len = arvif->beacon->len;
  548. ret = ath10k_wmi_beacon_send_nowait(arvif->ar, &arg);
  549. if (ret)
  550. return;
  551. dev_kfree_skb_any(arvif->beacon);
  552. arvif->beacon = NULL;
  553. }
  554. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  555. struct ieee80211_vif *vif)
  556. {
  557. struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
  558. ath10k_wmi_tx_beacon_nowait(arvif);
  559. }
  560. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  561. {
  562. spin_lock_bh(&ar->data_lock);
  563. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  564. IEEE80211_IFACE_ITER_NORMAL,
  565. ath10k_wmi_tx_beacons_iter,
  566. NULL);
  567. spin_unlock_bh(&ar->data_lock);
  568. }
  569. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  570. {
  571. /* try to send pending beacons first. they take priority */
  572. ath10k_wmi_tx_beacons_nowait(ar);
  573. wake_up(&ar->wmi.tx_credits_wq);
  574. }
  575. static int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb,
  576. u32 cmd_id)
  577. {
  578. int ret = -EOPNOTSUPP;
  579. might_sleep();
  580. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  581. ath10k_warn("wmi command %d is not supported by firmware\n",
  582. cmd_id);
  583. return ret;
  584. }
  585. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  586. /* try to send pending beacons first. they take priority */
  587. ath10k_wmi_tx_beacons_nowait(ar);
  588. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  589. (ret != -EAGAIN);
  590. }), 3*HZ);
  591. if (ret)
  592. dev_kfree_skb_any(skb);
  593. return ret;
  594. }
  595. int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb)
  596. {
  597. int ret = 0;
  598. struct wmi_mgmt_tx_cmd *cmd;
  599. struct ieee80211_hdr *hdr;
  600. struct sk_buff *wmi_skb;
  601. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  602. int len;
  603. u16 fc;
  604. hdr = (struct ieee80211_hdr *)skb->data;
  605. fc = le16_to_cpu(hdr->frame_control);
  606. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  607. return -EINVAL;
  608. len = sizeof(cmd->hdr) + skb->len;
  609. len = round_up(len, 4);
  610. wmi_skb = ath10k_wmi_alloc_skb(len);
  611. if (!wmi_skb)
  612. return -ENOMEM;
  613. cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data;
  614. cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id);
  615. cmd->hdr.tx_rate = 0;
  616. cmd->hdr.tx_power = 0;
  617. cmd->hdr.buf_len = __cpu_to_le32((u32)(skb->len));
  618. memcpy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr), ETH_ALEN);
  619. memcpy(cmd->buf, skb->data, skb->len);
  620. ath10k_dbg(ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
  621. wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE,
  622. fc & IEEE80211_FCTL_STYPE);
  623. /* Send the management frame buffer to the target */
  624. ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid);
  625. if (ret)
  626. return ret;
  627. /* TODO: report tx status to mac80211 - temporary just ACK */
  628. info->flags |= IEEE80211_TX_STAT_ACK;
  629. ieee80211_tx_status_irqsafe(ar->hw, skb);
  630. return ret;
  631. }
  632. static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  633. {
  634. struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data;
  635. enum wmi_scan_event_type event_type;
  636. enum wmi_scan_completion_reason reason;
  637. u32 freq;
  638. u32 req_id;
  639. u32 scan_id;
  640. u32 vdev_id;
  641. event_type = __le32_to_cpu(event->event_type);
  642. reason = __le32_to_cpu(event->reason);
  643. freq = __le32_to_cpu(event->channel_freq);
  644. req_id = __le32_to_cpu(event->scan_req_id);
  645. scan_id = __le32_to_cpu(event->scan_id);
  646. vdev_id = __le32_to_cpu(event->vdev_id);
  647. ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENTID\n");
  648. ath10k_dbg(ATH10K_DBG_WMI,
  649. "scan event type %d reason %d freq %d req_id %d "
  650. "scan_id %d vdev_id %d\n",
  651. event_type, reason, freq, req_id, scan_id, vdev_id);
  652. spin_lock_bh(&ar->data_lock);
  653. switch (event_type) {
  654. case WMI_SCAN_EVENT_STARTED:
  655. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_STARTED\n");
  656. if (ar->scan.in_progress && ar->scan.is_roc)
  657. ieee80211_ready_on_channel(ar->hw);
  658. complete(&ar->scan.started);
  659. break;
  660. case WMI_SCAN_EVENT_COMPLETED:
  661. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_COMPLETED\n");
  662. switch (reason) {
  663. case WMI_SCAN_REASON_COMPLETED:
  664. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_COMPLETED\n");
  665. break;
  666. case WMI_SCAN_REASON_CANCELLED:
  667. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_CANCELED\n");
  668. break;
  669. case WMI_SCAN_REASON_PREEMPTED:
  670. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_PREEMPTED\n");
  671. break;
  672. case WMI_SCAN_REASON_TIMEDOUT:
  673. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_REASON_TIMEDOUT\n");
  674. break;
  675. default:
  676. break;
  677. }
  678. ar->scan_channel = NULL;
  679. if (!ar->scan.in_progress) {
  680. ath10k_warn("no scan requested, ignoring\n");
  681. break;
  682. }
  683. if (ar->scan.is_roc) {
  684. ath10k_offchan_tx_purge(ar);
  685. if (!ar->scan.aborting)
  686. ieee80211_remain_on_channel_expired(ar->hw);
  687. } else {
  688. ieee80211_scan_completed(ar->hw, ar->scan.aborting);
  689. }
  690. del_timer(&ar->scan.timeout);
  691. complete_all(&ar->scan.completed);
  692. ar->scan.in_progress = false;
  693. break;
  694. case WMI_SCAN_EVENT_BSS_CHANNEL:
  695. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_BSS_CHANNEL\n");
  696. ar->scan_channel = NULL;
  697. break;
  698. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  699. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_FOREIGN_CHANNEL\n");
  700. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  701. if (ar->scan.in_progress && ar->scan.is_roc &&
  702. ar->scan.roc_freq == freq) {
  703. complete(&ar->scan.on_channel);
  704. }
  705. break;
  706. case WMI_SCAN_EVENT_DEQUEUED:
  707. ath10k_dbg(ATH10K_DBG_WMI, "SCAN_EVENT_DEQUEUED\n");
  708. break;
  709. case WMI_SCAN_EVENT_PREEMPTED:
  710. ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_PREEMPTED\n");
  711. break;
  712. case WMI_SCAN_EVENT_START_FAILED:
  713. ath10k_dbg(ATH10K_DBG_WMI, "WMI_SCAN_EVENT_START_FAILED\n");
  714. break;
  715. default:
  716. break;
  717. }
  718. spin_unlock_bh(&ar->data_lock);
  719. return 0;
  720. }
  721. static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
  722. {
  723. enum ieee80211_band band;
  724. switch (phy_mode) {
  725. case MODE_11A:
  726. case MODE_11NA_HT20:
  727. case MODE_11NA_HT40:
  728. case MODE_11AC_VHT20:
  729. case MODE_11AC_VHT40:
  730. case MODE_11AC_VHT80:
  731. band = IEEE80211_BAND_5GHZ;
  732. break;
  733. case MODE_11G:
  734. case MODE_11B:
  735. case MODE_11GONLY:
  736. case MODE_11NG_HT20:
  737. case MODE_11NG_HT40:
  738. case MODE_11AC_VHT20_2G:
  739. case MODE_11AC_VHT40_2G:
  740. case MODE_11AC_VHT80_2G:
  741. default:
  742. band = IEEE80211_BAND_2GHZ;
  743. }
  744. return band;
  745. }
  746. static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
  747. {
  748. u8 rate_idx = 0;
  749. /* rate in Kbps */
  750. switch (rate) {
  751. case 1000:
  752. rate_idx = 0;
  753. break;
  754. case 2000:
  755. rate_idx = 1;
  756. break;
  757. case 5500:
  758. rate_idx = 2;
  759. break;
  760. case 11000:
  761. rate_idx = 3;
  762. break;
  763. case 6000:
  764. rate_idx = 4;
  765. break;
  766. case 9000:
  767. rate_idx = 5;
  768. break;
  769. case 12000:
  770. rate_idx = 6;
  771. break;
  772. case 18000:
  773. rate_idx = 7;
  774. break;
  775. case 24000:
  776. rate_idx = 8;
  777. break;
  778. case 36000:
  779. rate_idx = 9;
  780. break;
  781. case 48000:
  782. rate_idx = 10;
  783. break;
  784. case 54000:
  785. rate_idx = 11;
  786. break;
  787. default:
  788. break;
  789. }
  790. if (band == IEEE80211_BAND_5GHZ) {
  791. if (rate_idx > 3)
  792. /* Omit CCK rates */
  793. rate_idx -= 4;
  794. else
  795. rate_idx = 0;
  796. }
  797. return rate_idx;
  798. }
  799. static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  800. {
  801. struct wmi_mgmt_rx_event_v1 *ev_v1;
  802. struct wmi_mgmt_rx_event_v2 *ev_v2;
  803. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  804. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  805. struct ieee80211_hdr *hdr;
  806. u32 rx_status;
  807. u32 channel;
  808. u32 phy_mode;
  809. u32 snr;
  810. u32 rate;
  811. u32 buf_len;
  812. u16 fc;
  813. int pull_len;
  814. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
  815. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  816. ev_hdr = &ev_v2->hdr.v1;
  817. pull_len = sizeof(*ev_v2);
  818. } else {
  819. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  820. ev_hdr = &ev_v1->hdr;
  821. pull_len = sizeof(*ev_v1);
  822. }
  823. channel = __le32_to_cpu(ev_hdr->channel);
  824. buf_len = __le32_to_cpu(ev_hdr->buf_len);
  825. rx_status = __le32_to_cpu(ev_hdr->status);
  826. snr = __le32_to_cpu(ev_hdr->snr);
  827. phy_mode = __le32_to_cpu(ev_hdr->phy_mode);
  828. rate = __le32_to_cpu(ev_hdr->rate);
  829. memset(status, 0, sizeof(*status));
  830. ath10k_dbg(ATH10K_DBG_MGMT,
  831. "event mgmt rx status %08x\n", rx_status);
  832. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  833. dev_kfree_skb(skb);
  834. return 0;
  835. }
  836. if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
  837. dev_kfree_skb(skb);
  838. return 0;
  839. }
  840. if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
  841. dev_kfree_skb(skb);
  842. return 0;
  843. }
  844. if (rx_status & WMI_RX_STATUS_ERR_CRC)
  845. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  846. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  847. status->flag |= RX_FLAG_MMIC_ERROR;
  848. status->band = phy_mode_to_band(phy_mode);
  849. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  850. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  851. status->rate_idx = get_rate_idx(rate, status->band);
  852. skb_pull(skb, pull_len);
  853. hdr = (struct ieee80211_hdr *)skb->data;
  854. fc = le16_to_cpu(hdr->frame_control);
  855. if (fc & IEEE80211_FCTL_PROTECTED) {
  856. status->flag |= RX_FLAG_DECRYPTED | RX_FLAG_IV_STRIPPED |
  857. RX_FLAG_MMIC_STRIPPED;
  858. hdr->frame_control = __cpu_to_le16(fc &
  859. ~IEEE80211_FCTL_PROTECTED);
  860. }
  861. ath10k_dbg(ATH10K_DBG_MGMT,
  862. "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
  863. skb, skb->len,
  864. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  865. ath10k_dbg(ATH10K_DBG_MGMT,
  866. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  867. status->freq, status->band, status->signal,
  868. status->rate_idx);
  869. /*
  870. * packets from HTC come aligned to 4byte boundaries
  871. * because they can originally come in along with a trailer
  872. */
  873. skb_trim(skb, buf_len);
  874. ieee80211_rx(ar->hw, skb);
  875. return 0;
  876. }
  877. static int freq_to_idx(struct ath10k *ar, int freq)
  878. {
  879. struct ieee80211_supported_band *sband;
  880. int band, ch, idx = 0;
  881. for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
  882. sband = ar->hw->wiphy->bands[band];
  883. if (!sband)
  884. continue;
  885. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  886. if (sband->channels[ch].center_freq == freq)
  887. goto exit;
  888. }
  889. exit:
  890. return idx;
  891. }
  892. static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  893. {
  894. struct wmi_chan_info_event *ev;
  895. struct survey_info *survey;
  896. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  897. int idx;
  898. ev = (struct wmi_chan_info_event *)skb->data;
  899. err_code = __le32_to_cpu(ev->err_code);
  900. freq = __le32_to_cpu(ev->freq);
  901. cmd_flags = __le32_to_cpu(ev->cmd_flags);
  902. noise_floor = __le32_to_cpu(ev->noise_floor);
  903. rx_clear_count = __le32_to_cpu(ev->rx_clear_count);
  904. cycle_count = __le32_to_cpu(ev->cycle_count);
  905. ath10k_dbg(ATH10K_DBG_WMI,
  906. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  907. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  908. cycle_count);
  909. spin_lock_bh(&ar->data_lock);
  910. if (!ar->scan.in_progress) {
  911. ath10k_warn("chan info event without a scan request?\n");
  912. goto exit;
  913. }
  914. idx = freq_to_idx(ar, freq);
  915. if (idx >= ARRAY_SIZE(ar->survey)) {
  916. ath10k_warn("chan info: invalid frequency %d (idx %d out of bounds)\n",
  917. freq, idx);
  918. goto exit;
  919. }
  920. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  921. /* During scanning chan info is reported twice for each
  922. * visited channel. The reported cycle count is global
  923. * and per-channel cycle count must be calculated */
  924. cycle_count -= ar->survey_last_cycle_count;
  925. rx_clear_count -= ar->survey_last_rx_clear_count;
  926. survey = &ar->survey[idx];
  927. survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count);
  928. survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
  929. survey->noise = noise_floor;
  930. survey->filled = SURVEY_INFO_CHANNEL_TIME |
  931. SURVEY_INFO_CHANNEL_TIME_RX |
  932. SURVEY_INFO_NOISE_DBM;
  933. }
  934. ar->survey_last_rx_clear_count = rx_clear_count;
  935. ar->survey_last_cycle_count = cycle_count;
  936. exit:
  937. spin_unlock_bh(&ar->data_lock);
  938. }
  939. static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  940. {
  941. ath10k_dbg(ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
  942. }
  943. static void ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  944. {
  945. ath10k_dbg(ATH10K_DBG_WMI, "WMI_DEBUG_MESG_EVENTID\n");
  946. }
  947. static void ath10k_wmi_event_update_stats(struct ath10k *ar,
  948. struct sk_buff *skb)
  949. {
  950. struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data;
  951. ath10k_dbg(ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  952. ath10k_debug_read_target_stats(ar, ev);
  953. }
  954. static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar,
  955. struct sk_buff *skb)
  956. {
  957. struct wmi_vdev_start_response_event *ev;
  958. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  959. ev = (struct wmi_vdev_start_response_event *)skb->data;
  960. if (WARN_ON(__le32_to_cpu(ev->status)))
  961. return;
  962. complete(&ar->vdev_setup_done);
  963. }
  964. static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar,
  965. struct sk_buff *skb)
  966. {
  967. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  968. complete(&ar->vdev_setup_done);
  969. }
  970. static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar,
  971. struct sk_buff *skb)
  972. {
  973. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PEER_STA_KICKOUT_EVENTID\n");
  974. }
  975. /*
  976. * FIXME
  977. *
  978. * We don't report to mac80211 sleep state of connected
  979. * stations. Due to this mac80211 can't fill in TIM IE
  980. * correctly.
  981. *
  982. * I know of no way of getting nullfunc frames that contain
  983. * sleep transition from connected stations - these do not
  984. * seem to be sent from the target to the host. There also
  985. * doesn't seem to be a dedicated event for that. So the
  986. * only way left to do this would be to read tim_bitmap
  987. * during SWBA.
  988. *
  989. * We could probably try using tim_bitmap from SWBA to tell
  990. * mac80211 which stations are asleep and which are not. The
  991. * problem here is calling mac80211 functions so many times
  992. * could take too long and make us miss the time to submit
  993. * the beacon to the target.
  994. *
  995. * So as a workaround we try to extend the TIM IE if there
  996. * is unicast buffered for stations with aid > 7 and fill it
  997. * in ourselves.
  998. */
  999. static void ath10k_wmi_update_tim(struct ath10k *ar,
  1000. struct ath10k_vif *arvif,
  1001. struct sk_buff *bcn,
  1002. struct wmi_bcn_info *bcn_info)
  1003. {
  1004. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  1005. struct ieee80211_tim_ie *tim;
  1006. u8 *ies, *ie;
  1007. u8 ie_len, pvm_len;
  1008. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  1009. * we must copy the bitmap upon change and reuse it later */
  1010. if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) {
  1011. int i;
  1012. BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
  1013. sizeof(bcn_info->tim_info.tim_bitmap));
  1014. for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
  1015. __le32 t = bcn_info->tim_info.tim_bitmap[i / 4];
  1016. u32 v = __le32_to_cpu(t);
  1017. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  1018. }
  1019. /* FW reports either length 0 or 16
  1020. * so we calculate this on our own */
  1021. arvif->u.ap.tim_len = 0;
  1022. for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
  1023. if (arvif->u.ap.tim_bitmap[i])
  1024. arvif->u.ap.tim_len = i;
  1025. arvif->u.ap.tim_len++;
  1026. }
  1027. ies = bcn->data;
  1028. ies += ieee80211_hdrlen(hdr->frame_control);
  1029. ies += 12; /* fixed parameters */
  1030. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  1031. (u8 *)skb_tail_pointer(bcn) - ies);
  1032. if (!ie) {
  1033. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  1034. ath10k_warn("no tim ie found;\n");
  1035. return;
  1036. }
  1037. tim = (void *)ie + 2;
  1038. ie_len = ie[1];
  1039. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  1040. if (pvm_len < arvif->u.ap.tim_len) {
  1041. int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
  1042. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  1043. void *next_ie = ie + 2 + ie_len;
  1044. if (skb_put(bcn, expand_size)) {
  1045. memmove(next_ie + expand_size, next_ie, move_size);
  1046. ie[1] += expand_size;
  1047. ie_len += expand_size;
  1048. pvm_len += expand_size;
  1049. } else {
  1050. ath10k_warn("tim expansion failed\n");
  1051. }
  1052. }
  1053. if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
  1054. ath10k_warn("tim pvm length is too great (%d)\n", pvm_len);
  1055. return;
  1056. }
  1057. tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast);
  1058. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  1059. ath10k_dbg(ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  1060. tim->dtim_count, tim->dtim_period,
  1061. tim->bitmap_ctrl, pvm_len);
  1062. }
  1063. static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
  1064. struct wmi_p2p_noa_info *noa)
  1065. {
  1066. struct ieee80211_p2p_noa_attr *noa_attr;
  1067. u8 ctwindow_oppps = noa->ctwindow_oppps;
  1068. u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
  1069. bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
  1070. __le16 *noa_attr_len;
  1071. u16 attr_len;
  1072. u8 noa_descriptors = noa->num_descriptors;
  1073. int i;
  1074. /* P2P IE */
  1075. data[0] = WLAN_EID_VENDOR_SPECIFIC;
  1076. data[1] = len - 2;
  1077. data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
  1078. data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
  1079. data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
  1080. data[5] = WLAN_OUI_TYPE_WFA_P2P;
  1081. /* NOA ATTR */
  1082. data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
  1083. noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
  1084. noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
  1085. noa_attr->index = noa->index;
  1086. noa_attr->oppps_ctwindow = ctwindow;
  1087. if (oppps)
  1088. noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
  1089. for (i = 0; i < noa_descriptors; i++) {
  1090. noa_attr->desc[i].count =
  1091. __le32_to_cpu(noa->descriptors[i].type_count);
  1092. noa_attr->desc[i].duration = noa->descriptors[i].duration;
  1093. noa_attr->desc[i].interval = noa->descriptors[i].interval;
  1094. noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
  1095. }
  1096. attr_len = 2; /* index + oppps_ctwindow */
  1097. attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
  1098. *noa_attr_len = __cpu_to_le16(attr_len);
  1099. }
  1100. static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa)
  1101. {
  1102. u32 len = 0;
  1103. u8 noa_descriptors = noa->num_descriptors;
  1104. u8 opp_ps_info = noa->ctwindow_oppps;
  1105. bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
  1106. if (!noa_descriptors && !opps_enabled)
  1107. return len;
  1108. len += 1 + 1 + 4; /* EID + len + OUI */
  1109. len += 1 + 2; /* noa attr + attr len */
  1110. len += 1 + 1; /* index + oppps_ctwindow */
  1111. len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
  1112. return len;
  1113. }
  1114. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  1115. struct sk_buff *bcn,
  1116. struct wmi_bcn_info *bcn_info)
  1117. {
  1118. struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info;
  1119. u8 *new_data, *old_data = arvif->u.ap.noa_data;
  1120. u32 new_len;
  1121. if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
  1122. return;
  1123. ath10k_dbg(ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  1124. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
  1125. new_len = ath10k_p2p_calc_noa_ie_len(noa);
  1126. if (!new_len)
  1127. goto cleanup;
  1128. new_data = kmalloc(new_len, GFP_ATOMIC);
  1129. if (!new_data)
  1130. goto cleanup;
  1131. ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
  1132. spin_lock_bh(&ar->data_lock);
  1133. arvif->u.ap.noa_data = new_data;
  1134. arvif->u.ap.noa_len = new_len;
  1135. spin_unlock_bh(&ar->data_lock);
  1136. kfree(old_data);
  1137. }
  1138. if (arvif->u.ap.noa_data)
  1139. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  1140. memcpy(skb_put(bcn, arvif->u.ap.noa_len),
  1141. arvif->u.ap.noa_data,
  1142. arvif->u.ap.noa_len);
  1143. return;
  1144. cleanup:
  1145. spin_lock_bh(&ar->data_lock);
  1146. arvif->u.ap.noa_data = NULL;
  1147. arvif->u.ap.noa_len = 0;
  1148. spin_unlock_bh(&ar->data_lock);
  1149. kfree(old_data);
  1150. }
  1151. static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  1152. {
  1153. struct wmi_host_swba_event *ev;
  1154. u32 map;
  1155. int i = -1;
  1156. struct wmi_bcn_info *bcn_info;
  1157. struct ath10k_vif *arvif;
  1158. struct sk_buff *bcn;
  1159. int vdev_id = 0;
  1160. ath10k_dbg(ATH10K_DBG_MGMT, "WMI_HOST_SWBA_EVENTID\n");
  1161. ev = (struct wmi_host_swba_event *)skb->data;
  1162. map = __le32_to_cpu(ev->vdev_map);
  1163. ath10k_dbg(ATH10K_DBG_MGMT, "host swba:\n"
  1164. "-vdev map 0x%x\n",
  1165. ev->vdev_map);
  1166. for (; map; map >>= 1, vdev_id++) {
  1167. if (!(map & 0x1))
  1168. continue;
  1169. i++;
  1170. if (i >= WMI_MAX_AP_VDEV) {
  1171. ath10k_warn("swba has corrupted vdev map\n");
  1172. break;
  1173. }
  1174. bcn_info = &ev->bcn_info[i];
  1175. ath10k_dbg(ATH10K_DBG_MGMT,
  1176. "-bcn_info[%d]:\n"
  1177. "--tim_len %d\n"
  1178. "--tim_mcast %d\n"
  1179. "--tim_changed %d\n"
  1180. "--tim_num_ps_pending %d\n"
  1181. "--tim_bitmap 0x%08x%08x%08x%08x\n",
  1182. i,
  1183. __le32_to_cpu(bcn_info->tim_info.tim_len),
  1184. __le32_to_cpu(bcn_info->tim_info.tim_mcast),
  1185. __le32_to_cpu(bcn_info->tim_info.tim_changed),
  1186. __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending),
  1187. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]),
  1188. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]),
  1189. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]),
  1190. __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0]));
  1191. arvif = ath10k_get_arvif(ar, vdev_id);
  1192. if (arvif == NULL) {
  1193. ath10k_warn("no vif for vdev_id %d found\n", vdev_id);
  1194. continue;
  1195. }
  1196. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  1197. if (!bcn) {
  1198. ath10k_warn("could not get mac80211 beacon\n");
  1199. continue;
  1200. }
  1201. ath10k_tx_h_seq_no(bcn);
  1202. ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info);
  1203. ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info);
  1204. spin_lock_bh(&ar->data_lock);
  1205. if (arvif->beacon) {
  1206. ath10k_warn("SWBA overrun on vdev %d\n",
  1207. arvif->vdev_id);
  1208. dev_kfree_skb_any(arvif->beacon);
  1209. }
  1210. arvif->beacon = bcn;
  1211. ath10k_wmi_tx_beacon_nowait(arvif);
  1212. spin_unlock_bh(&ar->data_lock);
  1213. }
  1214. }
  1215. static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar,
  1216. struct sk_buff *skb)
  1217. {
  1218. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  1219. }
  1220. static void ath10k_dfs_radar_report(struct ath10k *ar,
  1221. struct wmi_single_phyerr_rx_event *event,
  1222. struct phyerr_radar_report *rr,
  1223. u64 tsf)
  1224. {
  1225. u32 reg0, reg1, tsf32l;
  1226. struct pulse_event pe;
  1227. u64 tsf64;
  1228. u8 rssi, width;
  1229. reg0 = __le32_to_cpu(rr->reg0);
  1230. reg1 = __le32_to_cpu(rr->reg1);
  1231. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1232. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  1233. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  1234. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  1235. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  1236. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  1237. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1238. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  1239. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  1240. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  1241. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  1242. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  1243. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  1244. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1245. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  1246. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  1247. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  1248. if (!ar->dfs_detector)
  1249. return;
  1250. /* report event to DFS pattern detector */
  1251. tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp);
  1252. tsf64 = tsf & (~0xFFFFFFFFULL);
  1253. tsf64 |= tsf32l;
  1254. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  1255. rssi = event->hdr.rssi_combined;
  1256. /* hardware store this as 8 bit signed value,
  1257. * set to zero if negative number
  1258. */
  1259. if (rssi & 0x80)
  1260. rssi = 0;
  1261. pe.ts = tsf64;
  1262. pe.freq = ar->hw->conf.chandef.chan->center_freq;
  1263. pe.width = width;
  1264. pe.rssi = rssi;
  1265. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1266. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  1267. pe.freq, pe.width, pe.rssi, pe.ts);
  1268. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  1269. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
  1270. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1271. "dfs no pulse pattern detected, yet\n");
  1272. return;
  1273. }
  1274. ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  1275. ATH10K_DFS_STAT_INC(ar, radar_detected);
  1276. /* Control radar events reporting in debugfs file
  1277. dfs_block_radar_events */
  1278. if (ar->dfs_block_radar_events) {
  1279. ath10k_info("DFS Radar detected, but ignored as requested\n");
  1280. return;
  1281. }
  1282. ieee80211_radar_detected(ar->hw);
  1283. }
  1284. static int ath10k_dfs_fft_report(struct ath10k *ar,
  1285. struct wmi_single_phyerr_rx_event *event,
  1286. struct phyerr_fft_report *fftr,
  1287. u64 tsf)
  1288. {
  1289. u32 reg0, reg1;
  1290. u8 rssi, peak_mag;
  1291. reg0 = __le32_to_cpu(fftr->reg0);
  1292. reg1 = __le32_to_cpu(fftr->reg1);
  1293. rssi = event->hdr.rssi_combined;
  1294. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1295. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  1296. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  1297. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  1298. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  1299. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  1300. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1301. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  1302. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  1303. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  1304. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  1305. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  1306. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  1307. /* false event detection */
  1308. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  1309. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  1310. ath10k_dbg(ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  1311. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  1312. return -EINVAL;
  1313. }
  1314. return 0;
  1315. }
  1316. static void ath10k_wmi_event_dfs(struct ath10k *ar,
  1317. struct wmi_single_phyerr_rx_event *event,
  1318. u64 tsf)
  1319. {
  1320. int buf_len, tlv_len, res, i = 0;
  1321. struct phyerr_tlv *tlv;
  1322. struct phyerr_radar_report *rr;
  1323. struct phyerr_fft_report *fftr;
  1324. u8 *tlv_buf;
  1325. buf_len = __le32_to_cpu(event->hdr.buf_len);
  1326. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1327. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  1328. event->hdr.phy_err_code, event->hdr.rssi_combined,
  1329. __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len);
  1330. /* Skip event if DFS disabled */
  1331. if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
  1332. return;
  1333. ATH10K_DFS_STAT_INC(ar, pulses_total);
  1334. while (i < buf_len) {
  1335. if (i + sizeof(*tlv) > buf_len) {
  1336. ath10k_warn("too short buf for tlv header (%d)\n", i);
  1337. return;
  1338. }
  1339. tlv = (struct phyerr_tlv *)&event->bufp[i];
  1340. tlv_len = __le16_to_cpu(tlv->len);
  1341. tlv_buf = &event->bufp[i + sizeof(*tlv)];
  1342. ath10k_dbg(ATH10K_DBG_REGULATORY,
  1343. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  1344. tlv_len, tlv->tag, tlv->sig);
  1345. switch (tlv->tag) {
  1346. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  1347. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  1348. ath10k_warn("too short radar pulse summary (%d)\n",
  1349. i);
  1350. return;
  1351. }
  1352. rr = (struct phyerr_radar_report *)tlv_buf;
  1353. ath10k_dfs_radar_report(ar, event, rr, tsf);
  1354. break;
  1355. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  1356. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  1357. ath10k_warn("too short fft report (%d)\n", i);
  1358. return;
  1359. }
  1360. fftr = (struct phyerr_fft_report *)tlv_buf;
  1361. res = ath10k_dfs_fft_report(ar, event, fftr, tsf);
  1362. if (res)
  1363. return;
  1364. break;
  1365. }
  1366. i += sizeof(*tlv) + tlv_len;
  1367. }
  1368. }
  1369. static void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  1370. struct wmi_single_phyerr_rx_event *event,
  1371. u64 tsf)
  1372. {
  1373. ath10k_dbg(ATH10K_DBG_WMI, "wmi event spectral scan\n");
  1374. }
  1375. static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  1376. {
  1377. struct wmi_comb_phyerr_rx_event *comb_event;
  1378. struct wmi_single_phyerr_rx_event *event;
  1379. u32 count, i, buf_len, phy_err_code;
  1380. u64 tsf;
  1381. int left_len = skb->len;
  1382. ATH10K_DFS_STAT_INC(ar, phy_errors);
  1383. /* Check if combined event available */
  1384. if (left_len < sizeof(*comb_event)) {
  1385. ath10k_warn("wmi phyerr combined event wrong len\n");
  1386. return;
  1387. }
  1388. left_len -= sizeof(*comb_event);
  1389. /* Check number of included events */
  1390. comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data;
  1391. count = __le32_to_cpu(comb_event->hdr.num_phyerr_events);
  1392. tsf = __le32_to_cpu(comb_event->hdr.tsf_u32);
  1393. tsf <<= 32;
  1394. tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32);
  1395. ath10k_dbg(ATH10K_DBG_WMI,
  1396. "wmi event phyerr count %d tsf64 0x%llX\n",
  1397. count, tsf);
  1398. event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp;
  1399. for (i = 0; i < count; i++) {
  1400. /* Check if we can read event header */
  1401. if (left_len < sizeof(*event)) {
  1402. ath10k_warn("single event (%d) wrong head len\n", i);
  1403. return;
  1404. }
  1405. left_len -= sizeof(*event);
  1406. buf_len = __le32_to_cpu(event->hdr.buf_len);
  1407. phy_err_code = event->hdr.phy_err_code;
  1408. if (left_len < buf_len) {
  1409. ath10k_warn("single event (%d) wrong buf len\n", i);
  1410. return;
  1411. }
  1412. left_len -= buf_len;
  1413. switch (phy_err_code) {
  1414. case PHY_ERROR_RADAR:
  1415. ath10k_wmi_event_dfs(ar, event, tsf);
  1416. break;
  1417. case PHY_ERROR_SPECTRAL_SCAN:
  1418. ath10k_wmi_event_spectral_scan(ar, event, tsf);
  1419. break;
  1420. case PHY_ERROR_FALSE_RADAR_EXT:
  1421. ath10k_wmi_event_dfs(ar, event, tsf);
  1422. ath10k_wmi_event_spectral_scan(ar, event, tsf);
  1423. break;
  1424. default:
  1425. break;
  1426. }
  1427. event += sizeof(*event) + buf_len;
  1428. }
  1429. }
  1430. static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  1431. {
  1432. ath10k_dbg(ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
  1433. }
  1434. static void ath10k_wmi_event_profile_match(struct ath10k *ar,
  1435. struct sk_buff *skb)
  1436. {
  1437. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  1438. }
  1439. static void ath10k_wmi_event_debug_print(struct ath10k *ar,
  1440. struct sk_buff *skb)
  1441. {
  1442. ath10k_dbg(ATH10K_DBG_WMI, "WMI_DEBUG_PRINT_EVENTID\n");
  1443. }
  1444. static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  1445. {
  1446. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  1447. }
  1448. static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar,
  1449. struct sk_buff *skb)
  1450. {
  1451. ath10k_dbg(ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  1452. }
  1453. static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  1454. struct sk_buff *skb)
  1455. {
  1456. ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  1457. }
  1458. static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  1459. struct sk_buff *skb)
  1460. {
  1461. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  1462. }
  1463. static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar,
  1464. struct sk_buff *skb)
  1465. {
  1466. ath10k_dbg(ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  1467. }
  1468. static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar,
  1469. struct sk_buff *skb)
  1470. {
  1471. ath10k_dbg(ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
  1472. }
  1473. static void ath10k_wmi_event_dcs_interference(struct ath10k *ar,
  1474. struct sk_buff *skb)
  1475. {
  1476. ath10k_dbg(ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  1477. }
  1478. static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar,
  1479. struct sk_buff *skb)
  1480. {
  1481. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
  1482. }
  1483. static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar,
  1484. struct sk_buff *skb)
  1485. {
  1486. ath10k_dbg(ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  1487. }
  1488. static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
  1489. struct sk_buff *skb)
  1490. {
  1491. ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  1492. }
  1493. static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar,
  1494. struct sk_buff *skb)
  1495. {
  1496. ath10k_dbg(ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  1497. }
  1498. static void ath10k_wmi_event_delba_complete(struct ath10k *ar,
  1499. struct sk_buff *skb)
  1500. {
  1501. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  1502. }
  1503. static void ath10k_wmi_event_addba_complete(struct ath10k *ar,
  1504. struct sk_buff *skb)
  1505. {
  1506. ath10k_dbg(ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  1507. }
  1508. static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  1509. struct sk_buff *skb)
  1510. {
  1511. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  1512. }
  1513. static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar,
  1514. struct sk_buff *skb)
  1515. {
  1516. ath10k_dbg(ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  1517. }
  1518. static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar,
  1519. struct sk_buff *skb)
  1520. {
  1521. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  1522. }
  1523. static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar,
  1524. struct sk_buff *skb)
  1525. {
  1526. ath10k_dbg(ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  1527. }
  1528. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  1529. u32 num_units, u32 unit_len)
  1530. {
  1531. dma_addr_t paddr;
  1532. u32 pool_size;
  1533. int idx = ar->wmi.num_mem_chunks;
  1534. pool_size = num_units * round_up(unit_len, 4);
  1535. if (!pool_size)
  1536. return -EINVAL;
  1537. ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
  1538. pool_size,
  1539. &paddr,
  1540. GFP_ATOMIC);
  1541. if (!ar->wmi.mem_chunks[idx].vaddr) {
  1542. ath10k_warn("failed to allocate memory chunk\n");
  1543. return -ENOMEM;
  1544. }
  1545. memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
  1546. ar->wmi.mem_chunks[idx].paddr = paddr;
  1547. ar->wmi.mem_chunks[idx].len = pool_size;
  1548. ar->wmi.mem_chunks[idx].req_id = req_id;
  1549. ar->wmi.num_mem_chunks++;
  1550. return 0;
  1551. }
  1552. static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar,
  1553. struct sk_buff *skb)
  1554. {
  1555. struct wmi_service_ready_event *ev = (void *)skb->data;
  1556. if (skb->len < sizeof(*ev)) {
  1557. ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
  1558. skb->len, sizeof(*ev));
  1559. return;
  1560. }
  1561. ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
  1562. ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
  1563. ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
  1564. ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
  1565. ar->fw_version_major =
  1566. (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
  1567. ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
  1568. ar->fw_version_release =
  1569. (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16;
  1570. ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff);
  1571. ar->phy_capability = __le32_to_cpu(ev->phy_capability);
  1572. ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
  1573. /* only manually set fw features when not using FW IE format */
  1574. if (ar->fw_api == 1 && ar->fw_version_build > 636)
  1575. set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
  1576. if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
  1577. ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
  1578. ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
  1579. ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
  1580. }
  1581. ar->ath_common.regulatory.current_rd =
  1582. __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
  1583. ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
  1584. sizeof(ev->wmi_service_bitmap));
  1585. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  1586. snprintf(ar->hw->wiphy->fw_version,
  1587. sizeof(ar->hw->wiphy->fw_version),
  1588. "%u.%u.%u.%u",
  1589. ar->fw_version_major,
  1590. ar->fw_version_minor,
  1591. ar->fw_version_release,
  1592. ar->fw_version_build);
  1593. }
  1594. /* FIXME: it probably should be better to support this */
  1595. if (__le32_to_cpu(ev->num_mem_reqs) > 0) {
  1596. ath10k_warn("target requested %d memory chunks; ignoring\n",
  1597. __le32_to_cpu(ev->num_mem_reqs));
  1598. }
  1599. ath10k_dbg(ATH10K_DBG_WMI,
  1600. "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
  1601. __le32_to_cpu(ev->sw_version),
  1602. __le32_to_cpu(ev->sw_version_1),
  1603. __le32_to_cpu(ev->abi_version),
  1604. __le32_to_cpu(ev->phy_capability),
  1605. __le32_to_cpu(ev->ht_cap_info),
  1606. __le32_to_cpu(ev->vht_cap_info),
  1607. __le32_to_cpu(ev->vht_supp_mcs),
  1608. __le32_to_cpu(ev->sys_cap_info),
  1609. __le32_to_cpu(ev->num_mem_reqs),
  1610. __le32_to_cpu(ev->num_rf_chains));
  1611. complete(&ar->wmi.service_ready);
  1612. }
  1613. static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar,
  1614. struct sk_buff *skb)
  1615. {
  1616. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  1617. int ret;
  1618. struct wmi_service_ready_event_10x *ev = (void *)skb->data;
  1619. if (skb->len < sizeof(*ev)) {
  1620. ath10k_warn("Service ready event was %d B but expected %zu B. Wrong firmware version?\n",
  1621. skb->len, sizeof(*ev));
  1622. return;
  1623. }
  1624. ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power);
  1625. ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power);
  1626. ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info);
  1627. ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info);
  1628. ar->fw_version_major =
  1629. (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24;
  1630. ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff);
  1631. ar->phy_capability = __le32_to_cpu(ev->phy_capability);
  1632. ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains);
  1633. if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
  1634. ath10k_warn("hardware advertises support for more spatial streams than it should (%d > %d)\n",
  1635. ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
  1636. ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
  1637. }
  1638. ar->ath_common.regulatory.current_rd =
  1639. __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd);
  1640. ath10k_debug_read_service_map(ar, ev->wmi_service_bitmap,
  1641. sizeof(ev->wmi_service_bitmap));
  1642. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  1643. snprintf(ar->hw->wiphy->fw_version,
  1644. sizeof(ar->hw->wiphy->fw_version),
  1645. "%u.%u",
  1646. ar->fw_version_major,
  1647. ar->fw_version_minor);
  1648. }
  1649. num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs);
  1650. if (num_mem_reqs > ATH10K_MAX_MEM_REQS) {
  1651. ath10k_warn("requested memory chunks number (%d) exceeds the limit\n",
  1652. num_mem_reqs);
  1653. return;
  1654. }
  1655. if (!num_mem_reqs)
  1656. goto exit;
  1657. ath10k_dbg(ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n",
  1658. num_mem_reqs);
  1659. for (i = 0; i < num_mem_reqs; ++i) {
  1660. req_id = __le32_to_cpu(ev->mem_reqs[i].req_id);
  1661. num_units = __le32_to_cpu(ev->mem_reqs[i].num_units);
  1662. unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size);
  1663. num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info);
  1664. if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
  1665. /* number of units to allocate is number of
  1666. * peers, 1 extra for self peer on target */
  1667. /* this needs to be tied, host and target
  1668. * can get out of sync */
  1669. num_units = TARGET_10X_NUM_PEERS + 1;
  1670. else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
  1671. num_units = TARGET_10X_NUM_VDEVS + 1;
  1672. ath10k_dbg(ATH10K_DBG_WMI,
  1673. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  1674. req_id,
  1675. __le32_to_cpu(ev->mem_reqs[i].num_units),
  1676. num_unit_info,
  1677. unit_size,
  1678. num_units);
  1679. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  1680. unit_size);
  1681. if (ret)
  1682. return;
  1683. }
  1684. exit:
  1685. ath10k_dbg(ATH10K_DBG_WMI,
  1686. "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n",
  1687. __le32_to_cpu(ev->sw_version),
  1688. __le32_to_cpu(ev->abi_version),
  1689. __le32_to_cpu(ev->phy_capability),
  1690. __le32_to_cpu(ev->ht_cap_info),
  1691. __le32_to_cpu(ev->vht_cap_info),
  1692. __le32_to_cpu(ev->vht_supp_mcs),
  1693. __le32_to_cpu(ev->sys_cap_info),
  1694. __le32_to_cpu(ev->num_mem_reqs),
  1695. __le32_to_cpu(ev->num_rf_chains));
  1696. complete(&ar->wmi.service_ready);
  1697. }
  1698. static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb)
  1699. {
  1700. struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data;
  1701. if (WARN_ON(skb->len < sizeof(*ev)))
  1702. return -EINVAL;
  1703. memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN);
  1704. ath10k_dbg(ATH10K_DBG_WMI,
  1705. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  1706. __le32_to_cpu(ev->sw_version),
  1707. __le32_to_cpu(ev->abi_version),
  1708. ev->mac_addr.addr,
  1709. __le32_to_cpu(ev->status));
  1710. complete(&ar->wmi.unified_ready);
  1711. return 0;
  1712. }
  1713. static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb)
  1714. {
  1715. struct wmi_cmd_hdr *cmd_hdr;
  1716. enum wmi_event_id id;
  1717. u16 len;
  1718. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1719. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  1720. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1721. return;
  1722. len = skb->len;
  1723. trace_ath10k_wmi_event(id, skb->data, skb->len);
  1724. switch (id) {
  1725. case WMI_MGMT_RX_EVENTID:
  1726. ath10k_wmi_event_mgmt_rx(ar, skb);
  1727. /* mgmt_rx() owns the skb now! */
  1728. return;
  1729. case WMI_SCAN_EVENTID:
  1730. ath10k_wmi_event_scan(ar, skb);
  1731. break;
  1732. case WMI_CHAN_INFO_EVENTID:
  1733. ath10k_wmi_event_chan_info(ar, skb);
  1734. break;
  1735. case WMI_ECHO_EVENTID:
  1736. ath10k_wmi_event_echo(ar, skb);
  1737. break;
  1738. case WMI_DEBUG_MESG_EVENTID:
  1739. ath10k_wmi_event_debug_mesg(ar, skb);
  1740. break;
  1741. case WMI_UPDATE_STATS_EVENTID:
  1742. ath10k_wmi_event_update_stats(ar, skb);
  1743. break;
  1744. case WMI_VDEV_START_RESP_EVENTID:
  1745. ath10k_wmi_event_vdev_start_resp(ar, skb);
  1746. break;
  1747. case WMI_VDEV_STOPPED_EVENTID:
  1748. ath10k_wmi_event_vdev_stopped(ar, skb);
  1749. break;
  1750. case WMI_PEER_STA_KICKOUT_EVENTID:
  1751. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  1752. break;
  1753. case WMI_HOST_SWBA_EVENTID:
  1754. ath10k_wmi_event_host_swba(ar, skb);
  1755. break;
  1756. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  1757. ath10k_wmi_event_tbttoffset_update(ar, skb);
  1758. break;
  1759. case WMI_PHYERR_EVENTID:
  1760. ath10k_wmi_event_phyerr(ar, skb);
  1761. break;
  1762. case WMI_ROAM_EVENTID:
  1763. ath10k_wmi_event_roam(ar, skb);
  1764. break;
  1765. case WMI_PROFILE_MATCH:
  1766. ath10k_wmi_event_profile_match(ar, skb);
  1767. break;
  1768. case WMI_DEBUG_PRINT_EVENTID:
  1769. ath10k_wmi_event_debug_print(ar, skb);
  1770. break;
  1771. case WMI_PDEV_QVIT_EVENTID:
  1772. ath10k_wmi_event_pdev_qvit(ar, skb);
  1773. break;
  1774. case WMI_WLAN_PROFILE_DATA_EVENTID:
  1775. ath10k_wmi_event_wlan_profile_data(ar, skb);
  1776. break;
  1777. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  1778. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  1779. break;
  1780. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  1781. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  1782. break;
  1783. case WMI_RTT_ERROR_REPORT_EVENTID:
  1784. ath10k_wmi_event_rtt_error_report(ar, skb);
  1785. break;
  1786. case WMI_WOW_WAKEUP_HOST_EVENTID:
  1787. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  1788. break;
  1789. case WMI_DCS_INTERFERENCE_EVENTID:
  1790. ath10k_wmi_event_dcs_interference(ar, skb);
  1791. break;
  1792. case WMI_PDEV_TPC_CONFIG_EVENTID:
  1793. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  1794. break;
  1795. case WMI_PDEV_FTM_INTG_EVENTID:
  1796. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  1797. break;
  1798. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  1799. ath10k_wmi_event_gtk_offload_status(ar, skb);
  1800. break;
  1801. case WMI_GTK_REKEY_FAIL_EVENTID:
  1802. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  1803. break;
  1804. case WMI_TX_DELBA_COMPLETE_EVENTID:
  1805. ath10k_wmi_event_delba_complete(ar, skb);
  1806. break;
  1807. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  1808. ath10k_wmi_event_addba_complete(ar, skb);
  1809. break;
  1810. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  1811. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  1812. break;
  1813. case WMI_SERVICE_READY_EVENTID:
  1814. ath10k_wmi_service_ready_event_rx(ar, skb);
  1815. break;
  1816. case WMI_READY_EVENTID:
  1817. ath10k_wmi_ready_event_rx(ar, skb);
  1818. break;
  1819. default:
  1820. ath10k_warn("Unknown eventid: %d\n", id);
  1821. break;
  1822. }
  1823. dev_kfree_skb(skb);
  1824. }
  1825. static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb)
  1826. {
  1827. struct wmi_cmd_hdr *cmd_hdr;
  1828. enum wmi_10x_event_id id;
  1829. u16 len;
  1830. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1831. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  1832. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1833. return;
  1834. len = skb->len;
  1835. trace_ath10k_wmi_event(id, skb->data, skb->len);
  1836. switch (id) {
  1837. case WMI_10X_MGMT_RX_EVENTID:
  1838. ath10k_wmi_event_mgmt_rx(ar, skb);
  1839. /* mgmt_rx() owns the skb now! */
  1840. return;
  1841. case WMI_10X_SCAN_EVENTID:
  1842. ath10k_wmi_event_scan(ar, skb);
  1843. break;
  1844. case WMI_10X_CHAN_INFO_EVENTID:
  1845. ath10k_wmi_event_chan_info(ar, skb);
  1846. break;
  1847. case WMI_10X_ECHO_EVENTID:
  1848. ath10k_wmi_event_echo(ar, skb);
  1849. break;
  1850. case WMI_10X_DEBUG_MESG_EVENTID:
  1851. ath10k_wmi_event_debug_mesg(ar, skb);
  1852. break;
  1853. case WMI_10X_UPDATE_STATS_EVENTID:
  1854. ath10k_wmi_event_update_stats(ar, skb);
  1855. break;
  1856. case WMI_10X_VDEV_START_RESP_EVENTID:
  1857. ath10k_wmi_event_vdev_start_resp(ar, skb);
  1858. break;
  1859. case WMI_10X_VDEV_STOPPED_EVENTID:
  1860. ath10k_wmi_event_vdev_stopped(ar, skb);
  1861. break;
  1862. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  1863. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  1864. break;
  1865. case WMI_10X_HOST_SWBA_EVENTID:
  1866. ath10k_wmi_event_host_swba(ar, skb);
  1867. break;
  1868. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  1869. ath10k_wmi_event_tbttoffset_update(ar, skb);
  1870. break;
  1871. case WMI_10X_PHYERR_EVENTID:
  1872. ath10k_wmi_event_phyerr(ar, skb);
  1873. break;
  1874. case WMI_10X_ROAM_EVENTID:
  1875. ath10k_wmi_event_roam(ar, skb);
  1876. break;
  1877. case WMI_10X_PROFILE_MATCH:
  1878. ath10k_wmi_event_profile_match(ar, skb);
  1879. break;
  1880. case WMI_10X_DEBUG_PRINT_EVENTID:
  1881. ath10k_wmi_event_debug_print(ar, skb);
  1882. break;
  1883. case WMI_10X_PDEV_QVIT_EVENTID:
  1884. ath10k_wmi_event_pdev_qvit(ar, skb);
  1885. break;
  1886. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  1887. ath10k_wmi_event_wlan_profile_data(ar, skb);
  1888. break;
  1889. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  1890. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  1891. break;
  1892. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  1893. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  1894. break;
  1895. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  1896. ath10k_wmi_event_rtt_error_report(ar, skb);
  1897. break;
  1898. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  1899. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  1900. break;
  1901. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  1902. ath10k_wmi_event_dcs_interference(ar, skb);
  1903. break;
  1904. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  1905. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  1906. break;
  1907. case WMI_10X_INST_RSSI_STATS_EVENTID:
  1908. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  1909. break;
  1910. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  1911. ath10k_wmi_event_vdev_standby_req(ar, skb);
  1912. break;
  1913. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  1914. ath10k_wmi_event_vdev_resume_req(ar, skb);
  1915. break;
  1916. case WMI_10X_SERVICE_READY_EVENTID:
  1917. ath10k_wmi_10x_service_ready_event_rx(ar, skb);
  1918. break;
  1919. case WMI_10X_READY_EVENTID:
  1920. ath10k_wmi_ready_event_rx(ar, skb);
  1921. break;
  1922. default:
  1923. ath10k_warn("Unknown eventid: %d\n", id);
  1924. break;
  1925. }
  1926. dev_kfree_skb(skb);
  1927. }
  1928. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  1929. {
  1930. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  1931. ath10k_wmi_10x_process_rx(ar, skb);
  1932. else
  1933. ath10k_wmi_main_process_rx(ar, skb);
  1934. }
  1935. /* WMI Initialization functions */
  1936. int ath10k_wmi_attach(struct ath10k *ar)
  1937. {
  1938. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
  1939. ar->wmi.cmd = &wmi_10x_cmd_map;
  1940. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  1941. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  1942. } else {
  1943. ar->wmi.cmd = &wmi_cmd_map;
  1944. ar->wmi.vdev_param = &wmi_vdev_param_map;
  1945. ar->wmi.pdev_param = &wmi_pdev_param_map;
  1946. }
  1947. init_completion(&ar->wmi.service_ready);
  1948. init_completion(&ar->wmi.unified_ready);
  1949. init_waitqueue_head(&ar->wmi.tx_credits_wq);
  1950. return 0;
  1951. }
  1952. void ath10k_wmi_detach(struct ath10k *ar)
  1953. {
  1954. int i;
  1955. /* free the host memory chunks requested by firmware */
  1956. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  1957. dma_free_coherent(ar->dev,
  1958. ar->wmi.mem_chunks[i].len,
  1959. ar->wmi.mem_chunks[i].vaddr,
  1960. ar->wmi.mem_chunks[i].paddr);
  1961. }
  1962. ar->wmi.num_mem_chunks = 0;
  1963. }
  1964. int ath10k_wmi_connect_htc_service(struct ath10k *ar)
  1965. {
  1966. int status;
  1967. struct ath10k_htc_svc_conn_req conn_req;
  1968. struct ath10k_htc_svc_conn_resp conn_resp;
  1969. memset(&conn_req, 0, sizeof(conn_req));
  1970. memset(&conn_resp, 0, sizeof(conn_resp));
  1971. /* these fields are the same for all service endpoints */
  1972. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  1973. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  1974. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  1975. /* connect to control service */
  1976. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  1977. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  1978. if (status) {
  1979. ath10k_warn("failed to connect to WMI CONTROL service status: %d\n",
  1980. status);
  1981. return status;
  1982. }
  1983. ar->wmi.eid = conn_resp.eid;
  1984. return 0;
  1985. }
  1986. int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g,
  1987. u16 rd5g, u16 ctl2g, u16 ctl5g)
  1988. {
  1989. struct wmi_pdev_set_regdomain_cmd *cmd;
  1990. struct sk_buff *skb;
  1991. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  1992. if (!skb)
  1993. return -ENOMEM;
  1994. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  1995. cmd->reg_domain = __cpu_to_le32(rd);
  1996. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  1997. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  1998. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  1999. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  2000. ath10k_dbg(ATH10K_DBG_WMI,
  2001. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  2002. rd, rd2g, rd5g, ctl2g, ctl5g);
  2003. return ath10k_wmi_cmd_send(ar, skb,
  2004. ar->wmi.cmd->pdev_set_regdomain_cmdid);
  2005. }
  2006. int ath10k_wmi_pdev_set_channel(struct ath10k *ar,
  2007. const struct wmi_channel_arg *arg)
  2008. {
  2009. struct wmi_set_channel_cmd *cmd;
  2010. struct sk_buff *skb;
  2011. u32 ch_flags = 0;
  2012. if (arg->passive)
  2013. return -EINVAL;
  2014. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2015. if (!skb)
  2016. return -ENOMEM;
  2017. if (arg->chan_radar)
  2018. ch_flags |= WMI_CHAN_FLAG_DFS;
  2019. cmd = (struct wmi_set_channel_cmd *)skb->data;
  2020. cmd->chan.mhz = __cpu_to_le32(arg->freq);
  2021. cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq);
  2022. cmd->chan.mode = arg->mode;
  2023. cmd->chan.flags |= __cpu_to_le32(ch_flags);
  2024. cmd->chan.min_power = arg->min_power;
  2025. cmd->chan.max_power = arg->max_power;
  2026. cmd->chan.reg_power = arg->max_reg_power;
  2027. cmd->chan.reg_classid = arg->reg_class_id;
  2028. cmd->chan.antenna_max = arg->max_antenna_gain;
  2029. ath10k_dbg(ATH10K_DBG_WMI,
  2030. "wmi set channel mode %d freq %d\n",
  2031. arg->mode, arg->freq);
  2032. return ath10k_wmi_cmd_send(ar, skb,
  2033. ar->wmi.cmd->pdev_set_channel_cmdid);
  2034. }
  2035. int ath10k_wmi_pdev_suspend_target(struct ath10k *ar)
  2036. {
  2037. struct wmi_pdev_suspend_cmd *cmd;
  2038. struct sk_buff *skb;
  2039. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2040. if (!skb)
  2041. return -ENOMEM;
  2042. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  2043. cmd->suspend_opt = WMI_PDEV_SUSPEND;
  2044. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid);
  2045. }
  2046. int ath10k_wmi_pdev_resume_target(struct ath10k *ar)
  2047. {
  2048. struct sk_buff *skb;
  2049. skb = ath10k_wmi_alloc_skb(0);
  2050. if (skb == NULL)
  2051. return -ENOMEM;
  2052. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid);
  2053. }
  2054. int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  2055. {
  2056. struct wmi_pdev_set_param_cmd *cmd;
  2057. struct sk_buff *skb;
  2058. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  2059. ath10k_warn("pdev param %d not supported by firmware\n", id);
  2060. return -EOPNOTSUPP;
  2061. }
  2062. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2063. if (!skb)
  2064. return -ENOMEM;
  2065. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  2066. cmd->param_id = __cpu_to_le32(id);
  2067. cmd->param_value = __cpu_to_le32(value);
  2068. ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  2069. id, value);
  2070. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid);
  2071. }
  2072. static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
  2073. {
  2074. struct wmi_init_cmd *cmd;
  2075. struct sk_buff *buf;
  2076. struct wmi_resource_config config = {};
  2077. u32 len, val;
  2078. int i;
  2079. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  2080. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS);
  2081. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  2082. config.num_offload_reorder_bufs =
  2083. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  2084. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  2085. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  2086. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  2087. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  2088. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  2089. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  2090. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  2091. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  2092. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  2093. config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
  2094. config.scan_max_pending_reqs =
  2095. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  2096. config.bmiss_offload_max_vdev =
  2097. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  2098. config.roam_offload_max_vdev =
  2099. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  2100. config.roam_offload_max_ap_profiles =
  2101. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  2102. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  2103. config.num_mcast_table_elems =
  2104. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  2105. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  2106. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  2107. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  2108. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  2109. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  2110. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  2111. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  2112. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  2113. config.gtk_offload_max_vdev =
  2114. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  2115. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  2116. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  2117. len = sizeof(*cmd) +
  2118. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  2119. buf = ath10k_wmi_alloc_skb(len);
  2120. if (!buf)
  2121. return -ENOMEM;
  2122. cmd = (struct wmi_init_cmd *)buf->data;
  2123. if (ar->wmi.num_mem_chunks == 0) {
  2124. cmd->num_host_mem_chunks = 0;
  2125. goto out;
  2126. }
  2127. ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
  2128. ar->wmi.num_mem_chunks);
  2129. cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
  2130. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  2131. cmd->host_mem_chunks[i].ptr =
  2132. __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  2133. cmd->host_mem_chunks[i].size =
  2134. __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  2135. cmd->host_mem_chunks[i].req_id =
  2136. __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  2137. ath10k_dbg(ATH10K_DBG_WMI,
  2138. "wmi chunk %d len %d requested, addr 0x%llx\n",
  2139. i,
  2140. ar->wmi.mem_chunks[i].len,
  2141. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  2142. }
  2143. out:
  2144. memcpy(&cmd->resource_config, &config, sizeof(config));
  2145. ath10k_dbg(ATH10K_DBG_WMI, "wmi init\n");
  2146. return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
  2147. }
  2148. static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
  2149. {
  2150. struct wmi_init_cmd_10x *cmd;
  2151. struct sk_buff *buf;
  2152. struct wmi_resource_config_10x config = {};
  2153. u32 len, val;
  2154. int i;
  2155. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  2156. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  2157. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  2158. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  2159. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  2160. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  2161. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  2162. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  2163. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  2164. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  2165. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  2166. config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
  2167. config.scan_max_pending_reqs =
  2168. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  2169. config.bmiss_offload_max_vdev =
  2170. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  2171. config.roam_offload_max_vdev =
  2172. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  2173. config.roam_offload_max_ap_profiles =
  2174. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  2175. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  2176. config.num_mcast_table_elems =
  2177. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  2178. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  2179. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  2180. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  2181. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  2182. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  2183. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  2184. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  2185. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  2186. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  2187. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  2188. len = sizeof(*cmd) +
  2189. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  2190. buf = ath10k_wmi_alloc_skb(len);
  2191. if (!buf)
  2192. return -ENOMEM;
  2193. cmd = (struct wmi_init_cmd_10x *)buf->data;
  2194. if (ar->wmi.num_mem_chunks == 0) {
  2195. cmd->num_host_mem_chunks = 0;
  2196. goto out;
  2197. }
  2198. ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
  2199. ar->wmi.num_mem_chunks);
  2200. cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
  2201. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  2202. cmd->host_mem_chunks[i].ptr =
  2203. __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  2204. cmd->host_mem_chunks[i].size =
  2205. __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  2206. cmd->host_mem_chunks[i].req_id =
  2207. __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  2208. ath10k_dbg(ATH10K_DBG_WMI,
  2209. "wmi chunk %d len %d requested, addr 0x%llx\n",
  2210. i,
  2211. ar->wmi.mem_chunks[i].len,
  2212. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  2213. }
  2214. out:
  2215. memcpy(&cmd->resource_config, &config, sizeof(config));
  2216. ath10k_dbg(ATH10K_DBG_WMI, "wmi init 10x\n");
  2217. return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid);
  2218. }
  2219. int ath10k_wmi_cmd_init(struct ath10k *ar)
  2220. {
  2221. int ret;
  2222. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  2223. ret = ath10k_wmi_10x_cmd_init(ar);
  2224. else
  2225. ret = ath10k_wmi_main_cmd_init(ar);
  2226. return ret;
  2227. }
  2228. static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar,
  2229. const struct wmi_start_scan_arg *arg)
  2230. {
  2231. int len;
  2232. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  2233. len = sizeof(struct wmi_start_scan_cmd_10x);
  2234. else
  2235. len = sizeof(struct wmi_start_scan_cmd);
  2236. if (arg->ie_len) {
  2237. if (!arg->ie)
  2238. return -EINVAL;
  2239. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  2240. return -EINVAL;
  2241. len += sizeof(struct wmi_ie_data);
  2242. len += roundup(arg->ie_len, 4);
  2243. }
  2244. if (arg->n_channels) {
  2245. if (!arg->channels)
  2246. return -EINVAL;
  2247. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  2248. return -EINVAL;
  2249. len += sizeof(struct wmi_chan_list);
  2250. len += sizeof(__le32) * arg->n_channels;
  2251. }
  2252. if (arg->n_ssids) {
  2253. if (!arg->ssids)
  2254. return -EINVAL;
  2255. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  2256. return -EINVAL;
  2257. len += sizeof(struct wmi_ssid_list);
  2258. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  2259. }
  2260. if (arg->n_bssids) {
  2261. if (!arg->bssids)
  2262. return -EINVAL;
  2263. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  2264. return -EINVAL;
  2265. len += sizeof(struct wmi_bssid_list);
  2266. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  2267. }
  2268. return len;
  2269. }
  2270. int ath10k_wmi_start_scan(struct ath10k *ar,
  2271. const struct wmi_start_scan_arg *arg)
  2272. {
  2273. struct wmi_start_scan_cmd *cmd;
  2274. struct sk_buff *skb;
  2275. struct wmi_ie_data *ie;
  2276. struct wmi_chan_list *channels;
  2277. struct wmi_ssid_list *ssids;
  2278. struct wmi_bssid_list *bssids;
  2279. u32 scan_id;
  2280. u32 scan_req_id;
  2281. int off;
  2282. int len = 0;
  2283. int i;
  2284. len = ath10k_wmi_start_scan_calc_len(ar, arg);
  2285. if (len < 0)
  2286. return len; /* len contains error code here */
  2287. skb = ath10k_wmi_alloc_skb(len);
  2288. if (!skb)
  2289. return -ENOMEM;
  2290. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  2291. scan_id |= arg->scan_id;
  2292. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  2293. scan_req_id |= arg->scan_req_id;
  2294. cmd = (struct wmi_start_scan_cmd *)skb->data;
  2295. cmd->scan_id = __cpu_to_le32(scan_id);
  2296. cmd->scan_req_id = __cpu_to_le32(scan_req_id);
  2297. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  2298. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  2299. cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  2300. cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  2301. cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  2302. cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  2303. cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  2304. cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  2305. cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  2306. cmd->idle_time = __cpu_to_le32(arg->idle_time);
  2307. cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  2308. cmd->probe_delay = __cpu_to_le32(arg->probe_delay);
  2309. cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  2310. /* TLV list starts after fields included in the struct */
  2311. /* There's just one filed that differes the two start_scan
  2312. * structures - burst_duration, which we are not using btw,
  2313. no point to make the split here, just shift the buffer to fit with
  2314. given FW */
  2315. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  2316. off = sizeof(struct wmi_start_scan_cmd_10x);
  2317. else
  2318. off = sizeof(struct wmi_start_scan_cmd);
  2319. if (arg->n_channels) {
  2320. channels = (void *)skb->data + off;
  2321. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  2322. channels->num_chan = __cpu_to_le32(arg->n_channels);
  2323. for (i = 0; i < arg->n_channels; i++)
  2324. channels->channel_list[i] =
  2325. __cpu_to_le32(arg->channels[i]);
  2326. off += sizeof(*channels);
  2327. off += sizeof(__le32) * arg->n_channels;
  2328. }
  2329. if (arg->n_ssids) {
  2330. ssids = (void *)skb->data + off;
  2331. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  2332. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  2333. for (i = 0; i < arg->n_ssids; i++) {
  2334. ssids->ssids[i].ssid_len =
  2335. __cpu_to_le32(arg->ssids[i].len);
  2336. memcpy(&ssids->ssids[i].ssid,
  2337. arg->ssids[i].ssid,
  2338. arg->ssids[i].len);
  2339. }
  2340. off += sizeof(*ssids);
  2341. off += sizeof(struct wmi_ssid) * arg->n_ssids;
  2342. }
  2343. if (arg->n_bssids) {
  2344. bssids = (void *)skb->data + off;
  2345. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  2346. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  2347. for (i = 0; i < arg->n_bssids; i++)
  2348. memcpy(&bssids->bssid_list[i],
  2349. arg->bssids[i].bssid,
  2350. ETH_ALEN);
  2351. off += sizeof(*bssids);
  2352. off += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  2353. }
  2354. if (arg->ie_len) {
  2355. ie = (void *)skb->data + off;
  2356. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  2357. ie->ie_len = __cpu_to_le32(arg->ie_len);
  2358. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  2359. off += sizeof(*ie);
  2360. off += roundup(arg->ie_len, 4);
  2361. }
  2362. if (off != skb->len) {
  2363. dev_kfree_skb(skb);
  2364. return -EINVAL;
  2365. }
  2366. ath10k_dbg(ATH10K_DBG_WMI, "wmi start scan\n");
  2367. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid);
  2368. }
  2369. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  2370. struct wmi_start_scan_arg *arg)
  2371. {
  2372. /* setup commonly used values */
  2373. arg->scan_req_id = 1;
  2374. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  2375. arg->dwell_time_active = 50;
  2376. arg->dwell_time_passive = 150;
  2377. arg->min_rest_time = 50;
  2378. arg->max_rest_time = 500;
  2379. arg->repeat_probe_time = 0;
  2380. arg->probe_spacing_time = 0;
  2381. arg->idle_time = 0;
  2382. arg->max_scan_time = 20000;
  2383. arg->probe_delay = 5;
  2384. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  2385. | WMI_SCAN_EVENT_COMPLETED
  2386. | WMI_SCAN_EVENT_BSS_CHANNEL
  2387. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  2388. | WMI_SCAN_EVENT_DEQUEUED;
  2389. arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
  2390. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  2391. arg->n_bssids = 1;
  2392. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  2393. }
  2394. int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg)
  2395. {
  2396. struct wmi_stop_scan_cmd *cmd;
  2397. struct sk_buff *skb;
  2398. u32 scan_id;
  2399. u32 req_id;
  2400. if (arg->req_id > 0xFFF)
  2401. return -EINVAL;
  2402. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  2403. return -EINVAL;
  2404. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2405. if (!skb)
  2406. return -ENOMEM;
  2407. scan_id = arg->u.scan_id;
  2408. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  2409. req_id = arg->req_id;
  2410. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  2411. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  2412. cmd->req_type = __cpu_to_le32(arg->req_type);
  2413. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  2414. cmd->scan_id = __cpu_to_le32(scan_id);
  2415. cmd->scan_req_id = __cpu_to_le32(req_id);
  2416. ath10k_dbg(ATH10K_DBG_WMI,
  2417. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  2418. arg->req_id, arg->req_type, arg->u.scan_id);
  2419. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid);
  2420. }
  2421. int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id,
  2422. enum wmi_vdev_type type,
  2423. enum wmi_vdev_subtype subtype,
  2424. const u8 macaddr[ETH_ALEN])
  2425. {
  2426. struct wmi_vdev_create_cmd *cmd;
  2427. struct sk_buff *skb;
  2428. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2429. if (!skb)
  2430. return -ENOMEM;
  2431. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  2432. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2433. cmd->vdev_type = __cpu_to_le32(type);
  2434. cmd->vdev_subtype = __cpu_to_le32(subtype);
  2435. memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN);
  2436. ath10k_dbg(ATH10K_DBG_WMI,
  2437. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  2438. vdev_id, type, subtype, macaddr);
  2439. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid);
  2440. }
  2441. int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id)
  2442. {
  2443. struct wmi_vdev_delete_cmd *cmd;
  2444. struct sk_buff *skb;
  2445. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2446. if (!skb)
  2447. return -ENOMEM;
  2448. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  2449. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2450. ath10k_dbg(ATH10K_DBG_WMI,
  2451. "WMI vdev delete id %d\n", vdev_id);
  2452. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid);
  2453. }
  2454. static int ath10k_wmi_vdev_start_restart(struct ath10k *ar,
  2455. const struct wmi_vdev_start_request_arg *arg,
  2456. u32 cmd_id)
  2457. {
  2458. struct wmi_vdev_start_request_cmd *cmd;
  2459. struct sk_buff *skb;
  2460. const char *cmdname;
  2461. u32 flags = 0;
  2462. u32 ch_flags = 0;
  2463. if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid &&
  2464. cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid)
  2465. return -EINVAL;
  2466. if (WARN_ON(arg->ssid && arg->ssid_len == 0))
  2467. return -EINVAL;
  2468. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  2469. return -EINVAL;
  2470. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  2471. return -EINVAL;
  2472. if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid)
  2473. cmdname = "start";
  2474. else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid)
  2475. cmdname = "restart";
  2476. else
  2477. return -EINVAL; /* should not happen, we already check cmd_id */
  2478. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2479. if (!skb)
  2480. return -ENOMEM;
  2481. if (arg->hidden_ssid)
  2482. flags |= WMI_VDEV_START_HIDDEN_SSID;
  2483. if (arg->pmf_enabled)
  2484. flags |= WMI_VDEV_START_PMF_ENABLED;
  2485. if (arg->channel.chan_radar)
  2486. ch_flags |= WMI_CHAN_FLAG_DFS;
  2487. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  2488. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  2489. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  2490. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  2491. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  2492. cmd->flags = __cpu_to_le32(flags);
  2493. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  2494. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  2495. if (arg->ssid) {
  2496. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  2497. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  2498. }
  2499. cmd->chan.mhz = __cpu_to_le32(arg->channel.freq);
  2500. cmd->chan.band_center_freq1 =
  2501. __cpu_to_le32(arg->channel.band_center_freq1);
  2502. cmd->chan.mode = arg->channel.mode;
  2503. cmd->chan.flags |= __cpu_to_le32(ch_flags);
  2504. cmd->chan.min_power = arg->channel.min_power;
  2505. cmd->chan.max_power = arg->channel.max_power;
  2506. cmd->chan.reg_power = arg->channel.max_reg_power;
  2507. cmd->chan.reg_classid = arg->channel.reg_class_id;
  2508. cmd->chan.antenna_max = arg->channel.max_antenna_gain;
  2509. ath10k_dbg(ATH10K_DBG_WMI,
  2510. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, "
  2511. "ch_flags: 0x%0X, max_power: %d\n", cmdname, arg->vdev_id,
  2512. flags, arg->channel.freq, arg->channel.mode,
  2513. cmd->chan.flags, arg->channel.max_power);
  2514. return ath10k_wmi_cmd_send(ar, skb, cmd_id);
  2515. }
  2516. int ath10k_wmi_vdev_start(struct ath10k *ar,
  2517. const struct wmi_vdev_start_request_arg *arg)
  2518. {
  2519. u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid;
  2520. return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
  2521. }
  2522. int ath10k_wmi_vdev_restart(struct ath10k *ar,
  2523. const struct wmi_vdev_start_request_arg *arg)
  2524. {
  2525. u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid;
  2526. return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id);
  2527. }
  2528. int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id)
  2529. {
  2530. struct wmi_vdev_stop_cmd *cmd;
  2531. struct sk_buff *skb;
  2532. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2533. if (!skb)
  2534. return -ENOMEM;
  2535. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  2536. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2537. ath10k_dbg(ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  2538. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid);
  2539. }
  2540. int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid)
  2541. {
  2542. struct wmi_vdev_up_cmd *cmd;
  2543. struct sk_buff *skb;
  2544. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2545. if (!skb)
  2546. return -ENOMEM;
  2547. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  2548. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2549. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  2550. memcpy(&cmd->vdev_bssid.addr, bssid, ETH_ALEN);
  2551. ath10k_dbg(ATH10K_DBG_WMI,
  2552. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  2553. vdev_id, aid, bssid);
  2554. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid);
  2555. }
  2556. int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id)
  2557. {
  2558. struct wmi_vdev_down_cmd *cmd;
  2559. struct sk_buff *skb;
  2560. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2561. if (!skb)
  2562. return -ENOMEM;
  2563. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  2564. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2565. ath10k_dbg(ATH10K_DBG_WMI,
  2566. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  2567. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid);
  2568. }
  2569. int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  2570. u32 param_id, u32 param_value)
  2571. {
  2572. struct wmi_vdev_set_param_cmd *cmd;
  2573. struct sk_buff *skb;
  2574. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  2575. ath10k_dbg(ATH10K_DBG_WMI,
  2576. "vdev param %d not supported by firmware\n",
  2577. param_id);
  2578. return -EOPNOTSUPP;
  2579. }
  2580. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2581. if (!skb)
  2582. return -ENOMEM;
  2583. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  2584. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2585. cmd->param_id = __cpu_to_le32(param_id);
  2586. cmd->param_value = __cpu_to_le32(param_value);
  2587. ath10k_dbg(ATH10K_DBG_WMI,
  2588. "wmi vdev id 0x%x set param %d value %d\n",
  2589. vdev_id, param_id, param_value);
  2590. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid);
  2591. }
  2592. int ath10k_wmi_vdev_install_key(struct ath10k *ar,
  2593. const struct wmi_vdev_install_key_arg *arg)
  2594. {
  2595. struct wmi_vdev_install_key_cmd *cmd;
  2596. struct sk_buff *skb;
  2597. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  2598. return -EINVAL;
  2599. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  2600. return -EINVAL;
  2601. skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->key_len);
  2602. if (!skb)
  2603. return -ENOMEM;
  2604. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  2605. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  2606. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  2607. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  2608. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  2609. cmd->key_len = __cpu_to_le32(arg->key_len);
  2610. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  2611. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  2612. if (arg->macaddr)
  2613. memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN);
  2614. if (arg->key_data)
  2615. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  2616. ath10k_dbg(ATH10K_DBG_WMI,
  2617. "wmi vdev install key idx %d cipher %d len %d\n",
  2618. arg->key_idx, arg->key_cipher, arg->key_len);
  2619. return ath10k_wmi_cmd_send(ar, skb,
  2620. ar->wmi.cmd->vdev_install_key_cmdid);
  2621. }
  2622. int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id,
  2623. const u8 peer_addr[ETH_ALEN])
  2624. {
  2625. struct wmi_peer_create_cmd *cmd;
  2626. struct sk_buff *skb;
  2627. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2628. if (!skb)
  2629. return -ENOMEM;
  2630. cmd = (struct wmi_peer_create_cmd *)skb->data;
  2631. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2632. memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  2633. ath10k_dbg(ATH10K_DBG_WMI,
  2634. "wmi peer create vdev_id %d peer_addr %pM\n",
  2635. vdev_id, peer_addr);
  2636. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid);
  2637. }
  2638. int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id,
  2639. const u8 peer_addr[ETH_ALEN])
  2640. {
  2641. struct wmi_peer_delete_cmd *cmd;
  2642. struct sk_buff *skb;
  2643. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2644. if (!skb)
  2645. return -ENOMEM;
  2646. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  2647. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2648. memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  2649. ath10k_dbg(ATH10K_DBG_WMI,
  2650. "wmi peer delete vdev_id %d peer_addr %pM\n",
  2651. vdev_id, peer_addr);
  2652. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid);
  2653. }
  2654. int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id,
  2655. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  2656. {
  2657. struct wmi_peer_flush_tids_cmd *cmd;
  2658. struct sk_buff *skb;
  2659. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2660. if (!skb)
  2661. return -ENOMEM;
  2662. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  2663. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2664. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  2665. memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  2666. ath10k_dbg(ATH10K_DBG_WMI,
  2667. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  2668. vdev_id, peer_addr, tid_bitmap);
  2669. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid);
  2670. }
  2671. int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id,
  2672. const u8 *peer_addr, enum wmi_peer_param param_id,
  2673. u32 param_value)
  2674. {
  2675. struct wmi_peer_set_param_cmd *cmd;
  2676. struct sk_buff *skb;
  2677. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2678. if (!skb)
  2679. return -ENOMEM;
  2680. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  2681. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2682. cmd->param_id = __cpu_to_le32(param_id);
  2683. cmd->param_value = __cpu_to_le32(param_value);
  2684. memcpy(&cmd->peer_macaddr.addr, peer_addr, ETH_ALEN);
  2685. ath10k_dbg(ATH10K_DBG_WMI,
  2686. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  2687. vdev_id, peer_addr, param_id, param_value);
  2688. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid);
  2689. }
  2690. int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id,
  2691. enum wmi_sta_ps_mode psmode)
  2692. {
  2693. struct wmi_sta_powersave_mode_cmd *cmd;
  2694. struct sk_buff *skb;
  2695. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2696. if (!skb)
  2697. return -ENOMEM;
  2698. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  2699. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2700. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  2701. ath10k_dbg(ATH10K_DBG_WMI,
  2702. "wmi set powersave id 0x%x mode %d\n",
  2703. vdev_id, psmode);
  2704. return ath10k_wmi_cmd_send(ar, skb,
  2705. ar->wmi.cmd->sta_powersave_mode_cmdid);
  2706. }
  2707. int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id,
  2708. enum wmi_sta_powersave_param param_id,
  2709. u32 value)
  2710. {
  2711. struct wmi_sta_powersave_param_cmd *cmd;
  2712. struct sk_buff *skb;
  2713. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2714. if (!skb)
  2715. return -ENOMEM;
  2716. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  2717. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2718. cmd->param_id = __cpu_to_le32(param_id);
  2719. cmd->param_value = __cpu_to_le32(value);
  2720. ath10k_dbg(ATH10K_DBG_WMI,
  2721. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  2722. vdev_id, param_id, value);
  2723. return ath10k_wmi_cmd_send(ar, skb,
  2724. ar->wmi.cmd->sta_powersave_param_cmdid);
  2725. }
  2726. int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  2727. enum wmi_ap_ps_peer_param param_id, u32 value)
  2728. {
  2729. struct wmi_ap_ps_peer_cmd *cmd;
  2730. struct sk_buff *skb;
  2731. if (!mac)
  2732. return -EINVAL;
  2733. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2734. if (!skb)
  2735. return -ENOMEM;
  2736. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  2737. cmd->vdev_id = __cpu_to_le32(vdev_id);
  2738. cmd->param_id = __cpu_to_le32(param_id);
  2739. cmd->param_value = __cpu_to_le32(value);
  2740. memcpy(&cmd->peer_macaddr, mac, ETH_ALEN);
  2741. ath10k_dbg(ATH10K_DBG_WMI,
  2742. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  2743. vdev_id, param_id, value, mac);
  2744. return ath10k_wmi_cmd_send(ar, skb,
  2745. ar->wmi.cmd->ap_ps_peer_param_cmdid);
  2746. }
  2747. int ath10k_wmi_scan_chan_list(struct ath10k *ar,
  2748. const struct wmi_scan_chan_list_arg *arg)
  2749. {
  2750. struct wmi_scan_chan_list_cmd *cmd;
  2751. struct sk_buff *skb;
  2752. struct wmi_channel_arg *ch;
  2753. struct wmi_channel *ci;
  2754. int len;
  2755. int i;
  2756. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  2757. skb = ath10k_wmi_alloc_skb(len);
  2758. if (!skb)
  2759. return -EINVAL;
  2760. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  2761. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  2762. for (i = 0; i < arg->n_channels; i++) {
  2763. u32 flags = 0;
  2764. ch = &arg->channels[i];
  2765. ci = &cmd->chan_info[i];
  2766. if (ch->passive)
  2767. flags |= WMI_CHAN_FLAG_PASSIVE;
  2768. if (ch->allow_ibss)
  2769. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  2770. if (ch->allow_ht)
  2771. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  2772. if (ch->allow_vht)
  2773. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  2774. if (ch->ht40plus)
  2775. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  2776. if (ch->chan_radar)
  2777. flags |= WMI_CHAN_FLAG_DFS;
  2778. ci->mhz = __cpu_to_le32(ch->freq);
  2779. ci->band_center_freq1 = __cpu_to_le32(ch->freq);
  2780. ci->band_center_freq2 = 0;
  2781. ci->min_power = ch->min_power;
  2782. ci->max_power = ch->max_power;
  2783. ci->reg_power = ch->max_reg_power;
  2784. ci->antenna_max = ch->max_antenna_gain;
  2785. ci->antenna_max = 0;
  2786. /* mode & flags share storage */
  2787. ci->mode = ch->mode;
  2788. ci->flags |= __cpu_to_le32(flags);
  2789. }
  2790. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid);
  2791. }
  2792. int ath10k_wmi_peer_assoc(struct ath10k *ar,
  2793. const struct wmi_peer_assoc_complete_arg *arg)
  2794. {
  2795. struct wmi_peer_assoc_complete_cmd *cmd;
  2796. struct sk_buff *skb;
  2797. if (arg->peer_mpdu_density > 16)
  2798. return -EINVAL;
  2799. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  2800. return -EINVAL;
  2801. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  2802. return -EINVAL;
  2803. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2804. if (!skb)
  2805. return -ENOMEM;
  2806. cmd = (struct wmi_peer_assoc_complete_cmd *)skb->data;
  2807. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  2808. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  2809. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  2810. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  2811. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  2812. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  2813. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  2814. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  2815. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  2816. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  2817. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  2818. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  2819. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  2820. memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN);
  2821. cmd->peer_legacy_rates.num_rates =
  2822. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  2823. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  2824. arg->peer_legacy_rates.num_rates);
  2825. cmd->peer_ht_rates.num_rates =
  2826. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  2827. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  2828. arg->peer_ht_rates.num_rates);
  2829. cmd->peer_vht_rates.rx_max_rate =
  2830. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  2831. cmd->peer_vht_rates.rx_mcs_set =
  2832. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  2833. cmd->peer_vht_rates.tx_max_rate =
  2834. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  2835. cmd->peer_vht_rates.tx_mcs_set =
  2836. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  2837. ath10k_dbg(ATH10K_DBG_WMI,
  2838. "wmi peer assoc vdev %d addr %pM\n",
  2839. arg->vdev_id, arg->addr);
  2840. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid);
  2841. }
  2842. int ath10k_wmi_beacon_send_nowait(struct ath10k *ar,
  2843. const struct wmi_bcn_tx_arg *arg)
  2844. {
  2845. struct wmi_bcn_tx_cmd *cmd;
  2846. struct sk_buff *skb;
  2847. int ret;
  2848. skb = ath10k_wmi_alloc_skb(sizeof(*cmd) + arg->bcn_len);
  2849. if (!skb)
  2850. return -ENOMEM;
  2851. cmd = (struct wmi_bcn_tx_cmd *)skb->data;
  2852. cmd->hdr.vdev_id = __cpu_to_le32(arg->vdev_id);
  2853. cmd->hdr.tx_rate = __cpu_to_le32(arg->tx_rate);
  2854. cmd->hdr.tx_power = __cpu_to_le32(arg->tx_power);
  2855. cmd->hdr.bcn_len = __cpu_to_le32(arg->bcn_len);
  2856. memcpy(cmd->bcn, arg->bcn, arg->bcn_len);
  2857. ret = ath10k_wmi_cmd_send_nowait(ar, skb, ar->wmi.cmd->bcn_tx_cmdid);
  2858. if (ret)
  2859. dev_kfree_skb(skb);
  2860. return ret;
  2861. }
  2862. static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params,
  2863. const struct wmi_wmm_params_arg *arg)
  2864. {
  2865. params->cwmin = __cpu_to_le32(arg->cwmin);
  2866. params->cwmax = __cpu_to_le32(arg->cwmax);
  2867. params->aifs = __cpu_to_le32(arg->aifs);
  2868. params->txop = __cpu_to_le32(arg->txop);
  2869. params->acm = __cpu_to_le32(arg->acm);
  2870. params->no_ack = __cpu_to_le32(arg->no_ack);
  2871. }
  2872. int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar,
  2873. const struct wmi_pdev_set_wmm_params_arg *arg)
  2874. {
  2875. struct wmi_pdev_set_wmm_params *cmd;
  2876. struct sk_buff *skb;
  2877. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2878. if (!skb)
  2879. return -ENOMEM;
  2880. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  2881. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  2882. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  2883. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  2884. ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  2885. ath10k_dbg(ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  2886. return ath10k_wmi_cmd_send(ar, skb,
  2887. ar->wmi.cmd->pdev_set_wmm_params_cmdid);
  2888. }
  2889. int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
  2890. {
  2891. struct wmi_request_stats_cmd *cmd;
  2892. struct sk_buff *skb;
  2893. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2894. if (!skb)
  2895. return -ENOMEM;
  2896. cmd = (struct wmi_request_stats_cmd *)skb->data;
  2897. cmd->stats_id = __cpu_to_le32(stats_id);
  2898. ath10k_dbg(ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
  2899. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid);
  2900. }
  2901. int ath10k_wmi_force_fw_hang(struct ath10k *ar,
  2902. enum wmi_force_fw_hang_type type, u32 delay_ms)
  2903. {
  2904. struct wmi_force_fw_hang_cmd *cmd;
  2905. struct sk_buff *skb;
  2906. skb = ath10k_wmi_alloc_skb(sizeof(*cmd));
  2907. if (!skb)
  2908. return -ENOMEM;
  2909. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  2910. cmd->type = __cpu_to_le32(type);
  2911. cmd->delay_ms = __cpu_to_le32(delay_ms);
  2912. ath10k_dbg(ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  2913. type, delay_ms);
  2914. return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid);
  2915. }