smsc95xx.c 50 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015
  1. /***************************************************************************
  2. *
  3. * Copyright (C) 2007-2008 SMSC
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  17. *
  18. *****************************************************************************/
  19. #include <linux/module.h>
  20. #include <linux/kmod.h>
  21. #include <linux/init.h>
  22. #include <linux/netdevice.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/ethtool.h>
  25. #include <linux/mii.h>
  26. #include <linux/usb.h>
  27. #include <linux/bitrev.h>
  28. #include <linux/crc16.h>
  29. #include <linux/crc32.h>
  30. #include <linux/usb/usbnet.h>
  31. #include <linux/slab.h>
  32. #include "smsc95xx.h"
  33. #define SMSC_CHIPNAME "smsc95xx"
  34. #define SMSC_DRIVER_VERSION "1.0.4"
  35. #define HS_USB_PKT_SIZE (512)
  36. #define FS_USB_PKT_SIZE (64)
  37. #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
  38. #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
  39. #define DEFAULT_BULK_IN_DELAY (0x00002000)
  40. #define MAX_SINGLE_PACKET_SIZE (2048)
  41. #define LAN95XX_EEPROM_MAGIC (0x9500)
  42. #define EEPROM_MAC_OFFSET (0x01)
  43. #define DEFAULT_TX_CSUM_ENABLE (true)
  44. #define DEFAULT_RX_CSUM_ENABLE (true)
  45. #define SMSC95XX_INTERNAL_PHY_ID (1)
  46. #define SMSC95XX_TX_OVERHEAD (8)
  47. #define SMSC95XX_TX_OVERHEAD_CSUM (12)
  48. #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
  49. WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
  50. #define FEATURE_8_WAKEUP_FILTERS (0x01)
  51. #define FEATURE_PHY_NLP_CROSSOVER (0x02)
  52. #define FEATURE_REMOTE_WAKEUP (0x04)
  53. #define SUSPEND_SUSPEND0 (0x01)
  54. #define SUSPEND_SUSPEND1 (0x02)
  55. #define SUSPEND_SUSPEND2 (0x04)
  56. #define SUSPEND_SUSPEND3 (0x08)
  57. #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
  58. SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
  59. struct smsc95xx_priv {
  60. u32 mac_cr;
  61. u32 hash_hi;
  62. u32 hash_lo;
  63. u32 wolopts;
  64. spinlock_t mac_cr_lock;
  65. u8 features;
  66. u8 suspend_flags;
  67. };
  68. static bool turbo_mode = true;
  69. module_param(turbo_mode, bool, 0644);
  70. MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
  71. static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
  72. u32 *data, int in_pm)
  73. {
  74. u32 buf;
  75. int ret;
  76. int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
  77. BUG_ON(!dev);
  78. if (!in_pm)
  79. fn = usbnet_read_cmd;
  80. else
  81. fn = usbnet_read_cmd_nopm;
  82. ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
  83. | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  84. 0, index, &buf, 4);
  85. if (unlikely(ret < 0))
  86. netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
  87. index, ret);
  88. le32_to_cpus(&buf);
  89. *data = buf;
  90. return ret;
  91. }
  92. static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index,
  93. u32 data, int in_pm)
  94. {
  95. u32 buf;
  96. int ret;
  97. int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
  98. BUG_ON(!dev);
  99. if (!in_pm)
  100. fn = usbnet_write_cmd;
  101. else
  102. fn = usbnet_write_cmd_nopm;
  103. buf = data;
  104. cpu_to_le32s(&buf);
  105. ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
  106. | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  107. 0, index, &buf, 4);
  108. if (unlikely(ret < 0))
  109. netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
  110. index, ret);
  111. return ret;
  112. }
  113. static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index,
  114. u32 *data)
  115. {
  116. return __smsc95xx_read_reg(dev, index, data, 1);
  117. }
  118. static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index,
  119. u32 data)
  120. {
  121. return __smsc95xx_write_reg(dev, index, data, 1);
  122. }
  123. static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
  124. u32 *data)
  125. {
  126. return __smsc95xx_read_reg(dev, index, data, 0);
  127. }
  128. static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
  129. u32 data)
  130. {
  131. return __smsc95xx_write_reg(dev, index, data, 0);
  132. }
  133. /* Loop until the read is completed with timeout
  134. * called with phy_mutex held */
  135. static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev,
  136. int in_pm)
  137. {
  138. unsigned long start_time = jiffies;
  139. u32 val;
  140. int ret;
  141. do {
  142. ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm);
  143. if (ret < 0) {
  144. netdev_warn(dev->net, "Error reading MII_ACCESS\n");
  145. return ret;
  146. }
  147. if (!(val & MII_BUSY_))
  148. return 0;
  149. } while (!time_after(jiffies, start_time + HZ));
  150. return -EIO;
  151. }
  152. static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
  153. int in_pm)
  154. {
  155. struct usbnet *dev = netdev_priv(netdev);
  156. u32 val, addr;
  157. int ret;
  158. mutex_lock(&dev->phy_mutex);
  159. /* confirm MII not busy */
  160. ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
  161. if (ret < 0) {
  162. netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
  163. goto done;
  164. }
  165. /* set the address, index & direction (read from PHY) */
  166. phy_id &= dev->mii.phy_id_mask;
  167. idx &= dev->mii.reg_num_mask;
  168. addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_;
  169. ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
  170. if (ret < 0) {
  171. netdev_warn(dev->net, "Error writing MII_ADDR\n");
  172. goto done;
  173. }
  174. ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
  175. if (ret < 0) {
  176. netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
  177. goto done;
  178. }
  179. ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm);
  180. if (ret < 0) {
  181. netdev_warn(dev->net, "Error reading MII_DATA\n");
  182. goto done;
  183. }
  184. ret = (u16)(val & 0xFFFF);
  185. done:
  186. mutex_unlock(&dev->phy_mutex);
  187. return ret;
  188. }
  189. static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id,
  190. int idx, int regval, int in_pm)
  191. {
  192. struct usbnet *dev = netdev_priv(netdev);
  193. u32 val, addr;
  194. int ret;
  195. mutex_lock(&dev->phy_mutex);
  196. /* confirm MII not busy */
  197. ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
  198. if (ret < 0) {
  199. netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
  200. goto done;
  201. }
  202. val = regval;
  203. ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm);
  204. if (ret < 0) {
  205. netdev_warn(dev->net, "Error writing MII_DATA\n");
  206. goto done;
  207. }
  208. /* set the address, index & direction (write to PHY) */
  209. phy_id &= dev->mii.phy_id_mask;
  210. idx &= dev->mii.reg_num_mask;
  211. addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_;
  212. ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
  213. if (ret < 0) {
  214. netdev_warn(dev->net, "Error writing MII_ADDR\n");
  215. goto done;
  216. }
  217. ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
  218. if (ret < 0) {
  219. netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
  220. goto done;
  221. }
  222. done:
  223. mutex_unlock(&dev->phy_mutex);
  224. }
  225. static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
  226. int idx)
  227. {
  228. return __smsc95xx_mdio_read(netdev, phy_id, idx, 1);
  229. }
  230. static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
  231. int idx, int regval)
  232. {
  233. __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1);
  234. }
  235. static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
  236. {
  237. return __smsc95xx_mdio_read(netdev, phy_id, idx, 0);
  238. }
  239. static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
  240. int regval)
  241. {
  242. __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0);
  243. }
  244. static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
  245. {
  246. unsigned long start_time = jiffies;
  247. u32 val;
  248. int ret;
  249. do {
  250. ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
  251. if (ret < 0) {
  252. netdev_warn(dev->net, "Error reading E2P_CMD\n");
  253. return ret;
  254. }
  255. if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
  256. break;
  257. udelay(40);
  258. } while (!time_after(jiffies, start_time + HZ));
  259. if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
  260. netdev_warn(dev->net, "EEPROM read operation timeout\n");
  261. return -EIO;
  262. }
  263. return 0;
  264. }
  265. static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
  266. {
  267. unsigned long start_time = jiffies;
  268. u32 val;
  269. int ret;
  270. do {
  271. ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
  272. if (ret < 0) {
  273. netdev_warn(dev->net, "Error reading E2P_CMD\n");
  274. return ret;
  275. }
  276. if (!(val & E2P_CMD_BUSY_))
  277. return 0;
  278. udelay(40);
  279. } while (!time_after(jiffies, start_time + HZ));
  280. netdev_warn(dev->net, "EEPROM is busy\n");
  281. return -EIO;
  282. }
  283. static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
  284. u8 *data)
  285. {
  286. u32 val;
  287. int i, ret;
  288. BUG_ON(!dev);
  289. BUG_ON(!data);
  290. ret = smsc95xx_eeprom_confirm_not_busy(dev);
  291. if (ret)
  292. return ret;
  293. for (i = 0; i < length; i++) {
  294. val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
  295. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  296. if (ret < 0) {
  297. netdev_warn(dev->net, "Error writing E2P_CMD\n");
  298. return ret;
  299. }
  300. ret = smsc95xx_wait_eeprom(dev);
  301. if (ret < 0)
  302. return ret;
  303. ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
  304. if (ret < 0) {
  305. netdev_warn(dev->net, "Error reading E2P_DATA\n");
  306. return ret;
  307. }
  308. data[i] = val & 0xFF;
  309. offset++;
  310. }
  311. return 0;
  312. }
  313. static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
  314. u8 *data)
  315. {
  316. u32 val;
  317. int i, ret;
  318. BUG_ON(!dev);
  319. BUG_ON(!data);
  320. ret = smsc95xx_eeprom_confirm_not_busy(dev);
  321. if (ret)
  322. return ret;
  323. /* Issue write/erase enable command */
  324. val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
  325. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  326. if (ret < 0) {
  327. netdev_warn(dev->net, "Error writing E2P_DATA\n");
  328. return ret;
  329. }
  330. ret = smsc95xx_wait_eeprom(dev);
  331. if (ret < 0)
  332. return ret;
  333. for (i = 0; i < length; i++) {
  334. /* Fill data register */
  335. val = data[i];
  336. ret = smsc95xx_write_reg(dev, E2P_DATA, val);
  337. if (ret < 0) {
  338. netdev_warn(dev->net, "Error writing E2P_DATA\n");
  339. return ret;
  340. }
  341. /* Send "write" command */
  342. val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
  343. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  344. if (ret < 0) {
  345. netdev_warn(dev->net, "Error writing E2P_CMD\n");
  346. return ret;
  347. }
  348. ret = smsc95xx_wait_eeprom(dev);
  349. if (ret < 0)
  350. return ret;
  351. offset++;
  352. }
  353. return 0;
  354. }
  355. static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
  356. u32 data)
  357. {
  358. const u16 size = 4;
  359. u32 buf;
  360. int ret;
  361. buf = data;
  362. cpu_to_le32s(&buf);
  363. ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
  364. USB_DIR_OUT | USB_TYPE_VENDOR |
  365. USB_RECIP_DEVICE,
  366. 0, index, &buf, size);
  367. if (ret < 0)
  368. netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
  369. ret);
  370. return ret;
  371. }
  372. /* returns hash bit number for given MAC address
  373. * example:
  374. * 01 00 5E 00 00 01 -> returns bit number 31 */
  375. static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
  376. {
  377. return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
  378. }
  379. static void smsc95xx_set_multicast(struct net_device *netdev)
  380. {
  381. struct usbnet *dev = netdev_priv(netdev);
  382. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  383. unsigned long flags;
  384. int ret;
  385. pdata->hash_hi = 0;
  386. pdata->hash_lo = 0;
  387. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  388. if (dev->net->flags & IFF_PROMISC) {
  389. netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
  390. pdata->mac_cr |= MAC_CR_PRMS_;
  391. pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  392. } else if (dev->net->flags & IFF_ALLMULTI) {
  393. netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
  394. pdata->mac_cr |= MAC_CR_MCPAS_;
  395. pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
  396. } else if (!netdev_mc_empty(dev->net)) {
  397. struct netdev_hw_addr *ha;
  398. pdata->mac_cr |= MAC_CR_HPFILT_;
  399. pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  400. netdev_for_each_mc_addr(ha, netdev) {
  401. u32 bitnum = smsc95xx_hash(ha->addr);
  402. u32 mask = 0x01 << (bitnum & 0x1F);
  403. if (bitnum & 0x20)
  404. pdata->hash_hi |= mask;
  405. else
  406. pdata->hash_lo |= mask;
  407. }
  408. netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
  409. pdata->hash_hi, pdata->hash_lo);
  410. } else {
  411. netif_dbg(dev, drv, dev->net, "receive own packets only\n");
  412. pdata->mac_cr &=
  413. ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  414. }
  415. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  416. /* Initiate async writes, as we can't wait for completion here */
  417. ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi);
  418. if (ret < 0)
  419. netdev_warn(dev->net, "failed to initiate async write to HASHH\n");
  420. ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo);
  421. if (ret < 0)
  422. netdev_warn(dev->net, "failed to initiate async write to HASHL\n");
  423. ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr);
  424. if (ret < 0)
  425. netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n");
  426. }
  427. static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
  428. u16 lcladv, u16 rmtadv)
  429. {
  430. u32 flow, afc_cfg = 0;
  431. int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
  432. if (ret < 0)
  433. return ret;
  434. if (duplex == DUPLEX_FULL) {
  435. u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
  436. if (cap & FLOW_CTRL_RX)
  437. flow = 0xFFFF0002;
  438. else
  439. flow = 0;
  440. if (cap & FLOW_CTRL_TX)
  441. afc_cfg |= 0xF;
  442. else
  443. afc_cfg &= ~0xF;
  444. netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
  445. cap & FLOW_CTRL_RX ? "enabled" : "disabled",
  446. cap & FLOW_CTRL_TX ? "enabled" : "disabled");
  447. } else {
  448. netif_dbg(dev, link, dev->net, "half duplex\n");
  449. flow = 0;
  450. afc_cfg |= 0xF;
  451. }
  452. ret = smsc95xx_write_reg(dev, FLOW, flow);
  453. if (ret < 0)
  454. return ret;
  455. return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
  456. }
  457. static int smsc95xx_link_reset(struct usbnet *dev)
  458. {
  459. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  460. struct mii_if_info *mii = &dev->mii;
  461. struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
  462. unsigned long flags;
  463. u16 lcladv, rmtadv;
  464. int ret;
  465. /* clear interrupt status */
  466. ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
  467. if (ret < 0)
  468. return ret;
  469. ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
  470. if (ret < 0)
  471. return ret;
  472. mii_check_media(mii, 1, 1);
  473. mii_ethtool_gset(&dev->mii, &ecmd);
  474. lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
  475. rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
  476. netif_dbg(dev, link, dev->net,
  477. "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
  478. ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
  479. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  480. if (ecmd.duplex != DUPLEX_FULL) {
  481. pdata->mac_cr &= ~MAC_CR_FDPX_;
  482. pdata->mac_cr |= MAC_CR_RCVOWN_;
  483. } else {
  484. pdata->mac_cr &= ~MAC_CR_RCVOWN_;
  485. pdata->mac_cr |= MAC_CR_FDPX_;
  486. }
  487. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  488. ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
  489. if (ret < 0)
  490. return ret;
  491. ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
  492. if (ret < 0)
  493. netdev_warn(dev->net, "Error updating PHY flow control\n");
  494. return ret;
  495. }
  496. static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
  497. {
  498. u32 intdata;
  499. if (urb->actual_length != 4) {
  500. netdev_warn(dev->net, "unexpected urb length %d\n",
  501. urb->actual_length);
  502. return;
  503. }
  504. memcpy(&intdata, urb->transfer_buffer, 4);
  505. le32_to_cpus(&intdata);
  506. netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
  507. if (intdata & INT_ENP_PHY_INT_)
  508. usbnet_defer_kevent(dev, EVENT_LINK_RESET);
  509. else
  510. netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
  511. intdata);
  512. }
  513. /* Enable or disable Tx & Rx checksum offload engines */
  514. static int smsc95xx_set_features(struct net_device *netdev,
  515. netdev_features_t features)
  516. {
  517. struct usbnet *dev = netdev_priv(netdev);
  518. u32 read_buf;
  519. int ret;
  520. ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
  521. if (ret < 0)
  522. return ret;
  523. if (features & NETIF_F_HW_CSUM)
  524. read_buf |= Tx_COE_EN_;
  525. else
  526. read_buf &= ~Tx_COE_EN_;
  527. if (features & NETIF_F_RXCSUM)
  528. read_buf |= Rx_COE_EN_;
  529. else
  530. read_buf &= ~Rx_COE_EN_;
  531. ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
  532. if (ret < 0)
  533. return ret;
  534. netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
  535. return 0;
  536. }
  537. static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
  538. {
  539. return MAX_EEPROM_SIZE;
  540. }
  541. static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
  542. struct ethtool_eeprom *ee, u8 *data)
  543. {
  544. struct usbnet *dev = netdev_priv(netdev);
  545. ee->magic = LAN95XX_EEPROM_MAGIC;
  546. return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
  547. }
  548. static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
  549. struct ethtool_eeprom *ee, u8 *data)
  550. {
  551. struct usbnet *dev = netdev_priv(netdev);
  552. if (ee->magic != LAN95XX_EEPROM_MAGIC) {
  553. netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
  554. ee->magic);
  555. return -EINVAL;
  556. }
  557. return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
  558. }
  559. static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
  560. {
  561. /* all smsc95xx registers */
  562. return COE_CR - ID_REV + sizeof(u32);
  563. }
  564. static void
  565. smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
  566. void *buf)
  567. {
  568. struct usbnet *dev = netdev_priv(netdev);
  569. unsigned int i, j;
  570. int retval;
  571. u32 *data = buf;
  572. retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
  573. if (retval < 0) {
  574. netdev_warn(netdev, "REGS: cannot read ID_REV\n");
  575. return;
  576. }
  577. for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
  578. retval = smsc95xx_read_reg(dev, i, &data[j]);
  579. if (retval < 0) {
  580. netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
  581. return;
  582. }
  583. }
  584. }
  585. static void smsc95xx_ethtool_get_wol(struct net_device *net,
  586. struct ethtool_wolinfo *wolinfo)
  587. {
  588. struct usbnet *dev = netdev_priv(net);
  589. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  590. wolinfo->supported = SUPPORTED_WAKE;
  591. wolinfo->wolopts = pdata->wolopts;
  592. }
  593. static int smsc95xx_ethtool_set_wol(struct net_device *net,
  594. struct ethtool_wolinfo *wolinfo)
  595. {
  596. struct usbnet *dev = netdev_priv(net);
  597. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  598. int ret;
  599. pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
  600. ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
  601. if (ret < 0)
  602. netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
  603. return ret;
  604. }
  605. static const struct ethtool_ops smsc95xx_ethtool_ops = {
  606. .get_link = usbnet_get_link,
  607. .nway_reset = usbnet_nway_reset,
  608. .get_drvinfo = usbnet_get_drvinfo,
  609. .get_msglevel = usbnet_get_msglevel,
  610. .set_msglevel = usbnet_set_msglevel,
  611. .get_settings = usbnet_get_settings,
  612. .set_settings = usbnet_set_settings,
  613. .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
  614. .get_eeprom = smsc95xx_ethtool_get_eeprom,
  615. .set_eeprom = smsc95xx_ethtool_set_eeprom,
  616. .get_regs_len = smsc95xx_ethtool_getregslen,
  617. .get_regs = smsc95xx_ethtool_getregs,
  618. .get_wol = smsc95xx_ethtool_get_wol,
  619. .set_wol = smsc95xx_ethtool_set_wol,
  620. };
  621. static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
  622. {
  623. struct usbnet *dev = netdev_priv(netdev);
  624. if (!netif_running(netdev))
  625. return -EINVAL;
  626. return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
  627. }
  628. static void smsc95xx_init_mac_address(struct usbnet *dev)
  629. {
  630. /* try reading mac address from EEPROM */
  631. if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
  632. dev->net->dev_addr) == 0) {
  633. if (is_valid_ether_addr(dev->net->dev_addr)) {
  634. /* eeprom values are valid so use them */
  635. netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
  636. return;
  637. }
  638. }
  639. /* no eeprom, or eeprom values are invalid. generate random MAC */
  640. eth_hw_addr_random(dev->net);
  641. netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
  642. }
  643. static int smsc95xx_set_mac_address(struct usbnet *dev)
  644. {
  645. u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
  646. dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
  647. u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
  648. int ret;
  649. ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
  650. if (ret < 0)
  651. return ret;
  652. return smsc95xx_write_reg(dev, ADDRH, addr_hi);
  653. }
  654. /* starts the TX path */
  655. static int smsc95xx_start_tx_path(struct usbnet *dev)
  656. {
  657. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  658. unsigned long flags;
  659. int ret;
  660. /* Enable Tx at MAC */
  661. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  662. pdata->mac_cr |= MAC_CR_TXEN_;
  663. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  664. ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
  665. if (ret < 0)
  666. return ret;
  667. /* Enable Tx at SCSRs */
  668. return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
  669. }
  670. /* Starts the Receive path */
  671. static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm)
  672. {
  673. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  674. unsigned long flags;
  675. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  676. pdata->mac_cr |= MAC_CR_RXEN_;
  677. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  678. return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm);
  679. }
  680. static int smsc95xx_phy_initialize(struct usbnet *dev)
  681. {
  682. int bmcr, ret, timeout = 0;
  683. /* Initialize MII structure */
  684. dev->mii.dev = dev->net;
  685. dev->mii.mdio_read = smsc95xx_mdio_read;
  686. dev->mii.mdio_write = smsc95xx_mdio_write;
  687. dev->mii.phy_id_mask = 0x1f;
  688. dev->mii.reg_num_mask = 0x1f;
  689. dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
  690. /* reset phy and wait for reset to complete */
  691. smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
  692. do {
  693. msleep(10);
  694. bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
  695. timeout++;
  696. } while ((bmcr & BMCR_RESET) && (timeout < 100));
  697. if (timeout >= 100) {
  698. netdev_warn(dev->net, "timeout on PHY Reset");
  699. return -EIO;
  700. }
  701. smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
  702. ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
  703. ADVERTISE_PAUSE_ASYM);
  704. /* read to clear */
  705. ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
  706. if (ret < 0) {
  707. netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n");
  708. return ret;
  709. }
  710. smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
  711. PHY_INT_MASK_DEFAULT_);
  712. mii_nway_restart(&dev->mii);
  713. netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
  714. return 0;
  715. }
  716. static int smsc95xx_reset(struct usbnet *dev)
  717. {
  718. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  719. u32 read_buf, write_buf, burst_cap;
  720. int ret = 0, timeout;
  721. netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
  722. ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
  723. if (ret < 0)
  724. return ret;
  725. timeout = 0;
  726. do {
  727. msleep(10);
  728. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  729. if (ret < 0)
  730. return ret;
  731. timeout++;
  732. } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
  733. if (timeout >= 100) {
  734. netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
  735. return ret;
  736. }
  737. ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
  738. if (ret < 0)
  739. return ret;
  740. timeout = 0;
  741. do {
  742. msleep(10);
  743. ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
  744. if (ret < 0)
  745. return ret;
  746. timeout++;
  747. } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
  748. if (timeout >= 100) {
  749. netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
  750. return ret;
  751. }
  752. ret = smsc95xx_set_mac_address(dev);
  753. if (ret < 0)
  754. return ret;
  755. netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
  756. dev->net->dev_addr);
  757. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  758. if (ret < 0)
  759. return ret;
  760. netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
  761. read_buf);
  762. read_buf |= HW_CFG_BIR_;
  763. ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
  764. if (ret < 0)
  765. return ret;
  766. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  767. if (ret < 0)
  768. return ret;
  769. netif_dbg(dev, ifup, dev->net,
  770. "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
  771. read_buf);
  772. if (!turbo_mode) {
  773. burst_cap = 0;
  774. dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
  775. } else if (dev->udev->speed == USB_SPEED_HIGH) {
  776. burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
  777. dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
  778. } else {
  779. burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
  780. dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
  781. }
  782. netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
  783. (ulong)dev->rx_urb_size);
  784. ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
  785. if (ret < 0)
  786. return ret;
  787. ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
  788. if (ret < 0)
  789. return ret;
  790. netif_dbg(dev, ifup, dev->net,
  791. "Read Value from BURST_CAP after writing: 0x%08x\n",
  792. read_buf);
  793. ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
  794. if (ret < 0)
  795. return ret;
  796. ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
  797. if (ret < 0)
  798. return ret;
  799. netif_dbg(dev, ifup, dev->net,
  800. "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
  801. read_buf);
  802. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  803. if (ret < 0)
  804. return ret;
  805. netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n",
  806. read_buf);
  807. if (turbo_mode)
  808. read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
  809. read_buf &= ~HW_CFG_RXDOFF_;
  810. /* set Rx data offset=2, Make IP header aligns on word boundary. */
  811. read_buf |= NET_IP_ALIGN << 9;
  812. ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
  813. if (ret < 0)
  814. return ret;
  815. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  816. if (ret < 0)
  817. return ret;
  818. netif_dbg(dev, ifup, dev->net,
  819. "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
  820. ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
  821. if (ret < 0)
  822. return ret;
  823. ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
  824. if (ret < 0)
  825. return ret;
  826. netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
  827. /* Configure GPIO pins as LED outputs */
  828. write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
  829. LED_GPIO_CFG_FDX_LED;
  830. ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
  831. if (ret < 0)
  832. return ret;
  833. /* Init Tx */
  834. ret = smsc95xx_write_reg(dev, FLOW, 0);
  835. if (ret < 0)
  836. return ret;
  837. ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
  838. if (ret < 0)
  839. return ret;
  840. /* Don't need mac_cr_lock during initialisation */
  841. ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
  842. if (ret < 0)
  843. return ret;
  844. /* Init Rx */
  845. /* Set Vlan */
  846. ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
  847. if (ret < 0)
  848. return ret;
  849. /* Enable or disable checksum offload engines */
  850. ret = smsc95xx_set_features(dev->net, dev->net->features);
  851. if (ret < 0) {
  852. netdev_warn(dev->net, "Failed to set checksum offload features\n");
  853. return ret;
  854. }
  855. smsc95xx_set_multicast(dev->net);
  856. ret = smsc95xx_phy_initialize(dev);
  857. if (ret < 0) {
  858. netdev_warn(dev->net, "Failed to init PHY\n");
  859. return ret;
  860. }
  861. ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
  862. if (ret < 0)
  863. return ret;
  864. /* enable PHY interrupts */
  865. read_buf |= INT_EP_CTL_PHY_INT_;
  866. ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
  867. if (ret < 0)
  868. return ret;
  869. ret = smsc95xx_start_tx_path(dev);
  870. if (ret < 0) {
  871. netdev_warn(dev->net, "Failed to start TX path\n");
  872. return ret;
  873. }
  874. ret = smsc95xx_start_rx_path(dev, 0);
  875. if (ret < 0) {
  876. netdev_warn(dev->net, "Failed to start RX path\n");
  877. return ret;
  878. }
  879. netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
  880. return 0;
  881. }
  882. static const struct net_device_ops smsc95xx_netdev_ops = {
  883. .ndo_open = usbnet_open,
  884. .ndo_stop = usbnet_stop,
  885. .ndo_start_xmit = usbnet_start_xmit,
  886. .ndo_tx_timeout = usbnet_tx_timeout,
  887. .ndo_change_mtu = usbnet_change_mtu,
  888. .ndo_set_mac_address = eth_mac_addr,
  889. .ndo_validate_addr = eth_validate_addr,
  890. .ndo_do_ioctl = smsc95xx_ioctl,
  891. .ndo_set_rx_mode = smsc95xx_set_multicast,
  892. .ndo_set_features = smsc95xx_set_features,
  893. };
  894. static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
  895. {
  896. struct smsc95xx_priv *pdata = NULL;
  897. u32 val;
  898. int ret;
  899. printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
  900. ret = usbnet_get_endpoints(dev, intf);
  901. if (ret < 0) {
  902. netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
  903. return ret;
  904. }
  905. dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
  906. GFP_KERNEL);
  907. pdata = (struct smsc95xx_priv *)(dev->data[0]);
  908. if (!pdata)
  909. return -ENOMEM;
  910. spin_lock_init(&pdata->mac_cr_lock);
  911. if (DEFAULT_TX_CSUM_ENABLE)
  912. dev->net->features |= NETIF_F_HW_CSUM;
  913. if (DEFAULT_RX_CSUM_ENABLE)
  914. dev->net->features |= NETIF_F_RXCSUM;
  915. dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
  916. smsc95xx_init_mac_address(dev);
  917. /* Init all registers */
  918. ret = smsc95xx_reset(dev);
  919. /* detect device revision as different features may be available */
  920. ret = smsc95xx_read_reg(dev, ID_REV, &val);
  921. if (ret < 0)
  922. return ret;
  923. val >>= 16;
  924. if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) ||
  925. (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_))
  926. pdata->features = (FEATURE_8_WAKEUP_FILTERS |
  927. FEATURE_PHY_NLP_CROSSOVER |
  928. FEATURE_REMOTE_WAKEUP);
  929. else if (val == ID_REV_CHIP_ID_9512_)
  930. pdata->features = FEATURE_8_WAKEUP_FILTERS;
  931. dev->net->netdev_ops = &smsc95xx_netdev_ops;
  932. dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
  933. dev->net->flags |= IFF_MULTICAST;
  934. dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
  935. dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
  936. return 0;
  937. }
  938. static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
  939. {
  940. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  941. if (pdata) {
  942. netif_dbg(dev, ifdown, dev->net, "free pdata\n");
  943. kfree(pdata);
  944. pdata = NULL;
  945. dev->data[0] = 0;
  946. }
  947. }
  948. static u32 smsc_crc(const u8 *buffer, size_t len, int filter)
  949. {
  950. u32 crc = bitrev16(crc16(0xFFFF, buffer, len));
  951. return crc << ((filter % 2) * 16);
  952. }
  953. static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
  954. {
  955. struct mii_if_info *mii = &dev->mii;
  956. int ret;
  957. netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
  958. /* read to clear */
  959. ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
  960. if (ret < 0)
  961. return ret;
  962. /* enable interrupt source */
  963. ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
  964. if (ret < 0)
  965. return ret;
  966. ret |= mask;
  967. smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
  968. return 0;
  969. }
  970. static int smsc95xx_link_ok_nopm(struct usbnet *dev)
  971. {
  972. struct mii_if_info *mii = &dev->mii;
  973. int ret;
  974. /* first, a dummy read, needed to latch some MII phys */
  975. ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
  976. if (ret < 0)
  977. return ret;
  978. ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
  979. if (ret < 0)
  980. return ret;
  981. return !!(ret & BMSR_LSTATUS);
  982. }
  983. static int smsc95xx_enter_suspend0(struct usbnet *dev)
  984. {
  985. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  986. u32 val;
  987. int ret;
  988. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  989. if (ret < 0)
  990. return ret;
  991. val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
  992. val |= PM_CTL_SUS_MODE_0;
  993. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  994. if (ret < 0)
  995. return ret;
  996. /* clear wol status */
  997. val &= ~PM_CTL_WUPS_;
  998. val |= PM_CTL_WUPS_WOL_;
  999. /* enable energy detection */
  1000. if (pdata->wolopts & WAKE_PHY)
  1001. val |= PM_CTL_WUPS_ED_;
  1002. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1003. if (ret < 0)
  1004. return ret;
  1005. /* read back PM_CTRL */
  1006. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1007. if (ret < 0)
  1008. return ret;
  1009. pdata->suspend_flags |= SUSPEND_SUSPEND0;
  1010. return 0;
  1011. }
  1012. static int smsc95xx_enter_suspend1(struct usbnet *dev)
  1013. {
  1014. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1015. struct mii_if_info *mii = &dev->mii;
  1016. u32 val;
  1017. int ret;
  1018. /* reconfigure link pulse detection timing for
  1019. * compatibility with non-standard link partners
  1020. */
  1021. if (pdata->features & FEATURE_PHY_NLP_CROSSOVER)
  1022. smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG,
  1023. PHY_EDPD_CONFIG_DEFAULT);
  1024. /* enable energy detect power-down mode */
  1025. ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS);
  1026. if (ret < 0)
  1027. return ret;
  1028. ret |= MODE_CTRL_STS_EDPWRDOWN_;
  1029. smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret);
  1030. /* enter SUSPEND1 mode */
  1031. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1032. if (ret < 0)
  1033. return ret;
  1034. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1035. val |= PM_CTL_SUS_MODE_1;
  1036. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1037. if (ret < 0)
  1038. return ret;
  1039. /* clear wol status, enable energy detection */
  1040. val &= ~PM_CTL_WUPS_;
  1041. val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_);
  1042. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1043. if (ret < 0)
  1044. return ret;
  1045. pdata->suspend_flags |= SUSPEND_SUSPEND1;
  1046. return 0;
  1047. }
  1048. static int smsc95xx_enter_suspend2(struct usbnet *dev)
  1049. {
  1050. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1051. u32 val;
  1052. int ret;
  1053. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1054. if (ret < 0)
  1055. return ret;
  1056. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1057. val |= PM_CTL_SUS_MODE_2;
  1058. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1059. if (ret < 0)
  1060. return ret;
  1061. pdata->suspend_flags |= SUSPEND_SUSPEND2;
  1062. return 0;
  1063. }
  1064. static int smsc95xx_enter_suspend3(struct usbnet *dev)
  1065. {
  1066. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1067. u32 val;
  1068. int ret;
  1069. ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val);
  1070. if (ret < 0)
  1071. return ret;
  1072. if (val & 0xFFFF) {
  1073. netdev_info(dev->net, "rx fifo not empty in autosuspend\n");
  1074. return -EBUSY;
  1075. }
  1076. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1077. if (ret < 0)
  1078. return ret;
  1079. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1080. val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS;
  1081. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1082. if (ret < 0)
  1083. return ret;
  1084. /* clear wol status */
  1085. val &= ~PM_CTL_WUPS_;
  1086. val |= PM_CTL_WUPS_WOL_;
  1087. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1088. if (ret < 0)
  1089. return ret;
  1090. pdata->suspend_flags |= SUSPEND_SUSPEND3;
  1091. return 0;
  1092. }
  1093. static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up)
  1094. {
  1095. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1096. int ret;
  1097. if (!netif_running(dev->net)) {
  1098. /* interface is ifconfig down so fully power down hw */
  1099. netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
  1100. return smsc95xx_enter_suspend2(dev);
  1101. }
  1102. if (!link_up) {
  1103. /* link is down so enter EDPD mode, but only if device can
  1104. * reliably resume from it. This check should be redundant
  1105. * as current FEATURE_REMOTE_WAKEUP parts also support
  1106. * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */
  1107. if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) {
  1108. netdev_warn(dev->net, "EDPD not supported\n");
  1109. return -EBUSY;
  1110. }
  1111. netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
  1112. /* enable PHY wakeup events for if cable is attached */
  1113. ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
  1114. PHY_INT_MASK_ANEG_COMP_);
  1115. if (ret < 0) {
  1116. netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
  1117. return ret;
  1118. }
  1119. netdev_info(dev->net, "entering SUSPEND1 mode\n");
  1120. return smsc95xx_enter_suspend1(dev);
  1121. }
  1122. /* enable PHY wakeup events so we remote wakeup if cable is pulled */
  1123. ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
  1124. PHY_INT_MASK_LINK_DOWN_);
  1125. if (ret < 0) {
  1126. netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
  1127. return ret;
  1128. }
  1129. netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
  1130. return smsc95xx_enter_suspend3(dev);
  1131. }
  1132. static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
  1133. {
  1134. struct usbnet *dev = usb_get_intfdata(intf);
  1135. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1136. u32 val, link_up;
  1137. int ret;
  1138. ret = usbnet_suspend(intf, message);
  1139. if (ret < 0) {
  1140. netdev_warn(dev->net, "usbnet_suspend error\n");
  1141. return ret;
  1142. }
  1143. if (pdata->suspend_flags) {
  1144. netdev_warn(dev->net, "error during last resume\n");
  1145. pdata->suspend_flags = 0;
  1146. }
  1147. /* determine if link is up using only _nopm functions */
  1148. link_up = smsc95xx_link_ok_nopm(dev);
  1149. if (message.event == PM_EVENT_AUTO_SUSPEND &&
  1150. (pdata->features & FEATURE_REMOTE_WAKEUP)) {
  1151. ret = smsc95xx_autosuspend(dev, link_up);
  1152. goto done;
  1153. }
  1154. /* if we get this far we're not autosuspending */
  1155. /* if no wol options set, or if link is down and we're not waking on
  1156. * PHY activity, enter lowest power SUSPEND2 mode
  1157. */
  1158. if (!(pdata->wolopts & SUPPORTED_WAKE) ||
  1159. !(link_up || (pdata->wolopts & WAKE_PHY))) {
  1160. netdev_info(dev->net, "entering SUSPEND2 mode\n");
  1161. /* disable energy detect (link up) & wake up events */
  1162. ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
  1163. if (ret < 0)
  1164. goto done;
  1165. val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
  1166. ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
  1167. if (ret < 0)
  1168. goto done;
  1169. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1170. if (ret < 0)
  1171. goto done;
  1172. val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
  1173. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1174. if (ret < 0)
  1175. goto done;
  1176. ret = smsc95xx_enter_suspend2(dev);
  1177. goto done;
  1178. }
  1179. if (pdata->wolopts & WAKE_PHY) {
  1180. ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
  1181. (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_));
  1182. if (ret < 0) {
  1183. netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
  1184. goto done;
  1185. }
  1186. /* if link is down then configure EDPD and enter SUSPEND1,
  1187. * otherwise enter SUSPEND0 below
  1188. */
  1189. if (!link_up) {
  1190. netdev_info(dev->net, "entering SUSPEND1 mode\n");
  1191. ret = smsc95xx_enter_suspend1(dev);
  1192. goto done;
  1193. }
  1194. }
  1195. if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
  1196. u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL);
  1197. u32 command[2];
  1198. u32 offset[2];
  1199. u32 crc[4];
  1200. int wuff_filter_count =
  1201. (pdata->features & FEATURE_8_WAKEUP_FILTERS) ?
  1202. LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM;
  1203. int i, filter = 0;
  1204. if (!filter_mask) {
  1205. netdev_warn(dev->net, "Unable to allocate filter_mask\n");
  1206. ret = -ENOMEM;
  1207. goto done;
  1208. }
  1209. memset(command, 0, sizeof(command));
  1210. memset(offset, 0, sizeof(offset));
  1211. memset(crc, 0, sizeof(crc));
  1212. if (pdata->wolopts & WAKE_BCAST) {
  1213. const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
  1214. netdev_info(dev->net, "enabling broadcast detection\n");
  1215. filter_mask[filter * 4] = 0x003F;
  1216. filter_mask[filter * 4 + 1] = 0x00;
  1217. filter_mask[filter * 4 + 2] = 0x00;
  1218. filter_mask[filter * 4 + 3] = 0x00;
  1219. command[filter/4] |= 0x05UL << ((filter % 4) * 8);
  1220. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1221. crc[filter/2] |= smsc_crc(bcast, 6, filter);
  1222. filter++;
  1223. }
  1224. if (pdata->wolopts & WAKE_MCAST) {
  1225. const u8 mcast[] = {0x01, 0x00, 0x5E};
  1226. netdev_info(dev->net, "enabling multicast detection\n");
  1227. filter_mask[filter * 4] = 0x0007;
  1228. filter_mask[filter * 4 + 1] = 0x00;
  1229. filter_mask[filter * 4 + 2] = 0x00;
  1230. filter_mask[filter * 4 + 3] = 0x00;
  1231. command[filter/4] |= 0x09UL << ((filter % 4) * 8);
  1232. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1233. crc[filter/2] |= smsc_crc(mcast, 3, filter);
  1234. filter++;
  1235. }
  1236. if (pdata->wolopts & WAKE_ARP) {
  1237. const u8 arp[] = {0x08, 0x06};
  1238. netdev_info(dev->net, "enabling ARP detection\n");
  1239. filter_mask[filter * 4] = 0x0003;
  1240. filter_mask[filter * 4 + 1] = 0x00;
  1241. filter_mask[filter * 4 + 2] = 0x00;
  1242. filter_mask[filter * 4 + 3] = 0x00;
  1243. command[filter/4] |= 0x05UL << ((filter % 4) * 8);
  1244. offset[filter/4] |= 0x0C << ((filter % 4) * 8);
  1245. crc[filter/2] |= smsc_crc(arp, 2, filter);
  1246. filter++;
  1247. }
  1248. if (pdata->wolopts & WAKE_UCAST) {
  1249. netdev_info(dev->net, "enabling unicast detection\n");
  1250. filter_mask[filter * 4] = 0x003F;
  1251. filter_mask[filter * 4 + 1] = 0x00;
  1252. filter_mask[filter * 4 + 2] = 0x00;
  1253. filter_mask[filter * 4 + 3] = 0x00;
  1254. command[filter/4] |= 0x01UL << ((filter % 4) * 8);
  1255. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1256. crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
  1257. filter++;
  1258. }
  1259. for (i = 0; i < (wuff_filter_count * 4); i++) {
  1260. ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]);
  1261. if (ret < 0) {
  1262. kfree(filter_mask);
  1263. goto done;
  1264. }
  1265. }
  1266. kfree(filter_mask);
  1267. for (i = 0; i < (wuff_filter_count / 4); i++) {
  1268. ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]);
  1269. if (ret < 0)
  1270. goto done;
  1271. }
  1272. for (i = 0; i < (wuff_filter_count / 4); i++) {
  1273. ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]);
  1274. if (ret < 0)
  1275. goto done;
  1276. }
  1277. for (i = 0; i < (wuff_filter_count / 2); i++) {
  1278. ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]);
  1279. if (ret < 0)
  1280. goto done;
  1281. }
  1282. /* clear any pending pattern match packet status */
  1283. ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
  1284. if (ret < 0)
  1285. goto done;
  1286. val |= WUCSR_WUFR_;
  1287. ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
  1288. if (ret < 0)
  1289. goto done;
  1290. }
  1291. if (pdata->wolopts & WAKE_MAGIC) {
  1292. /* clear any pending magic packet status */
  1293. ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
  1294. if (ret < 0)
  1295. goto done;
  1296. val |= WUCSR_MPR_;
  1297. ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
  1298. if (ret < 0)
  1299. goto done;
  1300. }
  1301. /* enable/disable wakeup sources */
  1302. ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
  1303. if (ret < 0)
  1304. goto done;
  1305. if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
  1306. netdev_info(dev->net, "enabling pattern match wakeup\n");
  1307. val |= WUCSR_WAKE_EN_;
  1308. } else {
  1309. netdev_info(dev->net, "disabling pattern match wakeup\n");
  1310. val &= ~WUCSR_WAKE_EN_;
  1311. }
  1312. if (pdata->wolopts & WAKE_MAGIC) {
  1313. netdev_info(dev->net, "enabling magic packet wakeup\n");
  1314. val |= WUCSR_MPEN_;
  1315. } else {
  1316. netdev_info(dev->net, "disabling magic packet wakeup\n");
  1317. val &= ~WUCSR_MPEN_;
  1318. }
  1319. ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
  1320. if (ret < 0)
  1321. goto done;
  1322. /* enable wol wakeup source */
  1323. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1324. if (ret < 0)
  1325. goto done;
  1326. val |= PM_CTL_WOL_EN_;
  1327. /* phy energy detect wakeup source */
  1328. if (pdata->wolopts & WAKE_PHY)
  1329. val |= PM_CTL_ED_EN_;
  1330. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1331. if (ret < 0)
  1332. goto done;
  1333. /* enable receiver to enable frame reception */
  1334. smsc95xx_start_rx_path(dev, 1);
  1335. /* some wol options are enabled, so enter SUSPEND0 */
  1336. netdev_info(dev->net, "entering SUSPEND0 mode\n");
  1337. ret = smsc95xx_enter_suspend0(dev);
  1338. done:
  1339. /*
  1340. * TODO: resume() might need to handle the suspend failure
  1341. * in system sleep
  1342. */
  1343. if (ret && PMSG_IS_AUTO(message))
  1344. usbnet_resume(intf);
  1345. return ret;
  1346. }
  1347. static int smsc95xx_resume(struct usb_interface *intf)
  1348. {
  1349. struct usbnet *dev = usb_get_intfdata(intf);
  1350. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1351. u8 suspend_flags = pdata->suspend_flags;
  1352. int ret;
  1353. u32 val;
  1354. BUG_ON(!dev);
  1355. netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
  1356. /* do this first to ensure it's cleared even in error case */
  1357. pdata->suspend_flags = 0;
  1358. if (suspend_flags & SUSPEND_ALLMODES) {
  1359. /* clear wake-up sources */
  1360. ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
  1361. if (ret < 0)
  1362. return ret;
  1363. val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
  1364. ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
  1365. if (ret < 0)
  1366. return ret;
  1367. /* clear wake-up status */
  1368. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1369. if (ret < 0)
  1370. return ret;
  1371. val &= ~PM_CTL_WOL_EN_;
  1372. val |= PM_CTL_WUPS_;
  1373. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1374. if (ret < 0)
  1375. return ret;
  1376. }
  1377. ret = usbnet_resume(intf);
  1378. if (ret < 0)
  1379. netdev_warn(dev->net, "usbnet_resume error\n");
  1380. return ret;
  1381. }
  1382. static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
  1383. {
  1384. skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
  1385. skb->ip_summed = CHECKSUM_COMPLETE;
  1386. skb_trim(skb, skb->len - 2);
  1387. }
  1388. static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
  1389. {
  1390. while (skb->len > 0) {
  1391. u32 header, align_count;
  1392. struct sk_buff *ax_skb;
  1393. unsigned char *packet;
  1394. u16 size;
  1395. memcpy(&header, skb->data, sizeof(header));
  1396. le32_to_cpus(&header);
  1397. skb_pull(skb, 4 + NET_IP_ALIGN);
  1398. packet = skb->data;
  1399. /* get the packet length */
  1400. size = (u16)((header & RX_STS_FL_) >> 16);
  1401. align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
  1402. if (unlikely(header & RX_STS_ES_)) {
  1403. netif_dbg(dev, rx_err, dev->net,
  1404. "Error header=0x%08x\n", header);
  1405. dev->net->stats.rx_errors++;
  1406. dev->net->stats.rx_dropped++;
  1407. if (header & RX_STS_CRC_) {
  1408. dev->net->stats.rx_crc_errors++;
  1409. } else {
  1410. if (header & (RX_STS_TL_ | RX_STS_RF_))
  1411. dev->net->stats.rx_frame_errors++;
  1412. if ((header & RX_STS_LE_) &&
  1413. (!(header & RX_STS_FT_)))
  1414. dev->net->stats.rx_length_errors++;
  1415. }
  1416. } else {
  1417. /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
  1418. if (unlikely(size > (ETH_FRAME_LEN + 12))) {
  1419. netif_dbg(dev, rx_err, dev->net,
  1420. "size err header=0x%08x\n", header);
  1421. return 0;
  1422. }
  1423. /* last frame in this batch */
  1424. if (skb->len == size) {
  1425. if (dev->net->features & NETIF_F_RXCSUM)
  1426. smsc95xx_rx_csum_offload(skb);
  1427. skb_trim(skb, skb->len - 4); /* remove fcs */
  1428. skb->truesize = size + sizeof(struct sk_buff);
  1429. return 1;
  1430. }
  1431. ax_skb = skb_clone(skb, GFP_ATOMIC);
  1432. if (unlikely(!ax_skb)) {
  1433. netdev_warn(dev->net, "Error allocating skb\n");
  1434. return 0;
  1435. }
  1436. ax_skb->len = size;
  1437. ax_skb->data = packet;
  1438. skb_set_tail_pointer(ax_skb, size);
  1439. if (dev->net->features & NETIF_F_RXCSUM)
  1440. smsc95xx_rx_csum_offload(ax_skb);
  1441. skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
  1442. ax_skb->truesize = size + sizeof(struct sk_buff);
  1443. usbnet_skb_return(dev, ax_skb);
  1444. }
  1445. skb_pull(skb, size);
  1446. /* padding bytes before the next frame starts */
  1447. if (skb->len)
  1448. skb_pull(skb, align_count);
  1449. }
  1450. if (unlikely(skb->len < 0)) {
  1451. netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len);
  1452. return 0;
  1453. }
  1454. return 1;
  1455. }
  1456. static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
  1457. {
  1458. u16 low_16 = (u16)skb_checksum_start_offset(skb);
  1459. u16 high_16 = low_16 + skb->csum_offset;
  1460. return (high_16 << 16) | low_16;
  1461. }
  1462. static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
  1463. struct sk_buff *skb, gfp_t flags)
  1464. {
  1465. bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
  1466. int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
  1467. u32 tx_cmd_a, tx_cmd_b;
  1468. /* We do not advertise SG, so skbs should be already linearized */
  1469. BUG_ON(skb_shinfo(skb)->nr_frags);
  1470. if (skb_headroom(skb) < overhead) {
  1471. struct sk_buff *skb2 = skb_copy_expand(skb,
  1472. overhead, 0, flags);
  1473. dev_kfree_skb_any(skb);
  1474. skb = skb2;
  1475. if (!skb)
  1476. return NULL;
  1477. }
  1478. if (csum) {
  1479. if (skb->len <= 45) {
  1480. /* workaround - hardware tx checksum does not work
  1481. * properly with extremely small packets */
  1482. long csstart = skb_checksum_start_offset(skb);
  1483. __wsum calc = csum_partial(skb->data + csstart,
  1484. skb->len - csstart, 0);
  1485. *((__sum16 *)(skb->data + csstart
  1486. + skb->csum_offset)) = csum_fold(calc);
  1487. csum = false;
  1488. } else {
  1489. u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
  1490. skb_push(skb, 4);
  1491. cpu_to_le32s(&csum_preamble);
  1492. memcpy(skb->data, &csum_preamble, 4);
  1493. }
  1494. }
  1495. skb_push(skb, 4);
  1496. tx_cmd_b = (u32)(skb->len - 4);
  1497. if (csum)
  1498. tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
  1499. cpu_to_le32s(&tx_cmd_b);
  1500. memcpy(skb->data, &tx_cmd_b, 4);
  1501. skb_push(skb, 4);
  1502. tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
  1503. TX_CMD_A_LAST_SEG_;
  1504. cpu_to_le32s(&tx_cmd_a);
  1505. memcpy(skb->data, &tx_cmd_a, 4);
  1506. return skb;
  1507. }
  1508. static int smsc95xx_manage_power(struct usbnet *dev, int on)
  1509. {
  1510. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1511. dev->intf->needs_remote_wakeup = on;
  1512. if (pdata->features & FEATURE_REMOTE_WAKEUP)
  1513. return 0;
  1514. /* this chip revision isn't capable of remote wakeup */
  1515. netdev_info(dev->net, "hardware isn't capable of remote wakeup\n");
  1516. if (on)
  1517. usb_autopm_get_interface_no_resume(dev->intf);
  1518. else
  1519. usb_autopm_put_interface(dev->intf);
  1520. return 0;
  1521. }
  1522. static const struct driver_info smsc95xx_info = {
  1523. .description = "smsc95xx USB 2.0 Ethernet",
  1524. .bind = smsc95xx_bind,
  1525. .unbind = smsc95xx_unbind,
  1526. .link_reset = smsc95xx_link_reset,
  1527. .reset = smsc95xx_reset,
  1528. .rx_fixup = smsc95xx_rx_fixup,
  1529. .tx_fixup = smsc95xx_tx_fixup,
  1530. .status = smsc95xx_status,
  1531. .manage_power = smsc95xx_manage_power,
  1532. .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
  1533. };
  1534. static const struct usb_device_id products[] = {
  1535. {
  1536. /* SMSC9500 USB Ethernet Device */
  1537. USB_DEVICE(0x0424, 0x9500),
  1538. .driver_info = (unsigned long) &smsc95xx_info,
  1539. },
  1540. {
  1541. /* SMSC9505 USB Ethernet Device */
  1542. USB_DEVICE(0x0424, 0x9505),
  1543. .driver_info = (unsigned long) &smsc95xx_info,
  1544. },
  1545. {
  1546. /* SMSC9500A USB Ethernet Device */
  1547. USB_DEVICE(0x0424, 0x9E00),
  1548. .driver_info = (unsigned long) &smsc95xx_info,
  1549. },
  1550. {
  1551. /* SMSC9505A USB Ethernet Device */
  1552. USB_DEVICE(0x0424, 0x9E01),
  1553. .driver_info = (unsigned long) &smsc95xx_info,
  1554. },
  1555. {
  1556. /* SMSC9512/9514 USB Hub & Ethernet Device */
  1557. USB_DEVICE(0x0424, 0xec00),
  1558. .driver_info = (unsigned long) &smsc95xx_info,
  1559. },
  1560. {
  1561. /* SMSC9500 USB Ethernet Device (SAL10) */
  1562. USB_DEVICE(0x0424, 0x9900),
  1563. .driver_info = (unsigned long) &smsc95xx_info,
  1564. },
  1565. {
  1566. /* SMSC9505 USB Ethernet Device (SAL10) */
  1567. USB_DEVICE(0x0424, 0x9901),
  1568. .driver_info = (unsigned long) &smsc95xx_info,
  1569. },
  1570. {
  1571. /* SMSC9500A USB Ethernet Device (SAL10) */
  1572. USB_DEVICE(0x0424, 0x9902),
  1573. .driver_info = (unsigned long) &smsc95xx_info,
  1574. },
  1575. {
  1576. /* SMSC9505A USB Ethernet Device (SAL10) */
  1577. USB_DEVICE(0x0424, 0x9903),
  1578. .driver_info = (unsigned long) &smsc95xx_info,
  1579. },
  1580. {
  1581. /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
  1582. USB_DEVICE(0x0424, 0x9904),
  1583. .driver_info = (unsigned long) &smsc95xx_info,
  1584. },
  1585. {
  1586. /* SMSC9500A USB Ethernet Device (HAL) */
  1587. USB_DEVICE(0x0424, 0x9905),
  1588. .driver_info = (unsigned long) &smsc95xx_info,
  1589. },
  1590. {
  1591. /* SMSC9505A USB Ethernet Device (HAL) */
  1592. USB_DEVICE(0x0424, 0x9906),
  1593. .driver_info = (unsigned long) &smsc95xx_info,
  1594. },
  1595. {
  1596. /* SMSC9500 USB Ethernet Device (Alternate ID) */
  1597. USB_DEVICE(0x0424, 0x9907),
  1598. .driver_info = (unsigned long) &smsc95xx_info,
  1599. },
  1600. {
  1601. /* SMSC9500A USB Ethernet Device (Alternate ID) */
  1602. USB_DEVICE(0x0424, 0x9908),
  1603. .driver_info = (unsigned long) &smsc95xx_info,
  1604. },
  1605. {
  1606. /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
  1607. USB_DEVICE(0x0424, 0x9909),
  1608. .driver_info = (unsigned long) &smsc95xx_info,
  1609. },
  1610. {
  1611. /* SMSC LAN9530 USB Ethernet Device */
  1612. USB_DEVICE(0x0424, 0x9530),
  1613. .driver_info = (unsigned long) &smsc95xx_info,
  1614. },
  1615. {
  1616. /* SMSC LAN9730 USB Ethernet Device */
  1617. USB_DEVICE(0x0424, 0x9730),
  1618. .driver_info = (unsigned long) &smsc95xx_info,
  1619. },
  1620. {
  1621. /* SMSC LAN89530 USB Ethernet Device */
  1622. USB_DEVICE(0x0424, 0x9E08),
  1623. .driver_info = (unsigned long) &smsc95xx_info,
  1624. },
  1625. { }, /* END */
  1626. };
  1627. MODULE_DEVICE_TABLE(usb, products);
  1628. static struct usb_driver smsc95xx_driver = {
  1629. .name = "smsc95xx",
  1630. .id_table = products,
  1631. .probe = usbnet_probe,
  1632. .suspend = smsc95xx_suspend,
  1633. .resume = smsc95xx_resume,
  1634. .reset_resume = smsc95xx_resume,
  1635. .disconnect = usbnet_disconnect,
  1636. .disable_hub_initiated_lpm = 1,
  1637. .supports_autosuspend = 1,
  1638. };
  1639. module_usb_driver(smsc95xx_driver);
  1640. MODULE_AUTHOR("Nancy Lin");
  1641. MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
  1642. MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
  1643. MODULE_LICENSE("GPL");