e1000_ethtool.c 52 KB

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  1. /*******************************************************************************
  2. * Intel PRO/1000 Linux driver
  3. * Copyright(c) 1999 - 2006 Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in
  15. * the file called "COPYING".
  16. *
  17. * Contact Information:
  18. * Linux NICS <linux.nics@intel.com>
  19. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  20. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  21. *
  22. ******************************************************************************/
  23. /* ethtool support for e1000 */
  24. #include "e1000.h"
  25. #include <linux/jiffies.h>
  26. #include <linux/uaccess.h>
  27. enum {NETDEV_STATS, E1000_STATS};
  28. struct e1000_stats {
  29. char stat_string[ETH_GSTRING_LEN];
  30. int type;
  31. int sizeof_stat;
  32. int stat_offset;
  33. };
  34. #define E1000_STAT(m) E1000_STATS, \
  35. sizeof(((struct e1000_adapter *)0)->m), \
  36. offsetof(struct e1000_adapter, m)
  37. #define E1000_NETDEV_STAT(m) NETDEV_STATS, \
  38. sizeof(((struct net_device *)0)->m), \
  39. offsetof(struct net_device, m)
  40. static const struct e1000_stats e1000_gstrings_stats[] = {
  41. { "rx_packets", E1000_STAT(stats.gprc) },
  42. { "tx_packets", E1000_STAT(stats.gptc) },
  43. { "rx_bytes", E1000_STAT(stats.gorcl) },
  44. { "tx_bytes", E1000_STAT(stats.gotcl) },
  45. { "rx_broadcast", E1000_STAT(stats.bprc) },
  46. { "tx_broadcast", E1000_STAT(stats.bptc) },
  47. { "rx_multicast", E1000_STAT(stats.mprc) },
  48. { "tx_multicast", E1000_STAT(stats.mptc) },
  49. { "rx_errors", E1000_STAT(stats.rxerrc) },
  50. { "tx_errors", E1000_STAT(stats.txerrc) },
  51. { "tx_dropped", E1000_NETDEV_STAT(stats.tx_dropped) },
  52. { "multicast", E1000_STAT(stats.mprc) },
  53. { "collisions", E1000_STAT(stats.colc) },
  54. { "rx_length_errors", E1000_STAT(stats.rlerrc) },
  55. { "rx_over_errors", E1000_NETDEV_STAT(stats.rx_over_errors) },
  56. { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
  57. { "rx_frame_errors", E1000_NETDEV_STAT(stats.rx_frame_errors) },
  58. { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
  59. { "rx_missed_errors", E1000_STAT(stats.mpc) },
  60. { "tx_aborted_errors", E1000_STAT(stats.ecol) },
  61. { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
  62. { "tx_fifo_errors", E1000_NETDEV_STAT(stats.tx_fifo_errors) },
  63. { "tx_heartbeat_errors", E1000_NETDEV_STAT(stats.tx_heartbeat_errors) },
  64. { "tx_window_errors", E1000_STAT(stats.latecol) },
  65. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  66. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  67. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  68. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  69. { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
  70. { "tx_restart_queue", E1000_STAT(restart_queue) },
  71. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  72. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  73. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  74. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  75. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  76. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  77. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  78. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  79. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  80. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  81. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  82. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
  83. { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
  84. { "tx_smbus", E1000_STAT(stats.mgptc) },
  85. { "rx_smbus", E1000_STAT(stats.mgprc) },
  86. { "dropped_smbus", E1000_STAT(stats.mgpdc) },
  87. };
  88. #define E1000_QUEUE_STATS_LEN 0
  89. #define E1000_GLOBAL_STATS_LEN ARRAY_SIZE(e1000_gstrings_stats)
  90. #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
  91. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  92. "Register test (offline)", "Eeprom test (offline)",
  93. "Interrupt test (offline)", "Loopback test (offline)",
  94. "Link test (on/offline)"
  95. };
  96. #define E1000_TEST_LEN ARRAY_SIZE(e1000_gstrings_test)
  97. static int e1000_get_link_ksettings(struct net_device *netdev,
  98. struct ethtool_link_ksettings *cmd)
  99. {
  100. struct e1000_adapter *adapter = netdev_priv(netdev);
  101. struct e1000_hw *hw = &adapter->hw;
  102. u32 supported, advertising;
  103. if (hw->media_type == e1000_media_type_copper) {
  104. supported = (SUPPORTED_10baseT_Half |
  105. SUPPORTED_10baseT_Full |
  106. SUPPORTED_100baseT_Half |
  107. SUPPORTED_100baseT_Full |
  108. SUPPORTED_1000baseT_Full|
  109. SUPPORTED_Autoneg |
  110. SUPPORTED_TP);
  111. advertising = ADVERTISED_TP;
  112. if (hw->autoneg == 1) {
  113. advertising |= ADVERTISED_Autoneg;
  114. /* the e1000 autoneg seems to match ethtool nicely */
  115. advertising |= hw->autoneg_advertised;
  116. }
  117. cmd->base.port = PORT_TP;
  118. cmd->base.phy_address = hw->phy_addr;
  119. } else {
  120. supported = (SUPPORTED_1000baseT_Full |
  121. SUPPORTED_FIBRE |
  122. SUPPORTED_Autoneg);
  123. advertising = (ADVERTISED_1000baseT_Full |
  124. ADVERTISED_FIBRE |
  125. ADVERTISED_Autoneg);
  126. cmd->base.port = PORT_FIBRE;
  127. }
  128. if (er32(STATUS) & E1000_STATUS_LU) {
  129. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  130. &adapter->link_duplex);
  131. cmd->base.speed = adapter->link_speed;
  132. /* unfortunately FULL_DUPLEX != DUPLEX_FULL
  133. * and HALF_DUPLEX != DUPLEX_HALF
  134. */
  135. if (adapter->link_duplex == FULL_DUPLEX)
  136. cmd->base.duplex = DUPLEX_FULL;
  137. else
  138. cmd->base.duplex = DUPLEX_HALF;
  139. } else {
  140. cmd->base.speed = SPEED_UNKNOWN;
  141. cmd->base.duplex = DUPLEX_UNKNOWN;
  142. }
  143. cmd->base.autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  144. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  145. /* MDI-X => 1; MDI => 0 */
  146. if ((hw->media_type == e1000_media_type_copper) &&
  147. netif_carrier_ok(netdev))
  148. cmd->base.eth_tp_mdix = (!!adapter->phy_info.mdix_mode ?
  149. ETH_TP_MDI_X : ETH_TP_MDI);
  150. else
  151. cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
  152. if (hw->mdix == AUTO_ALL_MODES)
  153. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_AUTO;
  154. else
  155. cmd->base.eth_tp_mdix_ctrl = hw->mdix;
  156. ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
  157. supported);
  158. ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
  159. advertising);
  160. return 0;
  161. }
  162. static int e1000_set_link_ksettings(struct net_device *netdev,
  163. const struct ethtool_link_ksettings *cmd)
  164. {
  165. struct e1000_adapter *adapter = netdev_priv(netdev);
  166. struct e1000_hw *hw = &adapter->hw;
  167. u32 advertising;
  168. ethtool_convert_link_mode_to_legacy_u32(&advertising,
  169. cmd->link_modes.advertising);
  170. /* MDI setting is only allowed when autoneg enabled because
  171. * some hardware doesn't allow MDI setting when speed or
  172. * duplex is forced.
  173. */
  174. if (cmd->base.eth_tp_mdix_ctrl) {
  175. if (hw->media_type != e1000_media_type_copper)
  176. return -EOPNOTSUPP;
  177. if ((cmd->base.eth_tp_mdix_ctrl != ETH_TP_MDI_AUTO) &&
  178. (cmd->base.autoneg != AUTONEG_ENABLE)) {
  179. e_err(drv, "forcing MDI/MDI-X state is not supported when link speed and/or duplex are forced\n");
  180. return -EINVAL;
  181. }
  182. }
  183. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  184. msleep(1);
  185. if (cmd->base.autoneg == AUTONEG_ENABLE) {
  186. hw->autoneg = 1;
  187. if (hw->media_type == e1000_media_type_fiber)
  188. hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
  189. ADVERTISED_FIBRE |
  190. ADVERTISED_Autoneg;
  191. else
  192. hw->autoneg_advertised = advertising |
  193. ADVERTISED_TP |
  194. ADVERTISED_Autoneg;
  195. } else {
  196. u32 speed = cmd->base.speed;
  197. /* calling this overrides forced MDI setting */
  198. if (e1000_set_spd_dplx(adapter, speed, cmd->base.duplex)) {
  199. clear_bit(__E1000_RESETTING, &adapter->flags);
  200. return -EINVAL;
  201. }
  202. }
  203. /* MDI-X => 2; MDI => 1; Auto => 3 */
  204. if (cmd->base.eth_tp_mdix_ctrl) {
  205. if (cmd->base.eth_tp_mdix_ctrl == ETH_TP_MDI_AUTO)
  206. hw->mdix = AUTO_ALL_MODES;
  207. else
  208. hw->mdix = cmd->base.eth_tp_mdix_ctrl;
  209. }
  210. /* reset the link */
  211. if (netif_running(adapter->netdev)) {
  212. e1000_down(adapter);
  213. e1000_up(adapter);
  214. } else {
  215. e1000_reset(adapter);
  216. }
  217. clear_bit(__E1000_RESETTING, &adapter->flags);
  218. return 0;
  219. }
  220. static u32 e1000_get_link(struct net_device *netdev)
  221. {
  222. struct e1000_adapter *adapter = netdev_priv(netdev);
  223. /* If the link is not reported up to netdev, interrupts are disabled,
  224. * and so the physical link state may have changed since we last
  225. * looked. Set get_link_status to make sure that the true link
  226. * state is interrogated, rather than pulling a cached and possibly
  227. * stale link state from the driver.
  228. */
  229. if (!netif_carrier_ok(netdev))
  230. adapter->hw.get_link_status = 1;
  231. return e1000_has_link(adapter);
  232. }
  233. static void e1000_get_pauseparam(struct net_device *netdev,
  234. struct ethtool_pauseparam *pause)
  235. {
  236. struct e1000_adapter *adapter = netdev_priv(netdev);
  237. struct e1000_hw *hw = &adapter->hw;
  238. pause->autoneg =
  239. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  240. if (hw->fc == E1000_FC_RX_PAUSE) {
  241. pause->rx_pause = 1;
  242. } else if (hw->fc == E1000_FC_TX_PAUSE) {
  243. pause->tx_pause = 1;
  244. } else if (hw->fc == E1000_FC_FULL) {
  245. pause->rx_pause = 1;
  246. pause->tx_pause = 1;
  247. }
  248. }
  249. static int e1000_set_pauseparam(struct net_device *netdev,
  250. struct ethtool_pauseparam *pause)
  251. {
  252. struct e1000_adapter *adapter = netdev_priv(netdev);
  253. struct e1000_hw *hw = &adapter->hw;
  254. int retval = 0;
  255. adapter->fc_autoneg = pause->autoneg;
  256. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  257. msleep(1);
  258. if (pause->rx_pause && pause->tx_pause)
  259. hw->fc = E1000_FC_FULL;
  260. else if (pause->rx_pause && !pause->tx_pause)
  261. hw->fc = E1000_FC_RX_PAUSE;
  262. else if (!pause->rx_pause && pause->tx_pause)
  263. hw->fc = E1000_FC_TX_PAUSE;
  264. else if (!pause->rx_pause && !pause->tx_pause)
  265. hw->fc = E1000_FC_NONE;
  266. hw->original_fc = hw->fc;
  267. if (adapter->fc_autoneg == AUTONEG_ENABLE) {
  268. if (netif_running(adapter->netdev)) {
  269. e1000_down(adapter);
  270. e1000_up(adapter);
  271. } else {
  272. e1000_reset(adapter);
  273. }
  274. } else
  275. retval = ((hw->media_type == e1000_media_type_fiber) ?
  276. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  277. clear_bit(__E1000_RESETTING, &adapter->flags);
  278. return retval;
  279. }
  280. static u32 e1000_get_msglevel(struct net_device *netdev)
  281. {
  282. struct e1000_adapter *adapter = netdev_priv(netdev);
  283. return adapter->msg_enable;
  284. }
  285. static void e1000_set_msglevel(struct net_device *netdev, u32 data)
  286. {
  287. struct e1000_adapter *adapter = netdev_priv(netdev);
  288. adapter->msg_enable = data;
  289. }
  290. static int e1000_get_regs_len(struct net_device *netdev)
  291. {
  292. #define E1000_REGS_LEN 32
  293. return E1000_REGS_LEN * sizeof(u32);
  294. }
  295. static void e1000_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
  296. void *p)
  297. {
  298. struct e1000_adapter *adapter = netdev_priv(netdev);
  299. struct e1000_hw *hw = &adapter->hw;
  300. u32 *regs_buff = p;
  301. u16 phy_data;
  302. memset(p, 0, E1000_REGS_LEN * sizeof(u32));
  303. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  304. regs_buff[0] = er32(CTRL);
  305. regs_buff[1] = er32(STATUS);
  306. regs_buff[2] = er32(RCTL);
  307. regs_buff[3] = er32(RDLEN);
  308. regs_buff[4] = er32(RDH);
  309. regs_buff[5] = er32(RDT);
  310. regs_buff[6] = er32(RDTR);
  311. regs_buff[7] = er32(TCTL);
  312. regs_buff[8] = er32(TDLEN);
  313. regs_buff[9] = er32(TDH);
  314. regs_buff[10] = er32(TDT);
  315. regs_buff[11] = er32(TIDV);
  316. regs_buff[12] = hw->phy_type; /* PHY type (IGP=1, M88=0) */
  317. if (hw->phy_type == e1000_phy_igp) {
  318. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  319. IGP01E1000_PHY_AGC_A);
  320. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  321. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  322. regs_buff[13] = (u32)phy_data; /* cable length */
  323. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  324. IGP01E1000_PHY_AGC_B);
  325. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  326. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  327. regs_buff[14] = (u32)phy_data; /* cable length */
  328. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  329. IGP01E1000_PHY_AGC_C);
  330. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  331. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  332. regs_buff[15] = (u32)phy_data; /* cable length */
  333. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  334. IGP01E1000_PHY_AGC_D);
  335. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  336. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  337. regs_buff[16] = (u32)phy_data; /* cable length */
  338. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  339. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  340. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  341. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  342. regs_buff[18] = (u32)phy_data; /* cable polarity */
  343. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  344. IGP01E1000_PHY_PCS_INIT_REG);
  345. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  346. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  347. regs_buff[19] = (u32)phy_data; /* cable polarity */
  348. regs_buff[20] = 0; /* polarity correction enabled (always) */
  349. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  350. regs_buff[23] = regs_buff[18]; /* mdix mode */
  351. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  352. } else {
  353. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  354. regs_buff[13] = (u32)phy_data; /* cable length */
  355. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  356. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  357. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  358. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  359. regs_buff[17] = (u32)phy_data; /* extended 10bt distance */
  360. regs_buff[18] = regs_buff[13]; /* cable polarity */
  361. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  362. regs_buff[20] = regs_buff[17]; /* polarity correction */
  363. /* phy receive errors */
  364. regs_buff[22] = adapter->phy_stats.receive_errors;
  365. regs_buff[23] = regs_buff[13]; /* mdix mode */
  366. }
  367. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  368. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  369. regs_buff[24] = (u32)phy_data; /* phy local receiver status */
  370. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  371. if (hw->mac_type >= e1000_82540 &&
  372. hw->media_type == e1000_media_type_copper) {
  373. regs_buff[26] = er32(MANC);
  374. }
  375. }
  376. static int e1000_get_eeprom_len(struct net_device *netdev)
  377. {
  378. struct e1000_adapter *adapter = netdev_priv(netdev);
  379. struct e1000_hw *hw = &adapter->hw;
  380. return hw->eeprom.word_size * 2;
  381. }
  382. static int e1000_get_eeprom(struct net_device *netdev,
  383. struct ethtool_eeprom *eeprom, u8 *bytes)
  384. {
  385. struct e1000_adapter *adapter = netdev_priv(netdev);
  386. struct e1000_hw *hw = &adapter->hw;
  387. u16 *eeprom_buff;
  388. int first_word, last_word;
  389. int ret_val = 0;
  390. u16 i;
  391. if (eeprom->len == 0)
  392. return -EINVAL;
  393. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  394. first_word = eeprom->offset >> 1;
  395. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  396. eeprom_buff = kmalloc(sizeof(u16) *
  397. (last_word - first_word + 1), GFP_KERNEL);
  398. if (!eeprom_buff)
  399. return -ENOMEM;
  400. if (hw->eeprom.type == e1000_eeprom_spi)
  401. ret_val = e1000_read_eeprom(hw, first_word,
  402. last_word - first_word + 1,
  403. eeprom_buff);
  404. else {
  405. for (i = 0; i < last_word - first_word + 1; i++) {
  406. ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  407. &eeprom_buff[i]);
  408. if (ret_val)
  409. break;
  410. }
  411. }
  412. /* Device's eeprom is always little-endian, word addressable */
  413. for (i = 0; i < last_word - first_word + 1; i++)
  414. le16_to_cpus(&eeprom_buff[i]);
  415. memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1),
  416. eeprom->len);
  417. kfree(eeprom_buff);
  418. return ret_val;
  419. }
  420. static int e1000_set_eeprom(struct net_device *netdev,
  421. struct ethtool_eeprom *eeprom, u8 *bytes)
  422. {
  423. struct e1000_adapter *adapter = netdev_priv(netdev);
  424. struct e1000_hw *hw = &adapter->hw;
  425. u16 *eeprom_buff;
  426. void *ptr;
  427. int max_len, first_word, last_word, ret_val = 0;
  428. u16 i;
  429. if (eeprom->len == 0)
  430. return -EOPNOTSUPP;
  431. if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  432. return -EFAULT;
  433. max_len = hw->eeprom.word_size * 2;
  434. first_word = eeprom->offset >> 1;
  435. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  436. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  437. if (!eeprom_buff)
  438. return -ENOMEM;
  439. ptr = (void *)eeprom_buff;
  440. if (eeprom->offset & 1) {
  441. /* need read/modify/write of first changed EEPROM word
  442. * only the second byte of the word is being modified
  443. */
  444. ret_val = e1000_read_eeprom(hw, first_word, 1,
  445. &eeprom_buff[0]);
  446. ptr++;
  447. }
  448. if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  449. /* need read/modify/write of last changed EEPROM word
  450. * only the first byte of the word is being modified
  451. */
  452. ret_val = e1000_read_eeprom(hw, last_word, 1,
  453. &eeprom_buff[last_word - first_word]);
  454. }
  455. /* Device's eeprom is always little-endian, word addressable */
  456. for (i = 0; i < last_word - first_word + 1; i++)
  457. le16_to_cpus(&eeprom_buff[i]);
  458. memcpy(ptr, bytes, eeprom->len);
  459. for (i = 0; i < last_word - first_word + 1; i++)
  460. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  461. ret_val = e1000_write_eeprom(hw, first_word,
  462. last_word - first_word + 1, eeprom_buff);
  463. /* Update the checksum over the first part of the EEPROM if needed */
  464. if ((ret_val == 0) && (first_word <= EEPROM_CHECKSUM_REG))
  465. e1000_update_eeprom_checksum(hw);
  466. kfree(eeprom_buff);
  467. return ret_val;
  468. }
  469. static void e1000_get_drvinfo(struct net_device *netdev,
  470. struct ethtool_drvinfo *drvinfo)
  471. {
  472. struct e1000_adapter *adapter = netdev_priv(netdev);
  473. strlcpy(drvinfo->driver, e1000_driver_name,
  474. sizeof(drvinfo->driver));
  475. strlcpy(drvinfo->version, e1000_driver_version,
  476. sizeof(drvinfo->version));
  477. strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
  478. sizeof(drvinfo->bus_info));
  479. }
  480. static void e1000_get_ringparam(struct net_device *netdev,
  481. struct ethtool_ringparam *ring)
  482. {
  483. struct e1000_adapter *adapter = netdev_priv(netdev);
  484. struct e1000_hw *hw = &adapter->hw;
  485. e1000_mac_type mac_type = hw->mac_type;
  486. struct e1000_tx_ring *txdr = adapter->tx_ring;
  487. struct e1000_rx_ring *rxdr = adapter->rx_ring;
  488. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  489. E1000_MAX_82544_RXD;
  490. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  491. E1000_MAX_82544_TXD;
  492. ring->rx_pending = rxdr->count;
  493. ring->tx_pending = txdr->count;
  494. }
  495. static int e1000_set_ringparam(struct net_device *netdev,
  496. struct ethtool_ringparam *ring)
  497. {
  498. struct e1000_adapter *adapter = netdev_priv(netdev);
  499. struct e1000_hw *hw = &adapter->hw;
  500. e1000_mac_type mac_type = hw->mac_type;
  501. struct e1000_tx_ring *txdr, *tx_old;
  502. struct e1000_rx_ring *rxdr, *rx_old;
  503. int i, err;
  504. if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  505. return -EINVAL;
  506. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  507. msleep(1);
  508. if (netif_running(adapter->netdev))
  509. e1000_down(adapter);
  510. tx_old = adapter->tx_ring;
  511. rx_old = adapter->rx_ring;
  512. err = -ENOMEM;
  513. txdr = kcalloc(adapter->num_tx_queues, sizeof(struct e1000_tx_ring),
  514. GFP_KERNEL);
  515. if (!txdr)
  516. goto err_alloc_tx;
  517. rxdr = kcalloc(adapter->num_rx_queues, sizeof(struct e1000_rx_ring),
  518. GFP_KERNEL);
  519. if (!rxdr)
  520. goto err_alloc_rx;
  521. adapter->tx_ring = txdr;
  522. adapter->rx_ring = rxdr;
  523. rxdr->count = max(ring->rx_pending, (u32)E1000_MIN_RXD);
  524. rxdr->count = min(rxdr->count, (u32)(mac_type < e1000_82544 ?
  525. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  526. rxdr->count = ALIGN(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  527. txdr->count = max(ring->tx_pending, (u32)E1000_MIN_TXD);
  528. txdr->count = min(txdr->count, (u32)(mac_type < e1000_82544 ?
  529. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  530. txdr->count = ALIGN(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  531. for (i = 0; i < adapter->num_tx_queues; i++)
  532. txdr[i].count = txdr->count;
  533. for (i = 0; i < adapter->num_rx_queues; i++)
  534. rxdr[i].count = rxdr->count;
  535. if (netif_running(adapter->netdev)) {
  536. /* Try to get new resources before deleting old */
  537. err = e1000_setup_all_rx_resources(adapter);
  538. if (err)
  539. goto err_setup_rx;
  540. err = e1000_setup_all_tx_resources(adapter);
  541. if (err)
  542. goto err_setup_tx;
  543. /* save the new, restore the old in order to free it,
  544. * then restore the new back again
  545. */
  546. adapter->rx_ring = rx_old;
  547. adapter->tx_ring = tx_old;
  548. e1000_free_all_rx_resources(adapter);
  549. e1000_free_all_tx_resources(adapter);
  550. kfree(tx_old);
  551. kfree(rx_old);
  552. adapter->rx_ring = rxdr;
  553. adapter->tx_ring = txdr;
  554. err = e1000_up(adapter);
  555. if (err)
  556. goto err_setup;
  557. }
  558. clear_bit(__E1000_RESETTING, &adapter->flags);
  559. return 0;
  560. err_setup_tx:
  561. e1000_free_all_rx_resources(adapter);
  562. err_setup_rx:
  563. adapter->rx_ring = rx_old;
  564. adapter->tx_ring = tx_old;
  565. kfree(rxdr);
  566. err_alloc_rx:
  567. kfree(txdr);
  568. err_alloc_tx:
  569. e1000_up(adapter);
  570. err_setup:
  571. clear_bit(__E1000_RESETTING, &adapter->flags);
  572. return err;
  573. }
  574. static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data, int reg,
  575. u32 mask, u32 write)
  576. {
  577. struct e1000_hw *hw = &adapter->hw;
  578. static const u32 test[] = {
  579. 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF
  580. };
  581. u8 __iomem *address = hw->hw_addr + reg;
  582. u32 read;
  583. int i;
  584. for (i = 0; i < ARRAY_SIZE(test); i++) {
  585. writel(write & test[i], address);
  586. read = readl(address);
  587. if (read != (write & test[i] & mask)) {
  588. e_err(drv, "pattern test reg %04X failed: "
  589. "got 0x%08X expected 0x%08X\n",
  590. reg, read, (write & test[i] & mask));
  591. *data = reg;
  592. return true;
  593. }
  594. }
  595. return false;
  596. }
  597. static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data, int reg,
  598. u32 mask, u32 write)
  599. {
  600. struct e1000_hw *hw = &adapter->hw;
  601. u8 __iomem *address = hw->hw_addr + reg;
  602. u32 read;
  603. writel(write & mask, address);
  604. read = readl(address);
  605. if ((read & mask) != (write & mask)) {
  606. e_err(drv, "set/check reg %04X test failed: "
  607. "got 0x%08X expected 0x%08X\n",
  608. reg, (read & mask), (write & mask));
  609. *data = reg;
  610. return true;
  611. }
  612. return false;
  613. }
  614. #define REG_PATTERN_TEST(reg, mask, write) \
  615. do { \
  616. if (reg_pattern_test(adapter, data, \
  617. (hw->mac_type >= e1000_82543) \
  618. ? E1000_##reg : E1000_82542_##reg, \
  619. mask, write)) \
  620. return 1; \
  621. } while (0)
  622. #define REG_SET_AND_CHECK(reg, mask, write) \
  623. do { \
  624. if (reg_set_and_check(adapter, data, \
  625. (hw->mac_type >= e1000_82543) \
  626. ? E1000_##reg : E1000_82542_##reg, \
  627. mask, write)) \
  628. return 1; \
  629. } while (0)
  630. static int e1000_reg_test(struct e1000_adapter *adapter, u64 *data)
  631. {
  632. u32 value, before, after;
  633. u32 i, toggle;
  634. struct e1000_hw *hw = &adapter->hw;
  635. /* The status register is Read Only, so a write should fail.
  636. * Some bits that get toggled are ignored.
  637. */
  638. /* there are several bits on newer hardware that are r/w */
  639. toggle = 0xFFFFF833;
  640. before = er32(STATUS);
  641. value = (er32(STATUS) & toggle);
  642. ew32(STATUS, toggle);
  643. after = er32(STATUS) & toggle;
  644. if (value != after) {
  645. e_err(drv, "failed STATUS register test got: "
  646. "0x%08X expected: 0x%08X\n", after, value);
  647. *data = 1;
  648. return 1;
  649. }
  650. /* restore previous status */
  651. ew32(STATUS, before);
  652. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  653. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  654. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  655. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  656. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  657. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  658. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  659. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  660. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  661. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  662. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  663. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  664. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  665. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  666. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  667. before = 0x06DFB3FE;
  668. REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
  669. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  670. if (hw->mac_type >= e1000_82543) {
  671. REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
  672. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  673. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  674. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  675. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  676. value = E1000_RAR_ENTRIES;
  677. for (i = 0; i < value; i++) {
  678. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2),
  679. 0x8003FFFF, 0xFFFFFFFF);
  680. }
  681. } else {
  682. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  683. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  684. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  685. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  686. }
  687. value = E1000_MC_TBL_SIZE;
  688. for (i = 0; i < value; i++)
  689. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  690. *data = 0;
  691. return 0;
  692. }
  693. static int e1000_eeprom_test(struct e1000_adapter *adapter, u64 *data)
  694. {
  695. struct e1000_hw *hw = &adapter->hw;
  696. u16 temp;
  697. u16 checksum = 0;
  698. u16 i;
  699. *data = 0;
  700. /* Read and add up the contents of the EEPROM */
  701. for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  702. if ((e1000_read_eeprom(hw, i, 1, &temp)) < 0) {
  703. *data = 1;
  704. break;
  705. }
  706. checksum += temp;
  707. }
  708. /* If Checksum is not Correct return error else test passed */
  709. if ((checksum != (u16)EEPROM_SUM) && !(*data))
  710. *data = 2;
  711. return *data;
  712. }
  713. static irqreturn_t e1000_test_intr(int irq, void *data)
  714. {
  715. struct net_device *netdev = (struct net_device *)data;
  716. struct e1000_adapter *adapter = netdev_priv(netdev);
  717. struct e1000_hw *hw = &adapter->hw;
  718. adapter->test_icr |= er32(ICR);
  719. return IRQ_HANDLED;
  720. }
  721. static int e1000_intr_test(struct e1000_adapter *adapter, u64 *data)
  722. {
  723. struct net_device *netdev = adapter->netdev;
  724. u32 mask, i = 0;
  725. bool shared_int = true;
  726. u32 irq = adapter->pdev->irq;
  727. struct e1000_hw *hw = &adapter->hw;
  728. *data = 0;
  729. /* NOTE: we don't test MSI interrupts here, yet
  730. * Hook up test interrupt handler just for this test
  731. */
  732. if (!request_irq(irq, e1000_test_intr, IRQF_PROBE_SHARED, netdev->name,
  733. netdev))
  734. shared_int = false;
  735. else if (request_irq(irq, e1000_test_intr, IRQF_SHARED,
  736. netdev->name, netdev)) {
  737. *data = 1;
  738. return -1;
  739. }
  740. e_info(hw, "testing %s interrupt\n", (shared_int ?
  741. "shared" : "unshared"));
  742. /* Disable all the interrupts */
  743. ew32(IMC, 0xFFFFFFFF);
  744. E1000_WRITE_FLUSH();
  745. msleep(10);
  746. /* Test each interrupt */
  747. for (; i < 10; i++) {
  748. /* Interrupt to test */
  749. mask = 1 << i;
  750. if (!shared_int) {
  751. /* Disable the interrupt to be reported in
  752. * the cause register and then force the same
  753. * interrupt and see if one gets posted. If
  754. * an interrupt was posted to the bus, the
  755. * test failed.
  756. */
  757. adapter->test_icr = 0;
  758. ew32(IMC, mask);
  759. ew32(ICS, mask);
  760. E1000_WRITE_FLUSH();
  761. msleep(10);
  762. if (adapter->test_icr & mask) {
  763. *data = 3;
  764. break;
  765. }
  766. }
  767. /* Enable the interrupt to be reported in
  768. * the cause register and then force the same
  769. * interrupt and see if one gets posted. If
  770. * an interrupt was not posted to the bus, the
  771. * test failed.
  772. */
  773. adapter->test_icr = 0;
  774. ew32(IMS, mask);
  775. ew32(ICS, mask);
  776. E1000_WRITE_FLUSH();
  777. msleep(10);
  778. if (!(adapter->test_icr & mask)) {
  779. *data = 4;
  780. break;
  781. }
  782. if (!shared_int) {
  783. /* Disable the other interrupts to be reported in
  784. * the cause register and then force the other
  785. * interrupts and see if any get posted. If
  786. * an interrupt was posted to the bus, the
  787. * test failed.
  788. */
  789. adapter->test_icr = 0;
  790. ew32(IMC, ~mask & 0x00007FFF);
  791. ew32(ICS, ~mask & 0x00007FFF);
  792. E1000_WRITE_FLUSH();
  793. msleep(10);
  794. if (adapter->test_icr) {
  795. *data = 5;
  796. break;
  797. }
  798. }
  799. }
  800. /* Disable all the interrupts */
  801. ew32(IMC, 0xFFFFFFFF);
  802. E1000_WRITE_FLUSH();
  803. msleep(10);
  804. /* Unhook test interrupt handler */
  805. free_irq(irq, netdev);
  806. return *data;
  807. }
  808. static void e1000_free_desc_rings(struct e1000_adapter *adapter)
  809. {
  810. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  811. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  812. struct pci_dev *pdev = adapter->pdev;
  813. int i;
  814. if (txdr->desc && txdr->buffer_info) {
  815. for (i = 0; i < txdr->count; i++) {
  816. if (txdr->buffer_info[i].dma)
  817. dma_unmap_single(&pdev->dev,
  818. txdr->buffer_info[i].dma,
  819. txdr->buffer_info[i].length,
  820. DMA_TO_DEVICE);
  821. if (txdr->buffer_info[i].skb)
  822. dev_kfree_skb(txdr->buffer_info[i].skb);
  823. }
  824. }
  825. if (rxdr->desc && rxdr->buffer_info) {
  826. for (i = 0; i < rxdr->count; i++) {
  827. if (rxdr->buffer_info[i].dma)
  828. dma_unmap_single(&pdev->dev,
  829. rxdr->buffer_info[i].dma,
  830. E1000_RXBUFFER_2048,
  831. DMA_FROM_DEVICE);
  832. kfree(rxdr->buffer_info[i].rxbuf.data);
  833. }
  834. }
  835. if (txdr->desc) {
  836. dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
  837. txdr->dma);
  838. txdr->desc = NULL;
  839. }
  840. if (rxdr->desc) {
  841. dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
  842. rxdr->dma);
  843. rxdr->desc = NULL;
  844. }
  845. kfree(txdr->buffer_info);
  846. txdr->buffer_info = NULL;
  847. kfree(rxdr->buffer_info);
  848. rxdr->buffer_info = NULL;
  849. }
  850. static int e1000_setup_desc_rings(struct e1000_adapter *adapter)
  851. {
  852. struct e1000_hw *hw = &adapter->hw;
  853. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  854. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  855. struct pci_dev *pdev = adapter->pdev;
  856. u32 rctl;
  857. int i, ret_val;
  858. /* Setup Tx descriptor ring and Tx buffers */
  859. if (!txdr->count)
  860. txdr->count = E1000_DEFAULT_TXD;
  861. txdr->buffer_info = kcalloc(txdr->count, sizeof(struct e1000_tx_buffer),
  862. GFP_KERNEL);
  863. if (!txdr->buffer_info) {
  864. ret_val = 1;
  865. goto err_nomem;
  866. }
  867. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  868. txdr->size = ALIGN(txdr->size, 4096);
  869. txdr->desc = dma_zalloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
  870. GFP_KERNEL);
  871. if (!txdr->desc) {
  872. ret_val = 2;
  873. goto err_nomem;
  874. }
  875. txdr->next_to_use = txdr->next_to_clean = 0;
  876. ew32(TDBAL, ((u64)txdr->dma & 0x00000000FFFFFFFF));
  877. ew32(TDBAH, ((u64)txdr->dma >> 32));
  878. ew32(TDLEN, txdr->count * sizeof(struct e1000_tx_desc));
  879. ew32(TDH, 0);
  880. ew32(TDT, 0);
  881. ew32(TCTL, E1000_TCTL_PSP | E1000_TCTL_EN |
  882. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  883. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  884. for (i = 0; i < txdr->count; i++) {
  885. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  886. struct sk_buff *skb;
  887. unsigned int size = 1024;
  888. skb = alloc_skb(size, GFP_KERNEL);
  889. if (!skb) {
  890. ret_val = 3;
  891. goto err_nomem;
  892. }
  893. skb_put(skb, size);
  894. txdr->buffer_info[i].skb = skb;
  895. txdr->buffer_info[i].length = skb->len;
  896. txdr->buffer_info[i].dma =
  897. dma_map_single(&pdev->dev, skb->data, skb->len,
  898. DMA_TO_DEVICE);
  899. if (dma_mapping_error(&pdev->dev, txdr->buffer_info[i].dma)) {
  900. ret_val = 4;
  901. goto err_nomem;
  902. }
  903. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  904. tx_desc->lower.data = cpu_to_le32(skb->len);
  905. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  906. E1000_TXD_CMD_IFCS |
  907. E1000_TXD_CMD_RPS);
  908. tx_desc->upper.data = 0;
  909. }
  910. /* Setup Rx descriptor ring and Rx buffers */
  911. if (!rxdr->count)
  912. rxdr->count = E1000_DEFAULT_RXD;
  913. rxdr->buffer_info = kcalloc(rxdr->count, sizeof(struct e1000_rx_buffer),
  914. GFP_KERNEL);
  915. if (!rxdr->buffer_info) {
  916. ret_val = 5;
  917. goto err_nomem;
  918. }
  919. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  920. rxdr->desc = dma_zalloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
  921. GFP_KERNEL);
  922. if (!rxdr->desc) {
  923. ret_val = 6;
  924. goto err_nomem;
  925. }
  926. rxdr->next_to_use = rxdr->next_to_clean = 0;
  927. rctl = er32(RCTL);
  928. ew32(RCTL, rctl & ~E1000_RCTL_EN);
  929. ew32(RDBAL, ((u64)rxdr->dma & 0xFFFFFFFF));
  930. ew32(RDBAH, ((u64)rxdr->dma >> 32));
  931. ew32(RDLEN, rxdr->size);
  932. ew32(RDH, 0);
  933. ew32(RDT, 0);
  934. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  935. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  936. (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
  937. ew32(RCTL, rctl);
  938. for (i = 0; i < rxdr->count; i++) {
  939. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  940. u8 *buf;
  941. buf = kzalloc(E1000_RXBUFFER_2048 + NET_SKB_PAD + NET_IP_ALIGN,
  942. GFP_KERNEL);
  943. if (!buf) {
  944. ret_val = 7;
  945. goto err_nomem;
  946. }
  947. rxdr->buffer_info[i].rxbuf.data = buf;
  948. rxdr->buffer_info[i].dma =
  949. dma_map_single(&pdev->dev,
  950. buf + NET_SKB_PAD + NET_IP_ALIGN,
  951. E1000_RXBUFFER_2048, DMA_FROM_DEVICE);
  952. if (dma_mapping_error(&pdev->dev, rxdr->buffer_info[i].dma)) {
  953. ret_val = 8;
  954. goto err_nomem;
  955. }
  956. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  957. }
  958. return 0;
  959. err_nomem:
  960. e1000_free_desc_rings(adapter);
  961. return ret_val;
  962. }
  963. static void e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  964. {
  965. struct e1000_hw *hw = &adapter->hw;
  966. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  967. e1000_write_phy_reg(hw, 29, 0x001F);
  968. e1000_write_phy_reg(hw, 30, 0x8FFC);
  969. e1000_write_phy_reg(hw, 29, 0x001A);
  970. e1000_write_phy_reg(hw, 30, 0x8FF0);
  971. }
  972. static void e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  973. {
  974. struct e1000_hw *hw = &adapter->hw;
  975. u16 phy_reg;
  976. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  977. * Extended PHY Specific Control Register to 25MHz clock. This
  978. * value defaults back to a 2.5MHz clock when the PHY is reset.
  979. */
  980. e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  981. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  982. e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  983. /* In addition, because of the s/w reset above, we need to enable
  984. * CRS on TX. This must be set for both full and half duplex
  985. * operation.
  986. */
  987. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  988. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  989. e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  990. }
  991. static int e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  992. {
  993. struct e1000_hw *hw = &adapter->hw;
  994. u32 ctrl_reg;
  995. u16 phy_reg;
  996. /* Setup the Device Control Register for PHY loopback test. */
  997. ctrl_reg = er32(CTRL);
  998. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  999. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1000. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1001. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  1002. E1000_CTRL_FD); /* Force Duplex to FULL */
  1003. ew32(CTRL, ctrl_reg);
  1004. /* Read the PHY Specific Control Register (0x10) */
  1005. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  1006. /* Clear Auto-Crossover bits in PHY Specific Control Register
  1007. * (bits 6:5).
  1008. */
  1009. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  1010. e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  1011. /* Perform software reset on the PHY */
  1012. e1000_phy_reset(hw);
  1013. /* Have to setup TX_CLK and TX_CRS after software reset */
  1014. e1000_phy_reset_clk_and_crs(adapter);
  1015. e1000_write_phy_reg(hw, PHY_CTRL, 0x8100);
  1016. /* Wait for reset to complete. */
  1017. udelay(500);
  1018. /* Have to setup TX_CLK and TX_CRS after software reset */
  1019. e1000_phy_reset_clk_and_crs(adapter);
  1020. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  1021. e1000_phy_disable_receiver(adapter);
  1022. /* Set the loopback bit in the PHY control register. */
  1023. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1024. phy_reg |= MII_CR_LOOPBACK;
  1025. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1026. /* Setup TX_CLK and TX_CRS one more time. */
  1027. e1000_phy_reset_clk_and_crs(adapter);
  1028. /* Check Phy Configuration */
  1029. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1030. if (phy_reg != 0x4100)
  1031. return 9;
  1032. e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  1033. if (phy_reg != 0x0070)
  1034. return 10;
  1035. e1000_read_phy_reg(hw, 29, &phy_reg);
  1036. if (phy_reg != 0x001A)
  1037. return 11;
  1038. return 0;
  1039. }
  1040. static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  1041. {
  1042. struct e1000_hw *hw = &adapter->hw;
  1043. u32 ctrl_reg = 0;
  1044. u32 stat_reg = 0;
  1045. hw->autoneg = false;
  1046. if (hw->phy_type == e1000_phy_m88) {
  1047. /* Auto-MDI/MDIX Off */
  1048. e1000_write_phy_reg(hw,
  1049. M88E1000_PHY_SPEC_CTRL, 0x0808);
  1050. /* reset to update Auto-MDI/MDIX */
  1051. e1000_write_phy_reg(hw, PHY_CTRL, 0x9140);
  1052. /* autoneg off */
  1053. e1000_write_phy_reg(hw, PHY_CTRL, 0x8140);
  1054. }
  1055. ctrl_reg = er32(CTRL);
  1056. /* force 1000, set loopback */
  1057. e1000_write_phy_reg(hw, PHY_CTRL, 0x4140);
  1058. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1059. ctrl_reg = er32(CTRL);
  1060. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1061. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1062. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1063. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  1064. E1000_CTRL_FD); /* Force Duplex to FULL */
  1065. if (hw->media_type == e1000_media_type_copper &&
  1066. hw->phy_type == e1000_phy_m88)
  1067. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  1068. else {
  1069. /* Set the ILOS bit on the fiber Nic is half
  1070. * duplex link is detected.
  1071. */
  1072. stat_reg = er32(STATUS);
  1073. if ((stat_reg & E1000_STATUS_FD) == 0)
  1074. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  1075. }
  1076. ew32(CTRL, ctrl_reg);
  1077. /* Disable the receiver on the PHY so when a cable is plugged in, the
  1078. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  1079. */
  1080. if (hw->phy_type == e1000_phy_m88)
  1081. e1000_phy_disable_receiver(adapter);
  1082. udelay(500);
  1083. return 0;
  1084. }
  1085. static int e1000_set_phy_loopback(struct e1000_adapter *adapter)
  1086. {
  1087. struct e1000_hw *hw = &adapter->hw;
  1088. u16 phy_reg = 0;
  1089. u16 count = 0;
  1090. switch (hw->mac_type) {
  1091. case e1000_82543:
  1092. if (hw->media_type == e1000_media_type_copper) {
  1093. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1094. * Some PHY registers get corrupted at random, so
  1095. * attempt this 10 times.
  1096. */
  1097. while (e1000_nonintegrated_phy_loopback(adapter) &&
  1098. count++ < 10);
  1099. if (count < 11)
  1100. return 0;
  1101. }
  1102. break;
  1103. case e1000_82544:
  1104. case e1000_82540:
  1105. case e1000_82545:
  1106. case e1000_82545_rev_3:
  1107. case e1000_82546:
  1108. case e1000_82546_rev_3:
  1109. case e1000_82541:
  1110. case e1000_82541_rev_2:
  1111. case e1000_82547:
  1112. case e1000_82547_rev_2:
  1113. return e1000_integrated_phy_loopback(adapter);
  1114. default:
  1115. /* Default PHY loopback work is to read the MII
  1116. * control register and assert bit 14 (loopback mode).
  1117. */
  1118. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1119. phy_reg |= MII_CR_LOOPBACK;
  1120. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1121. return 0;
  1122. }
  1123. return 8;
  1124. }
  1125. static int e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1126. {
  1127. struct e1000_hw *hw = &adapter->hw;
  1128. u32 rctl;
  1129. if (hw->media_type == e1000_media_type_fiber ||
  1130. hw->media_type == e1000_media_type_internal_serdes) {
  1131. switch (hw->mac_type) {
  1132. case e1000_82545:
  1133. case e1000_82546:
  1134. case e1000_82545_rev_3:
  1135. case e1000_82546_rev_3:
  1136. return e1000_set_phy_loopback(adapter);
  1137. default:
  1138. rctl = er32(RCTL);
  1139. rctl |= E1000_RCTL_LBM_TCVR;
  1140. ew32(RCTL, rctl);
  1141. return 0;
  1142. }
  1143. } else if (hw->media_type == e1000_media_type_copper) {
  1144. return e1000_set_phy_loopback(adapter);
  1145. }
  1146. return 7;
  1147. }
  1148. static void e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1149. {
  1150. struct e1000_hw *hw = &adapter->hw;
  1151. u32 rctl;
  1152. u16 phy_reg;
  1153. rctl = er32(RCTL);
  1154. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1155. ew32(RCTL, rctl);
  1156. switch (hw->mac_type) {
  1157. case e1000_82545:
  1158. case e1000_82546:
  1159. case e1000_82545_rev_3:
  1160. case e1000_82546_rev_3:
  1161. default:
  1162. hw->autoneg = true;
  1163. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1164. if (phy_reg & MII_CR_LOOPBACK) {
  1165. phy_reg &= ~MII_CR_LOOPBACK;
  1166. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1167. e1000_phy_reset(hw);
  1168. }
  1169. break;
  1170. }
  1171. }
  1172. static void e1000_create_lbtest_frame(struct sk_buff *skb,
  1173. unsigned int frame_size)
  1174. {
  1175. memset(skb->data, 0xFF, frame_size);
  1176. frame_size &= ~1;
  1177. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1178. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1179. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1180. }
  1181. static int e1000_check_lbtest_frame(const unsigned char *data,
  1182. unsigned int frame_size)
  1183. {
  1184. frame_size &= ~1;
  1185. if (*(data + 3) == 0xFF) {
  1186. if ((*(data + frame_size / 2 + 10) == 0xBE) &&
  1187. (*(data + frame_size / 2 + 12) == 0xAF)) {
  1188. return 0;
  1189. }
  1190. }
  1191. return 13;
  1192. }
  1193. static int e1000_run_loopback_test(struct e1000_adapter *adapter)
  1194. {
  1195. struct e1000_hw *hw = &adapter->hw;
  1196. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  1197. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  1198. struct pci_dev *pdev = adapter->pdev;
  1199. int i, j, k, l, lc, good_cnt, ret_val = 0;
  1200. unsigned long time;
  1201. ew32(RDT, rxdr->count - 1);
  1202. /* Calculate the loop count based on the largest descriptor ring
  1203. * The idea is to wrap the largest ring a number of times using 64
  1204. * send/receive pairs during each loop
  1205. */
  1206. if (rxdr->count <= txdr->count)
  1207. lc = ((txdr->count / 64) * 2) + 1;
  1208. else
  1209. lc = ((rxdr->count / 64) * 2) + 1;
  1210. k = l = 0;
  1211. for (j = 0; j <= lc; j++) { /* loop count loop */
  1212. for (i = 0; i < 64; i++) { /* send the packets */
  1213. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1214. 1024);
  1215. dma_sync_single_for_device(&pdev->dev,
  1216. txdr->buffer_info[k].dma,
  1217. txdr->buffer_info[k].length,
  1218. DMA_TO_DEVICE);
  1219. if (unlikely(++k == txdr->count))
  1220. k = 0;
  1221. }
  1222. ew32(TDT, k);
  1223. E1000_WRITE_FLUSH();
  1224. msleep(200);
  1225. time = jiffies; /* set the start time for the receive */
  1226. good_cnt = 0;
  1227. do { /* receive the sent packets */
  1228. dma_sync_single_for_cpu(&pdev->dev,
  1229. rxdr->buffer_info[l].dma,
  1230. E1000_RXBUFFER_2048,
  1231. DMA_FROM_DEVICE);
  1232. ret_val = e1000_check_lbtest_frame(
  1233. rxdr->buffer_info[l].rxbuf.data +
  1234. NET_SKB_PAD + NET_IP_ALIGN,
  1235. 1024);
  1236. if (!ret_val)
  1237. good_cnt++;
  1238. if (unlikely(++l == rxdr->count))
  1239. l = 0;
  1240. /* time + 20 msecs (200 msecs on 2.4) is more than
  1241. * enough time to complete the receives, if it's
  1242. * exceeded, break and error off
  1243. */
  1244. } while (good_cnt < 64 && time_after(time + 20, jiffies));
  1245. if (good_cnt != 64) {
  1246. ret_val = 13; /* ret_val is the same as mis-compare */
  1247. break;
  1248. }
  1249. if (time_after_eq(jiffies, time + 2)) {
  1250. ret_val = 14; /* error code for time out error */
  1251. break;
  1252. }
  1253. } /* end loop count loop */
  1254. return ret_val;
  1255. }
  1256. static int e1000_loopback_test(struct e1000_adapter *adapter, u64 *data)
  1257. {
  1258. *data = e1000_setup_desc_rings(adapter);
  1259. if (*data)
  1260. goto out;
  1261. *data = e1000_setup_loopback_test(adapter);
  1262. if (*data)
  1263. goto err_loopback;
  1264. *data = e1000_run_loopback_test(adapter);
  1265. e1000_loopback_cleanup(adapter);
  1266. err_loopback:
  1267. e1000_free_desc_rings(adapter);
  1268. out:
  1269. return *data;
  1270. }
  1271. static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
  1272. {
  1273. struct e1000_hw *hw = &adapter->hw;
  1274. *data = 0;
  1275. if (hw->media_type == e1000_media_type_internal_serdes) {
  1276. int i = 0;
  1277. hw->serdes_has_link = false;
  1278. /* On some blade server designs, link establishment
  1279. * could take as long as 2-3 minutes
  1280. */
  1281. do {
  1282. e1000_check_for_link(hw);
  1283. if (hw->serdes_has_link)
  1284. return *data;
  1285. msleep(20);
  1286. } while (i++ < 3750);
  1287. *data = 1;
  1288. } else {
  1289. e1000_check_for_link(hw);
  1290. if (hw->autoneg) /* if auto_neg is set wait for it */
  1291. msleep(4000);
  1292. if (!(er32(STATUS) & E1000_STATUS_LU))
  1293. *data = 1;
  1294. }
  1295. return *data;
  1296. }
  1297. static int e1000_get_sset_count(struct net_device *netdev, int sset)
  1298. {
  1299. switch (sset) {
  1300. case ETH_SS_TEST:
  1301. return E1000_TEST_LEN;
  1302. case ETH_SS_STATS:
  1303. return E1000_STATS_LEN;
  1304. default:
  1305. return -EOPNOTSUPP;
  1306. }
  1307. }
  1308. static void e1000_diag_test(struct net_device *netdev,
  1309. struct ethtool_test *eth_test, u64 *data)
  1310. {
  1311. struct e1000_adapter *adapter = netdev_priv(netdev);
  1312. struct e1000_hw *hw = &adapter->hw;
  1313. bool if_running = netif_running(netdev);
  1314. set_bit(__E1000_TESTING, &adapter->flags);
  1315. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1316. /* Offline tests */
  1317. /* save speed, duplex, autoneg settings */
  1318. u16 autoneg_advertised = hw->autoneg_advertised;
  1319. u8 forced_speed_duplex = hw->forced_speed_duplex;
  1320. u8 autoneg = hw->autoneg;
  1321. e_info(hw, "offline testing starting\n");
  1322. /* Link test performed before hardware reset so autoneg doesn't
  1323. * interfere with test result
  1324. */
  1325. if (e1000_link_test(adapter, &data[4]))
  1326. eth_test->flags |= ETH_TEST_FL_FAILED;
  1327. if (if_running)
  1328. /* indicate we're in test mode */
  1329. e1000_close(netdev);
  1330. else
  1331. e1000_reset(adapter);
  1332. if (e1000_reg_test(adapter, &data[0]))
  1333. eth_test->flags |= ETH_TEST_FL_FAILED;
  1334. e1000_reset(adapter);
  1335. if (e1000_eeprom_test(adapter, &data[1]))
  1336. eth_test->flags |= ETH_TEST_FL_FAILED;
  1337. e1000_reset(adapter);
  1338. if (e1000_intr_test(adapter, &data[2]))
  1339. eth_test->flags |= ETH_TEST_FL_FAILED;
  1340. e1000_reset(adapter);
  1341. /* make sure the phy is powered up */
  1342. e1000_power_up_phy(adapter);
  1343. if (e1000_loopback_test(adapter, &data[3]))
  1344. eth_test->flags |= ETH_TEST_FL_FAILED;
  1345. /* restore speed, duplex, autoneg settings */
  1346. hw->autoneg_advertised = autoneg_advertised;
  1347. hw->forced_speed_duplex = forced_speed_duplex;
  1348. hw->autoneg = autoneg;
  1349. e1000_reset(adapter);
  1350. clear_bit(__E1000_TESTING, &adapter->flags);
  1351. if (if_running)
  1352. e1000_open(netdev);
  1353. } else {
  1354. e_info(hw, "online testing starting\n");
  1355. /* Online tests */
  1356. if (e1000_link_test(adapter, &data[4]))
  1357. eth_test->flags |= ETH_TEST_FL_FAILED;
  1358. /* Online tests aren't run; pass by default */
  1359. data[0] = 0;
  1360. data[1] = 0;
  1361. data[2] = 0;
  1362. data[3] = 0;
  1363. clear_bit(__E1000_TESTING, &adapter->flags);
  1364. }
  1365. msleep_interruptible(4 * 1000);
  1366. }
  1367. static int e1000_wol_exclusion(struct e1000_adapter *adapter,
  1368. struct ethtool_wolinfo *wol)
  1369. {
  1370. struct e1000_hw *hw = &adapter->hw;
  1371. int retval = 1; /* fail by default */
  1372. switch (hw->device_id) {
  1373. case E1000_DEV_ID_82542:
  1374. case E1000_DEV_ID_82543GC_FIBER:
  1375. case E1000_DEV_ID_82543GC_COPPER:
  1376. case E1000_DEV_ID_82544EI_FIBER:
  1377. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1378. case E1000_DEV_ID_82545EM_FIBER:
  1379. case E1000_DEV_ID_82545EM_COPPER:
  1380. case E1000_DEV_ID_82546GB_QUAD_COPPER:
  1381. case E1000_DEV_ID_82546GB_PCIE:
  1382. /* these don't support WoL at all */
  1383. wol->supported = 0;
  1384. break;
  1385. case E1000_DEV_ID_82546EB_FIBER:
  1386. case E1000_DEV_ID_82546GB_FIBER:
  1387. /* Wake events not supported on port B */
  1388. if (er32(STATUS) & E1000_STATUS_FUNC_1) {
  1389. wol->supported = 0;
  1390. break;
  1391. }
  1392. /* return success for non excluded adapter ports */
  1393. retval = 0;
  1394. break;
  1395. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1396. /* quad port adapters only support WoL on port A */
  1397. if (!adapter->quad_port_a) {
  1398. wol->supported = 0;
  1399. break;
  1400. }
  1401. /* return success for non excluded adapter ports */
  1402. retval = 0;
  1403. break;
  1404. default:
  1405. /* dual port cards only support WoL on port A from now on
  1406. * unless it was enabled in the eeprom for port B
  1407. * so exclude FUNC_1 ports from having WoL enabled
  1408. */
  1409. if (er32(STATUS) & E1000_STATUS_FUNC_1 &&
  1410. !adapter->eeprom_wol) {
  1411. wol->supported = 0;
  1412. break;
  1413. }
  1414. retval = 0;
  1415. }
  1416. return retval;
  1417. }
  1418. static void e1000_get_wol(struct net_device *netdev,
  1419. struct ethtool_wolinfo *wol)
  1420. {
  1421. struct e1000_adapter *adapter = netdev_priv(netdev);
  1422. struct e1000_hw *hw = &adapter->hw;
  1423. wol->supported = WAKE_UCAST | WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
  1424. wol->wolopts = 0;
  1425. /* this function will set ->supported = 0 and return 1 if wol is not
  1426. * supported by this hardware
  1427. */
  1428. if (e1000_wol_exclusion(adapter, wol) ||
  1429. !device_can_wakeup(&adapter->pdev->dev))
  1430. return;
  1431. /* apply any specific unsupported masks here */
  1432. switch (hw->device_id) {
  1433. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1434. /* KSP3 does not support UCAST wake-ups */
  1435. wol->supported &= ~WAKE_UCAST;
  1436. if (adapter->wol & E1000_WUFC_EX)
  1437. e_err(drv, "Interface does not support directed "
  1438. "(unicast) frame wake-up packets\n");
  1439. break;
  1440. default:
  1441. break;
  1442. }
  1443. if (adapter->wol & E1000_WUFC_EX)
  1444. wol->wolopts |= WAKE_UCAST;
  1445. if (adapter->wol & E1000_WUFC_MC)
  1446. wol->wolopts |= WAKE_MCAST;
  1447. if (adapter->wol & E1000_WUFC_BC)
  1448. wol->wolopts |= WAKE_BCAST;
  1449. if (adapter->wol & E1000_WUFC_MAG)
  1450. wol->wolopts |= WAKE_MAGIC;
  1451. }
  1452. static int e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1453. {
  1454. struct e1000_adapter *adapter = netdev_priv(netdev);
  1455. struct e1000_hw *hw = &adapter->hw;
  1456. if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1457. return -EOPNOTSUPP;
  1458. if (e1000_wol_exclusion(adapter, wol) ||
  1459. !device_can_wakeup(&adapter->pdev->dev))
  1460. return wol->wolopts ? -EOPNOTSUPP : 0;
  1461. switch (hw->device_id) {
  1462. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1463. if (wol->wolopts & WAKE_UCAST) {
  1464. e_err(drv, "Interface does not support directed "
  1465. "(unicast) frame wake-up packets\n");
  1466. return -EOPNOTSUPP;
  1467. }
  1468. break;
  1469. default:
  1470. break;
  1471. }
  1472. /* these settings will always override what we currently have */
  1473. adapter->wol = 0;
  1474. if (wol->wolopts & WAKE_UCAST)
  1475. adapter->wol |= E1000_WUFC_EX;
  1476. if (wol->wolopts & WAKE_MCAST)
  1477. adapter->wol |= E1000_WUFC_MC;
  1478. if (wol->wolopts & WAKE_BCAST)
  1479. adapter->wol |= E1000_WUFC_BC;
  1480. if (wol->wolopts & WAKE_MAGIC)
  1481. adapter->wol |= E1000_WUFC_MAG;
  1482. device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
  1483. return 0;
  1484. }
  1485. static int e1000_set_phys_id(struct net_device *netdev,
  1486. enum ethtool_phys_id_state state)
  1487. {
  1488. struct e1000_adapter *adapter = netdev_priv(netdev);
  1489. struct e1000_hw *hw = &adapter->hw;
  1490. switch (state) {
  1491. case ETHTOOL_ID_ACTIVE:
  1492. e1000_setup_led(hw);
  1493. return 2;
  1494. case ETHTOOL_ID_ON:
  1495. e1000_led_on(hw);
  1496. break;
  1497. case ETHTOOL_ID_OFF:
  1498. e1000_led_off(hw);
  1499. break;
  1500. case ETHTOOL_ID_INACTIVE:
  1501. e1000_cleanup_led(hw);
  1502. }
  1503. return 0;
  1504. }
  1505. static int e1000_get_coalesce(struct net_device *netdev,
  1506. struct ethtool_coalesce *ec)
  1507. {
  1508. struct e1000_adapter *adapter = netdev_priv(netdev);
  1509. if (adapter->hw.mac_type < e1000_82545)
  1510. return -EOPNOTSUPP;
  1511. if (adapter->itr_setting <= 4)
  1512. ec->rx_coalesce_usecs = adapter->itr_setting;
  1513. else
  1514. ec->rx_coalesce_usecs = 1000000 / adapter->itr_setting;
  1515. return 0;
  1516. }
  1517. static int e1000_set_coalesce(struct net_device *netdev,
  1518. struct ethtool_coalesce *ec)
  1519. {
  1520. struct e1000_adapter *adapter = netdev_priv(netdev);
  1521. struct e1000_hw *hw = &adapter->hw;
  1522. if (hw->mac_type < e1000_82545)
  1523. return -EOPNOTSUPP;
  1524. if ((ec->rx_coalesce_usecs > E1000_MAX_ITR_USECS) ||
  1525. ((ec->rx_coalesce_usecs > 4) &&
  1526. (ec->rx_coalesce_usecs < E1000_MIN_ITR_USECS)) ||
  1527. (ec->rx_coalesce_usecs == 2))
  1528. return -EINVAL;
  1529. if (ec->rx_coalesce_usecs == 4) {
  1530. adapter->itr = adapter->itr_setting = 4;
  1531. } else if (ec->rx_coalesce_usecs <= 3) {
  1532. adapter->itr = 20000;
  1533. adapter->itr_setting = ec->rx_coalesce_usecs;
  1534. } else {
  1535. adapter->itr = (1000000 / ec->rx_coalesce_usecs);
  1536. adapter->itr_setting = adapter->itr & ~3;
  1537. }
  1538. if (adapter->itr_setting != 0)
  1539. ew32(ITR, 1000000000 / (adapter->itr * 256));
  1540. else
  1541. ew32(ITR, 0);
  1542. return 0;
  1543. }
  1544. static int e1000_nway_reset(struct net_device *netdev)
  1545. {
  1546. struct e1000_adapter *adapter = netdev_priv(netdev);
  1547. if (netif_running(netdev))
  1548. e1000_reinit_locked(adapter);
  1549. return 0;
  1550. }
  1551. static void e1000_get_ethtool_stats(struct net_device *netdev,
  1552. struct ethtool_stats *stats, u64 *data)
  1553. {
  1554. struct e1000_adapter *adapter = netdev_priv(netdev);
  1555. int i;
  1556. const struct e1000_stats *stat = e1000_gstrings_stats;
  1557. e1000_update_stats(adapter);
  1558. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++, stat++) {
  1559. char *p;
  1560. switch (stat->type) {
  1561. case NETDEV_STATS:
  1562. p = (char *)netdev + stat->stat_offset;
  1563. break;
  1564. case E1000_STATS:
  1565. p = (char *)adapter + stat->stat_offset;
  1566. break;
  1567. default:
  1568. WARN_ONCE(1, "Invalid E1000 stat type: %u index %d\n",
  1569. stat->type, i);
  1570. continue;
  1571. }
  1572. if (stat->sizeof_stat == sizeof(u64))
  1573. data[i] = *(u64 *)p;
  1574. else
  1575. data[i] = *(u32 *)p;
  1576. }
  1577. /* BUG_ON(i != E1000_STATS_LEN); */
  1578. }
  1579. static void e1000_get_strings(struct net_device *netdev, u32 stringset,
  1580. u8 *data)
  1581. {
  1582. u8 *p = data;
  1583. int i;
  1584. switch (stringset) {
  1585. case ETH_SS_TEST:
  1586. memcpy(data, e1000_gstrings_test, sizeof(e1000_gstrings_test));
  1587. break;
  1588. case ETH_SS_STATS:
  1589. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1590. memcpy(p, e1000_gstrings_stats[i].stat_string,
  1591. ETH_GSTRING_LEN);
  1592. p += ETH_GSTRING_LEN;
  1593. }
  1594. /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
  1595. break;
  1596. }
  1597. }
  1598. static const struct ethtool_ops e1000_ethtool_ops = {
  1599. .get_drvinfo = e1000_get_drvinfo,
  1600. .get_regs_len = e1000_get_regs_len,
  1601. .get_regs = e1000_get_regs,
  1602. .get_wol = e1000_get_wol,
  1603. .set_wol = e1000_set_wol,
  1604. .get_msglevel = e1000_get_msglevel,
  1605. .set_msglevel = e1000_set_msglevel,
  1606. .nway_reset = e1000_nway_reset,
  1607. .get_link = e1000_get_link,
  1608. .get_eeprom_len = e1000_get_eeprom_len,
  1609. .get_eeprom = e1000_get_eeprom,
  1610. .set_eeprom = e1000_set_eeprom,
  1611. .get_ringparam = e1000_get_ringparam,
  1612. .set_ringparam = e1000_set_ringparam,
  1613. .get_pauseparam = e1000_get_pauseparam,
  1614. .set_pauseparam = e1000_set_pauseparam,
  1615. .self_test = e1000_diag_test,
  1616. .get_strings = e1000_get_strings,
  1617. .set_phys_id = e1000_set_phys_id,
  1618. .get_ethtool_stats = e1000_get_ethtool_stats,
  1619. .get_sset_count = e1000_get_sset_count,
  1620. .get_coalesce = e1000_get_coalesce,
  1621. .set_coalesce = e1000_set_coalesce,
  1622. .get_ts_info = ethtool_op_get_ts_info,
  1623. .get_link_ksettings = e1000_get_link_ksettings,
  1624. .set_link_ksettings = e1000_set_link_ksettings,
  1625. };
  1626. void e1000_set_ethtool_ops(struct net_device *netdev)
  1627. {
  1628. netdev->ethtool_ops = &e1000_ethtool_ops;
  1629. }