sunlance.c 41 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614
  1. /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
  2. * lance.c: Linux/Sparc/Lance driver
  3. *
  4. * Written 1995, 1996 by Miguel de Icaza
  5. * Sources:
  6. * The Linux depca driver
  7. * The Linux lance driver.
  8. * The Linux skeleton driver.
  9. * The NetBSD Sparc/Lance driver.
  10. * Theo de Raadt (deraadt@openbsd.org)
  11. * NCR92C990 Lan Controller manual
  12. *
  13. * 1.4:
  14. * Added support to run with a ledma on the Sun4m
  15. *
  16. * 1.5:
  17. * Added multiple card detection.
  18. *
  19. * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
  20. * (ecd@skynet.be)
  21. *
  22. * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
  23. * (ecd@skynet.be)
  24. *
  25. * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
  26. * (davem@caip.rutgers.edu)
  27. *
  28. * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
  29. * this disables auto carrier detection on sun4m. Eddie C. Dost
  30. * (ecd@skynet.be)
  31. *
  32. * 1.7:
  33. * 6/26/96: Bug fix for multiple ledmas, miguel.
  34. *
  35. * 1.8:
  36. * Stole multicast code from depca.c, fixed lance_tx.
  37. *
  38. * 1.9:
  39. * 8/21/96: Fixed the multicast code (Pedro Roque)
  40. *
  41. * 8/28/96: Send fake packet in lance_open() if auto_select is true,
  42. * so we can detect the carrier loss condition in time.
  43. * Eddie C. Dost (ecd@skynet.be)
  44. *
  45. * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
  46. * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
  47. *
  48. * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
  49. *
  50. * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
  51. * This was the sun4c killer. Shit, stupid bug.
  52. * (ecd@skynet.be)
  53. *
  54. * 1.10:
  55. * 1/26/97: Modularize driver. (ecd@skynet.be)
  56. *
  57. * 1.11:
  58. * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
  59. *
  60. * 1.12:
  61. * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
  62. * Anton Blanchard (anton@progsoc.uts.edu.au)
  63. * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
  64. * David S. Miller (davem@redhat.com)
  65. * 2.01:
  66. * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
  67. *
  68. */
  69. #undef DEBUG_DRIVER
  70. static char version[] =
  71. "sunlance.c:v2.02 24/Aug/03 Miguel de Icaza (miguel@nuclecu.unam.mx)\n";
  72. static char lancestr[] = "LANCE";
  73. #include <linux/config.h>
  74. #include <linux/module.h>
  75. #include <linux/kernel.h>
  76. #include <linux/types.h>
  77. #include <linux/fcntl.h>
  78. #include <linux/interrupt.h>
  79. #include <linux/ioport.h>
  80. #include <linux/in.h>
  81. #include <linux/slab.h>
  82. #include <linux/string.h>
  83. #include <linux/delay.h>
  84. #include <linux/init.h>
  85. #include <linux/crc32.h>
  86. #include <linux/errno.h>
  87. #include <linux/socket.h> /* Used for the temporal inet entries and routing */
  88. #include <linux/route.h>
  89. #include <linux/netdevice.h>
  90. #include <linux/etherdevice.h>
  91. #include <linux/skbuff.h>
  92. #include <linux/ethtool.h>
  93. #include <linux/bitops.h>
  94. #include <asm/system.h>
  95. #include <asm/io.h>
  96. #include <asm/dma.h>
  97. #include <asm/pgtable.h>
  98. #include <asm/byteorder.h> /* Used by the checksum routines */
  99. #include <asm/idprom.h>
  100. #include <asm/sbus.h>
  101. #include <asm/openprom.h>
  102. #include <asm/oplib.h>
  103. #include <asm/auxio.h> /* For tpe-link-test? setting */
  104. #include <asm/irq.h>
  105. /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
  106. #ifndef LANCE_LOG_TX_BUFFERS
  107. #define LANCE_LOG_TX_BUFFERS 4
  108. #define LANCE_LOG_RX_BUFFERS 4
  109. #endif
  110. #define LE_CSR0 0
  111. #define LE_CSR1 1
  112. #define LE_CSR2 2
  113. #define LE_CSR3 3
  114. #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
  115. #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
  116. #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
  117. #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
  118. #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
  119. #define LE_C0_MERR 0x0800 /* ME: Memory error */
  120. #define LE_C0_RINT 0x0400 /* Received interrupt */
  121. #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
  122. #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
  123. #define LE_C0_INTR 0x0080 /* Interrupt or error */
  124. #define LE_C0_INEA 0x0040 /* Interrupt enable */
  125. #define LE_C0_RXON 0x0020 /* Receiver on */
  126. #define LE_C0_TXON 0x0010 /* Transmitter on */
  127. #define LE_C0_TDMD 0x0008 /* Transmitter demand */
  128. #define LE_C0_STOP 0x0004 /* Stop the card */
  129. #define LE_C0_STRT 0x0002 /* Start the card */
  130. #define LE_C0_INIT 0x0001 /* Init the card */
  131. #define LE_C3_BSWP 0x4 /* SWAP */
  132. #define LE_C3_ACON 0x2 /* ALE Control */
  133. #define LE_C3_BCON 0x1 /* Byte control */
  134. /* Receive message descriptor 1 */
  135. #define LE_R1_OWN 0x80 /* Who owns the entry */
  136. #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
  137. #define LE_R1_FRA 0x20 /* FRA: Frame error */
  138. #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
  139. #define LE_R1_CRC 0x08 /* CRC error */
  140. #define LE_R1_BUF 0x04 /* BUF: Buffer error */
  141. #define LE_R1_SOP 0x02 /* Start of packet */
  142. #define LE_R1_EOP 0x01 /* End of packet */
  143. #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
  144. #define LE_T1_OWN 0x80 /* Lance owns the packet */
  145. #define LE_T1_ERR 0x40 /* Error summary */
  146. #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
  147. #define LE_T1_EONE 0x08 /* Error: one retry needed */
  148. #define LE_T1_EDEF 0x04 /* Error: deferred */
  149. #define LE_T1_SOP 0x02 /* Start of packet */
  150. #define LE_T1_EOP 0x01 /* End of packet */
  151. #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
  152. #define LE_T3_BUF 0x8000 /* Buffer error */
  153. #define LE_T3_UFL 0x4000 /* Error underflow */
  154. #define LE_T3_LCOL 0x1000 /* Error late collision */
  155. #define LE_T3_CLOS 0x0800 /* Error carrier loss */
  156. #define LE_T3_RTY 0x0400 /* Error retry */
  157. #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
  158. #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
  159. #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
  160. #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
  161. #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
  162. #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
  163. #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
  164. #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
  165. #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
  166. #define PKT_BUF_SZ 1544
  167. #define RX_BUFF_SIZE PKT_BUF_SZ
  168. #define TX_BUFF_SIZE PKT_BUF_SZ
  169. struct lance_rx_desc {
  170. u16 rmd0; /* low address of packet */
  171. u8 rmd1_bits; /* descriptor bits */
  172. u8 rmd1_hadr; /* high address of packet */
  173. s16 length; /* This length is 2s complement (negative)!
  174. * Buffer length
  175. */
  176. u16 mblength; /* This is the actual number of bytes received */
  177. };
  178. struct lance_tx_desc {
  179. u16 tmd0; /* low address of packet */
  180. u8 tmd1_bits; /* descriptor bits */
  181. u8 tmd1_hadr; /* high address of packet */
  182. s16 length; /* Length is 2s complement (negative)! */
  183. u16 misc;
  184. };
  185. /* The LANCE initialization block, described in databook. */
  186. /* On the Sparc, this block should be on a DMA region */
  187. struct lance_init_block {
  188. u16 mode; /* Pre-set mode (reg. 15) */
  189. u8 phys_addr[6]; /* Physical ethernet address */
  190. u32 filter[2]; /* Multicast filter. */
  191. /* Receive and transmit ring base, along with extra bits. */
  192. u16 rx_ptr; /* receive descriptor addr */
  193. u16 rx_len; /* receive len and high addr */
  194. u16 tx_ptr; /* transmit descriptor addr */
  195. u16 tx_len; /* transmit len and high addr */
  196. /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
  197. struct lance_rx_desc brx_ring[RX_RING_SIZE];
  198. struct lance_tx_desc btx_ring[TX_RING_SIZE];
  199. u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
  200. u8 pad[2]; /* align rx_buf for copy_and_sum(). */
  201. u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
  202. };
  203. #define libdesc_offset(rt, elem) \
  204. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
  205. #define libbuff_offset(rt, elem) \
  206. ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
  207. struct lance_private {
  208. void __iomem *lregs; /* Lance RAP/RDP regs. */
  209. void __iomem *dregs; /* DMA controller regs. */
  210. struct lance_init_block __iomem *init_block_iomem;
  211. struct lance_init_block *init_block_mem;
  212. spinlock_t lock;
  213. int rx_new, tx_new;
  214. int rx_old, tx_old;
  215. struct net_device_stats stats;
  216. struct sbus_dma *ledma; /* If set this points to ledma */
  217. char tpe; /* cable-selection is TPE */
  218. char auto_select; /* cable-selection by carrier */
  219. char burst_sizes; /* ledma SBus burst sizes */
  220. char pio_buffer; /* init block in PIO space? */
  221. unsigned short busmaster_regval;
  222. void (*init_ring)(struct net_device *);
  223. void (*rx)(struct net_device *);
  224. void (*tx)(struct net_device *);
  225. char *name;
  226. dma_addr_t init_block_dvma;
  227. struct net_device *dev; /* Backpointer */
  228. struct lance_private *next_module;
  229. struct sbus_dev *sdev;
  230. struct timer_list multicast_timer;
  231. };
  232. #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
  233. lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
  234. lp->tx_old - lp->tx_new-1)
  235. /* Lance registers. */
  236. #define RDP 0x00UL /* register data port */
  237. #define RAP 0x02UL /* register address port */
  238. #define LANCE_REG_SIZE 0x04UL
  239. #define STOP_LANCE(__lp) \
  240. do { void __iomem *__base = (__lp)->lregs; \
  241. sbus_writew(LE_CSR0, __base + RAP); \
  242. sbus_writew(LE_C0_STOP, __base + RDP); \
  243. } while (0)
  244. int sparc_lance_debug = 2;
  245. /* The Lance uses 24 bit addresses */
  246. /* On the Sun4c the DVMA will provide the remaining bytes for us */
  247. /* On the Sun4m we have to instruct the ledma to provide them */
  248. /* Even worse, on scsi/ether SBUS cards, the init block and the
  249. * transmit/receive buffers are addresses as offsets from absolute
  250. * zero on the lebuffer PIO area. -DaveM
  251. */
  252. #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
  253. static struct lance_private *root_lance_dev;
  254. /* Load the CSR registers */
  255. static void load_csrs(struct lance_private *lp)
  256. {
  257. u32 leptr;
  258. if (lp->pio_buffer)
  259. leptr = 0;
  260. else
  261. leptr = LANCE_ADDR(lp->init_block_dvma);
  262. sbus_writew(LE_CSR1, lp->lregs + RAP);
  263. sbus_writew(leptr & 0xffff, lp->lregs + RDP);
  264. sbus_writew(LE_CSR2, lp->lregs + RAP);
  265. sbus_writew(leptr >> 16, lp->lregs + RDP);
  266. sbus_writew(LE_CSR3, lp->lregs + RAP);
  267. sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
  268. /* Point back to csr0 */
  269. sbus_writew(LE_CSR0, lp->lregs + RAP);
  270. }
  271. /* Setup the Lance Rx and Tx rings */
  272. static void lance_init_ring_dvma(struct net_device *dev)
  273. {
  274. struct lance_private *lp = netdev_priv(dev);
  275. struct lance_init_block *ib = lp->init_block_mem;
  276. dma_addr_t aib = lp->init_block_dvma;
  277. __u32 leptr;
  278. int i;
  279. /* Lock out other processes while setting up hardware */
  280. netif_stop_queue(dev);
  281. lp->rx_new = lp->tx_new = 0;
  282. lp->rx_old = lp->tx_old = 0;
  283. /* Copy the ethernet address to the lance init block
  284. * Note that on the sparc you need to swap the ethernet address.
  285. */
  286. ib->phys_addr [0] = dev->dev_addr [1];
  287. ib->phys_addr [1] = dev->dev_addr [0];
  288. ib->phys_addr [2] = dev->dev_addr [3];
  289. ib->phys_addr [3] = dev->dev_addr [2];
  290. ib->phys_addr [4] = dev->dev_addr [5];
  291. ib->phys_addr [5] = dev->dev_addr [4];
  292. /* Setup the Tx ring entries */
  293. for (i = 0; i <= TX_RING_SIZE; i++) {
  294. leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
  295. ib->btx_ring [i].tmd0 = leptr;
  296. ib->btx_ring [i].tmd1_hadr = leptr >> 16;
  297. ib->btx_ring [i].tmd1_bits = 0;
  298. ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
  299. ib->btx_ring [i].misc = 0;
  300. }
  301. /* Setup the Rx ring entries */
  302. for (i = 0; i < RX_RING_SIZE; i++) {
  303. leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
  304. ib->brx_ring [i].rmd0 = leptr;
  305. ib->brx_ring [i].rmd1_hadr = leptr >> 16;
  306. ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
  307. ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
  308. ib->brx_ring [i].mblength = 0;
  309. }
  310. /* Setup the initialization block */
  311. /* Setup rx descriptor pointer */
  312. leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
  313. ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
  314. ib->rx_ptr = leptr;
  315. /* Setup tx descriptor pointer */
  316. leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
  317. ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
  318. ib->tx_ptr = leptr;
  319. }
  320. static void lance_init_ring_pio(struct net_device *dev)
  321. {
  322. struct lance_private *lp = netdev_priv(dev);
  323. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  324. u32 leptr;
  325. int i;
  326. /* Lock out other processes while setting up hardware */
  327. netif_stop_queue(dev);
  328. lp->rx_new = lp->tx_new = 0;
  329. lp->rx_old = lp->tx_old = 0;
  330. /* Copy the ethernet address to the lance init block
  331. * Note that on the sparc you need to swap the ethernet address.
  332. */
  333. sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
  334. sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
  335. sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
  336. sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
  337. sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
  338. sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
  339. /* Setup the Tx ring entries */
  340. for (i = 0; i <= TX_RING_SIZE; i++) {
  341. leptr = libbuff_offset(tx_buf, i);
  342. sbus_writew(leptr, &ib->btx_ring [i].tmd0);
  343. sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
  344. sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
  345. /* The ones required by tmd2 */
  346. sbus_writew(0xf000, &ib->btx_ring [i].length);
  347. sbus_writew(0, &ib->btx_ring [i].misc);
  348. }
  349. /* Setup the Rx ring entries */
  350. for (i = 0; i < RX_RING_SIZE; i++) {
  351. leptr = libbuff_offset(rx_buf, i);
  352. sbus_writew(leptr, &ib->brx_ring [i].rmd0);
  353. sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
  354. sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
  355. sbus_writew(-RX_BUFF_SIZE|0xf000,
  356. &ib->brx_ring [i].length);
  357. sbus_writew(0, &ib->brx_ring [i].mblength);
  358. }
  359. /* Setup the initialization block */
  360. /* Setup rx descriptor pointer */
  361. leptr = libdesc_offset(brx_ring, 0);
  362. sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
  363. &ib->rx_len);
  364. sbus_writew(leptr, &ib->rx_ptr);
  365. /* Setup tx descriptor pointer */
  366. leptr = libdesc_offset(btx_ring, 0);
  367. sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
  368. &ib->tx_len);
  369. sbus_writew(leptr, &ib->tx_ptr);
  370. }
  371. static void init_restart_ledma(struct lance_private *lp)
  372. {
  373. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  374. if (!(csr & DMA_HNDL_ERROR)) {
  375. /* E-Cache draining */
  376. while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
  377. barrier();
  378. }
  379. csr = sbus_readl(lp->dregs + DMA_CSR);
  380. csr &= ~DMA_E_BURSTS;
  381. if (lp->burst_sizes & DMA_BURST32)
  382. csr |= DMA_E_BURST32;
  383. else
  384. csr |= DMA_E_BURST16;
  385. csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
  386. if (lp->tpe)
  387. csr |= DMA_EN_ENETAUI;
  388. else
  389. csr &= ~DMA_EN_ENETAUI;
  390. udelay(20);
  391. sbus_writel(csr, lp->dregs + DMA_CSR);
  392. udelay(200);
  393. }
  394. static int init_restart_lance(struct lance_private *lp)
  395. {
  396. u16 regval = 0;
  397. int i;
  398. if (lp->dregs)
  399. init_restart_ledma(lp);
  400. sbus_writew(LE_CSR0, lp->lregs + RAP);
  401. sbus_writew(LE_C0_INIT, lp->lregs + RDP);
  402. /* Wait for the lance to complete initialization */
  403. for (i = 0; i < 100; i++) {
  404. regval = sbus_readw(lp->lregs + RDP);
  405. if (regval & (LE_C0_ERR | LE_C0_IDON))
  406. break;
  407. barrier();
  408. }
  409. if (i == 100 || (regval & LE_C0_ERR)) {
  410. printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
  411. i, regval);
  412. if (lp->dregs)
  413. printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
  414. return -1;
  415. }
  416. /* Clear IDON by writing a "1", enable interrupts and start lance */
  417. sbus_writew(LE_C0_IDON, lp->lregs + RDP);
  418. sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
  419. if (lp->dregs) {
  420. u32 csr = sbus_readl(lp->dregs + DMA_CSR);
  421. csr |= DMA_INT_ENAB;
  422. sbus_writel(csr, lp->dregs + DMA_CSR);
  423. }
  424. return 0;
  425. }
  426. static void lance_rx_dvma(struct net_device *dev)
  427. {
  428. struct lance_private *lp = netdev_priv(dev);
  429. struct lance_init_block *ib = lp->init_block_mem;
  430. struct lance_rx_desc *rd;
  431. u8 bits;
  432. int len, entry = lp->rx_new;
  433. struct sk_buff *skb;
  434. for (rd = &ib->brx_ring [entry];
  435. !((bits = rd->rmd1_bits) & LE_R1_OWN);
  436. rd = &ib->brx_ring [entry]) {
  437. /* We got an incomplete frame? */
  438. if ((bits & LE_R1_POK) != LE_R1_POK) {
  439. lp->stats.rx_over_errors++;
  440. lp->stats.rx_errors++;
  441. } else if (bits & LE_R1_ERR) {
  442. /* Count only the end frame as a rx error,
  443. * not the beginning
  444. */
  445. if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
  446. if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
  447. if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
  448. if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
  449. if (bits & LE_R1_EOP) lp->stats.rx_errors++;
  450. } else {
  451. len = (rd->mblength & 0xfff) - 4;
  452. skb = dev_alloc_skb(len + 2);
  453. if (skb == NULL) {
  454. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  455. dev->name);
  456. lp->stats.rx_dropped++;
  457. rd->mblength = 0;
  458. rd->rmd1_bits = LE_R1_OWN;
  459. lp->rx_new = RX_NEXT(entry);
  460. return;
  461. }
  462. lp->stats.rx_bytes += len;
  463. skb->dev = dev;
  464. skb_reserve(skb, 2); /* 16 byte align */
  465. skb_put(skb, len); /* make room */
  466. eth_copy_and_sum(skb,
  467. (unsigned char *)&(ib->rx_buf [entry][0]),
  468. len, 0);
  469. skb->protocol = eth_type_trans(skb, dev);
  470. netif_rx(skb);
  471. dev->last_rx = jiffies;
  472. lp->stats.rx_packets++;
  473. }
  474. /* Return the packet to the pool */
  475. rd->mblength = 0;
  476. rd->rmd1_bits = LE_R1_OWN;
  477. entry = RX_NEXT(entry);
  478. }
  479. lp->rx_new = entry;
  480. }
  481. static void lance_tx_dvma(struct net_device *dev)
  482. {
  483. struct lance_private *lp = netdev_priv(dev);
  484. struct lance_init_block *ib = lp->init_block_mem;
  485. int i, j;
  486. spin_lock(&lp->lock);
  487. j = lp->tx_old;
  488. for (i = j; i != lp->tx_new; i = j) {
  489. struct lance_tx_desc *td = &ib->btx_ring [i];
  490. u8 bits = td->tmd1_bits;
  491. /* If we hit a packet not owned by us, stop */
  492. if (bits & LE_T1_OWN)
  493. break;
  494. if (bits & LE_T1_ERR) {
  495. u16 status = td->misc;
  496. lp->stats.tx_errors++;
  497. if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
  498. if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
  499. if (status & LE_T3_CLOS) {
  500. lp->stats.tx_carrier_errors++;
  501. if (lp->auto_select) {
  502. lp->tpe = 1 - lp->tpe;
  503. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  504. dev->name, lp->tpe?"TPE":"AUI");
  505. STOP_LANCE(lp);
  506. lp->init_ring(dev);
  507. load_csrs(lp);
  508. init_restart_lance(lp);
  509. goto out;
  510. }
  511. }
  512. /* Buffer errors and underflows turn off the
  513. * transmitter, restart the adapter.
  514. */
  515. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  516. lp->stats.tx_fifo_errors++;
  517. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  518. dev->name);
  519. STOP_LANCE(lp);
  520. lp->init_ring(dev);
  521. load_csrs(lp);
  522. init_restart_lance(lp);
  523. goto out;
  524. }
  525. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  526. /*
  527. * So we don't count the packet more than once.
  528. */
  529. td->tmd1_bits = bits & ~(LE_T1_POK);
  530. /* One collision before packet was sent. */
  531. if (bits & LE_T1_EONE)
  532. lp->stats.collisions++;
  533. /* More than one collision, be optimistic. */
  534. if (bits & LE_T1_EMORE)
  535. lp->stats.collisions += 2;
  536. lp->stats.tx_packets++;
  537. }
  538. j = TX_NEXT(j);
  539. }
  540. lp->tx_old = j;
  541. out:
  542. if (netif_queue_stopped(dev) &&
  543. TX_BUFFS_AVAIL > 0)
  544. netif_wake_queue(dev);
  545. spin_unlock(&lp->lock);
  546. }
  547. static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
  548. {
  549. u16 *p16 = (u16 *) skb->data;
  550. u32 *p32;
  551. u8 *p8;
  552. void __iomem *pbuf = piobuf;
  553. /* We know here that both src and dest are on a 16bit boundary. */
  554. *p16++ = sbus_readw(pbuf);
  555. p32 = (u32 *) p16;
  556. pbuf += 2;
  557. len -= 2;
  558. while (len >= 4) {
  559. *p32++ = sbus_readl(pbuf);
  560. pbuf += 4;
  561. len -= 4;
  562. }
  563. p8 = (u8 *) p32;
  564. if (len >= 2) {
  565. p16 = (u16 *) p32;
  566. *p16++ = sbus_readw(pbuf);
  567. pbuf += 2;
  568. len -= 2;
  569. p8 = (u8 *) p16;
  570. }
  571. if (len >= 1)
  572. *p8 = sbus_readb(pbuf);
  573. }
  574. static void lance_rx_pio(struct net_device *dev)
  575. {
  576. struct lance_private *lp = netdev_priv(dev);
  577. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  578. struct lance_rx_desc __iomem *rd;
  579. unsigned char bits;
  580. int len, entry;
  581. struct sk_buff *skb;
  582. entry = lp->rx_new;
  583. for (rd = &ib->brx_ring [entry];
  584. !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
  585. rd = &ib->brx_ring [entry]) {
  586. /* We got an incomplete frame? */
  587. if ((bits & LE_R1_POK) != LE_R1_POK) {
  588. lp->stats.rx_over_errors++;
  589. lp->stats.rx_errors++;
  590. } else if (bits & LE_R1_ERR) {
  591. /* Count only the end frame as a rx error,
  592. * not the beginning
  593. */
  594. if (bits & LE_R1_BUF) lp->stats.rx_fifo_errors++;
  595. if (bits & LE_R1_CRC) lp->stats.rx_crc_errors++;
  596. if (bits & LE_R1_OFL) lp->stats.rx_over_errors++;
  597. if (bits & LE_R1_FRA) lp->stats.rx_frame_errors++;
  598. if (bits & LE_R1_EOP) lp->stats.rx_errors++;
  599. } else {
  600. len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
  601. skb = dev_alloc_skb(len + 2);
  602. if (skb == NULL) {
  603. printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n",
  604. dev->name);
  605. lp->stats.rx_dropped++;
  606. sbus_writew(0, &rd->mblength);
  607. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  608. lp->rx_new = RX_NEXT(entry);
  609. return;
  610. }
  611. lp->stats.rx_bytes += len;
  612. skb->dev = dev;
  613. skb_reserve (skb, 2); /* 16 byte align */
  614. skb_put(skb, len); /* make room */
  615. lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
  616. skb->protocol = eth_type_trans(skb, dev);
  617. netif_rx(skb);
  618. dev->last_rx = jiffies;
  619. lp->stats.rx_packets++;
  620. }
  621. /* Return the packet to the pool */
  622. sbus_writew(0, &rd->mblength);
  623. sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
  624. entry = RX_NEXT(entry);
  625. }
  626. lp->rx_new = entry;
  627. }
  628. static void lance_tx_pio(struct net_device *dev)
  629. {
  630. struct lance_private *lp = netdev_priv(dev);
  631. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  632. int i, j;
  633. spin_lock(&lp->lock);
  634. j = lp->tx_old;
  635. for (i = j; i != lp->tx_new; i = j) {
  636. struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
  637. u8 bits = sbus_readb(&td->tmd1_bits);
  638. /* If we hit a packet not owned by us, stop */
  639. if (bits & LE_T1_OWN)
  640. break;
  641. if (bits & LE_T1_ERR) {
  642. u16 status = sbus_readw(&td->misc);
  643. lp->stats.tx_errors++;
  644. if (status & LE_T3_RTY) lp->stats.tx_aborted_errors++;
  645. if (status & LE_T3_LCOL) lp->stats.tx_window_errors++;
  646. if (status & LE_T3_CLOS) {
  647. lp->stats.tx_carrier_errors++;
  648. if (lp->auto_select) {
  649. lp->tpe = 1 - lp->tpe;
  650. printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
  651. dev->name, lp->tpe?"TPE":"AUI");
  652. STOP_LANCE(lp);
  653. lp->init_ring(dev);
  654. load_csrs(lp);
  655. init_restart_lance(lp);
  656. goto out;
  657. }
  658. }
  659. /* Buffer errors and underflows turn off the
  660. * transmitter, restart the adapter.
  661. */
  662. if (status & (LE_T3_BUF|LE_T3_UFL)) {
  663. lp->stats.tx_fifo_errors++;
  664. printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
  665. dev->name);
  666. STOP_LANCE(lp);
  667. lp->init_ring(dev);
  668. load_csrs(lp);
  669. init_restart_lance(lp);
  670. goto out;
  671. }
  672. } else if ((bits & LE_T1_POK) == LE_T1_POK) {
  673. /*
  674. * So we don't count the packet more than once.
  675. */
  676. sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
  677. /* One collision before packet was sent. */
  678. if (bits & LE_T1_EONE)
  679. lp->stats.collisions++;
  680. /* More than one collision, be optimistic. */
  681. if (bits & LE_T1_EMORE)
  682. lp->stats.collisions += 2;
  683. lp->stats.tx_packets++;
  684. }
  685. j = TX_NEXT(j);
  686. }
  687. lp->tx_old = j;
  688. if (netif_queue_stopped(dev) &&
  689. TX_BUFFS_AVAIL > 0)
  690. netif_wake_queue(dev);
  691. out:
  692. spin_unlock(&lp->lock);
  693. }
  694. static irqreturn_t lance_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  695. {
  696. struct net_device *dev = (struct net_device *)dev_id;
  697. struct lance_private *lp = netdev_priv(dev);
  698. int csr0;
  699. sbus_writew(LE_CSR0, lp->lregs + RAP);
  700. csr0 = sbus_readw(lp->lregs + RDP);
  701. /* Acknowledge all the interrupt sources ASAP */
  702. sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
  703. lp->lregs + RDP);
  704. if ((csr0 & LE_C0_ERR) != 0) {
  705. /* Clear the error condition */
  706. sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
  707. LE_C0_CERR | LE_C0_MERR),
  708. lp->lregs + RDP);
  709. }
  710. if (csr0 & LE_C0_RINT)
  711. lp->rx(dev);
  712. if (csr0 & LE_C0_TINT)
  713. lp->tx(dev);
  714. if (csr0 & LE_C0_BABL)
  715. lp->stats.tx_errors++;
  716. if (csr0 & LE_C0_MISS)
  717. lp->stats.rx_errors++;
  718. if (csr0 & LE_C0_MERR) {
  719. if (lp->dregs) {
  720. u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
  721. printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
  722. dev->name, csr0, addr & 0xffffff);
  723. } else {
  724. printk(KERN_ERR "%s: Memory error, status %04x\n",
  725. dev->name, csr0);
  726. }
  727. sbus_writew(LE_C0_STOP, lp->lregs + RDP);
  728. if (lp->dregs) {
  729. u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
  730. dma_csr |= DMA_FIFO_INV;
  731. sbus_writel(dma_csr, lp->dregs + DMA_CSR);
  732. }
  733. lp->init_ring(dev);
  734. load_csrs(lp);
  735. init_restart_lance(lp);
  736. netif_wake_queue(dev);
  737. }
  738. sbus_writew(LE_C0_INEA, lp->lregs + RDP);
  739. return IRQ_HANDLED;
  740. }
  741. /* Build a fake network packet and send it to ourselves. */
  742. static void build_fake_packet(struct lance_private *lp)
  743. {
  744. struct net_device *dev = lp->dev;
  745. int i, entry;
  746. entry = lp->tx_new & TX_RING_MOD_MASK;
  747. if (lp->pio_buffer) {
  748. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  749. u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
  750. struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
  751. for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
  752. sbus_writew(0, &packet[i]);
  753. for (i = 0; i < 6; i++) {
  754. sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
  755. sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
  756. }
  757. sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
  758. sbus_writew(0, &ib->btx_ring[entry].misc);
  759. sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  760. } else {
  761. struct lance_init_block *ib = lp->init_block_mem;
  762. u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
  763. struct ethhdr *eth = (struct ethhdr *) packet;
  764. memset(packet, 0, ETH_ZLEN);
  765. for (i = 0; i < 6; i++) {
  766. eth->h_dest[i] = dev->dev_addr[i];
  767. eth->h_source[i] = dev->dev_addr[i];
  768. }
  769. ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
  770. ib->btx_ring[entry].misc = 0;
  771. ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
  772. }
  773. lp->tx_new = TX_NEXT(entry);
  774. }
  775. struct net_device *last_dev;
  776. static int lance_open(struct net_device *dev)
  777. {
  778. struct lance_private *lp = netdev_priv(dev);
  779. int status = 0;
  780. last_dev = dev;
  781. STOP_LANCE(lp);
  782. if (request_irq(dev->irq, &lance_interrupt, SA_SHIRQ,
  783. lancestr, (void *) dev)) {
  784. printk(KERN_ERR "Lance: Can't get irq %s\n", __irq_itoa(dev->irq));
  785. return -EAGAIN;
  786. }
  787. /* On the 4m, setup the ledma to provide the upper bits for buffers */
  788. if (lp->dregs) {
  789. u32 regval = lp->init_block_dvma & 0xff000000;
  790. sbus_writel(regval, lp->dregs + DMA_TEST);
  791. }
  792. /* Set mode and clear multicast filter only at device open,
  793. * so that lance_init_ring() called at any error will not
  794. * forget multicast filters.
  795. *
  796. * BTW it is common bug in all lance drivers! --ANK
  797. */
  798. if (lp->pio_buffer) {
  799. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  800. sbus_writew(0, &ib->mode);
  801. sbus_writel(0, &ib->filter[0]);
  802. sbus_writel(0, &ib->filter[1]);
  803. } else {
  804. struct lance_init_block *ib = lp->init_block_mem;
  805. ib->mode = 0;
  806. ib->filter [0] = 0;
  807. ib->filter [1] = 0;
  808. }
  809. lp->init_ring(dev);
  810. load_csrs(lp);
  811. netif_start_queue(dev);
  812. status = init_restart_lance(lp);
  813. if (!status && lp->auto_select) {
  814. build_fake_packet(lp);
  815. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  816. }
  817. return status;
  818. }
  819. static int lance_close(struct net_device *dev)
  820. {
  821. struct lance_private *lp = netdev_priv(dev);
  822. netif_stop_queue(dev);
  823. del_timer_sync(&lp->multicast_timer);
  824. STOP_LANCE(lp);
  825. free_irq(dev->irq, (void *) dev);
  826. return 0;
  827. }
  828. static int lance_reset(struct net_device *dev)
  829. {
  830. struct lance_private *lp = netdev_priv(dev);
  831. int status;
  832. STOP_LANCE(lp);
  833. /* On the 4m, reset the dma too */
  834. if (lp->dregs) {
  835. u32 csr, addr;
  836. printk(KERN_ERR "resetting ledma\n");
  837. csr = sbus_readl(lp->dregs + DMA_CSR);
  838. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  839. udelay(200);
  840. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  841. addr = lp->init_block_dvma & 0xff000000;
  842. sbus_writel(addr, lp->dregs + DMA_TEST);
  843. }
  844. lp->init_ring(dev);
  845. load_csrs(lp);
  846. dev->trans_start = jiffies;
  847. status = init_restart_lance(lp);
  848. return status;
  849. }
  850. static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
  851. {
  852. void __iomem *piobuf = dest;
  853. u32 *p32;
  854. u16 *p16;
  855. u8 *p8;
  856. switch ((unsigned long)src & 0x3) {
  857. case 0:
  858. p32 = (u32 *) src;
  859. while (len >= 4) {
  860. sbus_writel(*p32, piobuf);
  861. p32++;
  862. piobuf += 4;
  863. len -= 4;
  864. }
  865. src = (char *) p32;
  866. break;
  867. case 1:
  868. case 3:
  869. p8 = (u8 *) src;
  870. while (len >= 4) {
  871. u32 val;
  872. val = p8[0] << 24;
  873. val |= p8[1] << 16;
  874. val |= p8[2] << 8;
  875. val |= p8[3];
  876. sbus_writel(val, piobuf);
  877. p8 += 4;
  878. piobuf += 4;
  879. len -= 4;
  880. }
  881. src = (char *) p8;
  882. break;
  883. case 2:
  884. p16 = (u16 *) src;
  885. while (len >= 4) {
  886. u32 val = p16[0]<<16 | p16[1];
  887. sbus_writel(val, piobuf);
  888. p16 += 2;
  889. piobuf += 4;
  890. len -= 4;
  891. }
  892. src = (char *) p16;
  893. break;
  894. };
  895. if (len >= 2) {
  896. u16 val = src[0] << 8 | src[1];
  897. sbus_writew(val, piobuf);
  898. src += 2;
  899. piobuf += 2;
  900. len -= 2;
  901. }
  902. if (len >= 1)
  903. sbus_writeb(src[0], piobuf);
  904. }
  905. static void lance_piozero(void __iomem *dest, int len)
  906. {
  907. void __iomem *piobuf = dest;
  908. if ((unsigned long)piobuf & 1) {
  909. sbus_writeb(0, piobuf);
  910. piobuf += 1;
  911. len -= 1;
  912. if (len == 0)
  913. return;
  914. }
  915. if (len == 1) {
  916. sbus_writeb(0, piobuf);
  917. return;
  918. }
  919. if ((unsigned long)piobuf & 2) {
  920. sbus_writew(0, piobuf);
  921. piobuf += 2;
  922. len -= 2;
  923. if (len == 0)
  924. return;
  925. }
  926. while (len >= 4) {
  927. sbus_writel(0, piobuf);
  928. piobuf += 4;
  929. len -= 4;
  930. }
  931. if (len >= 2) {
  932. sbus_writew(0, piobuf);
  933. piobuf += 2;
  934. len -= 2;
  935. }
  936. if (len >= 1)
  937. sbus_writeb(0, piobuf);
  938. }
  939. static void lance_tx_timeout(struct net_device *dev)
  940. {
  941. struct lance_private *lp = netdev_priv(dev);
  942. printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
  943. dev->name, sbus_readw(lp->lregs + RDP));
  944. lance_reset(dev);
  945. netif_wake_queue(dev);
  946. }
  947. static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
  948. {
  949. struct lance_private *lp = netdev_priv(dev);
  950. int entry, skblen, len;
  951. skblen = skb->len;
  952. len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
  953. spin_lock_irq(&lp->lock);
  954. lp->stats.tx_bytes += len;
  955. entry = lp->tx_new & TX_RING_MOD_MASK;
  956. if (lp->pio_buffer) {
  957. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  958. sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
  959. sbus_writew(0, &ib->btx_ring[entry].misc);
  960. lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
  961. if (len != skblen)
  962. lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
  963. sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
  964. } else {
  965. struct lance_init_block *ib = lp->init_block_mem;
  966. ib->btx_ring [entry].length = (-len) | 0xf000;
  967. ib->btx_ring [entry].misc = 0;
  968. memcpy((char *)&ib->tx_buf [entry][0], skb->data, skblen);
  969. if (len != skblen)
  970. memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
  971. ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
  972. }
  973. lp->tx_new = TX_NEXT(entry);
  974. if (TX_BUFFS_AVAIL <= 0)
  975. netif_stop_queue(dev);
  976. /* Kick the lance: transmit now */
  977. sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
  978. /* Read back CSR to invalidate the E-Cache.
  979. * This is needed, because DMA_DSBL_WR_INV is set.
  980. */
  981. if (lp->dregs)
  982. sbus_readw(lp->lregs + RDP);
  983. spin_unlock_irq(&lp->lock);
  984. dev->trans_start = jiffies;
  985. dev_kfree_skb(skb);
  986. return 0;
  987. }
  988. static struct net_device_stats *lance_get_stats(struct net_device *dev)
  989. {
  990. struct lance_private *lp = netdev_priv(dev);
  991. return &lp->stats;
  992. }
  993. /* taken from the depca driver */
  994. static void lance_load_multicast(struct net_device *dev)
  995. {
  996. struct lance_private *lp = netdev_priv(dev);
  997. struct dev_mc_list *dmi = dev->mc_list;
  998. char *addrs;
  999. int i;
  1000. u32 crc;
  1001. u32 val;
  1002. /* set all multicast bits */
  1003. if (dev->flags & IFF_ALLMULTI)
  1004. val = ~0;
  1005. else
  1006. val = 0;
  1007. if (lp->pio_buffer) {
  1008. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1009. sbus_writel(val, &ib->filter[0]);
  1010. sbus_writel(val, &ib->filter[1]);
  1011. } else {
  1012. struct lance_init_block *ib = lp->init_block_mem;
  1013. ib->filter [0] = val;
  1014. ib->filter [1] = val;
  1015. }
  1016. if (dev->flags & IFF_ALLMULTI)
  1017. return;
  1018. /* Add addresses */
  1019. for (i = 0; i < dev->mc_count; i++) {
  1020. addrs = dmi->dmi_addr;
  1021. dmi = dmi->next;
  1022. /* multicast address? */
  1023. if (!(*addrs & 1))
  1024. continue;
  1025. crc = ether_crc_le(6, addrs);
  1026. crc = crc >> 26;
  1027. if (lp->pio_buffer) {
  1028. struct lance_init_block __iomem *ib = lp->init_block_iomem;
  1029. u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
  1030. u16 tmp = sbus_readw(&mcast_table[crc>>4]);
  1031. tmp |= 1 << (crc & 0xf);
  1032. sbus_writew(tmp, &mcast_table[crc>>4]);
  1033. } else {
  1034. struct lance_init_block *ib = lp->init_block_mem;
  1035. u16 *mcast_table = (u16 *) &ib->filter;
  1036. mcast_table [crc >> 4] |= 1 << (crc & 0xf);
  1037. }
  1038. }
  1039. }
  1040. static void lance_set_multicast(struct net_device *dev)
  1041. {
  1042. struct lance_private *lp = netdev_priv(dev);
  1043. struct lance_init_block *ib_mem = lp->init_block_mem;
  1044. struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
  1045. u16 mode;
  1046. if (!netif_running(dev))
  1047. return;
  1048. if (lp->tx_old != lp->tx_new) {
  1049. mod_timer(&lp->multicast_timer, jiffies + 4);
  1050. netif_wake_queue(dev);
  1051. return;
  1052. }
  1053. netif_stop_queue(dev);
  1054. STOP_LANCE(lp);
  1055. lp->init_ring(dev);
  1056. if (lp->pio_buffer)
  1057. mode = sbus_readw(&ib_iomem->mode);
  1058. else
  1059. mode = ib_mem->mode;
  1060. if (dev->flags & IFF_PROMISC) {
  1061. mode |= LE_MO_PROM;
  1062. if (lp->pio_buffer)
  1063. sbus_writew(mode, &ib_iomem->mode);
  1064. else
  1065. ib_mem->mode = mode;
  1066. } else {
  1067. mode &= ~LE_MO_PROM;
  1068. if (lp->pio_buffer)
  1069. sbus_writew(mode, &ib_iomem->mode);
  1070. else
  1071. ib_mem->mode = mode;
  1072. lance_load_multicast(dev);
  1073. }
  1074. load_csrs(lp);
  1075. init_restart_lance(lp);
  1076. netif_wake_queue(dev);
  1077. }
  1078. static void lance_set_multicast_retry(unsigned long _opaque)
  1079. {
  1080. struct net_device *dev = (struct net_device *) _opaque;
  1081. lance_set_multicast(dev);
  1082. }
  1083. static void lance_free_hwresources(struct lance_private *lp)
  1084. {
  1085. if (lp->lregs)
  1086. sbus_iounmap(lp->lregs, LANCE_REG_SIZE);
  1087. if (lp->init_block_iomem) {
  1088. sbus_iounmap(lp->init_block_iomem,
  1089. sizeof(struct lance_init_block));
  1090. } else if (lp->init_block_mem) {
  1091. sbus_free_consistent(lp->sdev,
  1092. sizeof(struct lance_init_block),
  1093. lp->init_block_mem,
  1094. lp->init_block_dvma);
  1095. }
  1096. }
  1097. /* Ethtool support... */
  1098. static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1099. {
  1100. struct lance_private *lp = netdev_priv(dev);
  1101. strcpy(info->driver, "sunlance");
  1102. strcpy(info->version, "2.02");
  1103. sprintf(info->bus_info, "SBUS:%d",
  1104. lp->sdev->slot);
  1105. }
  1106. static u32 sparc_lance_get_link(struct net_device *dev)
  1107. {
  1108. /* We really do not keep track of this, but this
  1109. * is better than not reporting anything at all.
  1110. */
  1111. return 1;
  1112. }
  1113. static struct ethtool_ops sparc_lance_ethtool_ops = {
  1114. .get_drvinfo = sparc_lance_get_drvinfo,
  1115. .get_link = sparc_lance_get_link,
  1116. };
  1117. static int __init sparc_lance_init(struct sbus_dev *sdev,
  1118. struct sbus_dma *ledma,
  1119. struct sbus_dev *lebuffer)
  1120. {
  1121. static unsigned version_printed;
  1122. struct net_device *dev;
  1123. struct lance_private *lp;
  1124. int i;
  1125. dev = alloc_etherdev(sizeof(struct lance_private) + 8);
  1126. if (!dev)
  1127. return -ENOMEM;
  1128. lp = netdev_priv(dev);
  1129. memset(lp, 0, sizeof(*lp));
  1130. if (sparc_lance_debug && version_printed++ == 0)
  1131. printk (KERN_INFO "%s", version);
  1132. spin_lock_init(&lp->lock);
  1133. /* Copy the IDPROM ethernet address to the device structure, later we
  1134. * will copy the address in the device structure to the lance
  1135. * initialization block.
  1136. */
  1137. for (i = 0; i < 6; i++)
  1138. dev->dev_addr[i] = idprom->id_ethaddr[i];
  1139. /* Get the IO region */
  1140. lp->lregs = sbus_ioremap(&sdev->resource[0], 0,
  1141. LANCE_REG_SIZE, lancestr);
  1142. if (!lp->lregs) {
  1143. printk(KERN_ERR "SunLance: Cannot map registers.\n");
  1144. goto fail;
  1145. }
  1146. lp->sdev = sdev;
  1147. if (lebuffer) {
  1148. /* sanity check */
  1149. if (lebuffer->resource[0].start & 7) {
  1150. printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
  1151. goto fail;
  1152. }
  1153. lp->init_block_iomem =
  1154. sbus_ioremap(&lebuffer->resource[0], 0,
  1155. sizeof(struct lance_init_block), "lebuffer");
  1156. if (!lp->init_block_iomem) {
  1157. printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
  1158. goto fail;
  1159. }
  1160. lp->init_block_dvma = 0;
  1161. lp->pio_buffer = 1;
  1162. lp->init_ring = lance_init_ring_pio;
  1163. lp->rx = lance_rx_pio;
  1164. lp->tx = lance_tx_pio;
  1165. } else {
  1166. lp->init_block_mem =
  1167. sbus_alloc_consistent(sdev, sizeof(struct lance_init_block),
  1168. &lp->init_block_dvma);
  1169. if (!lp->init_block_mem || lp->init_block_dvma == 0) {
  1170. printk(KERN_ERR "SunLance: Cannot allocate consistent DMA memory.\n");
  1171. goto fail;
  1172. }
  1173. lp->pio_buffer = 0;
  1174. lp->init_ring = lance_init_ring_dvma;
  1175. lp->rx = lance_rx_dvma;
  1176. lp->tx = lance_tx_dvma;
  1177. }
  1178. lp->busmaster_regval = prom_getintdefault(sdev->prom_node,
  1179. "busmaster-regval",
  1180. (LE_C3_BSWP | LE_C3_ACON |
  1181. LE_C3_BCON));
  1182. lp->name = lancestr;
  1183. lp->ledma = ledma;
  1184. lp->burst_sizes = 0;
  1185. if (lp->ledma) {
  1186. char prop[6];
  1187. unsigned int sbmask;
  1188. u32 csr;
  1189. /* Find burst-size property for ledma */
  1190. lp->burst_sizes = prom_getintdefault(ledma->sdev->prom_node,
  1191. "burst-sizes", 0);
  1192. /* ledma may be capable of fast bursts, but sbus may not. */
  1193. sbmask = prom_getintdefault(ledma->sdev->bus->prom_node,
  1194. "burst-sizes", DMA_BURSTBITS);
  1195. lp->burst_sizes &= sbmask;
  1196. /* Get the cable-selection property */
  1197. memset(prop, 0, sizeof(prop));
  1198. prom_getstring(ledma->sdev->prom_node, "cable-selection",
  1199. prop, sizeof(prop));
  1200. if (prop[0] == 0) {
  1201. int topnd, nd;
  1202. printk(KERN_INFO "SunLance: using auto-carrier-detection.\n");
  1203. /* Is this found at /options .attributes in all
  1204. * Prom versions? XXX
  1205. */
  1206. topnd = prom_getchild(prom_root_node);
  1207. nd = prom_searchsiblings(topnd, "options");
  1208. if (!nd)
  1209. goto no_link_test;
  1210. if (!prom_node_has_property(nd, "tpe-link-test?"))
  1211. goto no_link_test;
  1212. memset(prop, 0, sizeof(prop));
  1213. prom_getstring(nd, "tpe-link-test?", prop,
  1214. sizeof(prop));
  1215. if (strcmp(prop, "true")) {
  1216. printk(KERN_NOTICE "SunLance: warning: overriding option "
  1217. "'tpe-link-test?'\n");
  1218. printk(KERN_NOTICE "SunLance: warning: mail any problems "
  1219. "to ecd@skynet.be\n");
  1220. auxio_set_lte(AUXIO_LTE_ON);
  1221. }
  1222. no_link_test:
  1223. lp->auto_select = 1;
  1224. lp->tpe = 0;
  1225. } else if (!strcmp(prop, "aui")) {
  1226. lp->auto_select = 0;
  1227. lp->tpe = 0;
  1228. } else {
  1229. lp->auto_select = 0;
  1230. lp->tpe = 1;
  1231. }
  1232. lp->dregs = ledma->regs;
  1233. /* Reset ledma */
  1234. csr = sbus_readl(lp->dregs + DMA_CSR);
  1235. sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
  1236. udelay(200);
  1237. sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
  1238. } else
  1239. lp->dregs = NULL;
  1240. lp->dev = dev;
  1241. SET_MODULE_OWNER(dev);
  1242. dev->open = &lance_open;
  1243. dev->stop = &lance_close;
  1244. dev->hard_start_xmit = &lance_start_xmit;
  1245. dev->tx_timeout = &lance_tx_timeout;
  1246. dev->watchdog_timeo = 5*HZ;
  1247. dev->get_stats = &lance_get_stats;
  1248. dev->set_multicast_list = &lance_set_multicast;
  1249. dev->ethtool_ops = &sparc_lance_ethtool_ops;
  1250. dev->irq = sdev->irqs[0];
  1251. dev->dma = 0;
  1252. /* We cannot sleep if the chip is busy during a
  1253. * multicast list update event, because such events
  1254. * can occur from interrupts (ex. IPv6). So we
  1255. * use a timer to try again later when necessary. -DaveM
  1256. */
  1257. init_timer(&lp->multicast_timer);
  1258. lp->multicast_timer.data = (unsigned long) dev;
  1259. lp->multicast_timer.function = &lance_set_multicast_retry;
  1260. if (register_netdev(dev)) {
  1261. printk(KERN_ERR "SunLance: Cannot register device.\n");
  1262. goto fail;
  1263. }
  1264. lp->next_module = root_lance_dev;
  1265. root_lance_dev = lp;
  1266. printk(KERN_INFO "%s: LANCE ", dev->name);
  1267. for (i = 0; i < 6; i++)
  1268. printk("%2.2x%c", dev->dev_addr[i],
  1269. i == 5 ? ' ': ':');
  1270. printk("\n");
  1271. return 0;
  1272. fail:
  1273. lance_free_hwresources(lp);
  1274. free_netdev(dev);
  1275. return -ENODEV;
  1276. }
  1277. /* On 4m, find the associated dma for the lance chip */
  1278. static inline struct sbus_dma *find_ledma(struct sbus_dev *sdev)
  1279. {
  1280. struct sbus_dma *p;
  1281. for_each_dvma(p) {
  1282. if (p->sdev == sdev)
  1283. return p;
  1284. }
  1285. return NULL;
  1286. }
  1287. #ifdef CONFIG_SUN4
  1288. #include <asm/sun4paddr.h>
  1289. #include <asm/machines.h>
  1290. /* Find all the lance cards on the system and initialize them */
  1291. static int __init sparc_lance_probe(void)
  1292. {
  1293. static struct sbus_dev sdev;
  1294. static int called;
  1295. root_lance_dev = NULL;
  1296. if (called)
  1297. return -ENODEV;
  1298. called++;
  1299. if ((idprom->id_machtype == (SM_SUN4|SM_4_330)) ||
  1300. (idprom->id_machtype == (SM_SUN4|SM_4_470))) {
  1301. memset(&sdev, 0, sizeof(sdev));
  1302. sdev.reg_addrs[0].phys_addr = sun4_eth_physaddr;
  1303. sdev.irqs[0] = 6;
  1304. return sparc_lance_init(&sdev, NULL, NULL);
  1305. }
  1306. return -ENODEV;
  1307. }
  1308. #else /* !CONFIG_SUN4 */
  1309. /* Find all the lance cards on the system and initialize them */
  1310. static int __init sparc_lance_probe(void)
  1311. {
  1312. struct sbus_bus *bus;
  1313. struct sbus_dev *sdev = NULL;
  1314. struct sbus_dma *ledma = NULL;
  1315. static int called;
  1316. int cards = 0, v;
  1317. root_lance_dev = NULL;
  1318. if (called)
  1319. return -ENODEV;
  1320. called++;
  1321. for_each_sbus (bus) {
  1322. for_each_sbusdev (sdev, bus) {
  1323. if (strcmp(sdev->prom_name, "le") == 0) {
  1324. cards++;
  1325. if ((v = sparc_lance_init(sdev, NULL, NULL)))
  1326. return v;
  1327. continue;
  1328. }
  1329. if (strcmp(sdev->prom_name, "ledma") == 0) {
  1330. cards++;
  1331. ledma = find_ledma(sdev);
  1332. if ((v = sparc_lance_init(sdev->child,
  1333. ledma, NULL)))
  1334. return v;
  1335. continue;
  1336. }
  1337. if (strcmp(sdev->prom_name, "lebuffer") == 0){
  1338. cards++;
  1339. if ((v = sparc_lance_init(sdev->child,
  1340. NULL, sdev)))
  1341. return v;
  1342. continue;
  1343. }
  1344. } /* for each sbusdev */
  1345. } /* for each sbus */
  1346. if (!cards)
  1347. return -ENODEV;
  1348. return 0;
  1349. }
  1350. #endif /* !CONFIG_SUN4 */
  1351. static void __exit sparc_lance_cleanup(void)
  1352. {
  1353. struct lance_private *lp;
  1354. while (root_lance_dev) {
  1355. lp = root_lance_dev->next_module;
  1356. unregister_netdev(root_lance_dev->dev);
  1357. lance_free_hwresources(root_lance_dev);
  1358. free_netdev(root_lance_dev->dev);
  1359. root_lance_dev = lp;
  1360. }
  1361. }
  1362. module_init(sparc_lance_probe);
  1363. module_exit(sparc_lance_cleanup);
  1364. MODULE_LICENSE("GPL");