intel_dp_mst.c 20 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_atomic_helper.h>
  29. #include <drm/drm_crtc_helper.h>
  30. #include <drm/drm_edid.h>
  31. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  32. struct intel_crtc_state *pipe_config,
  33. struct drm_connector_state *conn_state)
  34. {
  35. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  36. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  37. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  38. struct intel_dp *intel_dp = &intel_dig_port->dp;
  39. struct intel_connector *connector =
  40. to_intel_connector(conn_state->connector);
  41. struct drm_atomic_state *state = pipe_config->base.state;
  42. int bpp;
  43. int lane_count, slots;
  44. const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
  45. int mst_pbn;
  46. bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc,
  47. DP_DPCD_QUIRK_LIMITED_M_N);
  48. pipe_config->has_pch_encoder = false;
  49. bpp = 24;
  50. if (intel_dp->compliance.test_data.bpc) {
  51. bpp = intel_dp->compliance.test_data.bpc * 3;
  52. DRM_DEBUG_KMS("Setting pipe bpp to %d\n",
  53. bpp);
  54. }
  55. /*
  56. * for MST we always configure max link bw - the spec doesn't
  57. * seem to suggest we should do otherwise.
  58. */
  59. lane_count = intel_dp_max_lane_count(intel_dp);
  60. pipe_config->lane_count = lane_count;
  61. pipe_config->pipe_bpp = bpp;
  62. pipe_config->port_clock = intel_dp_max_link_rate(intel_dp);
  63. if (drm_dp_mst_port_has_audio(&intel_dp->mst_mgr, connector->port))
  64. pipe_config->has_audio = true;
  65. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, bpp);
  66. pipe_config->pbn = mst_pbn;
  67. slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
  68. connector->port, mst_pbn);
  69. if (slots < 0) {
  70. DRM_DEBUG_KMS("failed finding vcpi slots:%d\n", slots);
  71. return false;
  72. }
  73. intel_link_compute_m_n(bpp, lane_count,
  74. adjusted_mode->crtc_clock,
  75. pipe_config->port_clock,
  76. &pipe_config->dp_m_n,
  77. reduce_m_n);
  78. pipe_config->dp_m_n.tu = slots;
  79. if (IS_GEN9_LP(dev_priv))
  80. pipe_config->lane_lat_optim_mask =
  81. bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
  82. intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
  83. return true;
  84. }
  85. static int intel_dp_mst_atomic_check(struct drm_connector *connector,
  86. struct drm_connector_state *new_conn_state)
  87. {
  88. struct drm_atomic_state *state = new_conn_state->state;
  89. struct drm_connector_state *old_conn_state;
  90. struct drm_crtc *old_crtc;
  91. struct drm_crtc_state *crtc_state;
  92. int slots, ret = 0;
  93. old_conn_state = drm_atomic_get_old_connector_state(state, connector);
  94. old_crtc = old_conn_state->crtc;
  95. if (!old_crtc)
  96. return ret;
  97. crtc_state = drm_atomic_get_new_crtc_state(state, old_crtc);
  98. slots = to_intel_crtc_state(crtc_state)->dp_m_n.tu;
  99. if (drm_atomic_crtc_needs_modeset(crtc_state) && slots > 0) {
  100. struct drm_dp_mst_topology_mgr *mgr;
  101. struct drm_encoder *old_encoder;
  102. old_encoder = old_conn_state->best_encoder;
  103. mgr = &enc_to_mst(old_encoder)->primary->dp.mst_mgr;
  104. ret = drm_dp_atomic_release_vcpi_slots(state, mgr, slots);
  105. if (ret)
  106. DRM_DEBUG_KMS("failed releasing %d vcpi slots:%d\n", slots, ret);
  107. else
  108. to_intel_crtc_state(crtc_state)->dp_m_n.tu = 0;
  109. }
  110. return ret;
  111. }
  112. static void intel_mst_disable_dp(struct intel_encoder *encoder,
  113. const struct intel_crtc_state *old_crtc_state,
  114. const struct drm_connector_state *old_conn_state)
  115. {
  116. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  117. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  118. struct intel_dp *intel_dp = &intel_dig_port->dp;
  119. struct intel_connector *connector =
  120. to_intel_connector(old_conn_state->connector);
  121. int ret;
  122. DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
  123. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
  124. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  125. if (ret) {
  126. DRM_ERROR("failed to update payload %d\n", ret);
  127. }
  128. if (old_crtc_state->has_audio)
  129. intel_audio_codec_disable(encoder);
  130. }
  131. static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
  132. const struct intel_crtc_state *old_crtc_state,
  133. const struct drm_connector_state *old_conn_state)
  134. {
  135. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  136. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  137. struct intel_dp *intel_dp = &intel_dig_port->dp;
  138. struct intel_connector *connector =
  139. to_intel_connector(old_conn_state->connector);
  140. /* this can fail */
  141. drm_dp_check_act_status(&intel_dp->mst_mgr);
  142. /* and this can also fail */
  143. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  144. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
  145. /*
  146. * Power down mst path before disabling the port, otherwise we end
  147. * up getting interrupts from the sink upon detecting link loss.
  148. */
  149. drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
  150. false);
  151. intel_dp->active_mst_links--;
  152. intel_mst->connector = NULL;
  153. if (intel_dp->active_mst_links == 0) {
  154. intel_dig_port->base.post_disable(&intel_dig_port->base,
  155. NULL, NULL);
  156. }
  157. DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
  158. }
  159. static void intel_mst_pre_pll_enable_dp(struct intel_encoder *encoder,
  160. const struct intel_crtc_state *pipe_config,
  161. const struct drm_connector_state *conn_state)
  162. {
  163. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  164. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  165. struct intel_dp *intel_dp = &intel_dig_port->dp;
  166. if (intel_dp->active_mst_links == 0 &&
  167. intel_dig_port->base.pre_pll_enable)
  168. intel_dig_port->base.pre_pll_enable(&intel_dig_port->base,
  169. pipe_config, NULL);
  170. }
  171. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
  172. const struct intel_crtc_state *pipe_config,
  173. const struct drm_connector_state *conn_state)
  174. {
  175. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  176. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  177. struct intel_dp *intel_dp = &intel_dig_port->dp;
  178. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  179. enum port port = intel_dig_port->port;
  180. struct intel_connector *connector =
  181. to_intel_connector(conn_state->connector);
  182. int ret;
  183. uint32_t temp;
  184. /* MST encoders are bound to a crtc, not to a connector,
  185. * force the mapping here for get_hw_state.
  186. */
  187. connector->encoder = encoder;
  188. intel_mst->connector = connector;
  189. DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
  190. drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
  191. if (intel_dp->active_mst_links == 0)
  192. intel_dig_port->base.pre_enable(&intel_dig_port->base,
  193. pipe_config, NULL);
  194. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  195. connector->port,
  196. pipe_config->pbn,
  197. pipe_config->dp_m_n.tu);
  198. if (ret == false) {
  199. DRM_ERROR("failed to allocate vcpi\n");
  200. return;
  201. }
  202. intel_dp->active_mst_links++;
  203. temp = I915_READ(DP_TP_STATUS(port));
  204. I915_WRITE(DP_TP_STATUS(port), temp);
  205. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  206. }
  207. static void intel_mst_enable_dp(struct intel_encoder *encoder,
  208. const struct intel_crtc_state *pipe_config,
  209. const struct drm_connector_state *conn_state)
  210. {
  211. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  212. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  213. struct intel_dp *intel_dp = &intel_dig_port->dp;
  214. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  215. enum port port = intel_dig_port->port;
  216. int ret;
  217. DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
  218. if (intel_wait_for_register(dev_priv,
  219. DP_TP_STATUS(port),
  220. DP_TP_STATUS_ACT_SENT,
  221. DP_TP_STATUS_ACT_SENT,
  222. 1))
  223. DRM_ERROR("Timed out waiting for ACT sent\n");
  224. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  225. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  226. if (pipe_config->has_audio)
  227. intel_audio_codec_enable(encoder, pipe_config, conn_state);
  228. }
  229. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  230. enum pipe *pipe)
  231. {
  232. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  233. *pipe = intel_mst->pipe;
  234. if (intel_mst->connector)
  235. return true;
  236. return false;
  237. }
  238. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  239. struct intel_crtc_state *pipe_config)
  240. {
  241. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  242. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  243. struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
  244. struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  245. enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
  246. u32 temp, flags = 0;
  247. pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST);
  248. pipe_config->has_audio =
  249. intel_ddi_is_audio_enabled(dev_priv, crtc);
  250. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  251. if (temp & TRANS_DDI_PHSYNC)
  252. flags |= DRM_MODE_FLAG_PHSYNC;
  253. else
  254. flags |= DRM_MODE_FLAG_NHSYNC;
  255. if (temp & TRANS_DDI_PVSYNC)
  256. flags |= DRM_MODE_FLAG_PVSYNC;
  257. else
  258. flags |= DRM_MODE_FLAG_NVSYNC;
  259. switch (temp & TRANS_DDI_BPC_MASK) {
  260. case TRANS_DDI_BPC_6:
  261. pipe_config->pipe_bpp = 18;
  262. break;
  263. case TRANS_DDI_BPC_8:
  264. pipe_config->pipe_bpp = 24;
  265. break;
  266. case TRANS_DDI_BPC_10:
  267. pipe_config->pipe_bpp = 30;
  268. break;
  269. case TRANS_DDI_BPC_12:
  270. pipe_config->pipe_bpp = 36;
  271. break;
  272. default:
  273. break;
  274. }
  275. pipe_config->base.adjusted_mode.flags |= flags;
  276. pipe_config->lane_count =
  277. ((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
  278. intel_dp_get_m_n(crtc, pipe_config);
  279. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  280. if (IS_GEN9_LP(dev_priv))
  281. pipe_config->lane_lat_optim_mask =
  282. bxt_ddi_phy_get_lane_lat_optim_mask(encoder);
  283. intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
  284. }
  285. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  286. {
  287. struct intel_connector *intel_connector = to_intel_connector(connector);
  288. struct intel_dp *intel_dp = intel_connector->mst_port;
  289. struct edid *edid;
  290. int ret;
  291. if (!intel_dp) {
  292. return intel_connector_update_modes(connector, NULL);
  293. }
  294. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  295. ret = intel_connector_update_modes(connector, edid);
  296. kfree(edid);
  297. return ret;
  298. }
  299. static enum drm_connector_status
  300. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  301. {
  302. struct intel_connector *intel_connector = to_intel_connector(connector);
  303. struct intel_dp *intel_dp = intel_connector->mst_port;
  304. if (!intel_dp)
  305. return connector_status_disconnected;
  306. return drm_dp_mst_detect_port(connector, &intel_dp->mst_mgr, intel_connector->port);
  307. }
  308. static void
  309. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  310. {
  311. struct intel_connector *intel_connector = to_intel_connector(connector);
  312. if (!IS_ERR_OR_NULL(intel_connector->edid))
  313. kfree(intel_connector->edid);
  314. drm_connector_cleanup(connector);
  315. kfree(connector);
  316. }
  317. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  318. .detect = intel_dp_mst_detect,
  319. .fill_modes = drm_helper_probe_single_connector_modes,
  320. .late_register = intel_connector_register,
  321. .early_unregister = intel_connector_unregister,
  322. .destroy = intel_dp_mst_connector_destroy,
  323. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  324. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  325. };
  326. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  327. {
  328. return intel_dp_mst_get_ddc_modes(connector);
  329. }
  330. static enum drm_mode_status
  331. intel_dp_mst_mode_valid(struct drm_connector *connector,
  332. struct drm_display_mode *mode)
  333. {
  334. struct intel_connector *intel_connector = to_intel_connector(connector);
  335. struct intel_dp *intel_dp = intel_connector->mst_port;
  336. int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
  337. int bpp = 24; /* MST uses fixed bpp */
  338. int max_rate, mode_rate, max_lanes, max_link_clock;
  339. if (!intel_dp)
  340. return MODE_ERROR;
  341. max_link_clock = intel_dp_max_link_rate(intel_dp);
  342. max_lanes = intel_dp_max_lane_count(intel_dp);
  343. max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
  344. mode_rate = intel_dp_link_required(mode->clock, bpp);
  345. /* TODO - validate mode against available PBN for link */
  346. if (mode->clock < 10000)
  347. return MODE_CLOCK_LOW;
  348. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  349. return MODE_H_ILLEGAL;
  350. if (mode_rate > max_rate || mode->clock > max_dotclk)
  351. return MODE_CLOCK_HIGH;
  352. return MODE_OK;
  353. }
  354. static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
  355. struct drm_connector_state *state)
  356. {
  357. struct intel_connector *intel_connector = to_intel_connector(connector);
  358. struct intel_dp *intel_dp = intel_connector->mst_port;
  359. struct intel_crtc *crtc = to_intel_crtc(state->crtc);
  360. if (!intel_dp)
  361. return NULL;
  362. return &intel_dp->mst_encoders[crtc->pipe]->base.base;
  363. }
  364. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  365. {
  366. struct intel_connector *intel_connector = to_intel_connector(connector);
  367. struct intel_dp *intel_dp = intel_connector->mst_port;
  368. if (!intel_dp)
  369. return NULL;
  370. return &intel_dp->mst_encoders[0]->base.base;
  371. }
  372. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  373. .get_modes = intel_dp_mst_get_modes,
  374. .mode_valid = intel_dp_mst_mode_valid,
  375. .atomic_best_encoder = intel_mst_atomic_best_encoder,
  376. .best_encoder = intel_mst_best_encoder,
  377. .atomic_check = intel_dp_mst_atomic_check,
  378. };
  379. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  380. {
  381. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  382. drm_encoder_cleanup(encoder);
  383. kfree(intel_mst);
  384. }
  385. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  386. .destroy = intel_dp_mst_encoder_destroy,
  387. };
  388. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  389. {
  390. if (connector->encoder && connector->base.state->crtc) {
  391. enum pipe pipe;
  392. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  393. return false;
  394. return true;
  395. }
  396. return false;
  397. }
  398. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  399. {
  400. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  401. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  402. struct drm_device *dev = intel_dig_port->base.base.dev;
  403. struct drm_i915_private *dev_priv = to_i915(dev);
  404. struct intel_connector *intel_connector;
  405. struct drm_connector *connector;
  406. enum pipe pipe;
  407. int ret;
  408. intel_connector = intel_connector_alloc();
  409. if (!intel_connector)
  410. return NULL;
  411. connector = &intel_connector->base;
  412. ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
  413. DRM_MODE_CONNECTOR_DisplayPort);
  414. if (ret) {
  415. intel_connector_free(intel_connector);
  416. return NULL;
  417. }
  418. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  419. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  420. intel_connector->mst_port = intel_dp;
  421. intel_connector->port = port;
  422. for_each_pipe(dev_priv, pipe) {
  423. struct drm_encoder *enc =
  424. &intel_dp->mst_encoders[pipe]->base.base;
  425. ret = drm_mode_connector_attach_encoder(&intel_connector->base,
  426. enc);
  427. if (ret)
  428. goto err;
  429. }
  430. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  431. drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
  432. ret = drm_mode_connector_set_path_property(connector, pathprop);
  433. if (ret)
  434. goto err;
  435. return connector;
  436. err:
  437. drm_connector_cleanup(connector);
  438. return NULL;
  439. }
  440. static void intel_dp_register_mst_connector(struct drm_connector *connector)
  441. {
  442. struct drm_i915_private *dev_priv = to_i915(connector->dev);
  443. if (dev_priv->fbdev)
  444. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper,
  445. connector);
  446. drm_connector_register(connector);
  447. }
  448. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  449. struct drm_connector *connector)
  450. {
  451. struct intel_connector *intel_connector = to_intel_connector(connector);
  452. struct drm_i915_private *dev_priv = to_i915(connector->dev);
  453. DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id, connector->name);
  454. drm_connector_unregister(connector);
  455. if (dev_priv->fbdev)
  456. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper,
  457. connector);
  458. /* prevent race with the check in ->detect */
  459. drm_modeset_lock(&connector->dev->mode_config.connection_mutex, NULL);
  460. intel_connector->mst_port = NULL;
  461. drm_modeset_unlock(&connector->dev->mode_config.connection_mutex);
  462. drm_connector_unreference(connector);
  463. }
  464. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  465. {
  466. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  467. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  468. struct drm_device *dev = intel_dig_port->base.base.dev;
  469. drm_kms_helper_hotplug_event(dev);
  470. }
  471. static const struct drm_dp_mst_topology_cbs mst_cbs = {
  472. .add_connector = intel_dp_add_mst_connector,
  473. .register_connector = intel_dp_register_mst_connector,
  474. .destroy_connector = intel_dp_destroy_mst_connector,
  475. .hotplug = intel_dp_mst_hotplug,
  476. };
  477. static struct intel_dp_mst_encoder *
  478. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  479. {
  480. struct intel_dp_mst_encoder *intel_mst;
  481. struct intel_encoder *intel_encoder;
  482. struct drm_device *dev = intel_dig_port->base.base.dev;
  483. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  484. if (!intel_mst)
  485. return NULL;
  486. intel_mst->pipe = pipe;
  487. intel_encoder = &intel_mst->base;
  488. intel_mst->primary = intel_dig_port;
  489. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  490. DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
  491. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  492. intel_encoder->power_domain = intel_dig_port->base.power_domain;
  493. intel_encoder->port = intel_dig_port->port;
  494. intel_encoder->crtc_mask = 0x7;
  495. intel_encoder->cloneable = 0;
  496. intel_encoder->compute_config = intel_dp_mst_compute_config;
  497. intel_encoder->disable = intel_mst_disable_dp;
  498. intel_encoder->post_disable = intel_mst_post_disable_dp;
  499. intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
  500. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  501. intel_encoder->enable = intel_mst_enable_dp;
  502. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  503. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  504. return intel_mst;
  505. }
  506. static bool
  507. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  508. {
  509. struct intel_dp *intel_dp = &intel_dig_port->dp;
  510. struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
  511. enum pipe pipe;
  512. for_each_pipe(dev_priv, pipe)
  513. intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe);
  514. return true;
  515. }
  516. int
  517. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  518. {
  519. struct intel_dp *intel_dp = &intel_dig_port->dp;
  520. struct drm_device *dev = intel_dig_port->base.base.dev;
  521. int ret;
  522. intel_dp->can_mst = true;
  523. intel_dp->mst_mgr.cbs = &mst_cbs;
  524. /* create encoders */
  525. intel_dp_create_fake_mst_encoders(intel_dig_port);
  526. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev,
  527. &intel_dp->aux, 16, 3, conn_base_id);
  528. if (ret) {
  529. intel_dp->can_mst = false;
  530. return ret;
  531. }
  532. return 0;
  533. }
  534. void
  535. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  536. {
  537. struct intel_dp *intel_dp = &intel_dig_port->dp;
  538. if (!intel_dp->can_mst)
  539. return;
  540. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  541. /* encoders will get killed by normal cleanup */
  542. }