virtgpu_drv.h 13 KB

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  1. /*
  2. * Copyright (C) 2015 Red Hat, Inc.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. */
  25. #ifndef VIRTIO_DRV_H
  26. #define VIRTIO_DRV_H
  27. #include <linux/virtio.h>
  28. #include <linux/virtio_ids.h>
  29. #include <linux/virtio_config.h>
  30. #include <linux/virtio_gpu.h>
  31. #include <drm/drmP.h>
  32. #include <drm/drm_gem.h>
  33. #include <drm/drm_atomic.h>
  34. #include <drm/drm_crtc_helper.h>
  35. #include <drm/drm_encoder.h>
  36. #include <drm/ttm/ttm_bo_api.h>
  37. #include <drm/ttm/ttm_bo_driver.h>
  38. #include <drm/ttm/ttm_placement.h>
  39. #include <drm/ttm/ttm_module.h>
  40. #define DRIVER_NAME "virtio_gpu"
  41. #define DRIVER_DESC "virtio GPU"
  42. #define DRIVER_DATE "0"
  43. #define DRIVER_MAJOR 0
  44. #define DRIVER_MINOR 0
  45. #define DRIVER_PATCHLEVEL 1
  46. /* virtgpu_drm_bus.c */
  47. int drm_virtio_init(struct drm_driver *driver, struct virtio_device *vdev);
  48. struct virtio_gpu_object {
  49. struct drm_gem_object gem_base;
  50. uint32_t hw_res_handle;
  51. struct sg_table *pages;
  52. void *vmap;
  53. bool dumb;
  54. struct ttm_place placement_code;
  55. struct ttm_placement placement;
  56. struct ttm_buffer_object tbo;
  57. struct ttm_bo_kmap_obj kmap;
  58. };
  59. #define gem_to_virtio_gpu_obj(gobj) \
  60. container_of((gobj), struct virtio_gpu_object, gem_base)
  61. struct virtio_gpu_vbuffer;
  62. struct virtio_gpu_device;
  63. typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev,
  64. struct virtio_gpu_vbuffer *vbuf);
  65. struct virtio_gpu_fence_driver {
  66. atomic64_t last_seq;
  67. uint64_t sync_seq;
  68. uint64_t context;
  69. struct list_head fences;
  70. spinlock_t lock;
  71. };
  72. struct virtio_gpu_fence {
  73. struct dma_fence f;
  74. struct virtio_gpu_fence_driver *drv;
  75. struct list_head node;
  76. uint64_t seq;
  77. };
  78. #define to_virtio_fence(x) \
  79. container_of(x, struct virtio_gpu_fence, f)
  80. struct virtio_gpu_vbuffer {
  81. char *buf;
  82. int size;
  83. void *data_buf;
  84. uint32_t data_size;
  85. char *resp_buf;
  86. int resp_size;
  87. virtio_gpu_resp_cb resp_cb;
  88. struct list_head list;
  89. };
  90. struct virtio_gpu_output {
  91. int index;
  92. struct drm_crtc crtc;
  93. struct drm_connector conn;
  94. struct drm_encoder enc;
  95. struct virtio_gpu_display_one info;
  96. struct virtio_gpu_update_cursor cursor;
  97. int cur_x;
  98. int cur_y;
  99. };
  100. #define drm_crtc_to_virtio_gpu_output(x) \
  101. container_of(x, struct virtio_gpu_output, crtc)
  102. #define drm_connector_to_virtio_gpu_output(x) \
  103. container_of(x, struct virtio_gpu_output, conn)
  104. #define drm_encoder_to_virtio_gpu_output(x) \
  105. container_of(x, struct virtio_gpu_output, enc)
  106. struct virtio_gpu_framebuffer {
  107. struct drm_framebuffer base;
  108. int x1, y1, x2, y2; /* dirty rect */
  109. spinlock_t dirty_lock;
  110. uint32_t hw_res_handle;
  111. };
  112. #define to_virtio_gpu_framebuffer(x) \
  113. container_of(x, struct virtio_gpu_framebuffer, base)
  114. struct virtio_gpu_mman {
  115. struct ttm_bo_global_ref bo_global_ref;
  116. struct drm_global_reference mem_global_ref;
  117. bool mem_global_referenced;
  118. struct ttm_bo_device bdev;
  119. };
  120. struct virtio_gpu_fbdev;
  121. struct virtio_gpu_queue {
  122. struct virtqueue *vq;
  123. spinlock_t qlock;
  124. wait_queue_head_t ack_queue;
  125. struct work_struct dequeue_work;
  126. };
  127. struct virtio_gpu_drv_capset {
  128. uint32_t id;
  129. uint32_t max_version;
  130. uint32_t max_size;
  131. };
  132. struct virtio_gpu_drv_cap_cache {
  133. struct list_head head;
  134. void *caps_cache;
  135. uint32_t id;
  136. uint32_t version;
  137. uint32_t size;
  138. atomic_t is_valid;
  139. };
  140. struct virtio_gpu_device {
  141. struct device *dev;
  142. struct drm_device *ddev;
  143. struct virtio_device *vdev;
  144. struct virtio_gpu_mman mman;
  145. /* pointer to fbdev info structure */
  146. struct virtio_gpu_fbdev *vgfbdev;
  147. struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS];
  148. uint32_t num_scanouts;
  149. struct virtio_gpu_queue ctrlq;
  150. struct virtio_gpu_queue cursorq;
  151. struct kmem_cache *vbufs;
  152. bool vqs_ready;
  153. struct idr resource_idr;
  154. spinlock_t resource_idr_lock;
  155. wait_queue_head_t resp_wq;
  156. /* current display info */
  157. spinlock_t display_info_lock;
  158. bool display_info_pending;
  159. struct virtio_gpu_fence_driver fence_drv;
  160. struct idr ctx_id_idr;
  161. spinlock_t ctx_id_idr_lock;
  162. bool has_virgl_3d;
  163. struct work_struct config_changed_work;
  164. struct virtio_gpu_drv_capset *capsets;
  165. uint32_t num_capsets;
  166. struct list_head cap_cache;
  167. };
  168. struct virtio_gpu_fpriv {
  169. uint32_t ctx_id;
  170. };
  171. /* virtio_ioctl.c */
  172. #define DRM_VIRTIO_NUM_IOCTLS 10
  173. extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS];
  174. /* virtio_kms.c */
  175. int virtio_gpu_driver_load(struct drm_device *dev, unsigned long flags);
  176. void virtio_gpu_driver_unload(struct drm_device *dev);
  177. int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file);
  178. void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file);
  179. /* virtio_gem.c */
  180. void virtio_gpu_gem_free_object(struct drm_gem_object *gem_obj);
  181. int virtio_gpu_gem_init(struct virtio_gpu_device *vgdev);
  182. void virtio_gpu_gem_fini(struct virtio_gpu_device *vgdev);
  183. int virtio_gpu_gem_create(struct drm_file *file,
  184. struct drm_device *dev,
  185. uint64_t size,
  186. struct drm_gem_object **obj_p,
  187. uint32_t *handle_p);
  188. int virtio_gpu_gem_object_open(struct drm_gem_object *obj,
  189. struct drm_file *file);
  190. void virtio_gpu_gem_object_close(struct drm_gem_object *obj,
  191. struct drm_file *file);
  192. struct virtio_gpu_object *virtio_gpu_alloc_object(struct drm_device *dev,
  193. size_t size, bool kernel,
  194. bool pinned);
  195. int virtio_gpu_mode_dumb_create(struct drm_file *file_priv,
  196. struct drm_device *dev,
  197. struct drm_mode_create_dumb *args);
  198. int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv,
  199. struct drm_device *dev,
  200. uint32_t handle, uint64_t *offset_p);
  201. /* virtio_fb */
  202. #define VIRTIO_GPUFB_CONN_LIMIT 1
  203. int virtio_gpu_fbdev_init(struct virtio_gpu_device *vgdev);
  204. void virtio_gpu_fbdev_fini(struct virtio_gpu_device *vgdev);
  205. int virtio_gpu_surface_dirty(struct virtio_gpu_framebuffer *qfb,
  206. struct drm_clip_rect *clips,
  207. unsigned int num_clips);
  208. /* virtio vg */
  209. int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev);
  210. void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev);
  211. void virtio_gpu_resource_id_get(struct virtio_gpu_device *vgdev,
  212. uint32_t *resid);
  213. void virtio_gpu_resource_id_put(struct virtio_gpu_device *vgdev, uint32_t id);
  214. void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev,
  215. uint32_t resource_id,
  216. uint32_t format,
  217. uint32_t width,
  218. uint32_t height);
  219. void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev,
  220. uint32_t resource_id);
  221. void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev,
  222. uint32_t resource_id, uint64_t offset,
  223. __le32 width, __le32 height,
  224. __le32 x, __le32 y,
  225. struct virtio_gpu_fence **fence);
  226. void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev,
  227. uint32_t resource_id,
  228. uint32_t x, uint32_t y,
  229. uint32_t width, uint32_t height);
  230. void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev,
  231. uint32_t scanout_id, uint32_t resource_id,
  232. uint32_t width, uint32_t height,
  233. uint32_t x, uint32_t y);
  234. int virtio_gpu_object_attach(struct virtio_gpu_device *vgdev,
  235. struct virtio_gpu_object *obj,
  236. uint32_t resource_id,
  237. struct virtio_gpu_fence **fence);
  238. int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev);
  239. int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev);
  240. void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev,
  241. struct virtio_gpu_output *output);
  242. int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev);
  243. void virtio_gpu_cmd_resource_inval_backing(struct virtio_gpu_device *vgdev,
  244. uint32_t resource_id);
  245. int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx);
  246. int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev,
  247. int idx, int version,
  248. struct virtio_gpu_drv_cap_cache **cache_p);
  249. void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id,
  250. uint32_t nlen, const char *name);
  251. void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev,
  252. uint32_t id);
  253. void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev,
  254. uint32_t ctx_id,
  255. uint32_t resource_id);
  256. void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev,
  257. uint32_t ctx_id,
  258. uint32_t resource_id);
  259. void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev,
  260. void *data, uint32_t data_size,
  261. uint32_t ctx_id, struct virtio_gpu_fence **fence);
  262. void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev,
  263. uint32_t resource_id, uint32_t ctx_id,
  264. uint64_t offset, uint32_t level,
  265. struct virtio_gpu_box *box,
  266. struct virtio_gpu_fence **fence);
  267. void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev,
  268. uint32_t resource_id, uint32_t ctx_id,
  269. uint64_t offset, uint32_t level,
  270. struct virtio_gpu_box *box,
  271. struct virtio_gpu_fence **fence);
  272. void
  273. virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev,
  274. struct virtio_gpu_resource_create_3d *rc_3d,
  275. struct virtio_gpu_fence **fence);
  276. void virtio_gpu_ctrl_ack(struct virtqueue *vq);
  277. void virtio_gpu_cursor_ack(struct virtqueue *vq);
  278. void virtio_gpu_fence_ack(struct virtqueue *vq);
  279. void virtio_gpu_dequeue_ctrl_func(struct work_struct *work);
  280. void virtio_gpu_dequeue_cursor_func(struct work_struct *work);
  281. void virtio_gpu_dequeue_fence_func(struct work_struct *work);
  282. /* virtio_gpu_display.c */
  283. int virtio_gpu_framebuffer_init(struct drm_device *dev,
  284. struct virtio_gpu_framebuffer *vgfb,
  285. const struct drm_mode_fb_cmd2 *mode_cmd,
  286. struct drm_gem_object *obj);
  287. int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev);
  288. void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev);
  289. /* virtio_gpu_plane.c */
  290. uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc);
  291. struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
  292. enum drm_plane_type type,
  293. int index);
  294. /* virtio_gpu_ttm.c */
  295. int virtio_gpu_ttm_init(struct virtio_gpu_device *vgdev);
  296. void virtio_gpu_ttm_fini(struct virtio_gpu_device *vgdev);
  297. int virtio_gpu_mmap(struct file *filp, struct vm_area_struct *vma);
  298. /* virtio_gpu_fence.c */
  299. int virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev,
  300. struct virtio_gpu_ctrl_hdr *cmd_hdr,
  301. struct virtio_gpu_fence **fence);
  302. void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev,
  303. u64 last_seq);
  304. /* virtio_gpu_object */
  305. int virtio_gpu_object_create(struct virtio_gpu_device *vgdev,
  306. unsigned long size, bool kernel, bool pinned,
  307. struct virtio_gpu_object **bo_ptr);
  308. int virtio_gpu_object_kmap(struct virtio_gpu_object *bo, void **ptr);
  309. int virtio_gpu_object_get_sg_table(struct virtio_gpu_device *qdev,
  310. struct virtio_gpu_object *bo);
  311. void virtio_gpu_object_free_sg_table(struct virtio_gpu_object *bo);
  312. int virtio_gpu_object_wait(struct virtio_gpu_object *bo, bool no_wait);
  313. /* virtgpu_prime.c */
  314. int virtgpu_gem_prime_pin(struct drm_gem_object *obj);
  315. void virtgpu_gem_prime_unpin(struct drm_gem_object *obj);
  316. struct sg_table *virtgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
  317. struct drm_gem_object *virtgpu_gem_prime_import_sg_table(
  318. struct drm_device *dev, struct dma_buf_attachment *attach,
  319. struct sg_table *sgt);
  320. void *virtgpu_gem_prime_vmap(struct drm_gem_object *obj);
  321. void virtgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
  322. int virtgpu_gem_prime_mmap(struct drm_gem_object *obj,
  323. struct vm_area_struct *vma);
  324. static inline struct virtio_gpu_object*
  325. virtio_gpu_object_ref(struct virtio_gpu_object *bo)
  326. {
  327. ttm_bo_reference(&bo->tbo);
  328. return bo;
  329. }
  330. static inline void virtio_gpu_object_unref(struct virtio_gpu_object **bo)
  331. {
  332. struct ttm_buffer_object *tbo;
  333. if ((*bo) == NULL)
  334. return;
  335. tbo = &((*bo)->tbo);
  336. ttm_bo_unref(&tbo);
  337. if (tbo == NULL)
  338. *bo = NULL;
  339. }
  340. static inline u64 virtio_gpu_object_mmap_offset(struct virtio_gpu_object *bo)
  341. {
  342. return drm_vma_node_offset_addr(&bo->tbo.vma_node);
  343. }
  344. static inline int virtio_gpu_object_reserve(struct virtio_gpu_object *bo,
  345. bool no_wait)
  346. {
  347. int r;
  348. r = ttm_bo_reserve(&bo->tbo, true, no_wait, NULL);
  349. if (unlikely(r != 0)) {
  350. if (r != -ERESTARTSYS) {
  351. struct virtio_gpu_device *qdev =
  352. bo->gem_base.dev->dev_private;
  353. dev_err(qdev->dev, "%p reserve failed\n", bo);
  354. }
  355. return r;
  356. }
  357. return 0;
  358. }
  359. static inline void virtio_gpu_object_unreserve(struct virtio_gpu_object *bo)
  360. {
  361. ttm_bo_unreserve(&bo->tbo);
  362. }
  363. /* virgl debufs */
  364. int virtio_gpu_debugfs_init(struct drm_minor *minor);
  365. #endif