hyperv.c 41 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603
  1. /*
  2. * KVM Microsoft Hyper-V emulation
  3. *
  4. * derived from arch/x86/kvm/x86.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. * Copyright (C) 2008 Qumranet, Inc.
  8. * Copyright IBM Corporation, 2008
  9. * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10. * Copyright (C) 2015 Andrey Smetanin <asmetanin@virtuozzo.com>
  11. *
  12. * Authors:
  13. * Avi Kivity <avi@qumranet.com>
  14. * Yaniv Kamay <yaniv@qumranet.com>
  15. * Amit Shah <amit.shah@qumranet.com>
  16. * Ben-Ami Yassour <benami@il.ibm.com>
  17. * Andrey Smetanin <asmetanin@virtuozzo.com>
  18. *
  19. * This work is licensed under the terms of the GNU GPL, version 2. See
  20. * the COPYING file in the top-level directory.
  21. *
  22. */
  23. #include "x86.h"
  24. #include "lapic.h"
  25. #include "ioapic.h"
  26. #include "hyperv.h"
  27. #include <linux/kvm_host.h>
  28. #include <linux/highmem.h>
  29. #include <linux/sched/cputime.h>
  30. #include <linux/eventfd.h>
  31. #include <asm/apicdef.h>
  32. #include <trace/events/kvm.h>
  33. #include "trace.h"
  34. static inline u64 synic_read_sint(struct kvm_vcpu_hv_synic *synic, int sint)
  35. {
  36. return atomic64_read(&synic->sint[sint]);
  37. }
  38. static inline int synic_get_sint_vector(u64 sint_value)
  39. {
  40. if (sint_value & HV_SYNIC_SINT_MASKED)
  41. return -1;
  42. return sint_value & HV_SYNIC_SINT_VECTOR_MASK;
  43. }
  44. static bool synic_has_vector_connected(struct kvm_vcpu_hv_synic *synic,
  45. int vector)
  46. {
  47. int i;
  48. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  49. if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
  50. return true;
  51. }
  52. return false;
  53. }
  54. static bool synic_has_vector_auto_eoi(struct kvm_vcpu_hv_synic *synic,
  55. int vector)
  56. {
  57. int i;
  58. u64 sint_value;
  59. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  60. sint_value = synic_read_sint(synic, i);
  61. if (synic_get_sint_vector(sint_value) == vector &&
  62. sint_value & HV_SYNIC_SINT_AUTO_EOI)
  63. return true;
  64. }
  65. return false;
  66. }
  67. static void synic_update_vector(struct kvm_vcpu_hv_synic *synic,
  68. int vector)
  69. {
  70. if (vector < HV_SYNIC_FIRST_VALID_VECTOR)
  71. return;
  72. if (synic_has_vector_connected(synic, vector))
  73. __set_bit(vector, synic->vec_bitmap);
  74. else
  75. __clear_bit(vector, synic->vec_bitmap);
  76. if (synic_has_vector_auto_eoi(synic, vector))
  77. __set_bit(vector, synic->auto_eoi_bitmap);
  78. else
  79. __clear_bit(vector, synic->auto_eoi_bitmap);
  80. }
  81. static int synic_set_sint(struct kvm_vcpu_hv_synic *synic, int sint,
  82. u64 data, bool host)
  83. {
  84. int vector, old_vector;
  85. bool masked;
  86. vector = data & HV_SYNIC_SINT_VECTOR_MASK;
  87. masked = data & HV_SYNIC_SINT_MASKED;
  88. /*
  89. * Valid vectors are 16-255, however, nested Hyper-V attempts to write
  90. * default '0x10000' value on boot and this should not #GP. We need to
  91. * allow zero-initing the register from host as well.
  92. */
  93. if (vector < HV_SYNIC_FIRST_VALID_VECTOR && !host && !masked)
  94. return 1;
  95. /*
  96. * Guest may configure multiple SINTs to use the same vector, so
  97. * we maintain a bitmap of vectors handled by synic, and a
  98. * bitmap of vectors with auto-eoi behavior. The bitmaps are
  99. * updated here, and atomically queried on fast paths.
  100. */
  101. old_vector = synic_read_sint(synic, sint) & HV_SYNIC_SINT_VECTOR_MASK;
  102. atomic64_set(&synic->sint[sint], data);
  103. synic_update_vector(synic, old_vector);
  104. synic_update_vector(synic, vector);
  105. /* Load SynIC vectors into EOI exit bitmap */
  106. kvm_make_request(KVM_REQ_SCAN_IOAPIC, synic_to_vcpu(synic));
  107. return 0;
  108. }
  109. static struct kvm_vcpu *get_vcpu_by_vpidx(struct kvm *kvm, u32 vpidx)
  110. {
  111. struct kvm_vcpu *vcpu = NULL;
  112. int i;
  113. if (vpidx < KVM_MAX_VCPUS)
  114. vcpu = kvm_get_vcpu(kvm, vpidx);
  115. if (vcpu && vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
  116. return vcpu;
  117. kvm_for_each_vcpu(i, vcpu, kvm)
  118. if (vcpu_to_hv_vcpu(vcpu)->vp_index == vpidx)
  119. return vcpu;
  120. return NULL;
  121. }
  122. static struct kvm_vcpu_hv_synic *synic_get(struct kvm *kvm, u32 vpidx)
  123. {
  124. struct kvm_vcpu *vcpu;
  125. struct kvm_vcpu_hv_synic *synic;
  126. vcpu = get_vcpu_by_vpidx(kvm, vpidx);
  127. if (!vcpu)
  128. return NULL;
  129. synic = vcpu_to_synic(vcpu);
  130. return (synic->active) ? synic : NULL;
  131. }
  132. static void synic_clear_sint_msg_pending(struct kvm_vcpu_hv_synic *synic,
  133. u32 sint)
  134. {
  135. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  136. struct page *page;
  137. gpa_t gpa;
  138. struct hv_message *msg;
  139. struct hv_message_page *msg_page;
  140. gpa = synic->msg_page & PAGE_MASK;
  141. page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
  142. if (is_error_page(page)) {
  143. vcpu_err(vcpu, "Hyper-V SynIC can't get msg page, gpa 0x%llx\n",
  144. gpa);
  145. return;
  146. }
  147. msg_page = kmap_atomic(page);
  148. msg = &msg_page->sint_message[sint];
  149. msg->header.message_flags.msg_pending = 0;
  150. kunmap_atomic(msg_page);
  151. kvm_release_page_dirty(page);
  152. kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
  153. }
  154. static void kvm_hv_notify_acked_sint(struct kvm_vcpu *vcpu, u32 sint)
  155. {
  156. struct kvm *kvm = vcpu->kvm;
  157. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  158. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  159. struct kvm_vcpu_hv_stimer *stimer;
  160. int gsi, idx, stimers_pending;
  161. trace_kvm_hv_notify_acked_sint(vcpu->vcpu_id, sint);
  162. if (synic->msg_page & HV_SYNIC_SIMP_ENABLE)
  163. synic_clear_sint_msg_pending(synic, sint);
  164. /* Try to deliver pending Hyper-V SynIC timers messages */
  165. stimers_pending = 0;
  166. for (idx = 0; idx < ARRAY_SIZE(hv_vcpu->stimer); idx++) {
  167. stimer = &hv_vcpu->stimer[idx];
  168. if (stimer->msg_pending &&
  169. (stimer->config & HV_STIMER_ENABLE) &&
  170. HV_STIMER_SINT(stimer->config) == sint) {
  171. set_bit(stimer->index,
  172. hv_vcpu->stimer_pending_bitmap);
  173. stimers_pending++;
  174. }
  175. }
  176. if (stimers_pending)
  177. kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
  178. idx = srcu_read_lock(&kvm->irq_srcu);
  179. gsi = atomic_read(&synic->sint_to_gsi[sint]);
  180. if (gsi != -1)
  181. kvm_notify_acked_gsi(kvm, gsi);
  182. srcu_read_unlock(&kvm->irq_srcu, idx);
  183. }
  184. static void synic_exit(struct kvm_vcpu_hv_synic *synic, u32 msr)
  185. {
  186. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  187. struct kvm_vcpu_hv *hv_vcpu = &vcpu->arch.hyperv;
  188. hv_vcpu->exit.type = KVM_EXIT_HYPERV_SYNIC;
  189. hv_vcpu->exit.u.synic.msr = msr;
  190. hv_vcpu->exit.u.synic.control = synic->control;
  191. hv_vcpu->exit.u.synic.evt_page = synic->evt_page;
  192. hv_vcpu->exit.u.synic.msg_page = synic->msg_page;
  193. kvm_make_request(KVM_REQ_HV_EXIT, vcpu);
  194. }
  195. static int synic_set_msr(struct kvm_vcpu_hv_synic *synic,
  196. u32 msr, u64 data, bool host)
  197. {
  198. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  199. int ret;
  200. if (!synic->active)
  201. return 1;
  202. trace_kvm_hv_synic_set_msr(vcpu->vcpu_id, msr, data, host);
  203. ret = 0;
  204. switch (msr) {
  205. case HV_X64_MSR_SCONTROL:
  206. synic->control = data;
  207. if (!host)
  208. synic_exit(synic, msr);
  209. break;
  210. case HV_X64_MSR_SVERSION:
  211. if (!host) {
  212. ret = 1;
  213. break;
  214. }
  215. synic->version = data;
  216. break;
  217. case HV_X64_MSR_SIEFP:
  218. if ((data & HV_SYNIC_SIEFP_ENABLE) && !host &&
  219. !synic->dont_zero_synic_pages)
  220. if (kvm_clear_guest(vcpu->kvm,
  221. data & PAGE_MASK, PAGE_SIZE)) {
  222. ret = 1;
  223. break;
  224. }
  225. synic->evt_page = data;
  226. if (!host)
  227. synic_exit(synic, msr);
  228. break;
  229. case HV_X64_MSR_SIMP:
  230. if ((data & HV_SYNIC_SIMP_ENABLE) && !host &&
  231. !synic->dont_zero_synic_pages)
  232. if (kvm_clear_guest(vcpu->kvm,
  233. data & PAGE_MASK, PAGE_SIZE)) {
  234. ret = 1;
  235. break;
  236. }
  237. synic->msg_page = data;
  238. if (!host)
  239. synic_exit(synic, msr);
  240. break;
  241. case HV_X64_MSR_EOM: {
  242. int i;
  243. for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
  244. kvm_hv_notify_acked_sint(vcpu, i);
  245. break;
  246. }
  247. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  248. ret = synic_set_sint(synic, msr - HV_X64_MSR_SINT0, data, host);
  249. break;
  250. default:
  251. ret = 1;
  252. break;
  253. }
  254. return ret;
  255. }
  256. static int synic_get_msr(struct kvm_vcpu_hv_synic *synic, u32 msr, u64 *pdata)
  257. {
  258. int ret;
  259. if (!synic->active)
  260. return 1;
  261. ret = 0;
  262. switch (msr) {
  263. case HV_X64_MSR_SCONTROL:
  264. *pdata = synic->control;
  265. break;
  266. case HV_X64_MSR_SVERSION:
  267. *pdata = synic->version;
  268. break;
  269. case HV_X64_MSR_SIEFP:
  270. *pdata = synic->evt_page;
  271. break;
  272. case HV_X64_MSR_SIMP:
  273. *pdata = synic->msg_page;
  274. break;
  275. case HV_X64_MSR_EOM:
  276. *pdata = 0;
  277. break;
  278. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  279. *pdata = atomic64_read(&synic->sint[msr - HV_X64_MSR_SINT0]);
  280. break;
  281. default:
  282. ret = 1;
  283. break;
  284. }
  285. return ret;
  286. }
  287. static int synic_set_irq(struct kvm_vcpu_hv_synic *synic, u32 sint)
  288. {
  289. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  290. struct kvm_lapic_irq irq;
  291. int ret, vector;
  292. if (sint >= ARRAY_SIZE(synic->sint))
  293. return -EINVAL;
  294. vector = synic_get_sint_vector(synic_read_sint(synic, sint));
  295. if (vector < 0)
  296. return -ENOENT;
  297. memset(&irq, 0, sizeof(irq));
  298. irq.shorthand = APIC_DEST_SELF;
  299. irq.dest_mode = APIC_DEST_PHYSICAL;
  300. irq.delivery_mode = APIC_DM_FIXED;
  301. irq.vector = vector;
  302. irq.level = 1;
  303. ret = kvm_irq_delivery_to_apic(vcpu->kvm, vcpu->arch.apic, &irq, NULL);
  304. trace_kvm_hv_synic_set_irq(vcpu->vcpu_id, sint, irq.vector, ret);
  305. return ret;
  306. }
  307. int kvm_hv_synic_set_irq(struct kvm *kvm, u32 vpidx, u32 sint)
  308. {
  309. struct kvm_vcpu_hv_synic *synic;
  310. synic = synic_get(kvm, vpidx);
  311. if (!synic)
  312. return -EINVAL;
  313. return synic_set_irq(synic, sint);
  314. }
  315. void kvm_hv_synic_send_eoi(struct kvm_vcpu *vcpu, int vector)
  316. {
  317. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  318. int i;
  319. trace_kvm_hv_synic_send_eoi(vcpu->vcpu_id, vector);
  320. for (i = 0; i < ARRAY_SIZE(synic->sint); i++)
  321. if (synic_get_sint_vector(synic_read_sint(synic, i)) == vector)
  322. kvm_hv_notify_acked_sint(vcpu, i);
  323. }
  324. static int kvm_hv_set_sint_gsi(struct kvm *kvm, u32 vpidx, u32 sint, int gsi)
  325. {
  326. struct kvm_vcpu_hv_synic *synic;
  327. synic = synic_get(kvm, vpidx);
  328. if (!synic)
  329. return -EINVAL;
  330. if (sint >= ARRAY_SIZE(synic->sint_to_gsi))
  331. return -EINVAL;
  332. atomic_set(&synic->sint_to_gsi[sint], gsi);
  333. return 0;
  334. }
  335. void kvm_hv_irq_routing_update(struct kvm *kvm)
  336. {
  337. struct kvm_irq_routing_table *irq_rt;
  338. struct kvm_kernel_irq_routing_entry *e;
  339. u32 gsi;
  340. irq_rt = srcu_dereference_check(kvm->irq_routing, &kvm->irq_srcu,
  341. lockdep_is_held(&kvm->irq_lock));
  342. for (gsi = 0; gsi < irq_rt->nr_rt_entries; gsi++) {
  343. hlist_for_each_entry(e, &irq_rt->map[gsi], link) {
  344. if (e->type == KVM_IRQ_ROUTING_HV_SINT)
  345. kvm_hv_set_sint_gsi(kvm, e->hv_sint.vcpu,
  346. e->hv_sint.sint, gsi);
  347. }
  348. }
  349. }
  350. static void synic_init(struct kvm_vcpu_hv_synic *synic)
  351. {
  352. int i;
  353. memset(synic, 0, sizeof(*synic));
  354. synic->version = HV_SYNIC_VERSION_1;
  355. for (i = 0; i < ARRAY_SIZE(synic->sint); i++) {
  356. atomic64_set(&synic->sint[i], HV_SYNIC_SINT_MASKED);
  357. atomic_set(&synic->sint_to_gsi[i], -1);
  358. }
  359. }
  360. static u64 get_time_ref_counter(struct kvm *kvm)
  361. {
  362. struct kvm_hv *hv = &kvm->arch.hyperv;
  363. struct kvm_vcpu *vcpu;
  364. u64 tsc;
  365. /*
  366. * The guest has not set up the TSC page or the clock isn't
  367. * stable, fall back to get_kvmclock_ns.
  368. */
  369. if (!hv->tsc_ref.tsc_sequence)
  370. return div_u64(get_kvmclock_ns(kvm), 100);
  371. vcpu = kvm_get_vcpu(kvm, 0);
  372. tsc = kvm_read_l1_tsc(vcpu, rdtsc());
  373. return mul_u64_u64_shr(tsc, hv->tsc_ref.tsc_scale, 64)
  374. + hv->tsc_ref.tsc_offset;
  375. }
  376. static void stimer_mark_pending(struct kvm_vcpu_hv_stimer *stimer,
  377. bool vcpu_kick)
  378. {
  379. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  380. set_bit(stimer->index,
  381. vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
  382. kvm_make_request(KVM_REQ_HV_STIMER, vcpu);
  383. if (vcpu_kick)
  384. kvm_vcpu_kick(vcpu);
  385. }
  386. static void stimer_cleanup(struct kvm_vcpu_hv_stimer *stimer)
  387. {
  388. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  389. trace_kvm_hv_stimer_cleanup(stimer_to_vcpu(stimer)->vcpu_id,
  390. stimer->index);
  391. hrtimer_cancel(&stimer->timer);
  392. clear_bit(stimer->index,
  393. vcpu_to_hv_vcpu(vcpu)->stimer_pending_bitmap);
  394. stimer->msg_pending = false;
  395. stimer->exp_time = 0;
  396. }
  397. static enum hrtimer_restart stimer_timer_callback(struct hrtimer *timer)
  398. {
  399. struct kvm_vcpu_hv_stimer *stimer;
  400. stimer = container_of(timer, struct kvm_vcpu_hv_stimer, timer);
  401. trace_kvm_hv_stimer_callback(stimer_to_vcpu(stimer)->vcpu_id,
  402. stimer->index);
  403. stimer_mark_pending(stimer, true);
  404. return HRTIMER_NORESTART;
  405. }
  406. /*
  407. * stimer_start() assumptions:
  408. * a) stimer->count is not equal to 0
  409. * b) stimer->config has HV_STIMER_ENABLE flag
  410. */
  411. static int stimer_start(struct kvm_vcpu_hv_stimer *stimer)
  412. {
  413. u64 time_now;
  414. ktime_t ktime_now;
  415. time_now = get_time_ref_counter(stimer_to_vcpu(stimer)->kvm);
  416. ktime_now = ktime_get();
  417. if (stimer->config & HV_STIMER_PERIODIC) {
  418. if (stimer->exp_time) {
  419. if (time_now >= stimer->exp_time) {
  420. u64 remainder;
  421. div64_u64_rem(time_now - stimer->exp_time,
  422. stimer->count, &remainder);
  423. stimer->exp_time =
  424. time_now + (stimer->count - remainder);
  425. }
  426. } else
  427. stimer->exp_time = time_now + stimer->count;
  428. trace_kvm_hv_stimer_start_periodic(
  429. stimer_to_vcpu(stimer)->vcpu_id,
  430. stimer->index,
  431. time_now, stimer->exp_time);
  432. hrtimer_start(&stimer->timer,
  433. ktime_add_ns(ktime_now,
  434. 100 * (stimer->exp_time - time_now)),
  435. HRTIMER_MODE_ABS);
  436. return 0;
  437. }
  438. stimer->exp_time = stimer->count;
  439. if (time_now >= stimer->count) {
  440. /*
  441. * Expire timer according to Hypervisor Top-Level Functional
  442. * specification v4(15.3.1):
  443. * "If a one shot is enabled and the specified count is in
  444. * the past, it will expire immediately."
  445. */
  446. stimer_mark_pending(stimer, false);
  447. return 0;
  448. }
  449. trace_kvm_hv_stimer_start_one_shot(stimer_to_vcpu(stimer)->vcpu_id,
  450. stimer->index,
  451. time_now, stimer->count);
  452. hrtimer_start(&stimer->timer,
  453. ktime_add_ns(ktime_now, 100 * (stimer->count - time_now)),
  454. HRTIMER_MODE_ABS);
  455. return 0;
  456. }
  457. static int stimer_set_config(struct kvm_vcpu_hv_stimer *stimer, u64 config,
  458. bool host)
  459. {
  460. trace_kvm_hv_stimer_set_config(stimer_to_vcpu(stimer)->vcpu_id,
  461. stimer->index, config, host);
  462. stimer_cleanup(stimer);
  463. if ((stimer->config & HV_STIMER_ENABLE) && HV_STIMER_SINT(config) == 0)
  464. config &= ~HV_STIMER_ENABLE;
  465. stimer->config = config;
  466. stimer_mark_pending(stimer, false);
  467. return 0;
  468. }
  469. static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count,
  470. bool host)
  471. {
  472. trace_kvm_hv_stimer_set_count(stimer_to_vcpu(stimer)->vcpu_id,
  473. stimer->index, count, host);
  474. stimer_cleanup(stimer);
  475. stimer->count = count;
  476. if (stimer->count == 0)
  477. stimer->config &= ~HV_STIMER_ENABLE;
  478. else if (stimer->config & HV_STIMER_AUTOENABLE)
  479. stimer->config |= HV_STIMER_ENABLE;
  480. stimer_mark_pending(stimer, false);
  481. return 0;
  482. }
  483. static int stimer_get_config(struct kvm_vcpu_hv_stimer *stimer, u64 *pconfig)
  484. {
  485. *pconfig = stimer->config;
  486. return 0;
  487. }
  488. static int stimer_get_count(struct kvm_vcpu_hv_stimer *stimer, u64 *pcount)
  489. {
  490. *pcount = stimer->count;
  491. return 0;
  492. }
  493. static int synic_deliver_msg(struct kvm_vcpu_hv_synic *synic, u32 sint,
  494. struct hv_message *src_msg)
  495. {
  496. struct kvm_vcpu *vcpu = synic_to_vcpu(synic);
  497. struct page *page;
  498. gpa_t gpa;
  499. struct hv_message *dst_msg;
  500. int r;
  501. struct hv_message_page *msg_page;
  502. if (!(synic->msg_page & HV_SYNIC_SIMP_ENABLE))
  503. return -ENOENT;
  504. gpa = synic->msg_page & PAGE_MASK;
  505. page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
  506. if (is_error_page(page))
  507. return -EFAULT;
  508. msg_page = kmap_atomic(page);
  509. dst_msg = &msg_page->sint_message[sint];
  510. if (sync_cmpxchg(&dst_msg->header.message_type, HVMSG_NONE,
  511. src_msg->header.message_type) != HVMSG_NONE) {
  512. dst_msg->header.message_flags.msg_pending = 1;
  513. r = -EAGAIN;
  514. } else {
  515. memcpy(&dst_msg->u.payload, &src_msg->u.payload,
  516. src_msg->header.payload_size);
  517. dst_msg->header.message_type = src_msg->header.message_type;
  518. dst_msg->header.payload_size = src_msg->header.payload_size;
  519. r = synic_set_irq(synic, sint);
  520. if (r >= 1)
  521. r = 0;
  522. else if (r == 0)
  523. r = -EFAULT;
  524. }
  525. kunmap_atomic(msg_page);
  526. kvm_release_page_dirty(page);
  527. kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
  528. return r;
  529. }
  530. static int stimer_send_msg(struct kvm_vcpu_hv_stimer *stimer)
  531. {
  532. struct kvm_vcpu *vcpu = stimer_to_vcpu(stimer);
  533. struct hv_message *msg = &stimer->msg;
  534. struct hv_timer_message_payload *payload =
  535. (struct hv_timer_message_payload *)&msg->u.payload;
  536. payload->expiration_time = stimer->exp_time;
  537. payload->delivery_time = get_time_ref_counter(vcpu->kvm);
  538. return synic_deliver_msg(vcpu_to_synic(vcpu),
  539. HV_STIMER_SINT(stimer->config), msg);
  540. }
  541. static void stimer_expiration(struct kvm_vcpu_hv_stimer *stimer)
  542. {
  543. int r;
  544. stimer->msg_pending = true;
  545. r = stimer_send_msg(stimer);
  546. trace_kvm_hv_stimer_expiration(stimer_to_vcpu(stimer)->vcpu_id,
  547. stimer->index, r);
  548. if (!r) {
  549. stimer->msg_pending = false;
  550. if (!(stimer->config & HV_STIMER_PERIODIC))
  551. stimer->config &= ~HV_STIMER_ENABLE;
  552. }
  553. }
  554. void kvm_hv_process_stimers(struct kvm_vcpu *vcpu)
  555. {
  556. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  557. struct kvm_vcpu_hv_stimer *stimer;
  558. u64 time_now, exp_time;
  559. int i;
  560. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  561. if (test_and_clear_bit(i, hv_vcpu->stimer_pending_bitmap)) {
  562. stimer = &hv_vcpu->stimer[i];
  563. if (stimer->config & HV_STIMER_ENABLE) {
  564. exp_time = stimer->exp_time;
  565. if (exp_time) {
  566. time_now =
  567. get_time_ref_counter(vcpu->kvm);
  568. if (time_now >= exp_time)
  569. stimer_expiration(stimer);
  570. }
  571. if ((stimer->config & HV_STIMER_ENABLE) &&
  572. stimer->count) {
  573. if (!stimer->msg_pending)
  574. stimer_start(stimer);
  575. } else
  576. stimer_cleanup(stimer);
  577. }
  578. }
  579. }
  580. void kvm_hv_vcpu_uninit(struct kvm_vcpu *vcpu)
  581. {
  582. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  583. int i;
  584. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  585. stimer_cleanup(&hv_vcpu->stimer[i]);
  586. }
  587. static void stimer_prepare_msg(struct kvm_vcpu_hv_stimer *stimer)
  588. {
  589. struct hv_message *msg = &stimer->msg;
  590. struct hv_timer_message_payload *payload =
  591. (struct hv_timer_message_payload *)&msg->u.payload;
  592. memset(&msg->header, 0, sizeof(msg->header));
  593. msg->header.message_type = HVMSG_TIMER_EXPIRED;
  594. msg->header.payload_size = sizeof(*payload);
  595. payload->timer_index = stimer->index;
  596. payload->expiration_time = 0;
  597. payload->delivery_time = 0;
  598. }
  599. static void stimer_init(struct kvm_vcpu_hv_stimer *stimer, int timer_index)
  600. {
  601. memset(stimer, 0, sizeof(*stimer));
  602. stimer->index = timer_index;
  603. hrtimer_init(&stimer->timer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
  604. stimer->timer.function = stimer_timer_callback;
  605. stimer_prepare_msg(stimer);
  606. }
  607. void kvm_hv_vcpu_init(struct kvm_vcpu *vcpu)
  608. {
  609. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  610. int i;
  611. synic_init(&hv_vcpu->synic);
  612. bitmap_zero(hv_vcpu->stimer_pending_bitmap, HV_SYNIC_STIMER_COUNT);
  613. for (i = 0; i < ARRAY_SIZE(hv_vcpu->stimer); i++)
  614. stimer_init(&hv_vcpu->stimer[i], i);
  615. }
  616. void kvm_hv_vcpu_postcreate(struct kvm_vcpu *vcpu)
  617. {
  618. struct kvm_vcpu_hv *hv_vcpu = vcpu_to_hv_vcpu(vcpu);
  619. hv_vcpu->vp_index = kvm_vcpu_get_idx(vcpu);
  620. }
  621. int kvm_hv_activate_synic(struct kvm_vcpu *vcpu, bool dont_zero_synic_pages)
  622. {
  623. struct kvm_vcpu_hv_synic *synic = vcpu_to_synic(vcpu);
  624. /*
  625. * Hyper-V SynIC auto EOI SINT's are
  626. * not compatible with APICV, so deactivate APICV
  627. */
  628. kvm_vcpu_deactivate_apicv(vcpu);
  629. synic->active = true;
  630. synic->dont_zero_synic_pages = dont_zero_synic_pages;
  631. return 0;
  632. }
  633. static bool kvm_hv_msr_partition_wide(u32 msr)
  634. {
  635. bool r = false;
  636. switch (msr) {
  637. case HV_X64_MSR_GUEST_OS_ID:
  638. case HV_X64_MSR_HYPERCALL:
  639. case HV_X64_MSR_REFERENCE_TSC:
  640. case HV_X64_MSR_TIME_REF_COUNT:
  641. case HV_X64_MSR_CRASH_CTL:
  642. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  643. case HV_X64_MSR_RESET:
  644. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  645. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  646. case HV_X64_MSR_TSC_EMULATION_STATUS:
  647. r = true;
  648. break;
  649. }
  650. return r;
  651. }
  652. static int kvm_hv_msr_get_crash_data(struct kvm_vcpu *vcpu,
  653. u32 index, u64 *pdata)
  654. {
  655. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  656. if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param)))
  657. return -EINVAL;
  658. *pdata = hv->hv_crash_param[index];
  659. return 0;
  660. }
  661. static int kvm_hv_msr_get_crash_ctl(struct kvm_vcpu *vcpu, u64 *pdata)
  662. {
  663. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  664. *pdata = hv->hv_crash_ctl;
  665. return 0;
  666. }
  667. static int kvm_hv_msr_set_crash_ctl(struct kvm_vcpu *vcpu, u64 data, bool host)
  668. {
  669. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  670. if (host)
  671. hv->hv_crash_ctl = data & HV_X64_MSR_CRASH_CTL_NOTIFY;
  672. if (!host && (data & HV_X64_MSR_CRASH_CTL_NOTIFY)) {
  673. vcpu_debug(vcpu, "hv crash (0x%llx 0x%llx 0x%llx 0x%llx 0x%llx)\n",
  674. hv->hv_crash_param[0],
  675. hv->hv_crash_param[1],
  676. hv->hv_crash_param[2],
  677. hv->hv_crash_param[3],
  678. hv->hv_crash_param[4]);
  679. /* Send notification about crash to user space */
  680. kvm_make_request(KVM_REQ_HV_CRASH, vcpu);
  681. }
  682. return 0;
  683. }
  684. static int kvm_hv_msr_set_crash_data(struct kvm_vcpu *vcpu,
  685. u32 index, u64 data)
  686. {
  687. struct kvm_hv *hv = &vcpu->kvm->arch.hyperv;
  688. if (WARN_ON_ONCE(index >= ARRAY_SIZE(hv->hv_crash_param)))
  689. return -EINVAL;
  690. hv->hv_crash_param[index] = data;
  691. return 0;
  692. }
  693. /*
  694. * The kvmclock and Hyper-V TSC page use similar formulas, and converting
  695. * between them is possible:
  696. *
  697. * kvmclock formula:
  698. * nsec = (ticks - tsc_timestamp) * tsc_to_system_mul * 2^(tsc_shift-32)
  699. * + system_time
  700. *
  701. * Hyper-V formula:
  702. * nsec/100 = ticks * scale / 2^64 + offset
  703. *
  704. * When tsc_timestamp = system_time = 0, offset is zero in the Hyper-V formula.
  705. * By dividing the kvmclock formula by 100 and equating what's left we get:
  706. * ticks * scale / 2^64 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  707. * scale / 2^64 = tsc_to_system_mul * 2^(tsc_shift-32) / 100
  708. * scale = tsc_to_system_mul * 2^(32+tsc_shift) / 100
  709. *
  710. * Now expand the kvmclock formula and divide by 100:
  711. * nsec = ticks * tsc_to_system_mul * 2^(tsc_shift-32)
  712. * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32)
  713. * + system_time
  714. * nsec/100 = ticks * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  715. * - tsc_timestamp * tsc_to_system_mul * 2^(tsc_shift-32) / 100
  716. * + system_time / 100
  717. *
  718. * Replace tsc_to_system_mul * 2^(tsc_shift-32) / 100 by scale / 2^64:
  719. * nsec/100 = ticks * scale / 2^64
  720. * - tsc_timestamp * scale / 2^64
  721. * + system_time / 100
  722. *
  723. * Equate with the Hyper-V formula so that ticks * scale / 2^64 cancels out:
  724. * offset = system_time / 100 - tsc_timestamp * scale / 2^64
  725. *
  726. * These two equivalencies are implemented in this function.
  727. */
  728. static bool compute_tsc_page_parameters(struct pvclock_vcpu_time_info *hv_clock,
  729. HV_REFERENCE_TSC_PAGE *tsc_ref)
  730. {
  731. u64 max_mul;
  732. if (!(hv_clock->flags & PVCLOCK_TSC_STABLE_BIT))
  733. return false;
  734. /*
  735. * check if scale would overflow, if so we use the time ref counter
  736. * tsc_to_system_mul * 2^(tsc_shift+32) / 100 >= 2^64
  737. * tsc_to_system_mul / 100 >= 2^(32-tsc_shift)
  738. * tsc_to_system_mul >= 100 * 2^(32-tsc_shift)
  739. */
  740. max_mul = 100ull << (32 - hv_clock->tsc_shift);
  741. if (hv_clock->tsc_to_system_mul >= max_mul)
  742. return false;
  743. /*
  744. * Otherwise compute the scale and offset according to the formulas
  745. * derived above.
  746. */
  747. tsc_ref->tsc_scale =
  748. mul_u64_u32_div(1ULL << (32 + hv_clock->tsc_shift),
  749. hv_clock->tsc_to_system_mul,
  750. 100);
  751. tsc_ref->tsc_offset = hv_clock->system_time;
  752. do_div(tsc_ref->tsc_offset, 100);
  753. tsc_ref->tsc_offset -=
  754. mul_u64_u64_shr(hv_clock->tsc_timestamp, tsc_ref->tsc_scale, 64);
  755. return true;
  756. }
  757. void kvm_hv_setup_tsc_page(struct kvm *kvm,
  758. struct pvclock_vcpu_time_info *hv_clock)
  759. {
  760. struct kvm_hv *hv = &kvm->arch.hyperv;
  761. u32 tsc_seq;
  762. u64 gfn;
  763. BUILD_BUG_ON(sizeof(tsc_seq) != sizeof(hv->tsc_ref.tsc_sequence));
  764. BUILD_BUG_ON(offsetof(HV_REFERENCE_TSC_PAGE, tsc_sequence) != 0);
  765. if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
  766. return;
  767. mutex_lock(&kvm->arch.hyperv.hv_lock);
  768. if (!(hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE))
  769. goto out_unlock;
  770. gfn = hv->hv_tsc_page >> HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT;
  771. /*
  772. * Because the TSC parameters only vary when there is a
  773. * change in the master clock, do not bother with caching.
  774. */
  775. if (unlikely(kvm_read_guest(kvm, gfn_to_gpa(gfn),
  776. &tsc_seq, sizeof(tsc_seq))))
  777. goto out_unlock;
  778. /*
  779. * While we're computing and writing the parameters, force the
  780. * guest to use the time reference count MSR.
  781. */
  782. hv->tsc_ref.tsc_sequence = 0;
  783. if (kvm_write_guest(kvm, gfn_to_gpa(gfn),
  784. &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence)))
  785. goto out_unlock;
  786. if (!compute_tsc_page_parameters(hv_clock, &hv->tsc_ref))
  787. goto out_unlock;
  788. /* Ensure sequence is zero before writing the rest of the struct. */
  789. smp_wmb();
  790. if (kvm_write_guest(kvm, gfn_to_gpa(gfn), &hv->tsc_ref, sizeof(hv->tsc_ref)))
  791. goto out_unlock;
  792. /*
  793. * Now switch to the TSC page mechanism by writing the sequence.
  794. */
  795. tsc_seq++;
  796. if (tsc_seq == 0xFFFFFFFF || tsc_seq == 0)
  797. tsc_seq = 1;
  798. /* Write the struct entirely before the non-zero sequence. */
  799. smp_wmb();
  800. hv->tsc_ref.tsc_sequence = tsc_seq;
  801. kvm_write_guest(kvm, gfn_to_gpa(gfn),
  802. &hv->tsc_ref, sizeof(hv->tsc_ref.tsc_sequence));
  803. out_unlock:
  804. mutex_unlock(&kvm->arch.hyperv.hv_lock);
  805. }
  806. static int kvm_hv_set_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data,
  807. bool host)
  808. {
  809. struct kvm *kvm = vcpu->kvm;
  810. struct kvm_hv *hv = &kvm->arch.hyperv;
  811. switch (msr) {
  812. case HV_X64_MSR_GUEST_OS_ID:
  813. hv->hv_guest_os_id = data;
  814. /* setting guest os id to zero disables hypercall page */
  815. if (!hv->hv_guest_os_id)
  816. hv->hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
  817. break;
  818. case HV_X64_MSR_HYPERCALL: {
  819. u64 gfn;
  820. unsigned long addr;
  821. u8 instructions[4];
  822. /* if guest os id is not set hypercall should remain disabled */
  823. if (!hv->hv_guest_os_id)
  824. break;
  825. if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
  826. hv->hv_hypercall = data;
  827. break;
  828. }
  829. gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
  830. addr = gfn_to_hva(kvm, gfn);
  831. if (kvm_is_error_hva(addr))
  832. return 1;
  833. kvm_x86_ops->patch_hypercall(vcpu, instructions);
  834. ((unsigned char *)instructions)[3] = 0xc3; /* ret */
  835. if (__copy_to_user((void __user *)addr, instructions, 4))
  836. return 1;
  837. hv->hv_hypercall = data;
  838. mark_page_dirty(kvm, gfn);
  839. break;
  840. }
  841. case HV_X64_MSR_REFERENCE_TSC:
  842. hv->hv_tsc_page = data;
  843. if (hv->hv_tsc_page & HV_X64_MSR_TSC_REFERENCE_ENABLE)
  844. kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
  845. break;
  846. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  847. return kvm_hv_msr_set_crash_data(vcpu,
  848. msr - HV_X64_MSR_CRASH_P0,
  849. data);
  850. case HV_X64_MSR_CRASH_CTL:
  851. return kvm_hv_msr_set_crash_ctl(vcpu, data, host);
  852. case HV_X64_MSR_RESET:
  853. if (data == 1) {
  854. vcpu_debug(vcpu, "hyper-v reset requested\n");
  855. kvm_make_request(KVM_REQ_HV_RESET, vcpu);
  856. }
  857. break;
  858. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  859. hv->hv_reenlightenment_control = data;
  860. break;
  861. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  862. hv->hv_tsc_emulation_control = data;
  863. break;
  864. case HV_X64_MSR_TSC_EMULATION_STATUS:
  865. hv->hv_tsc_emulation_status = data;
  866. break;
  867. default:
  868. vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
  869. msr, data);
  870. return 1;
  871. }
  872. return 0;
  873. }
  874. /* Calculate cpu time spent by current task in 100ns units */
  875. static u64 current_task_runtime_100ns(void)
  876. {
  877. u64 utime, stime;
  878. task_cputime_adjusted(current, &utime, &stime);
  879. return div_u64(utime + stime, 100);
  880. }
  881. static int kvm_hv_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
  882. {
  883. struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv;
  884. switch (msr) {
  885. case HV_X64_MSR_VP_INDEX:
  886. if (!host)
  887. return 1;
  888. hv->vp_index = (u32)data;
  889. break;
  890. case HV_X64_MSR_VP_ASSIST_PAGE: {
  891. u64 gfn;
  892. unsigned long addr;
  893. if (!(data & HV_X64_MSR_VP_ASSIST_PAGE_ENABLE)) {
  894. hv->hv_vapic = data;
  895. if (kvm_lapic_enable_pv_eoi(vcpu, 0))
  896. return 1;
  897. break;
  898. }
  899. gfn = data >> HV_X64_MSR_VP_ASSIST_PAGE_ADDRESS_SHIFT;
  900. addr = kvm_vcpu_gfn_to_hva(vcpu, gfn);
  901. if (kvm_is_error_hva(addr))
  902. return 1;
  903. if (__clear_user((void __user *)addr, PAGE_SIZE))
  904. return 1;
  905. hv->hv_vapic = data;
  906. kvm_vcpu_mark_page_dirty(vcpu, gfn);
  907. if (kvm_lapic_enable_pv_eoi(vcpu,
  908. gfn_to_gpa(gfn) | KVM_MSR_ENABLED))
  909. return 1;
  910. break;
  911. }
  912. case HV_X64_MSR_EOI:
  913. return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
  914. case HV_X64_MSR_ICR:
  915. return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
  916. case HV_X64_MSR_TPR:
  917. return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
  918. case HV_X64_MSR_VP_RUNTIME:
  919. if (!host)
  920. return 1;
  921. hv->runtime_offset = data - current_task_runtime_100ns();
  922. break;
  923. case HV_X64_MSR_SCONTROL:
  924. case HV_X64_MSR_SVERSION:
  925. case HV_X64_MSR_SIEFP:
  926. case HV_X64_MSR_SIMP:
  927. case HV_X64_MSR_EOM:
  928. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  929. return synic_set_msr(vcpu_to_synic(vcpu), msr, data, host);
  930. case HV_X64_MSR_STIMER0_CONFIG:
  931. case HV_X64_MSR_STIMER1_CONFIG:
  932. case HV_X64_MSR_STIMER2_CONFIG:
  933. case HV_X64_MSR_STIMER3_CONFIG: {
  934. int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
  935. return stimer_set_config(vcpu_to_stimer(vcpu, timer_index),
  936. data, host);
  937. }
  938. case HV_X64_MSR_STIMER0_COUNT:
  939. case HV_X64_MSR_STIMER1_COUNT:
  940. case HV_X64_MSR_STIMER2_COUNT:
  941. case HV_X64_MSR_STIMER3_COUNT: {
  942. int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
  943. return stimer_set_count(vcpu_to_stimer(vcpu, timer_index),
  944. data, host);
  945. }
  946. default:
  947. vcpu_unimpl(vcpu, "Hyper-V uhandled wrmsr: 0x%x data 0x%llx\n",
  948. msr, data);
  949. return 1;
  950. }
  951. return 0;
  952. }
  953. static int kvm_hv_get_msr_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  954. {
  955. u64 data = 0;
  956. struct kvm *kvm = vcpu->kvm;
  957. struct kvm_hv *hv = &kvm->arch.hyperv;
  958. switch (msr) {
  959. case HV_X64_MSR_GUEST_OS_ID:
  960. data = hv->hv_guest_os_id;
  961. break;
  962. case HV_X64_MSR_HYPERCALL:
  963. data = hv->hv_hypercall;
  964. break;
  965. case HV_X64_MSR_TIME_REF_COUNT:
  966. data = get_time_ref_counter(kvm);
  967. break;
  968. case HV_X64_MSR_REFERENCE_TSC:
  969. data = hv->hv_tsc_page;
  970. break;
  971. case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
  972. return kvm_hv_msr_get_crash_data(vcpu,
  973. msr - HV_X64_MSR_CRASH_P0,
  974. pdata);
  975. case HV_X64_MSR_CRASH_CTL:
  976. return kvm_hv_msr_get_crash_ctl(vcpu, pdata);
  977. case HV_X64_MSR_RESET:
  978. data = 0;
  979. break;
  980. case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
  981. data = hv->hv_reenlightenment_control;
  982. break;
  983. case HV_X64_MSR_TSC_EMULATION_CONTROL:
  984. data = hv->hv_tsc_emulation_control;
  985. break;
  986. case HV_X64_MSR_TSC_EMULATION_STATUS:
  987. data = hv->hv_tsc_emulation_status;
  988. break;
  989. default:
  990. vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
  991. return 1;
  992. }
  993. *pdata = data;
  994. return 0;
  995. }
  996. static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  997. {
  998. u64 data = 0;
  999. struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv;
  1000. switch (msr) {
  1001. case HV_X64_MSR_VP_INDEX:
  1002. data = hv->vp_index;
  1003. break;
  1004. case HV_X64_MSR_EOI:
  1005. return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
  1006. case HV_X64_MSR_ICR:
  1007. return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
  1008. case HV_X64_MSR_TPR:
  1009. return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
  1010. case HV_X64_MSR_VP_ASSIST_PAGE:
  1011. data = hv->hv_vapic;
  1012. break;
  1013. case HV_X64_MSR_VP_RUNTIME:
  1014. data = current_task_runtime_100ns() + hv->runtime_offset;
  1015. break;
  1016. case HV_X64_MSR_SCONTROL:
  1017. case HV_X64_MSR_SVERSION:
  1018. case HV_X64_MSR_SIEFP:
  1019. case HV_X64_MSR_SIMP:
  1020. case HV_X64_MSR_EOM:
  1021. case HV_X64_MSR_SINT0 ... HV_X64_MSR_SINT15:
  1022. return synic_get_msr(vcpu_to_synic(vcpu), msr, pdata);
  1023. case HV_X64_MSR_STIMER0_CONFIG:
  1024. case HV_X64_MSR_STIMER1_CONFIG:
  1025. case HV_X64_MSR_STIMER2_CONFIG:
  1026. case HV_X64_MSR_STIMER3_CONFIG: {
  1027. int timer_index = (msr - HV_X64_MSR_STIMER0_CONFIG)/2;
  1028. return stimer_get_config(vcpu_to_stimer(vcpu, timer_index),
  1029. pdata);
  1030. }
  1031. case HV_X64_MSR_STIMER0_COUNT:
  1032. case HV_X64_MSR_STIMER1_COUNT:
  1033. case HV_X64_MSR_STIMER2_COUNT:
  1034. case HV_X64_MSR_STIMER3_COUNT: {
  1035. int timer_index = (msr - HV_X64_MSR_STIMER0_COUNT)/2;
  1036. return stimer_get_count(vcpu_to_stimer(vcpu, timer_index),
  1037. pdata);
  1038. }
  1039. case HV_X64_MSR_TSC_FREQUENCY:
  1040. data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
  1041. break;
  1042. case HV_X64_MSR_APIC_FREQUENCY:
  1043. data = APIC_BUS_FREQUENCY;
  1044. break;
  1045. default:
  1046. vcpu_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
  1047. return 1;
  1048. }
  1049. *pdata = data;
  1050. return 0;
  1051. }
  1052. int kvm_hv_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data, bool host)
  1053. {
  1054. if (kvm_hv_msr_partition_wide(msr)) {
  1055. int r;
  1056. mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
  1057. r = kvm_hv_set_msr_pw(vcpu, msr, data, host);
  1058. mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
  1059. return r;
  1060. } else
  1061. return kvm_hv_set_msr(vcpu, msr, data, host);
  1062. }
  1063. int kvm_hv_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  1064. {
  1065. if (kvm_hv_msr_partition_wide(msr)) {
  1066. int r;
  1067. mutex_lock(&vcpu->kvm->arch.hyperv.hv_lock);
  1068. r = kvm_hv_get_msr_pw(vcpu, msr, pdata);
  1069. mutex_unlock(&vcpu->kvm->arch.hyperv.hv_lock);
  1070. return r;
  1071. } else
  1072. return kvm_hv_get_msr(vcpu, msr, pdata);
  1073. }
  1074. static __always_inline int get_sparse_bank_no(u64 valid_bank_mask, int bank_no)
  1075. {
  1076. int i = 0, j;
  1077. if (!(valid_bank_mask & BIT_ULL(bank_no)))
  1078. return -1;
  1079. for (j = 0; j < bank_no; j++)
  1080. if (valid_bank_mask & BIT_ULL(j))
  1081. i++;
  1082. return i;
  1083. }
  1084. static u64 kvm_hv_flush_tlb(struct kvm_vcpu *current_vcpu, u64 ingpa,
  1085. u16 rep_cnt, bool ex)
  1086. {
  1087. struct kvm *kvm = current_vcpu->kvm;
  1088. struct kvm_vcpu_hv *hv_current = &current_vcpu->arch.hyperv;
  1089. struct hv_tlb_flush_ex flush_ex;
  1090. struct hv_tlb_flush flush;
  1091. struct kvm_vcpu *vcpu;
  1092. unsigned long vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)] = {0};
  1093. unsigned long valid_bank_mask = 0;
  1094. u64 sparse_banks[64];
  1095. int sparse_banks_len, i;
  1096. bool all_cpus;
  1097. if (!ex) {
  1098. if (unlikely(kvm_read_guest(kvm, ingpa, &flush, sizeof(flush))))
  1099. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1100. trace_kvm_hv_flush_tlb(flush.processor_mask,
  1101. flush.address_space, flush.flags);
  1102. sparse_banks[0] = flush.processor_mask;
  1103. all_cpus = flush.flags & HV_FLUSH_ALL_PROCESSORS;
  1104. } else {
  1105. if (unlikely(kvm_read_guest(kvm, ingpa, &flush_ex,
  1106. sizeof(flush_ex))))
  1107. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1108. trace_kvm_hv_flush_tlb_ex(flush_ex.hv_vp_set.valid_bank_mask,
  1109. flush_ex.hv_vp_set.format,
  1110. flush_ex.address_space,
  1111. flush_ex.flags);
  1112. valid_bank_mask = flush_ex.hv_vp_set.valid_bank_mask;
  1113. all_cpus = flush_ex.hv_vp_set.format !=
  1114. HV_GENERIC_SET_SPARSE_4K;
  1115. sparse_banks_len = bitmap_weight(&valid_bank_mask, 64) *
  1116. sizeof(sparse_banks[0]);
  1117. if (!sparse_banks_len && !all_cpus)
  1118. goto ret_success;
  1119. if (!all_cpus &&
  1120. kvm_read_guest(kvm,
  1121. ingpa + offsetof(struct hv_tlb_flush_ex,
  1122. hv_vp_set.bank_contents),
  1123. sparse_banks,
  1124. sparse_banks_len))
  1125. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1126. }
  1127. cpumask_clear(&hv_current->tlb_lush);
  1128. kvm_for_each_vcpu(i, vcpu, kvm) {
  1129. struct kvm_vcpu_hv *hv = &vcpu->arch.hyperv;
  1130. int bank = hv->vp_index / 64, sbank = 0;
  1131. if (!all_cpus) {
  1132. /* Banks >64 can't be represented */
  1133. if (bank >= 64)
  1134. continue;
  1135. /* Non-ex hypercalls can only address first 64 vCPUs */
  1136. if (!ex && bank)
  1137. continue;
  1138. if (ex) {
  1139. /*
  1140. * Check is the bank of this vCPU is in sparse
  1141. * set and get the sparse bank number.
  1142. */
  1143. sbank = get_sparse_bank_no(valid_bank_mask,
  1144. bank);
  1145. if (sbank < 0)
  1146. continue;
  1147. }
  1148. if (!(sparse_banks[sbank] & BIT_ULL(hv->vp_index % 64)))
  1149. continue;
  1150. }
  1151. /*
  1152. * vcpu->arch.cr3 may not be up-to-date for running vCPUs so we
  1153. * can't analyze it here, flush TLB regardless of the specified
  1154. * address space.
  1155. */
  1156. __set_bit(i, vcpu_bitmap);
  1157. }
  1158. kvm_make_vcpus_request_mask(kvm,
  1159. KVM_REQ_TLB_FLUSH | KVM_REQUEST_NO_WAKEUP,
  1160. vcpu_bitmap, &hv_current->tlb_lush);
  1161. ret_success:
  1162. /* We always do full TLB flush, set rep_done = rep_cnt. */
  1163. return (u64)HV_STATUS_SUCCESS |
  1164. ((u64)rep_cnt << HV_HYPERCALL_REP_COMP_OFFSET);
  1165. }
  1166. bool kvm_hv_hypercall_enabled(struct kvm *kvm)
  1167. {
  1168. return READ_ONCE(kvm->arch.hyperv.hv_hypercall) & HV_X64_MSR_HYPERCALL_ENABLE;
  1169. }
  1170. static void kvm_hv_hypercall_set_result(struct kvm_vcpu *vcpu, u64 result)
  1171. {
  1172. bool longmode;
  1173. longmode = is_64_bit_mode(vcpu);
  1174. if (longmode)
  1175. kvm_register_write(vcpu, VCPU_REGS_RAX, result);
  1176. else {
  1177. kvm_register_write(vcpu, VCPU_REGS_RDX, result >> 32);
  1178. kvm_register_write(vcpu, VCPU_REGS_RAX, result & 0xffffffff);
  1179. }
  1180. }
  1181. static int kvm_hv_hypercall_complete(struct kvm_vcpu *vcpu, u64 result)
  1182. {
  1183. kvm_hv_hypercall_set_result(vcpu, result);
  1184. ++vcpu->stat.hypercalls;
  1185. return kvm_skip_emulated_instruction(vcpu);
  1186. }
  1187. static int kvm_hv_hypercall_complete_userspace(struct kvm_vcpu *vcpu)
  1188. {
  1189. return kvm_hv_hypercall_complete(vcpu, vcpu->run->hyperv.u.hcall.result);
  1190. }
  1191. static u16 kvm_hvcall_signal_event(struct kvm_vcpu *vcpu, bool fast, u64 param)
  1192. {
  1193. struct eventfd_ctx *eventfd;
  1194. if (unlikely(!fast)) {
  1195. int ret;
  1196. gpa_t gpa = param;
  1197. if ((gpa & (__alignof__(param) - 1)) ||
  1198. offset_in_page(gpa) + sizeof(param) > PAGE_SIZE)
  1199. return HV_STATUS_INVALID_ALIGNMENT;
  1200. ret = kvm_vcpu_read_guest(vcpu, gpa, &param, sizeof(param));
  1201. if (ret < 0)
  1202. return HV_STATUS_INVALID_ALIGNMENT;
  1203. }
  1204. /*
  1205. * Per spec, bits 32-47 contain the extra "flag number". However, we
  1206. * have no use for it, and in all known usecases it is zero, so just
  1207. * report lookup failure if it isn't.
  1208. */
  1209. if (param & 0xffff00000000ULL)
  1210. return HV_STATUS_INVALID_PORT_ID;
  1211. /* remaining bits are reserved-zero */
  1212. if (param & ~KVM_HYPERV_CONN_ID_MASK)
  1213. return HV_STATUS_INVALID_HYPERCALL_INPUT;
  1214. /* the eventfd is protected by vcpu->kvm->srcu, but conn_to_evt isn't */
  1215. rcu_read_lock();
  1216. eventfd = idr_find(&vcpu->kvm->arch.hyperv.conn_to_evt, param);
  1217. rcu_read_unlock();
  1218. if (!eventfd)
  1219. return HV_STATUS_INVALID_PORT_ID;
  1220. eventfd_signal(eventfd, 1);
  1221. return HV_STATUS_SUCCESS;
  1222. }
  1223. int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
  1224. {
  1225. u64 param, ingpa, outgpa, ret = HV_STATUS_SUCCESS;
  1226. uint16_t code, rep_idx, rep_cnt;
  1227. bool fast, longmode, rep;
  1228. /*
  1229. * hypercall generates UD from non zero cpl and real mode
  1230. * per HYPER-V spec
  1231. */
  1232. if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
  1233. kvm_queue_exception(vcpu, UD_VECTOR);
  1234. return 1;
  1235. }
  1236. longmode = is_64_bit_mode(vcpu);
  1237. if (!longmode) {
  1238. param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
  1239. (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
  1240. ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
  1241. (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
  1242. outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
  1243. (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
  1244. }
  1245. #ifdef CONFIG_X86_64
  1246. else {
  1247. param = kvm_register_read(vcpu, VCPU_REGS_RCX);
  1248. ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
  1249. outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
  1250. }
  1251. #endif
  1252. code = param & 0xffff;
  1253. fast = !!(param & HV_HYPERCALL_FAST_BIT);
  1254. rep_cnt = (param >> HV_HYPERCALL_REP_COMP_OFFSET) & 0xfff;
  1255. rep_idx = (param >> HV_HYPERCALL_REP_START_OFFSET) & 0xfff;
  1256. rep = !!(rep_cnt || rep_idx);
  1257. trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
  1258. switch (code) {
  1259. case HVCALL_NOTIFY_LONG_SPIN_WAIT:
  1260. if (unlikely(rep)) {
  1261. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1262. break;
  1263. }
  1264. kvm_vcpu_on_spin(vcpu, true);
  1265. break;
  1266. case HVCALL_SIGNAL_EVENT:
  1267. if (unlikely(rep)) {
  1268. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1269. break;
  1270. }
  1271. ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);
  1272. if (ret != HV_STATUS_INVALID_PORT_ID)
  1273. break;
  1274. /* maybe userspace knows this conn_id: fall through */
  1275. case HVCALL_POST_MESSAGE:
  1276. /* don't bother userspace if it has no way to handle it */
  1277. if (unlikely(rep || !vcpu_to_synic(vcpu)->active)) {
  1278. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1279. break;
  1280. }
  1281. vcpu->run->exit_reason = KVM_EXIT_HYPERV;
  1282. vcpu->run->hyperv.type = KVM_EXIT_HYPERV_HCALL;
  1283. vcpu->run->hyperv.u.hcall.input = param;
  1284. vcpu->run->hyperv.u.hcall.params[0] = ingpa;
  1285. vcpu->run->hyperv.u.hcall.params[1] = outgpa;
  1286. vcpu->arch.complete_userspace_io =
  1287. kvm_hv_hypercall_complete_userspace;
  1288. return 0;
  1289. case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST:
  1290. if (unlikely(fast || !rep_cnt || rep_idx)) {
  1291. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1292. break;
  1293. }
  1294. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
  1295. break;
  1296. case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE:
  1297. if (unlikely(fast || rep)) {
  1298. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1299. break;
  1300. }
  1301. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, false);
  1302. break;
  1303. case HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX:
  1304. if (unlikely(fast || !rep_cnt || rep_idx)) {
  1305. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1306. break;
  1307. }
  1308. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
  1309. break;
  1310. case HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX:
  1311. if (unlikely(fast || rep)) {
  1312. ret = HV_STATUS_INVALID_HYPERCALL_INPUT;
  1313. break;
  1314. }
  1315. ret = kvm_hv_flush_tlb(vcpu, ingpa, rep_cnt, true);
  1316. break;
  1317. default:
  1318. ret = HV_STATUS_INVALID_HYPERCALL_CODE;
  1319. break;
  1320. }
  1321. return kvm_hv_hypercall_complete(vcpu, ret);
  1322. }
  1323. void kvm_hv_init_vm(struct kvm *kvm)
  1324. {
  1325. mutex_init(&kvm->arch.hyperv.hv_lock);
  1326. idr_init(&kvm->arch.hyperv.conn_to_evt);
  1327. }
  1328. void kvm_hv_destroy_vm(struct kvm *kvm)
  1329. {
  1330. struct eventfd_ctx *eventfd;
  1331. int i;
  1332. idr_for_each_entry(&kvm->arch.hyperv.conn_to_evt, eventfd, i)
  1333. eventfd_ctx_put(eventfd);
  1334. idr_destroy(&kvm->arch.hyperv.conn_to_evt);
  1335. }
  1336. static int kvm_hv_eventfd_assign(struct kvm *kvm, u32 conn_id, int fd)
  1337. {
  1338. struct kvm_hv *hv = &kvm->arch.hyperv;
  1339. struct eventfd_ctx *eventfd;
  1340. int ret;
  1341. eventfd = eventfd_ctx_fdget(fd);
  1342. if (IS_ERR(eventfd))
  1343. return PTR_ERR(eventfd);
  1344. mutex_lock(&hv->hv_lock);
  1345. ret = idr_alloc(&hv->conn_to_evt, eventfd, conn_id, conn_id + 1,
  1346. GFP_KERNEL);
  1347. mutex_unlock(&hv->hv_lock);
  1348. if (ret >= 0)
  1349. return 0;
  1350. if (ret == -ENOSPC)
  1351. ret = -EEXIST;
  1352. eventfd_ctx_put(eventfd);
  1353. return ret;
  1354. }
  1355. static int kvm_hv_eventfd_deassign(struct kvm *kvm, u32 conn_id)
  1356. {
  1357. struct kvm_hv *hv = &kvm->arch.hyperv;
  1358. struct eventfd_ctx *eventfd;
  1359. mutex_lock(&hv->hv_lock);
  1360. eventfd = idr_remove(&hv->conn_to_evt, conn_id);
  1361. mutex_unlock(&hv->hv_lock);
  1362. if (!eventfd)
  1363. return -ENOENT;
  1364. synchronize_srcu(&kvm->srcu);
  1365. eventfd_ctx_put(eventfd);
  1366. return 0;
  1367. }
  1368. int kvm_vm_ioctl_hv_eventfd(struct kvm *kvm, struct kvm_hyperv_eventfd *args)
  1369. {
  1370. if ((args->flags & ~KVM_HYPERV_EVENTFD_DEASSIGN) ||
  1371. (args->conn_id & ~KVM_HYPERV_CONN_ID_MASK))
  1372. return -EINVAL;
  1373. if (args->flags == KVM_HYPERV_EVENTFD_DEASSIGN)
  1374. return kvm_hv_eventfd_deassign(kvm, args->conn_id);
  1375. return kvm_hv_eventfd_assign(kvm, args->conn_id, args->fd);
  1376. }