fifo.c 34 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460
  1. /*
  2. * Renesas USB driver
  3. *
  4. * Copyright (C) 2011 Renesas Solutions Corp.
  5. * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  15. *
  16. */
  17. #include <linux/delay.h>
  18. #include <linux/io.h>
  19. #include <linux/scatterlist.h>
  20. #include "common.h"
  21. #include "pipe.h"
  22. #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
  23. #define usbhsf_is_cfifo(p, f) (usbhsf_get_cfifo(p) == f)
  24. #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
  25. /*
  26. * packet initialize
  27. */
  28. void usbhs_pkt_init(struct usbhs_pkt *pkt)
  29. {
  30. INIT_LIST_HEAD(&pkt->node);
  31. }
  32. /*
  33. * packet control function
  34. */
  35. static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
  36. {
  37. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  38. struct device *dev = usbhs_priv_to_dev(priv);
  39. dev_err(dev, "null handler\n");
  40. return -EINVAL;
  41. }
  42. static const struct usbhs_pkt_handle usbhsf_null_handler = {
  43. .prepare = usbhsf_null_handle,
  44. .try_run = usbhsf_null_handle,
  45. };
  46. void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
  47. void (*done)(struct usbhs_priv *priv,
  48. struct usbhs_pkt *pkt),
  49. void *buf, int len, int zero, int sequence)
  50. {
  51. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  52. struct device *dev = usbhs_priv_to_dev(priv);
  53. unsigned long flags;
  54. if (!done) {
  55. dev_err(dev, "no done function\n");
  56. return;
  57. }
  58. /******************** spin lock ********************/
  59. usbhs_lock(priv, flags);
  60. if (!pipe->handler) {
  61. dev_err(dev, "no handler function\n");
  62. pipe->handler = &usbhsf_null_handler;
  63. }
  64. list_move_tail(&pkt->node, &pipe->list);
  65. /*
  66. * each pkt must hold own handler.
  67. * because handler might be changed by its situation.
  68. * dma handler -> pio handler.
  69. */
  70. pkt->pipe = pipe;
  71. pkt->buf = buf;
  72. pkt->handler = pipe->handler;
  73. pkt->length = len;
  74. pkt->zero = zero;
  75. pkt->actual = 0;
  76. pkt->done = done;
  77. pkt->sequence = sequence;
  78. usbhs_unlock(priv, flags);
  79. /******************** spin unlock ******************/
  80. }
  81. static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
  82. {
  83. list_del_init(&pkt->node);
  84. }
  85. static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
  86. {
  87. if (list_empty(&pipe->list))
  88. return NULL;
  89. return list_first_entry(&pipe->list, struct usbhs_pkt, node);
  90. }
  91. static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
  92. struct usbhs_fifo *fifo);
  93. static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
  94. struct usbhs_fifo *fifo);
  95. static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
  96. struct usbhs_pkt *pkt);
  97. #define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
  98. #define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
  99. static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map);
  100. struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
  101. {
  102. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  103. struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
  104. unsigned long flags;
  105. /******************** spin lock ********************/
  106. usbhs_lock(priv, flags);
  107. usbhs_pipe_disable(pipe);
  108. if (!pkt)
  109. pkt = __usbhsf_pkt_get(pipe);
  110. if (pkt) {
  111. struct dma_chan *chan = NULL;
  112. if (fifo)
  113. chan = usbhsf_dma_chan_get(fifo, pkt);
  114. if (chan) {
  115. dmaengine_terminate_all(chan);
  116. usbhsf_fifo_clear(pipe, fifo);
  117. usbhsf_dma_unmap(pkt);
  118. }
  119. __usbhsf_pkt_del(pkt);
  120. }
  121. if (fifo)
  122. usbhsf_fifo_unselect(pipe, fifo);
  123. usbhs_unlock(priv, flags);
  124. /******************** spin unlock ******************/
  125. return pkt;
  126. }
  127. enum {
  128. USBHSF_PKT_PREPARE,
  129. USBHSF_PKT_TRY_RUN,
  130. USBHSF_PKT_DMA_DONE,
  131. };
  132. static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
  133. {
  134. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  135. struct usbhs_pkt *pkt;
  136. struct device *dev = usbhs_priv_to_dev(priv);
  137. int (*func)(struct usbhs_pkt *pkt, int *is_done);
  138. unsigned long flags;
  139. int ret = 0;
  140. int is_done = 0;
  141. /******************** spin lock ********************/
  142. usbhs_lock(priv, flags);
  143. pkt = __usbhsf_pkt_get(pipe);
  144. if (!pkt)
  145. goto __usbhs_pkt_handler_end;
  146. switch (type) {
  147. case USBHSF_PKT_PREPARE:
  148. func = pkt->handler->prepare;
  149. break;
  150. case USBHSF_PKT_TRY_RUN:
  151. func = pkt->handler->try_run;
  152. break;
  153. case USBHSF_PKT_DMA_DONE:
  154. func = pkt->handler->dma_done;
  155. break;
  156. default:
  157. dev_err(dev, "unknown pkt handler\n");
  158. goto __usbhs_pkt_handler_end;
  159. }
  160. if (likely(func))
  161. ret = func(pkt, &is_done);
  162. if (is_done)
  163. __usbhsf_pkt_del(pkt);
  164. __usbhs_pkt_handler_end:
  165. usbhs_unlock(priv, flags);
  166. /******************** spin unlock ******************/
  167. if (is_done) {
  168. pkt->done(priv, pkt);
  169. usbhs_pkt_start(pipe);
  170. }
  171. return ret;
  172. }
  173. void usbhs_pkt_start(struct usbhs_pipe *pipe)
  174. {
  175. usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
  176. }
  177. /*
  178. * irq enable/disable function
  179. */
  180. #define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
  181. #define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
  182. #define usbhsf_irq_callback_ctrl(pipe, status, enable) \
  183. ({ \
  184. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
  185. struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
  186. u16 status = (1 << usbhs_pipe_number(pipe)); \
  187. if (!mod) \
  188. return; \
  189. if (enable) \
  190. mod->status |= status; \
  191. else \
  192. mod->status &= ~status; \
  193. usbhs_irq_callback_update(priv, mod); \
  194. })
  195. static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
  196. {
  197. /*
  198. * And DCP pipe can NOT use "ready interrupt" for "send"
  199. * it should use "empty" interrupt.
  200. * see
  201. * "Operation" - "Interrupt Function" - "BRDY Interrupt"
  202. *
  203. * on the other hand, normal pipe can use "ready interrupt" for "send"
  204. * even though it is single/double buffer
  205. */
  206. if (usbhs_pipe_is_dcp(pipe))
  207. usbhsf_irq_empty_ctrl(pipe, enable);
  208. else
  209. usbhsf_irq_ready_ctrl(pipe, enable);
  210. }
  211. static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
  212. {
  213. usbhsf_irq_ready_ctrl(pipe, enable);
  214. }
  215. /*
  216. * FIFO ctrl
  217. */
  218. static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
  219. struct usbhs_fifo *fifo)
  220. {
  221. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  222. usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
  223. }
  224. static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
  225. struct usbhs_fifo *fifo)
  226. {
  227. int timeout = 1024;
  228. do {
  229. /* The FIFO port is accessible */
  230. if (usbhs_read(priv, fifo->ctr) & FRDY)
  231. return 0;
  232. udelay(10);
  233. } while (timeout--);
  234. return -EBUSY;
  235. }
  236. static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
  237. struct usbhs_fifo *fifo)
  238. {
  239. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  240. if (!usbhs_pipe_is_dcp(pipe))
  241. usbhsf_fifo_barrier(priv, fifo);
  242. usbhs_write(priv, fifo->ctr, BCLR);
  243. }
  244. static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
  245. struct usbhs_fifo *fifo)
  246. {
  247. return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
  248. }
  249. static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
  250. struct usbhs_fifo *fifo)
  251. {
  252. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  253. usbhs_pipe_select_fifo(pipe, NULL);
  254. usbhs_write(priv, fifo->sel, 0);
  255. }
  256. static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
  257. struct usbhs_fifo *fifo,
  258. int write)
  259. {
  260. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  261. struct device *dev = usbhs_priv_to_dev(priv);
  262. int timeout = 1024;
  263. u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
  264. u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
  265. if (usbhs_pipe_is_busy(pipe) ||
  266. usbhsf_fifo_is_busy(fifo))
  267. return -EBUSY;
  268. if (usbhs_pipe_is_dcp(pipe)) {
  269. base |= (1 == write) << 5; /* ISEL */
  270. if (usbhs_mod_is_host(priv))
  271. usbhs_dcp_dir_for_host(pipe, write);
  272. }
  273. /* "base" will be used below */
  274. if (usbhs_get_dparam(priv, has_sudmac) && !usbhsf_is_cfifo(priv, fifo))
  275. usbhs_write(priv, fifo->sel, base);
  276. else
  277. usbhs_write(priv, fifo->sel, base | MBW_32);
  278. /* check ISEL and CURPIPE value */
  279. while (timeout--) {
  280. if (base == (mask & usbhs_read(priv, fifo->sel))) {
  281. usbhs_pipe_select_fifo(pipe, fifo);
  282. return 0;
  283. }
  284. udelay(10);
  285. }
  286. dev_err(dev, "fifo select error\n");
  287. return -EIO;
  288. }
  289. /*
  290. * DCP status stage
  291. */
  292. static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
  293. {
  294. struct usbhs_pipe *pipe = pkt->pipe;
  295. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  296. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  297. struct device *dev = usbhs_priv_to_dev(priv);
  298. int ret;
  299. usbhs_pipe_disable(pipe);
  300. ret = usbhsf_fifo_select(pipe, fifo, 1);
  301. if (ret < 0) {
  302. dev_err(dev, "%s() faile\n", __func__);
  303. return ret;
  304. }
  305. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  306. usbhsf_fifo_clear(pipe, fifo);
  307. usbhsf_send_terminator(pipe, fifo);
  308. usbhsf_fifo_unselect(pipe, fifo);
  309. usbhsf_tx_irq_ctrl(pipe, 1);
  310. usbhs_pipe_enable(pipe);
  311. return ret;
  312. }
  313. static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
  314. {
  315. struct usbhs_pipe *pipe = pkt->pipe;
  316. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  317. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  318. struct device *dev = usbhs_priv_to_dev(priv);
  319. int ret;
  320. usbhs_pipe_disable(pipe);
  321. ret = usbhsf_fifo_select(pipe, fifo, 0);
  322. if (ret < 0) {
  323. dev_err(dev, "%s() fail\n", __func__);
  324. return ret;
  325. }
  326. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  327. usbhsf_fifo_clear(pipe, fifo);
  328. usbhsf_fifo_unselect(pipe, fifo);
  329. usbhsf_rx_irq_ctrl(pipe, 1);
  330. usbhs_pipe_enable(pipe);
  331. return ret;
  332. }
  333. static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
  334. {
  335. struct usbhs_pipe *pipe = pkt->pipe;
  336. if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
  337. usbhsf_tx_irq_ctrl(pipe, 0);
  338. else
  339. usbhsf_rx_irq_ctrl(pipe, 0);
  340. pkt->actual = pkt->length;
  341. *is_done = 1;
  342. return 0;
  343. }
  344. const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
  345. .prepare = usbhs_dcp_dir_switch_to_write,
  346. .try_run = usbhs_dcp_dir_switch_done,
  347. };
  348. const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
  349. .prepare = usbhs_dcp_dir_switch_to_read,
  350. .try_run = usbhs_dcp_dir_switch_done,
  351. };
  352. /*
  353. * DCP data stage (push)
  354. */
  355. static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
  356. {
  357. struct usbhs_pipe *pipe = pkt->pipe;
  358. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  359. /*
  360. * change handler to PIO push
  361. */
  362. pkt->handler = &usbhs_fifo_pio_push_handler;
  363. return pkt->handler->prepare(pkt, is_done);
  364. }
  365. const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
  366. .prepare = usbhsf_dcp_data_stage_try_push,
  367. };
  368. /*
  369. * DCP data stage (pop)
  370. */
  371. static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
  372. int *is_done)
  373. {
  374. struct usbhs_pipe *pipe = pkt->pipe;
  375. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  376. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
  377. if (usbhs_pipe_is_busy(pipe))
  378. return 0;
  379. /*
  380. * prepare pop for DCP should
  381. * - change DCP direction,
  382. * - clear fifo
  383. * - DATA1
  384. */
  385. usbhs_pipe_disable(pipe);
  386. usbhs_pipe_sequence_data1(pipe); /* DATA1 */
  387. usbhsf_fifo_select(pipe, fifo, 0);
  388. usbhsf_fifo_clear(pipe, fifo);
  389. usbhsf_fifo_unselect(pipe, fifo);
  390. /*
  391. * change handler to PIO pop
  392. */
  393. pkt->handler = &usbhs_fifo_pio_pop_handler;
  394. return pkt->handler->prepare(pkt, is_done);
  395. }
  396. const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
  397. .prepare = usbhsf_dcp_data_stage_prepare_pop,
  398. };
  399. /*
  400. * PIO push handler
  401. */
  402. static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
  403. {
  404. struct usbhs_pipe *pipe = pkt->pipe;
  405. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  406. struct device *dev = usbhs_priv_to_dev(priv);
  407. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  408. void __iomem *addr = priv->base + fifo->port;
  409. u8 *buf;
  410. int maxp = usbhs_pipe_get_maxpacket(pipe);
  411. int total_len;
  412. int i, ret, len;
  413. int is_short;
  414. usbhs_pipe_data_sequence(pipe, pkt->sequence);
  415. pkt->sequence = -1; /* -1 sequence will be ignored */
  416. usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
  417. ret = usbhsf_fifo_select(pipe, fifo, 1);
  418. if (ret < 0)
  419. return 0;
  420. ret = usbhs_pipe_is_accessible(pipe);
  421. if (ret < 0) {
  422. /* inaccessible pipe is not an error */
  423. ret = 0;
  424. goto usbhs_fifo_write_busy;
  425. }
  426. ret = usbhsf_fifo_barrier(priv, fifo);
  427. if (ret < 0)
  428. goto usbhs_fifo_write_busy;
  429. buf = pkt->buf + pkt->actual;
  430. len = pkt->length - pkt->actual;
  431. len = min(len, maxp);
  432. total_len = len;
  433. is_short = total_len < maxp;
  434. /*
  435. * FIXME
  436. *
  437. * 32-bit access only
  438. */
  439. if (len >= 4 && !((unsigned long)buf & 0x03)) {
  440. iowrite32_rep(addr, buf, len / 4);
  441. len %= 4;
  442. buf += total_len - len;
  443. }
  444. /* the rest operation */
  445. for (i = 0; i < len; i++)
  446. iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
  447. /*
  448. * variable update
  449. */
  450. pkt->actual += total_len;
  451. if (pkt->actual < pkt->length)
  452. *is_done = 0; /* there are remainder data */
  453. else if (is_short)
  454. *is_done = 1; /* short packet */
  455. else
  456. *is_done = !pkt->zero; /* send zero packet ? */
  457. /*
  458. * pipe/irq handling
  459. */
  460. if (is_short)
  461. usbhsf_send_terminator(pipe, fifo);
  462. usbhsf_tx_irq_ctrl(pipe, !*is_done);
  463. usbhs_pipe_running(pipe, !*is_done);
  464. usbhs_pipe_enable(pipe);
  465. dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
  466. usbhs_pipe_number(pipe),
  467. pkt->length, pkt->actual, *is_done, pkt->zero);
  468. usbhsf_fifo_unselect(pipe, fifo);
  469. return 0;
  470. usbhs_fifo_write_busy:
  471. usbhsf_fifo_unselect(pipe, fifo);
  472. /*
  473. * pipe is busy.
  474. * retry in interrupt
  475. */
  476. usbhsf_tx_irq_ctrl(pipe, 1);
  477. usbhs_pipe_running(pipe, 1);
  478. return ret;
  479. }
  480. static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
  481. {
  482. if (usbhs_pipe_is_running(pkt->pipe))
  483. return 0;
  484. return usbhsf_pio_try_push(pkt, is_done);
  485. }
  486. const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
  487. .prepare = usbhsf_pio_prepare_push,
  488. .try_run = usbhsf_pio_try_push,
  489. };
  490. /*
  491. * PIO pop handler
  492. */
  493. static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
  494. {
  495. struct usbhs_pipe *pipe = pkt->pipe;
  496. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  497. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
  498. if (usbhs_pipe_is_busy(pipe))
  499. return 0;
  500. if (usbhs_pipe_is_running(pipe))
  501. return 0;
  502. /*
  503. * pipe enable to prepare packet receive
  504. */
  505. usbhs_pipe_data_sequence(pipe, pkt->sequence);
  506. pkt->sequence = -1; /* -1 sequence will be ignored */
  507. if (usbhs_pipe_is_dcp(pipe))
  508. usbhsf_fifo_clear(pipe, fifo);
  509. usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
  510. usbhs_pipe_enable(pipe);
  511. usbhs_pipe_running(pipe, 1);
  512. usbhsf_rx_irq_ctrl(pipe, 1);
  513. return 0;
  514. }
  515. static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
  516. {
  517. struct usbhs_pipe *pipe = pkt->pipe;
  518. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  519. struct device *dev = usbhs_priv_to_dev(priv);
  520. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  521. void __iomem *addr = priv->base + fifo->port;
  522. u8 *buf;
  523. u32 data = 0;
  524. int maxp = usbhs_pipe_get_maxpacket(pipe);
  525. int rcv_len, len;
  526. int i, ret;
  527. int total_len = 0;
  528. ret = usbhsf_fifo_select(pipe, fifo, 0);
  529. if (ret < 0)
  530. return 0;
  531. ret = usbhsf_fifo_barrier(priv, fifo);
  532. if (ret < 0)
  533. goto usbhs_fifo_read_busy;
  534. rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
  535. buf = pkt->buf + pkt->actual;
  536. len = pkt->length - pkt->actual;
  537. len = min(len, rcv_len);
  538. total_len = len;
  539. /*
  540. * update actual length first here to decide disable pipe.
  541. * if this pipe keeps BUF status and all data were popped,
  542. * then, next interrupt/token will be issued again
  543. */
  544. pkt->actual += total_len;
  545. if ((pkt->actual == pkt->length) || /* receive all data */
  546. (total_len < maxp)) { /* short packet */
  547. *is_done = 1;
  548. usbhsf_rx_irq_ctrl(pipe, 0);
  549. usbhs_pipe_running(pipe, 0);
  550. /*
  551. * If function mode, since this controller is possible to enter
  552. * Control Write status stage at this timing, this driver
  553. * should not disable the pipe. If such a case happens, this
  554. * controller is not able to complete the status stage.
  555. */
  556. if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
  557. usbhs_pipe_disable(pipe); /* disable pipe first */
  558. }
  559. /*
  560. * Buffer clear if Zero-Length packet
  561. *
  562. * see
  563. * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
  564. */
  565. if (0 == rcv_len) {
  566. pkt->zero = 1;
  567. usbhsf_fifo_clear(pipe, fifo);
  568. goto usbhs_fifo_read_end;
  569. }
  570. /*
  571. * FIXME
  572. *
  573. * 32-bit access only
  574. */
  575. if (len >= 4 && !((unsigned long)buf & 0x03)) {
  576. ioread32_rep(addr, buf, len / 4);
  577. len %= 4;
  578. buf += total_len - len;
  579. }
  580. /* the rest operation */
  581. for (i = 0; i < len; i++) {
  582. if (!(i & 0x03))
  583. data = ioread32(addr);
  584. buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
  585. }
  586. usbhs_fifo_read_end:
  587. dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
  588. usbhs_pipe_number(pipe),
  589. pkt->length, pkt->actual, *is_done, pkt->zero);
  590. usbhs_fifo_read_busy:
  591. usbhsf_fifo_unselect(pipe, fifo);
  592. return ret;
  593. }
  594. const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
  595. .prepare = usbhsf_prepare_pop,
  596. .try_run = usbhsf_pio_try_pop,
  597. };
  598. /*
  599. * DCP ctrol statge handler
  600. */
  601. static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
  602. {
  603. usbhs_dcp_control_transfer_done(pkt->pipe);
  604. *is_done = 1;
  605. return 0;
  606. }
  607. const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
  608. .prepare = usbhsf_ctrl_stage_end,
  609. .try_run = usbhsf_ctrl_stage_end,
  610. };
  611. /*
  612. * DMA fifo functions
  613. */
  614. static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
  615. struct usbhs_pkt *pkt)
  616. {
  617. if (&usbhs_fifo_dma_push_handler == pkt->handler)
  618. return fifo->tx_chan;
  619. if (&usbhs_fifo_dma_pop_handler == pkt->handler)
  620. return fifo->rx_chan;
  621. return NULL;
  622. }
  623. static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
  624. struct usbhs_pkt *pkt)
  625. {
  626. struct usbhs_fifo *fifo;
  627. int i;
  628. usbhs_for_each_dfifo(priv, fifo, i) {
  629. if (usbhsf_dma_chan_get(fifo, pkt) &&
  630. !usbhsf_fifo_is_busy(fifo))
  631. return fifo;
  632. }
  633. return NULL;
  634. }
  635. #define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
  636. #define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
  637. static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
  638. struct usbhs_fifo *fifo,
  639. u16 dreqe)
  640. {
  641. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  642. usbhs_bset(priv, fifo->sel, DREQE, dreqe);
  643. }
  644. static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
  645. {
  646. struct usbhs_pipe *pipe = pkt->pipe;
  647. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  648. struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
  649. struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
  650. struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
  651. return info->dma_map_ctrl(chan->device->dev, pkt, map);
  652. }
  653. static void usbhsf_dma_complete(void *arg);
  654. static void xfer_work(struct work_struct *work)
  655. {
  656. struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
  657. struct usbhs_pipe *pipe = pkt->pipe;
  658. struct usbhs_fifo *fifo;
  659. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  660. struct dma_async_tx_descriptor *desc;
  661. struct dma_chan *chan;
  662. struct device *dev = usbhs_priv_to_dev(priv);
  663. enum dma_transfer_direction dir;
  664. unsigned long flags;
  665. usbhs_lock(priv, flags);
  666. fifo = usbhs_pipe_to_fifo(pipe);
  667. if (!fifo)
  668. goto xfer_work_end;
  669. chan = usbhsf_dma_chan_get(fifo, pkt);
  670. dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
  671. desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
  672. pkt->trans, dir,
  673. DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
  674. if (!desc)
  675. goto xfer_work_end;
  676. desc->callback = usbhsf_dma_complete;
  677. desc->callback_param = pipe;
  678. pkt->cookie = dmaengine_submit(desc);
  679. if (pkt->cookie < 0) {
  680. dev_err(dev, "Failed to submit dma descriptor\n");
  681. goto xfer_work_end;
  682. }
  683. dev_dbg(dev, " %s %d (%d/ %d)\n",
  684. fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
  685. usbhs_pipe_running(pipe, 1);
  686. usbhsf_dma_start(pipe, fifo);
  687. usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
  688. dma_async_issue_pending(chan);
  689. usbhs_pipe_enable(pipe);
  690. xfer_work_end:
  691. usbhs_unlock(priv, flags);
  692. }
  693. /*
  694. * DMA push handler
  695. */
  696. static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
  697. {
  698. struct usbhs_pipe *pipe = pkt->pipe;
  699. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  700. struct usbhs_fifo *fifo;
  701. int len = pkt->length - pkt->actual;
  702. int ret;
  703. uintptr_t align_mask;
  704. if (usbhs_pipe_is_busy(pipe))
  705. return 0;
  706. /* use PIO if packet is less than pio_dma_border or pipe is DCP */
  707. if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
  708. usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
  709. goto usbhsf_pio_prepare_push;
  710. /* check data length if this driver don't use USB-DMAC */
  711. if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
  712. goto usbhsf_pio_prepare_push;
  713. /* check buffer alignment */
  714. align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
  715. USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
  716. if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
  717. goto usbhsf_pio_prepare_push;
  718. /* return at this time if the pipe is running */
  719. if (usbhs_pipe_is_running(pipe))
  720. return 0;
  721. /* get enable DMA fifo */
  722. fifo = usbhsf_get_dma_fifo(priv, pkt);
  723. if (!fifo)
  724. goto usbhsf_pio_prepare_push;
  725. ret = usbhsf_fifo_select(pipe, fifo, 0);
  726. if (ret < 0)
  727. goto usbhsf_pio_prepare_push;
  728. if (usbhsf_dma_map(pkt) < 0)
  729. goto usbhsf_pio_prepare_push_unselect;
  730. pkt->trans = len;
  731. usbhsf_tx_irq_ctrl(pipe, 0);
  732. INIT_WORK(&pkt->work, xfer_work);
  733. schedule_work(&pkt->work);
  734. return 0;
  735. usbhsf_pio_prepare_push_unselect:
  736. usbhsf_fifo_unselect(pipe, fifo);
  737. usbhsf_pio_prepare_push:
  738. /*
  739. * change handler to PIO
  740. */
  741. pkt->handler = &usbhs_fifo_pio_push_handler;
  742. return pkt->handler->prepare(pkt, is_done);
  743. }
  744. static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
  745. {
  746. struct usbhs_pipe *pipe = pkt->pipe;
  747. int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);
  748. pkt->actual += pkt->trans;
  749. if (pkt->actual < pkt->length)
  750. *is_done = 0; /* there are remainder data */
  751. else if (is_short)
  752. *is_done = 1; /* short packet */
  753. else
  754. *is_done = !pkt->zero; /* send zero packet? */
  755. usbhs_pipe_running(pipe, !*is_done);
  756. usbhsf_dma_stop(pipe, pipe->fifo);
  757. usbhsf_dma_unmap(pkt);
  758. usbhsf_fifo_unselect(pipe, pipe->fifo);
  759. if (!*is_done) {
  760. /* change handler to PIO */
  761. pkt->handler = &usbhs_fifo_pio_push_handler;
  762. return pkt->handler->try_run(pkt, is_done);
  763. }
  764. return 0;
  765. }
  766. const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
  767. .prepare = usbhsf_dma_prepare_push,
  768. .dma_done = usbhsf_dma_push_done,
  769. };
  770. /*
  771. * DMA pop handler
  772. */
  773. static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
  774. int *is_done)
  775. {
  776. return usbhsf_prepare_pop(pkt, is_done);
  777. }
  778. static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
  779. int *is_done)
  780. {
  781. struct usbhs_pipe *pipe = pkt->pipe;
  782. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  783. struct usbhs_fifo *fifo;
  784. int ret;
  785. if (usbhs_pipe_is_busy(pipe))
  786. return 0;
  787. /* use PIO if packet is less than pio_dma_border or pipe is DCP */
  788. if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
  789. usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
  790. goto usbhsf_pio_prepare_pop;
  791. fifo = usbhsf_get_dma_fifo(priv, pkt);
  792. if (!fifo)
  793. goto usbhsf_pio_prepare_pop;
  794. if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
  795. goto usbhsf_pio_prepare_pop;
  796. usbhs_pipe_config_change_bfre(pipe, 1);
  797. ret = usbhsf_fifo_select(pipe, fifo, 0);
  798. if (ret < 0)
  799. goto usbhsf_pio_prepare_pop;
  800. if (usbhsf_dma_map(pkt) < 0)
  801. goto usbhsf_pio_prepare_pop_unselect;
  802. /* DMA */
  803. /*
  804. * usbhs_fifo_dma_pop_handler :: prepare
  805. * enabled irq to come here.
  806. * but it is no longer needed for DMA. disable it.
  807. */
  808. usbhsf_rx_irq_ctrl(pipe, 0);
  809. pkt->trans = pkt->length;
  810. INIT_WORK(&pkt->work, xfer_work);
  811. schedule_work(&pkt->work);
  812. return 0;
  813. usbhsf_pio_prepare_pop_unselect:
  814. usbhsf_fifo_unselect(pipe, fifo);
  815. usbhsf_pio_prepare_pop:
  816. /*
  817. * change handler to PIO
  818. */
  819. pkt->handler = &usbhs_fifo_pio_pop_handler;
  820. usbhs_pipe_config_change_bfre(pipe, 0);
  821. return pkt->handler->prepare(pkt, is_done);
  822. }
  823. static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
  824. {
  825. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  826. if (usbhs_get_dparam(priv, has_usb_dmac))
  827. return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
  828. else
  829. return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
  830. }
  831. static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
  832. {
  833. struct usbhs_pipe *pipe = pkt->pipe;
  834. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  835. struct usbhs_fifo *fifo;
  836. int len, ret;
  837. if (usbhs_pipe_is_busy(pipe))
  838. return 0;
  839. if (usbhs_pipe_is_dcp(pipe))
  840. goto usbhsf_pio_prepare_pop;
  841. /* get enable DMA fifo */
  842. fifo = usbhsf_get_dma_fifo(priv, pkt);
  843. if (!fifo)
  844. goto usbhsf_pio_prepare_pop;
  845. if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
  846. goto usbhsf_pio_prepare_pop;
  847. ret = usbhsf_fifo_select(pipe, fifo, 0);
  848. if (ret < 0)
  849. goto usbhsf_pio_prepare_pop;
  850. /* use PIO if packet is less than pio_dma_border */
  851. len = usbhsf_fifo_rcv_len(priv, fifo);
  852. len = min(pkt->length - pkt->actual, len);
  853. if (len & 0x7) /* 8byte alignment */
  854. goto usbhsf_pio_prepare_pop_unselect;
  855. if (len < usbhs_get_dparam(priv, pio_dma_border))
  856. goto usbhsf_pio_prepare_pop_unselect;
  857. ret = usbhsf_fifo_barrier(priv, fifo);
  858. if (ret < 0)
  859. goto usbhsf_pio_prepare_pop_unselect;
  860. if (usbhsf_dma_map(pkt) < 0)
  861. goto usbhsf_pio_prepare_pop_unselect;
  862. /* DMA */
  863. /*
  864. * usbhs_fifo_dma_pop_handler :: prepare
  865. * enabled irq to come here.
  866. * but it is no longer needed for DMA. disable it.
  867. */
  868. usbhsf_rx_irq_ctrl(pipe, 0);
  869. pkt->trans = len;
  870. INIT_WORK(&pkt->work, xfer_work);
  871. schedule_work(&pkt->work);
  872. return 0;
  873. usbhsf_pio_prepare_pop_unselect:
  874. usbhsf_fifo_unselect(pipe, fifo);
  875. usbhsf_pio_prepare_pop:
  876. /*
  877. * change handler to PIO
  878. */
  879. pkt->handler = &usbhs_fifo_pio_pop_handler;
  880. return pkt->handler->try_run(pkt, is_done);
  881. }
  882. static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
  883. {
  884. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  885. BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
  886. return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
  887. }
  888. static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
  889. {
  890. struct usbhs_pipe *pipe = pkt->pipe;
  891. int maxp = usbhs_pipe_get_maxpacket(pipe);
  892. usbhsf_dma_stop(pipe, pipe->fifo);
  893. usbhsf_dma_unmap(pkt);
  894. usbhsf_fifo_unselect(pipe, pipe->fifo);
  895. pkt->actual += pkt->trans;
  896. if ((pkt->actual == pkt->length) || /* receive all data */
  897. (pkt->trans < maxp)) { /* short packet */
  898. *is_done = 1;
  899. usbhs_pipe_running(pipe, 0);
  900. } else {
  901. /* re-enable */
  902. usbhs_pipe_running(pipe, 0);
  903. usbhsf_prepare_pop(pkt, is_done);
  904. }
  905. return 0;
  906. }
  907. static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
  908. struct dma_chan *chan, int dtln)
  909. {
  910. struct usbhs_pipe *pipe = pkt->pipe;
  911. struct dma_tx_state state;
  912. size_t received_size;
  913. int maxp = usbhs_pipe_get_maxpacket(pipe);
  914. dmaengine_tx_status(chan, pkt->cookie, &state);
  915. received_size = pkt->length - state.residue;
  916. if (dtln) {
  917. received_size -= USBHS_USB_DMAC_XFER_SIZE;
  918. received_size &= ~(maxp - 1);
  919. received_size += dtln;
  920. }
  921. return received_size;
  922. }
  923. static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
  924. int *is_done)
  925. {
  926. struct usbhs_pipe *pipe = pkt->pipe;
  927. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  928. struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
  929. struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
  930. int rcv_len;
  931. /*
  932. * Since the driver disables rx_irq in DMA mode, the interrupt handler
  933. * cannot the BRDYSTS. So, the function clears it here because the
  934. * driver may use PIO mode next time.
  935. */
  936. usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
  937. rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
  938. usbhsf_fifo_clear(pipe, fifo);
  939. pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
  940. usbhsf_dma_stop(pipe, fifo);
  941. usbhsf_dma_unmap(pkt);
  942. usbhsf_fifo_unselect(pipe, pipe->fifo);
  943. /* The driver can assume the rx transaction is always "done" */
  944. *is_done = 1;
  945. return 0;
  946. }
  947. static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
  948. {
  949. struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
  950. if (usbhs_get_dparam(priv, has_usb_dmac))
  951. return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
  952. else
  953. return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
  954. }
  955. const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
  956. .prepare = usbhsf_dma_prepare_pop,
  957. .try_run = usbhsf_dma_try_pop,
  958. .dma_done = usbhsf_dma_pop_done
  959. };
  960. /*
  961. * DMA setting
  962. */
  963. static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
  964. {
  965. struct sh_dmae_slave *slave = param;
  966. /*
  967. * FIXME
  968. *
  969. * usbhs doesn't recognize id = 0 as valid DMA
  970. */
  971. if (0 == slave->shdma_slave.slave_id)
  972. return false;
  973. chan->private = slave;
  974. return true;
  975. }
  976. static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
  977. {
  978. if (fifo->tx_chan)
  979. dma_release_channel(fifo->tx_chan);
  980. if (fifo->rx_chan)
  981. dma_release_channel(fifo->rx_chan);
  982. fifo->tx_chan = NULL;
  983. fifo->rx_chan = NULL;
  984. }
  985. static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo)
  986. {
  987. dma_cap_mask_t mask;
  988. dma_cap_zero(mask);
  989. dma_cap_set(DMA_SLAVE, mask);
  990. fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
  991. &fifo->tx_slave);
  992. dma_cap_zero(mask);
  993. dma_cap_set(DMA_SLAVE, mask);
  994. fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
  995. &fifo->rx_slave);
  996. }
  997. static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
  998. int channel)
  999. {
  1000. char name[16];
  1001. /*
  1002. * To avoid complex handing for DnFIFOs, the driver uses each
  1003. * DnFIFO as TX or RX direction (not bi-direction).
  1004. * So, the driver uses odd channels for TX, even channels for RX.
  1005. */
  1006. snprintf(name, sizeof(name), "ch%d", channel);
  1007. if (channel & 1) {
  1008. fifo->tx_chan = dma_request_slave_channel_reason(dev, name);
  1009. if (IS_ERR(fifo->tx_chan))
  1010. fifo->tx_chan = NULL;
  1011. } else {
  1012. fifo->rx_chan = dma_request_slave_channel_reason(dev, name);
  1013. if (IS_ERR(fifo->rx_chan))
  1014. fifo->rx_chan = NULL;
  1015. }
  1016. }
  1017. static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
  1018. int channel)
  1019. {
  1020. struct device *dev = usbhs_priv_to_dev(priv);
  1021. if (dev->of_node)
  1022. usbhsf_dma_init_dt(dev, fifo, channel);
  1023. else
  1024. usbhsf_dma_init_pdev(fifo);
  1025. if (fifo->tx_chan || fifo->rx_chan)
  1026. dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
  1027. fifo->name,
  1028. fifo->tx_chan ? "[TX]" : " ",
  1029. fifo->rx_chan ? "[RX]" : " ");
  1030. }
  1031. /*
  1032. * irq functions
  1033. */
  1034. static int usbhsf_irq_empty(struct usbhs_priv *priv,
  1035. struct usbhs_irq_state *irq_state)
  1036. {
  1037. struct usbhs_pipe *pipe;
  1038. struct device *dev = usbhs_priv_to_dev(priv);
  1039. int i, ret;
  1040. if (!irq_state->bempsts) {
  1041. dev_err(dev, "debug %s !!\n", __func__);
  1042. return -EIO;
  1043. }
  1044. dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
  1045. /*
  1046. * search interrupted "pipe"
  1047. * not "uep".
  1048. */
  1049. usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
  1050. if (!(irq_state->bempsts & (1 << i)))
  1051. continue;
  1052. ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
  1053. if (ret < 0)
  1054. dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
  1055. }
  1056. return 0;
  1057. }
  1058. static int usbhsf_irq_ready(struct usbhs_priv *priv,
  1059. struct usbhs_irq_state *irq_state)
  1060. {
  1061. struct usbhs_pipe *pipe;
  1062. struct device *dev = usbhs_priv_to_dev(priv);
  1063. int i, ret;
  1064. if (!irq_state->brdysts) {
  1065. dev_err(dev, "debug %s !!\n", __func__);
  1066. return -EIO;
  1067. }
  1068. dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
  1069. /*
  1070. * search interrupted "pipe"
  1071. * not "uep".
  1072. */
  1073. usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
  1074. if (!(irq_state->brdysts & (1 << i)))
  1075. continue;
  1076. ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
  1077. if (ret < 0)
  1078. dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
  1079. }
  1080. return 0;
  1081. }
  1082. static void usbhsf_dma_complete(void *arg)
  1083. {
  1084. struct usbhs_pipe *pipe = arg;
  1085. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  1086. struct device *dev = usbhs_priv_to_dev(priv);
  1087. int ret;
  1088. ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
  1089. if (ret < 0)
  1090. dev_err(dev, "dma_complete run_error %d : %d\n",
  1091. usbhs_pipe_number(pipe), ret);
  1092. }
  1093. void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)
  1094. {
  1095. struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
  1096. struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
  1097. /* clear DCP FIFO of transmission */
  1098. if (usbhsf_fifo_select(pipe, fifo, 1) < 0)
  1099. return;
  1100. usbhsf_fifo_clear(pipe, fifo);
  1101. usbhsf_fifo_unselect(pipe, fifo);
  1102. /* clear DCP FIFO of reception */
  1103. if (usbhsf_fifo_select(pipe, fifo, 0) < 0)
  1104. return;
  1105. usbhsf_fifo_clear(pipe, fifo);
  1106. usbhsf_fifo_unselect(pipe, fifo);
  1107. }
  1108. /*
  1109. * fifo init
  1110. */
  1111. void usbhs_fifo_init(struct usbhs_priv *priv)
  1112. {
  1113. struct usbhs_mod *mod = usbhs_mod_get_current(priv);
  1114. struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
  1115. struct usbhs_fifo *dfifo;
  1116. int i;
  1117. mod->irq_empty = usbhsf_irq_empty;
  1118. mod->irq_ready = usbhsf_irq_ready;
  1119. mod->irq_bempsts = 0;
  1120. mod->irq_brdysts = 0;
  1121. cfifo->pipe = NULL;
  1122. usbhs_for_each_dfifo(priv, dfifo, i)
  1123. dfifo->pipe = NULL;
  1124. }
  1125. void usbhs_fifo_quit(struct usbhs_priv *priv)
  1126. {
  1127. struct usbhs_mod *mod = usbhs_mod_get_current(priv);
  1128. mod->irq_empty = NULL;
  1129. mod->irq_ready = NULL;
  1130. mod->irq_bempsts = 0;
  1131. mod->irq_brdysts = 0;
  1132. }
  1133. #define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \
  1134. do { \
  1135. fifo = usbhsf_get_dnfifo(priv, channel); \
  1136. fifo->name = "D"#channel"FIFO"; \
  1137. fifo->port = fifo_port; \
  1138. fifo->sel = D##channel##FIFOSEL; \
  1139. fifo->ctr = D##channel##FIFOCTR; \
  1140. fifo->tx_slave.shdma_slave.slave_id = \
  1141. usbhs_get_dparam(priv, d##channel##_tx_id); \
  1142. fifo->rx_slave.shdma_slave.slave_id = \
  1143. usbhs_get_dparam(priv, d##channel##_rx_id); \
  1144. usbhsf_dma_init(priv, fifo, channel); \
  1145. } while (0)
  1146. #define USBHS_DFIFO_INIT(priv, fifo, channel) \
  1147. __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
  1148. #define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \
  1149. __USBHS_DFIFO_INIT(priv, fifo, channel, 0)
  1150. int usbhs_fifo_probe(struct usbhs_priv *priv)
  1151. {
  1152. struct usbhs_fifo *fifo;
  1153. /* CFIFO */
  1154. fifo = usbhsf_get_cfifo(priv);
  1155. fifo->name = "CFIFO";
  1156. fifo->port = CFIFO;
  1157. fifo->sel = CFIFOSEL;
  1158. fifo->ctr = CFIFOCTR;
  1159. /* DFIFO */
  1160. USBHS_DFIFO_INIT(priv, fifo, 0);
  1161. USBHS_DFIFO_INIT(priv, fifo, 1);
  1162. USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2);
  1163. USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3);
  1164. return 0;
  1165. }
  1166. void usbhs_fifo_remove(struct usbhs_priv *priv)
  1167. {
  1168. struct usbhs_fifo *fifo;
  1169. int i;
  1170. usbhs_for_each_dfifo(priv, fifo, i)
  1171. usbhsf_dma_quit(priv, fifo);
  1172. }