portdrv_pci.c 10 KB

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  1. /*
  2. * File: portdrv_pci.c
  3. * Purpose: PCI Express Port Bus Driver
  4. *
  5. * Copyright (C) 2004 Intel
  6. * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
  7. */
  8. #include <linux/module.h>
  9. #include <linux/pci.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/pm.h>
  13. #include <linux/pm_runtime.h>
  14. #include <linux/init.h>
  15. #include <linux/pcieport_if.h>
  16. #include <linux/aer.h>
  17. #include <linux/dmi.h>
  18. #include <linux/pci-aspm.h>
  19. #include "portdrv.h"
  20. #include "aer/aerdrv.h"
  21. /*
  22. * Version Information
  23. */
  24. #define DRIVER_VERSION "v1.0"
  25. #define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
  26. #define DRIVER_DESC "PCIe Port Bus Driver"
  27. MODULE_AUTHOR(DRIVER_AUTHOR);
  28. MODULE_DESCRIPTION(DRIVER_DESC);
  29. MODULE_LICENSE("GPL");
  30. /* If this switch is set, PCIe port native services should not be enabled. */
  31. bool pcie_ports_disabled;
  32. /*
  33. * If this switch is set, ACPI _OSC will be used to determine whether or not to
  34. * enable PCIe port native services.
  35. */
  36. bool pcie_ports_auto = true;
  37. static int __init pcie_port_setup(char *str)
  38. {
  39. if (!strncmp(str, "compat", 6)) {
  40. pcie_ports_disabled = true;
  41. } else if (!strncmp(str, "native", 6)) {
  42. pcie_ports_disabled = false;
  43. pcie_ports_auto = false;
  44. } else if (!strncmp(str, "auto", 4)) {
  45. pcie_ports_disabled = false;
  46. pcie_ports_auto = true;
  47. }
  48. return 1;
  49. }
  50. __setup("pcie_ports=", pcie_port_setup);
  51. /* global data */
  52. /**
  53. * pcie_clear_root_pme_status - Clear root port PME interrupt status.
  54. * @dev: PCIe root port or event collector.
  55. */
  56. void pcie_clear_root_pme_status(struct pci_dev *dev)
  57. {
  58. pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME);
  59. }
  60. static int pcie_portdrv_restore_config(struct pci_dev *dev)
  61. {
  62. int retval;
  63. retval = pci_enable_device(dev);
  64. if (retval)
  65. return retval;
  66. pci_set_master(dev);
  67. return 0;
  68. }
  69. #ifdef CONFIG_PM
  70. static int pcie_port_resume_noirq(struct device *dev)
  71. {
  72. struct pci_dev *pdev = to_pci_dev(dev);
  73. /*
  74. * Some BIOSes forget to clear Root PME Status bits after system wakeup
  75. * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
  76. * bits now just in case (shouldn't hurt).
  77. */
  78. if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
  79. pcie_clear_root_pme_status(pdev);
  80. return 0;
  81. }
  82. static int pcie_port_runtime_suspend(struct device *dev)
  83. {
  84. return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
  85. }
  86. static int pcie_port_runtime_resume(struct device *dev)
  87. {
  88. return 0;
  89. }
  90. static int pcie_port_runtime_idle(struct device *dev)
  91. {
  92. /*
  93. * Assume the PCI core has set bridge_d3 whenever it thinks the port
  94. * should be good to go to D3. Everything else, including moving
  95. * the port to D3, is handled by the PCI core.
  96. */
  97. return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY;
  98. }
  99. static const struct dev_pm_ops pcie_portdrv_pm_ops = {
  100. .suspend = pcie_port_device_suspend,
  101. .resume = pcie_port_device_resume,
  102. .freeze = pcie_port_device_suspend,
  103. .thaw = pcie_port_device_resume,
  104. .poweroff = pcie_port_device_suspend,
  105. .restore = pcie_port_device_resume,
  106. .resume_noirq = pcie_port_resume_noirq,
  107. .runtime_suspend = pcie_port_runtime_suspend,
  108. .runtime_resume = pcie_port_runtime_resume,
  109. .runtime_idle = pcie_port_runtime_idle,
  110. };
  111. #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
  112. #else /* !PM */
  113. #define PCIE_PORTDRV_PM_OPS NULL
  114. #endif /* !PM */
  115. /*
  116. * pcie_portdrv_probe - Probe PCI-Express port devices
  117. * @dev: PCI-Express port device being probed
  118. *
  119. * If detected invokes the pcie_port_device_register() method for
  120. * this port device.
  121. *
  122. */
  123. static int pcie_portdrv_probe(struct pci_dev *dev,
  124. const struct pci_device_id *id)
  125. {
  126. int status;
  127. if (!pci_is_pcie(dev) ||
  128. ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
  129. (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
  130. (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
  131. return -ENODEV;
  132. status = pcie_port_device_register(dev);
  133. if (status)
  134. return status;
  135. pci_save_state(dev);
  136. /*
  137. * Prevent runtime PM if the port is advertising support for PCIe
  138. * hotplug. Otherwise the BIOS hotplug SMI code might not be able
  139. * to enumerate devices behind this port properly (the port is
  140. * powered down preventing all config space accesses to the
  141. * subordinate devices). We can't be sure for native PCIe hotplug
  142. * either so prevent that as well.
  143. */
  144. if (!dev->is_hotplug_bridge) {
  145. /*
  146. * Keep the port resumed 100ms to make sure things like
  147. * config space accesses from userspace (lspci) will not
  148. * cause the port to repeatedly suspend and resume.
  149. */
  150. pm_runtime_set_autosuspend_delay(&dev->dev, 100);
  151. pm_runtime_use_autosuspend(&dev->dev);
  152. pm_runtime_mark_last_busy(&dev->dev);
  153. pm_runtime_put_autosuspend(&dev->dev);
  154. pm_runtime_allow(&dev->dev);
  155. }
  156. return 0;
  157. }
  158. static void pcie_portdrv_remove(struct pci_dev *dev)
  159. {
  160. if (!dev->is_hotplug_bridge) {
  161. pm_runtime_forbid(&dev->dev);
  162. pm_runtime_get_noresume(&dev->dev);
  163. pm_runtime_dont_use_autosuspend(&dev->dev);
  164. }
  165. pcie_port_device_remove(dev);
  166. }
  167. static int error_detected_iter(struct device *device, void *data)
  168. {
  169. struct pcie_device *pcie_device;
  170. struct pcie_port_service_driver *driver;
  171. struct aer_broadcast_data *result_data;
  172. pci_ers_result_t status;
  173. result_data = (struct aer_broadcast_data *) data;
  174. if (device->bus == &pcie_port_bus_type && device->driver) {
  175. driver = to_service_driver(device->driver);
  176. if (!driver ||
  177. !driver->err_handler ||
  178. !driver->err_handler->error_detected)
  179. return 0;
  180. pcie_device = to_pcie_device(device);
  181. /* Forward error detected message to service drivers */
  182. status = driver->err_handler->error_detected(
  183. pcie_device->port,
  184. result_data->state);
  185. result_data->result =
  186. merge_result(result_data->result, status);
  187. }
  188. return 0;
  189. }
  190. static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
  191. enum pci_channel_state error)
  192. {
  193. struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
  194. /* get true return value from &data */
  195. device_for_each_child(&dev->dev, &data, error_detected_iter);
  196. return data.result;
  197. }
  198. static int mmio_enabled_iter(struct device *device, void *data)
  199. {
  200. struct pcie_device *pcie_device;
  201. struct pcie_port_service_driver *driver;
  202. pci_ers_result_t status, *result;
  203. result = (pci_ers_result_t *) data;
  204. if (device->bus == &pcie_port_bus_type && device->driver) {
  205. driver = to_service_driver(device->driver);
  206. if (driver &&
  207. driver->err_handler &&
  208. driver->err_handler->mmio_enabled) {
  209. pcie_device = to_pcie_device(device);
  210. /* Forward error message to service drivers */
  211. status = driver->err_handler->mmio_enabled(
  212. pcie_device->port);
  213. *result = merge_result(*result, status);
  214. }
  215. }
  216. return 0;
  217. }
  218. static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
  219. {
  220. pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
  221. /* get true return value from &status */
  222. device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
  223. return status;
  224. }
  225. static int slot_reset_iter(struct device *device, void *data)
  226. {
  227. struct pcie_device *pcie_device;
  228. struct pcie_port_service_driver *driver;
  229. pci_ers_result_t status, *result;
  230. result = (pci_ers_result_t *) data;
  231. if (device->bus == &pcie_port_bus_type && device->driver) {
  232. driver = to_service_driver(device->driver);
  233. if (driver &&
  234. driver->err_handler &&
  235. driver->err_handler->slot_reset) {
  236. pcie_device = to_pcie_device(device);
  237. /* Forward error message to service drivers */
  238. status = driver->err_handler->slot_reset(
  239. pcie_device->port);
  240. *result = merge_result(*result, status);
  241. }
  242. }
  243. return 0;
  244. }
  245. static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
  246. {
  247. pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
  248. /* If fatal, restore cfg space for possible link reset at upstream */
  249. if (dev->error_state == pci_channel_io_frozen) {
  250. dev->state_saved = true;
  251. pci_restore_state(dev);
  252. pcie_portdrv_restore_config(dev);
  253. pci_enable_pcie_error_reporting(dev);
  254. }
  255. /* get true return value from &status */
  256. device_for_each_child(&dev->dev, &status, slot_reset_iter);
  257. return status;
  258. }
  259. static int resume_iter(struct device *device, void *data)
  260. {
  261. struct pcie_device *pcie_device;
  262. struct pcie_port_service_driver *driver;
  263. if (device->bus == &pcie_port_bus_type && device->driver) {
  264. driver = to_service_driver(device->driver);
  265. if (driver &&
  266. driver->err_handler &&
  267. driver->err_handler->resume) {
  268. pcie_device = to_pcie_device(device);
  269. /* Forward error message to service drivers */
  270. driver->err_handler->resume(pcie_device->port);
  271. }
  272. }
  273. return 0;
  274. }
  275. static void pcie_portdrv_err_resume(struct pci_dev *dev)
  276. {
  277. device_for_each_child(&dev->dev, NULL, resume_iter);
  278. }
  279. /*
  280. * LINUX Device Driver Model
  281. */
  282. static const struct pci_device_id port_pci_ids[] = { {
  283. /* handle any PCI-Express port */
  284. PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
  285. }, { /* end: all zeroes */ }
  286. };
  287. MODULE_DEVICE_TABLE(pci, port_pci_ids);
  288. static const struct pci_error_handlers pcie_portdrv_err_handler = {
  289. .error_detected = pcie_portdrv_error_detected,
  290. .mmio_enabled = pcie_portdrv_mmio_enabled,
  291. .slot_reset = pcie_portdrv_slot_reset,
  292. .resume = pcie_portdrv_err_resume,
  293. };
  294. static struct pci_driver pcie_portdriver = {
  295. .name = "pcieport",
  296. .id_table = &port_pci_ids[0],
  297. .probe = pcie_portdrv_probe,
  298. .remove = pcie_portdrv_remove,
  299. .err_handler = &pcie_portdrv_err_handler,
  300. .driver.pm = PCIE_PORTDRV_PM_OPS,
  301. };
  302. static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
  303. {
  304. pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
  305. d->ident);
  306. pcie_pme_disable_msi();
  307. return 0;
  308. }
  309. static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
  310. /*
  311. * Boxes that should not use MSI for PCIe PME signaling.
  312. */
  313. {
  314. .callback = dmi_pcie_pme_disable_msi,
  315. .ident = "MSI Wind U-100",
  316. .matches = {
  317. DMI_MATCH(DMI_SYS_VENDOR,
  318. "MICRO-STAR INTERNATIONAL CO., LTD"),
  319. DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
  320. },
  321. },
  322. {}
  323. };
  324. static int __init pcie_portdrv_init(void)
  325. {
  326. int retval;
  327. if (pcie_ports_disabled)
  328. return pci_register_driver(&pcie_portdriver);
  329. dmi_check_system(pcie_portdrv_dmi_table);
  330. retval = pcie_port_bus_register();
  331. if (retval) {
  332. printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
  333. goto out;
  334. }
  335. retval = pci_register_driver(&pcie_portdriver);
  336. if (retval)
  337. pcie_port_bus_unregister();
  338. out:
  339. return retval;
  340. }
  341. module_init(pcie_portdrv_init);