pci-sysfs.c 39 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/export.h>
  21. #include <linux/topology.h>
  22. #include <linux/mm.h>
  23. #include <linux/fs.h>
  24. #include <linux/capability.h>
  25. #include <linux/security.h>
  26. #include <linux/pci-aspm.h>
  27. #include <linux/slab.h>
  28. #include <linux/vgaarb.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/of.h>
  31. #include "pci.h"
  32. static int sysfs_initialized; /* = 0 */
  33. /* show configuration fields */
  34. #define pci_config_attr(field, format_string) \
  35. static ssize_t \
  36. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  37. { \
  38. struct pci_dev *pdev; \
  39. \
  40. pdev = to_pci_dev(dev); \
  41. return sprintf(buf, format_string, pdev->field); \
  42. } \
  43. static DEVICE_ATTR_RO(field)
  44. pci_config_attr(vendor, "0x%04x\n");
  45. pci_config_attr(device, "0x%04x\n");
  46. pci_config_attr(subsystem_vendor, "0x%04x\n");
  47. pci_config_attr(subsystem_device, "0x%04x\n");
  48. pci_config_attr(class, "0x%06x\n");
  49. pci_config_attr(irq, "%u\n");
  50. static ssize_t broken_parity_status_show(struct device *dev,
  51. struct device_attribute *attr,
  52. char *buf)
  53. {
  54. struct pci_dev *pdev = to_pci_dev(dev);
  55. return sprintf(buf, "%u\n", pdev->broken_parity_status);
  56. }
  57. static ssize_t broken_parity_status_store(struct device *dev,
  58. struct device_attribute *attr,
  59. const char *buf, size_t count)
  60. {
  61. struct pci_dev *pdev = to_pci_dev(dev);
  62. unsigned long val;
  63. if (kstrtoul(buf, 0, &val) < 0)
  64. return -EINVAL;
  65. pdev->broken_parity_status = !!val;
  66. return count;
  67. }
  68. static DEVICE_ATTR_RW(broken_parity_status);
  69. static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
  70. struct device_attribute *attr, char *buf)
  71. {
  72. const struct cpumask *mask;
  73. #ifdef CONFIG_NUMA
  74. mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
  75. cpumask_of_node(dev_to_node(dev));
  76. #else
  77. mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
  78. #endif
  79. return cpumap_print_to_pagebuf(list, buf, mask);
  80. }
  81. static ssize_t local_cpus_show(struct device *dev,
  82. struct device_attribute *attr, char *buf)
  83. {
  84. return pci_dev_show_local_cpu(dev, false, attr, buf);
  85. }
  86. static DEVICE_ATTR_RO(local_cpus);
  87. static ssize_t local_cpulist_show(struct device *dev,
  88. struct device_attribute *attr, char *buf)
  89. {
  90. return pci_dev_show_local_cpu(dev, true, attr, buf);
  91. }
  92. static DEVICE_ATTR_RO(local_cpulist);
  93. /*
  94. * PCI Bus Class Devices
  95. */
  96. static ssize_t cpuaffinity_show(struct device *dev,
  97. struct device_attribute *attr, char *buf)
  98. {
  99. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  100. return cpumap_print_to_pagebuf(false, buf, cpumask);
  101. }
  102. static DEVICE_ATTR_RO(cpuaffinity);
  103. static ssize_t cpulistaffinity_show(struct device *dev,
  104. struct device_attribute *attr, char *buf)
  105. {
  106. const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
  107. return cpumap_print_to_pagebuf(true, buf, cpumask);
  108. }
  109. static DEVICE_ATTR_RO(cpulistaffinity);
  110. /* show resources */
  111. static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
  112. char *buf)
  113. {
  114. struct pci_dev *pci_dev = to_pci_dev(dev);
  115. char *str = buf;
  116. int i;
  117. int max;
  118. resource_size_t start, end;
  119. if (pci_dev->subordinate)
  120. max = DEVICE_COUNT_RESOURCE;
  121. else
  122. max = PCI_BRIDGE_RESOURCES;
  123. for (i = 0; i < max; i++) {
  124. struct resource *res = &pci_dev->resource[i];
  125. pci_resource_to_user(pci_dev, i, res, &start, &end);
  126. str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
  127. (unsigned long long)start,
  128. (unsigned long long)end,
  129. (unsigned long long)res->flags);
  130. }
  131. return (str - buf);
  132. }
  133. static DEVICE_ATTR_RO(resource);
  134. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
  135. char *buf)
  136. {
  137. struct pci_dev *pci_dev = to_pci_dev(dev);
  138. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
  139. pci_dev->vendor, pci_dev->device,
  140. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  141. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  142. (u8)(pci_dev->class));
  143. }
  144. static DEVICE_ATTR_RO(modalias);
  145. static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
  146. const char *buf, size_t count)
  147. {
  148. struct pci_dev *pdev = to_pci_dev(dev);
  149. unsigned long val;
  150. ssize_t result = kstrtoul(buf, 0, &val);
  151. if (result < 0)
  152. return result;
  153. /* this can crash the machine when done on the "wrong" device */
  154. if (!capable(CAP_SYS_ADMIN))
  155. return -EPERM;
  156. if (!val) {
  157. if (pci_is_enabled(pdev))
  158. pci_disable_device(pdev);
  159. else
  160. result = -EIO;
  161. } else
  162. result = pci_enable_device(pdev);
  163. return result < 0 ? result : count;
  164. }
  165. static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
  166. char *buf)
  167. {
  168. struct pci_dev *pdev;
  169. pdev = to_pci_dev(dev);
  170. return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
  171. }
  172. static DEVICE_ATTR_RW(enable);
  173. #ifdef CONFIG_NUMA
  174. static ssize_t numa_node_store(struct device *dev,
  175. struct device_attribute *attr, const char *buf,
  176. size_t count)
  177. {
  178. struct pci_dev *pdev = to_pci_dev(dev);
  179. int node, ret;
  180. if (!capable(CAP_SYS_ADMIN))
  181. return -EPERM;
  182. ret = kstrtoint(buf, 0, &node);
  183. if (ret)
  184. return ret;
  185. if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
  186. return -EINVAL;
  187. if (node != NUMA_NO_NODE && !node_online(node))
  188. return -EINVAL;
  189. add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
  190. dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
  191. node);
  192. dev->numa_node = node;
  193. return count;
  194. }
  195. static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
  196. char *buf)
  197. {
  198. return sprintf(buf, "%d\n", dev->numa_node);
  199. }
  200. static DEVICE_ATTR_RW(numa_node);
  201. #endif
  202. static ssize_t dma_mask_bits_show(struct device *dev,
  203. struct device_attribute *attr, char *buf)
  204. {
  205. struct pci_dev *pdev = to_pci_dev(dev);
  206. return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
  207. }
  208. static DEVICE_ATTR_RO(dma_mask_bits);
  209. static ssize_t consistent_dma_mask_bits_show(struct device *dev,
  210. struct device_attribute *attr,
  211. char *buf)
  212. {
  213. return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
  214. }
  215. static DEVICE_ATTR_RO(consistent_dma_mask_bits);
  216. static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
  217. char *buf)
  218. {
  219. struct pci_dev *pdev = to_pci_dev(dev);
  220. struct pci_bus *subordinate = pdev->subordinate;
  221. return sprintf(buf, "%u\n", subordinate ?
  222. !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
  223. : !pdev->no_msi);
  224. }
  225. static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
  226. const char *buf, size_t count)
  227. {
  228. struct pci_dev *pdev = to_pci_dev(dev);
  229. struct pci_bus *subordinate = pdev->subordinate;
  230. unsigned long val;
  231. if (kstrtoul(buf, 0, &val) < 0)
  232. return -EINVAL;
  233. if (!capable(CAP_SYS_ADMIN))
  234. return -EPERM;
  235. /*
  236. * "no_msi" and "bus_flags" only affect what happens when a driver
  237. * requests MSI or MSI-X. They don't affect any drivers that have
  238. * already requested MSI or MSI-X.
  239. */
  240. if (!subordinate) {
  241. pdev->no_msi = !val;
  242. dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
  243. val ? "allowed" : "disallowed");
  244. return count;
  245. }
  246. if (val)
  247. subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
  248. else
  249. subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
  250. dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
  251. val ? "allowed" : "disallowed");
  252. return count;
  253. }
  254. static DEVICE_ATTR_RW(msi_bus);
  255. static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
  256. size_t count)
  257. {
  258. unsigned long val;
  259. struct pci_bus *b = NULL;
  260. if (kstrtoul(buf, 0, &val) < 0)
  261. return -EINVAL;
  262. if (val) {
  263. pci_lock_rescan_remove();
  264. while ((b = pci_find_next_bus(b)) != NULL)
  265. pci_rescan_bus(b);
  266. pci_unlock_rescan_remove();
  267. }
  268. return count;
  269. }
  270. static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
  271. static struct attribute *pci_bus_attrs[] = {
  272. &bus_attr_rescan.attr,
  273. NULL,
  274. };
  275. static const struct attribute_group pci_bus_group = {
  276. .attrs = pci_bus_attrs,
  277. };
  278. const struct attribute_group *pci_bus_groups[] = {
  279. &pci_bus_group,
  280. NULL,
  281. };
  282. static ssize_t dev_rescan_store(struct device *dev,
  283. struct device_attribute *attr, const char *buf,
  284. size_t count)
  285. {
  286. unsigned long val;
  287. struct pci_dev *pdev = to_pci_dev(dev);
  288. if (kstrtoul(buf, 0, &val) < 0)
  289. return -EINVAL;
  290. if (val) {
  291. pci_lock_rescan_remove();
  292. pci_rescan_bus(pdev->bus);
  293. pci_unlock_rescan_remove();
  294. }
  295. return count;
  296. }
  297. static struct device_attribute dev_rescan_attr = __ATTR(rescan,
  298. (S_IWUSR|S_IWGRP),
  299. NULL, dev_rescan_store);
  300. static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
  301. const char *buf, size_t count)
  302. {
  303. unsigned long val;
  304. if (kstrtoul(buf, 0, &val) < 0)
  305. return -EINVAL;
  306. if (val && device_remove_file_self(dev, attr))
  307. pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
  308. return count;
  309. }
  310. static struct device_attribute dev_remove_attr = __ATTR(remove,
  311. (S_IWUSR|S_IWGRP),
  312. NULL, remove_store);
  313. static ssize_t dev_bus_rescan_store(struct device *dev,
  314. struct device_attribute *attr,
  315. const char *buf, size_t count)
  316. {
  317. unsigned long val;
  318. struct pci_bus *bus = to_pci_bus(dev);
  319. if (kstrtoul(buf, 0, &val) < 0)
  320. return -EINVAL;
  321. if (val) {
  322. pci_lock_rescan_remove();
  323. if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
  324. pci_rescan_bus_bridge_resize(bus->self);
  325. else
  326. pci_rescan_bus(bus);
  327. pci_unlock_rescan_remove();
  328. }
  329. return count;
  330. }
  331. static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
  332. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  333. static ssize_t d3cold_allowed_store(struct device *dev,
  334. struct device_attribute *attr,
  335. const char *buf, size_t count)
  336. {
  337. struct pci_dev *pdev = to_pci_dev(dev);
  338. unsigned long val;
  339. if (kstrtoul(buf, 0, &val) < 0)
  340. return -EINVAL;
  341. pdev->d3cold_allowed = !!val;
  342. if (pdev->d3cold_allowed)
  343. pci_d3cold_enable(pdev);
  344. else
  345. pci_d3cold_disable(pdev);
  346. pm_runtime_resume(dev);
  347. return count;
  348. }
  349. static ssize_t d3cold_allowed_show(struct device *dev,
  350. struct device_attribute *attr, char *buf)
  351. {
  352. struct pci_dev *pdev = to_pci_dev(dev);
  353. return sprintf(buf, "%u\n", pdev->d3cold_allowed);
  354. }
  355. static DEVICE_ATTR_RW(d3cold_allowed);
  356. #endif
  357. #ifdef CONFIG_OF
  358. static ssize_t devspec_show(struct device *dev,
  359. struct device_attribute *attr, char *buf)
  360. {
  361. struct pci_dev *pdev = to_pci_dev(dev);
  362. struct device_node *np = pci_device_to_OF_node(pdev);
  363. if (np == NULL || np->full_name == NULL)
  364. return 0;
  365. return sprintf(buf, "%s", np->full_name);
  366. }
  367. static DEVICE_ATTR_RO(devspec);
  368. #endif
  369. #ifdef CONFIG_PCI_IOV
  370. static ssize_t sriov_totalvfs_show(struct device *dev,
  371. struct device_attribute *attr,
  372. char *buf)
  373. {
  374. struct pci_dev *pdev = to_pci_dev(dev);
  375. return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
  376. }
  377. static ssize_t sriov_numvfs_show(struct device *dev,
  378. struct device_attribute *attr,
  379. char *buf)
  380. {
  381. struct pci_dev *pdev = to_pci_dev(dev);
  382. return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
  383. }
  384. /*
  385. * num_vfs > 0; number of VFs to enable
  386. * num_vfs = 0; disable all VFs
  387. *
  388. * Note: SRIOV spec doesn't allow partial VF
  389. * disable, so it's all or none.
  390. */
  391. static ssize_t sriov_numvfs_store(struct device *dev,
  392. struct device_attribute *attr,
  393. const char *buf, size_t count)
  394. {
  395. struct pci_dev *pdev = to_pci_dev(dev);
  396. int ret;
  397. u16 num_vfs;
  398. ret = kstrtou16(buf, 0, &num_vfs);
  399. if (ret < 0)
  400. return ret;
  401. if (num_vfs > pci_sriov_get_totalvfs(pdev))
  402. return -ERANGE;
  403. if (num_vfs == pdev->sriov->num_VFs)
  404. return count; /* no change */
  405. /* is PF driver loaded w/callback */
  406. if (!pdev->driver || !pdev->driver->sriov_configure) {
  407. dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
  408. return -ENOSYS;
  409. }
  410. if (num_vfs == 0) {
  411. /* disable VFs */
  412. ret = pdev->driver->sriov_configure(pdev, 0);
  413. if (ret < 0)
  414. return ret;
  415. return count;
  416. }
  417. /* enable VFs */
  418. if (pdev->sriov->num_VFs) {
  419. dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
  420. pdev->sriov->num_VFs, num_vfs);
  421. return -EBUSY;
  422. }
  423. ret = pdev->driver->sriov_configure(pdev, num_vfs);
  424. if (ret < 0)
  425. return ret;
  426. if (ret != num_vfs)
  427. dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
  428. num_vfs, ret);
  429. return count;
  430. }
  431. static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
  432. static struct device_attribute sriov_numvfs_attr =
  433. __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
  434. sriov_numvfs_show, sriov_numvfs_store);
  435. #endif /* CONFIG_PCI_IOV */
  436. static ssize_t driver_override_store(struct device *dev,
  437. struct device_attribute *attr,
  438. const char *buf, size_t count)
  439. {
  440. struct pci_dev *pdev = to_pci_dev(dev);
  441. char *driver_override, *old = pdev->driver_override, *cp;
  442. /* We need to keep extra room for a newline */
  443. if (count >= (PAGE_SIZE - 1))
  444. return -EINVAL;
  445. driver_override = kstrndup(buf, count, GFP_KERNEL);
  446. if (!driver_override)
  447. return -ENOMEM;
  448. cp = strchr(driver_override, '\n');
  449. if (cp)
  450. *cp = '\0';
  451. if (strlen(driver_override)) {
  452. pdev->driver_override = driver_override;
  453. } else {
  454. kfree(driver_override);
  455. pdev->driver_override = NULL;
  456. }
  457. kfree(old);
  458. return count;
  459. }
  460. static ssize_t driver_override_show(struct device *dev,
  461. struct device_attribute *attr, char *buf)
  462. {
  463. struct pci_dev *pdev = to_pci_dev(dev);
  464. return snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
  465. }
  466. static DEVICE_ATTR_RW(driver_override);
  467. static struct attribute *pci_dev_attrs[] = {
  468. &dev_attr_resource.attr,
  469. &dev_attr_vendor.attr,
  470. &dev_attr_device.attr,
  471. &dev_attr_subsystem_vendor.attr,
  472. &dev_attr_subsystem_device.attr,
  473. &dev_attr_class.attr,
  474. &dev_attr_irq.attr,
  475. &dev_attr_local_cpus.attr,
  476. &dev_attr_local_cpulist.attr,
  477. &dev_attr_modalias.attr,
  478. #ifdef CONFIG_NUMA
  479. &dev_attr_numa_node.attr,
  480. #endif
  481. &dev_attr_dma_mask_bits.attr,
  482. &dev_attr_consistent_dma_mask_bits.attr,
  483. &dev_attr_enable.attr,
  484. &dev_attr_broken_parity_status.attr,
  485. &dev_attr_msi_bus.attr,
  486. #if defined(CONFIG_PM) && defined(CONFIG_ACPI)
  487. &dev_attr_d3cold_allowed.attr,
  488. #endif
  489. #ifdef CONFIG_OF
  490. &dev_attr_devspec.attr,
  491. #endif
  492. &dev_attr_driver_override.attr,
  493. NULL,
  494. };
  495. static const struct attribute_group pci_dev_group = {
  496. .attrs = pci_dev_attrs,
  497. };
  498. const struct attribute_group *pci_dev_groups[] = {
  499. &pci_dev_group,
  500. NULL,
  501. };
  502. static struct attribute *pcibus_attrs[] = {
  503. &dev_attr_rescan.attr,
  504. &dev_attr_cpuaffinity.attr,
  505. &dev_attr_cpulistaffinity.attr,
  506. NULL,
  507. };
  508. static const struct attribute_group pcibus_group = {
  509. .attrs = pcibus_attrs,
  510. };
  511. const struct attribute_group *pcibus_groups[] = {
  512. &pcibus_group,
  513. NULL,
  514. };
  515. static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
  516. char *buf)
  517. {
  518. struct pci_dev *pdev = to_pci_dev(dev);
  519. struct pci_dev *vga_dev = vga_default_device();
  520. if (vga_dev)
  521. return sprintf(buf, "%u\n", (pdev == vga_dev));
  522. return sprintf(buf, "%u\n",
  523. !!(pdev->resource[PCI_ROM_RESOURCE].flags &
  524. IORESOURCE_ROM_SHADOW));
  525. }
  526. static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
  527. static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
  528. struct bin_attribute *bin_attr, char *buf,
  529. loff_t off, size_t count)
  530. {
  531. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  532. unsigned int size = 64;
  533. loff_t init_off = off;
  534. u8 *data = (u8 *) buf;
  535. /* Several chips lock up trying to read undefined config space */
  536. if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
  537. size = dev->cfg_size;
  538. else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
  539. size = 128;
  540. if (off > size)
  541. return 0;
  542. if (off + count > size) {
  543. size -= off;
  544. count = size;
  545. } else {
  546. size = count;
  547. }
  548. pci_config_pm_runtime_get(dev);
  549. if ((off & 1) && size) {
  550. u8 val;
  551. pci_user_read_config_byte(dev, off, &val);
  552. data[off - init_off] = val;
  553. off++;
  554. size--;
  555. }
  556. if ((off & 3) && size > 2) {
  557. u16 val;
  558. pci_user_read_config_word(dev, off, &val);
  559. data[off - init_off] = val & 0xff;
  560. data[off - init_off + 1] = (val >> 8) & 0xff;
  561. off += 2;
  562. size -= 2;
  563. }
  564. while (size > 3) {
  565. u32 val;
  566. pci_user_read_config_dword(dev, off, &val);
  567. data[off - init_off] = val & 0xff;
  568. data[off - init_off + 1] = (val >> 8) & 0xff;
  569. data[off - init_off + 2] = (val >> 16) & 0xff;
  570. data[off - init_off + 3] = (val >> 24) & 0xff;
  571. off += 4;
  572. size -= 4;
  573. }
  574. if (size >= 2) {
  575. u16 val;
  576. pci_user_read_config_word(dev, off, &val);
  577. data[off - init_off] = val & 0xff;
  578. data[off - init_off + 1] = (val >> 8) & 0xff;
  579. off += 2;
  580. size -= 2;
  581. }
  582. if (size > 0) {
  583. u8 val;
  584. pci_user_read_config_byte(dev, off, &val);
  585. data[off - init_off] = val;
  586. off++;
  587. --size;
  588. }
  589. pci_config_pm_runtime_put(dev);
  590. return count;
  591. }
  592. static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
  593. struct bin_attribute *bin_attr, char *buf,
  594. loff_t off, size_t count)
  595. {
  596. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  597. unsigned int size = count;
  598. loff_t init_off = off;
  599. u8 *data = (u8 *) buf;
  600. if (off > dev->cfg_size)
  601. return 0;
  602. if (off + count > dev->cfg_size) {
  603. size = dev->cfg_size - off;
  604. count = size;
  605. }
  606. pci_config_pm_runtime_get(dev);
  607. if ((off & 1) && size) {
  608. pci_user_write_config_byte(dev, off, data[off - init_off]);
  609. off++;
  610. size--;
  611. }
  612. if ((off & 3) && size > 2) {
  613. u16 val = data[off - init_off];
  614. val |= (u16) data[off - init_off + 1] << 8;
  615. pci_user_write_config_word(dev, off, val);
  616. off += 2;
  617. size -= 2;
  618. }
  619. while (size > 3) {
  620. u32 val = data[off - init_off];
  621. val |= (u32) data[off - init_off + 1] << 8;
  622. val |= (u32) data[off - init_off + 2] << 16;
  623. val |= (u32) data[off - init_off + 3] << 24;
  624. pci_user_write_config_dword(dev, off, val);
  625. off += 4;
  626. size -= 4;
  627. }
  628. if (size >= 2) {
  629. u16 val = data[off - init_off];
  630. val |= (u16) data[off - init_off + 1] << 8;
  631. pci_user_write_config_word(dev, off, val);
  632. off += 2;
  633. size -= 2;
  634. }
  635. if (size) {
  636. pci_user_write_config_byte(dev, off, data[off - init_off]);
  637. off++;
  638. --size;
  639. }
  640. pci_config_pm_runtime_put(dev);
  641. return count;
  642. }
  643. static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
  644. struct bin_attribute *bin_attr, char *buf,
  645. loff_t off, size_t count)
  646. {
  647. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  648. if (bin_attr->size > 0) {
  649. if (off > bin_attr->size)
  650. count = 0;
  651. else if (count > bin_attr->size - off)
  652. count = bin_attr->size - off;
  653. }
  654. return pci_read_vpd(dev, off, count, buf);
  655. }
  656. static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
  657. struct bin_attribute *bin_attr, char *buf,
  658. loff_t off, size_t count)
  659. {
  660. struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
  661. if (bin_attr->size > 0) {
  662. if (off > bin_attr->size)
  663. count = 0;
  664. else if (count > bin_attr->size - off)
  665. count = bin_attr->size - off;
  666. }
  667. return pci_write_vpd(dev, off, count, buf);
  668. }
  669. #ifdef HAVE_PCI_LEGACY
  670. /**
  671. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  672. * @filp: open sysfs file
  673. * @kobj: kobject corresponding to file to read from
  674. * @bin_attr: struct bin_attribute for this file
  675. * @buf: buffer to store results
  676. * @off: offset into legacy I/O port space
  677. * @count: number of bytes to read
  678. *
  679. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  680. * callback routine (pci_legacy_read).
  681. */
  682. static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
  683. struct bin_attribute *bin_attr, char *buf,
  684. loff_t off, size_t count)
  685. {
  686. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  687. /* Only support 1, 2 or 4 byte accesses */
  688. if (count != 1 && count != 2 && count != 4)
  689. return -EINVAL;
  690. return pci_legacy_read(bus, off, (u32 *)buf, count);
  691. }
  692. /**
  693. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  694. * @filp: open sysfs file
  695. * @kobj: kobject corresponding to file to read from
  696. * @bin_attr: struct bin_attribute for this file
  697. * @buf: buffer containing value to be written
  698. * @off: offset into legacy I/O port space
  699. * @count: number of bytes to write
  700. *
  701. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  702. * callback routine (pci_legacy_write).
  703. */
  704. static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
  705. struct bin_attribute *bin_attr, char *buf,
  706. loff_t off, size_t count)
  707. {
  708. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  709. /* Only support 1, 2 or 4 byte accesses */
  710. if (count != 1 && count != 2 && count != 4)
  711. return -EINVAL;
  712. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  713. }
  714. /**
  715. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  716. * @filp: open sysfs file
  717. * @kobj: kobject corresponding to device to be mapped
  718. * @attr: struct bin_attribute for this file
  719. * @vma: struct vm_area_struct passed to mmap
  720. *
  721. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  722. * legacy memory space (first meg of bus space) into application virtual
  723. * memory space.
  724. */
  725. static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
  726. struct bin_attribute *attr,
  727. struct vm_area_struct *vma)
  728. {
  729. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  730. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  731. }
  732. /**
  733. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  734. * @filp: open sysfs file
  735. * @kobj: kobject corresponding to device to be mapped
  736. * @attr: struct bin_attribute for this file
  737. * @vma: struct vm_area_struct passed to mmap
  738. *
  739. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  740. * legacy IO space (first meg of bus space) into application virtual
  741. * memory space. Returns -ENOSYS if the operation isn't supported
  742. */
  743. static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
  744. struct bin_attribute *attr,
  745. struct vm_area_struct *vma)
  746. {
  747. struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
  748. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  749. }
  750. /**
  751. * pci_adjust_legacy_attr - adjustment of legacy file attributes
  752. * @b: bus to create files under
  753. * @mmap_type: I/O port or memory
  754. *
  755. * Stub implementation. Can be overridden by arch if necessary.
  756. */
  757. void __weak pci_adjust_legacy_attr(struct pci_bus *b,
  758. enum pci_mmap_state mmap_type)
  759. {
  760. }
  761. /**
  762. * pci_create_legacy_files - create legacy I/O port and memory files
  763. * @b: bus to create files under
  764. *
  765. * Some platforms allow access to legacy I/O port and ISA memory space on
  766. * a per-bus basis. This routine creates the files and ties them into
  767. * their associated read, write and mmap files from pci-sysfs.c
  768. *
  769. * On error unwind, but don't propagate the error to the caller
  770. * as it is ok to set up the PCI bus without these files.
  771. */
  772. void pci_create_legacy_files(struct pci_bus *b)
  773. {
  774. int error;
  775. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  776. GFP_ATOMIC);
  777. if (!b->legacy_io)
  778. goto kzalloc_err;
  779. sysfs_bin_attr_init(b->legacy_io);
  780. b->legacy_io->attr.name = "legacy_io";
  781. b->legacy_io->size = 0xffff;
  782. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  783. b->legacy_io->read = pci_read_legacy_io;
  784. b->legacy_io->write = pci_write_legacy_io;
  785. b->legacy_io->mmap = pci_mmap_legacy_io;
  786. pci_adjust_legacy_attr(b, pci_mmap_io);
  787. error = device_create_bin_file(&b->dev, b->legacy_io);
  788. if (error)
  789. goto legacy_io_err;
  790. /* Allocated above after the legacy_io struct */
  791. b->legacy_mem = b->legacy_io + 1;
  792. sysfs_bin_attr_init(b->legacy_mem);
  793. b->legacy_mem->attr.name = "legacy_mem";
  794. b->legacy_mem->size = 1024*1024;
  795. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  796. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  797. pci_adjust_legacy_attr(b, pci_mmap_mem);
  798. error = device_create_bin_file(&b->dev, b->legacy_mem);
  799. if (error)
  800. goto legacy_mem_err;
  801. return;
  802. legacy_mem_err:
  803. device_remove_bin_file(&b->dev, b->legacy_io);
  804. legacy_io_err:
  805. kfree(b->legacy_io);
  806. b->legacy_io = NULL;
  807. kzalloc_err:
  808. printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
  809. return;
  810. }
  811. void pci_remove_legacy_files(struct pci_bus *b)
  812. {
  813. if (b->legacy_io) {
  814. device_remove_bin_file(&b->dev, b->legacy_io);
  815. device_remove_bin_file(&b->dev, b->legacy_mem);
  816. kfree(b->legacy_io); /* both are allocated here */
  817. }
  818. }
  819. #endif /* HAVE_PCI_LEGACY */
  820. #ifdef HAVE_PCI_MMAP
  821. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
  822. enum pci_mmap_api mmap_api)
  823. {
  824. unsigned long nr, start, size, pci_start;
  825. if (pci_resource_len(pdev, resno) == 0)
  826. return 0;
  827. nr = vma_pages(vma);
  828. start = vma->vm_pgoff;
  829. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  830. pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
  831. pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
  832. if (start >= pci_start && start < pci_start + size &&
  833. start + nr <= pci_start + size)
  834. return 1;
  835. return 0;
  836. }
  837. /**
  838. * pci_mmap_resource - map a PCI resource into user memory space
  839. * @kobj: kobject for mapping
  840. * @attr: struct bin_attribute for the file being mapped
  841. * @vma: struct vm_area_struct passed into the mmap
  842. * @write_combine: 1 for write_combine mapping
  843. *
  844. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  845. */
  846. static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  847. struct vm_area_struct *vma, int write_combine)
  848. {
  849. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  850. struct resource *res = attr->private;
  851. enum pci_mmap_state mmap_type;
  852. resource_size_t start, end;
  853. int i;
  854. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  855. if (res == &pdev->resource[i])
  856. break;
  857. if (i >= PCI_ROM_RESOURCE)
  858. return -ENODEV;
  859. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
  860. return -EINVAL;
  861. if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
  862. WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
  863. current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
  864. pci_name(pdev), i,
  865. (u64)pci_resource_start(pdev, i),
  866. (u64)pci_resource_len(pdev, i));
  867. return -EINVAL;
  868. }
  869. /* pci_mmap_page_range() expects the same kind of entry as coming
  870. * from /proc/bus/pci/ which is a "user visible" value. If this is
  871. * different from the resource itself, arch will do necessary fixup.
  872. */
  873. pci_resource_to_user(pdev, i, res, &start, &end);
  874. vma->vm_pgoff += start >> PAGE_SHIFT;
  875. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  876. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  877. }
  878. static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
  879. struct bin_attribute *attr,
  880. struct vm_area_struct *vma)
  881. {
  882. return pci_mmap_resource(kobj, attr, vma, 0);
  883. }
  884. static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
  885. struct bin_attribute *attr,
  886. struct vm_area_struct *vma)
  887. {
  888. return pci_mmap_resource(kobj, attr, vma, 1);
  889. }
  890. static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
  891. struct bin_attribute *attr, char *buf,
  892. loff_t off, size_t count, bool write)
  893. {
  894. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  895. struct resource *res = attr->private;
  896. unsigned long port = off;
  897. int i;
  898. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  899. if (res == &pdev->resource[i])
  900. break;
  901. if (i >= PCI_ROM_RESOURCE)
  902. return -ENODEV;
  903. port += pci_resource_start(pdev, i);
  904. if (port > pci_resource_end(pdev, i))
  905. return 0;
  906. if (port + count - 1 > pci_resource_end(pdev, i))
  907. return -EINVAL;
  908. switch (count) {
  909. case 1:
  910. if (write)
  911. outb(*(u8 *)buf, port);
  912. else
  913. *(u8 *)buf = inb(port);
  914. return 1;
  915. case 2:
  916. if (write)
  917. outw(*(u16 *)buf, port);
  918. else
  919. *(u16 *)buf = inw(port);
  920. return 2;
  921. case 4:
  922. if (write)
  923. outl(*(u32 *)buf, port);
  924. else
  925. *(u32 *)buf = inl(port);
  926. return 4;
  927. }
  928. return -EINVAL;
  929. }
  930. static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
  931. struct bin_attribute *attr, char *buf,
  932. loff_t off, size_t count)
  933. {
  934. return pci_resource_io(filp, kobj, attr, buf, off, count, false);
  935. }
  936. static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
  937. struct bin_attribute *attr, char *buf,
  938. loff_t off, size_t count)
  939. {
  940. return pci_resource_io(filp, kobj, attr, buf, off, count, true);
  941. }
  942. /**
  943. * pci_remove_resource_files - cleanup resource files
  944. * @pdev: dev to cleanup
  945. *
  946. * If we created resource files for @pdev, remove them from sysfs and
  947. * free their resources.
  948. */
  949. static void pci_remove_resource_files(struct pci_dev *pdev)
  950. {
  951. int i;
  952. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  953. struct bin_attribute *res_attr;
  954. res_attr = pdev->res_attr[i];
  955. if (res_attr) {
  956. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  957. kfree(res_attr);
  958. }
  959. res_attr = pdev->res_attr_wc[i];
  960. if (res_attr) {
  961. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  962. kfree(res_attr);
  963. }
  964. }
  965. }
  966. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  967. {
  968. /* allocate attribute structure, piggyback attribute name */
  969. int name_len = write_combine ? 13 : 10;
  970. struct bin_attribute *res_attr;
  971. char *res_attr_name;
  972. int retval;
  973. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  974. if (!res_attr)
  975. return -ENOMEM;
  976. res_attr_name = (char *)(res_attr + 1);
  977. sysfs_bin_attr_init(res_attr);
  978. if (write_combine) {
  979. pdev->res_attr_wc[num] = res_attr;
  980. sprintf(res_attr_name, "resource%d_wc", num);
  981. res_attr->mmap = pci_mmap_resource_wc;
  982. } else {
  983. pdev->res_attr[num] = res_attr;
  984. sprintf(res_attr_name, "resource%d", num);
  985. res_attr->mmap = pci_mmap_resource_uc;
  986. }
  987. if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
  988. res_attr->read = pci_read_resource_io;
  989. res_attr->write = pci_write_resource_io;
  990. }
  991. res_attr->attr.name = res_attr_name;
  992. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  993. res_attr->size = pci_resource_len(pdev, num);
  994. res_attr->private = &pdev->resource[num];
  995. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  996. if (retval)
  997. kfree(res_attr);
  998. return retval;
  999. }
  1000. /**
  1001. * pci_create_resource_files - create resource files in sysfs for @dev
  1002. * @pdev: dev in question
  1003. *
  1004. * Walk the resources in @pdev creating files for each resource available.
  1005. */
  1006. static int pci_create_resource_files(struct pci_dev *pdev)
  1007. {
  1008. int i;
  1009. int retval;
  1010. /* Expose the PCI resources from this device as files */
  1011. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  1012. /* skip empty resources */
  1013. if (!pci_resource_len(pdev, i))
  1014. continue;
  1015. retval = pci_create_attr(pdev, i, 0);
  1016. /* for prefetchable resources, create a WC mappable file */
  1017. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  1018. retval = pci_create_attr(pdev, i, 1);
  1019. if (retval) {
  1020. pci_remove_resource_files(pdev);
  1021. return retval;
  1022. }
  1023. }
  1024. return 0;
  1025. }
  1026. #else /* !HAVE_PCI_MMAP */
  1027. int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
  1028. void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
  1029. #endif /* HAVE_PCI_MMAP */
  1030. /**
  1031. * pci_write_rom - used to enable access to the PCI ROM display
  1032. * @filp: sysfs file
  1033. * @kobj: kernel object handle
  1034. * @bin_attr: struct bin_attribute for this file
  1035. * @buf: user input
  1036. * @off: file offset
  1037. * @count: number of byte in input
  1038. *
  1039. * writing anything except 0 enables it
  1040. */
  1041. static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
  1042. struct bin_attribute *bin_attr, char *buf,
  1043. loff_t off, size_t count)
  1044. {
  1045. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1046. if ((off == 0) && (*buf == '0') && (count == 2))
  1047. pdev->rom_attr_enabled = 0;
  1048. else
  1049. pdev->rom_attr_enabled = 1;
  1050. return count;
  1051. }
  1052. /**
  1053. * pci_read_rom - read a PCI ROM
  1054. * @filp: sysfs file
  1055. * @kobj: kernel object handle
  1056. * @bin_attr: struct bin_attribute for this file
  1057. * @buf: where to put the data we read from the ROM
  1058. * @off: file offset
  1059. * @count: number of bytes to read
  1060. *
  1061. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  1062. * device corresponding to @kobj.
  1063. */
  1064. static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
  1065. struct bin_attribute *bin_attr, char *buf,
  1066. loff_t off, size_t count)
  1067. {
  1068. struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
  1069. void __iomem *rom;
  1070. size_t size;
  1071. if (!pdev->rom_attr_enabled)
  1072. return -EINVAL;
  1073. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  1074. if (!rom || !size)
  1075. return -EIO;
  1076. if (off >= size)
  1077. count = 0;
  1078. else {
  1079. if (off + count > size)
  1080. count = size - off;
  1081. memcpy_fromio(buf, rom + off, count);
  1082. }
  1083. pci_unmap_rom(pdev, rom);
  1084. return count;
  1085. }
  1086. static struct bin_attribute pci_config_attr = {
  1087. .attr = {
  1088. .name = "config",
  1089. .mode = S_IRUGO | S_IWUSR,
  1090. },
  1091. .size = PCI_CFG_SPACE_SIZE,
  1092. .read = pci_read_config,
  1093. .write = pci_write_config,
  1094. };
  1095. static struct bin_attribute pcie_config_attr = {
  1096. .attr = {
  1097. .name = "config",
  1098. .mode = S_IRUGO | S_IWUSR,
  1099. },
  1100. .size = PCI_CFG_SPACE_EXP_SIZE,
  1101. .read = pci_read_config,
  1102. .write = pci_write_config,
  1103. };
  1104. static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
  1105. const char *buf, size_t count)
  1106. {
  1107. struct pci_dev *pdev = to_pci_dev(dev);
  1108. unsigned long val;
  1109. ssize_t result = kstrtoul(buf, 0, &val);
  1110. if (result < 0)
  1111. return result;
  1112. if (val != 1)
  1113. return -EINVAL;
  1114. result = pci_reset_function(pdev);
  1115. if (result < 0)
  1116. return result;
  1117. return count;
  1118. }
  1119. static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
  1120. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  1121. {
  1122. int retval;
  1123. struct bin_attribute *attr;
  1124. /* If the device has VPD, try to expose it in sysfs. */
  1125. if (dev->vpd) {
  1126. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1127. if (!attr)
  1128. return -ENOMEM;
  1129. sysfs_bin_attr_init(attr);
  1130. attr->size = 0;
  1131. attr->attr.name = "vpd";
  1132. attr->attr.mode = S_IRUSR | S_IWUSR;
  1133. attr->read = read_vpd_attr;
  1134. attr->write = write_vpd_attr;
  1135. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  1136. if (retval) {
  1137. kfree(attr);
  1138. return retval;
  1139. }
  1140. dev->vpd->attr = attr;
  1141. }
  1142. /* Active State Power Management */
  1143. pcie_aspm_create_sysfs_dev_files(dev);
  1144. if (!pci_probe_reset_function(dev)) {
  1145. retval = device_create_file(&dev->dev, &reset_attr);
  1146. if (retval)
  1147. goto error;
  1148. dev->reset_fn = 1;
  1149. }
  1150. return 0;
  1151. error:
  1152. pcie_aspm_remove_sysfs_dev_files(dev);
  1153. if (dev->vpd && dev->vpd->attr) {
  1154. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1155. kfree(dev->vpd->attr);
  1156. }
  1157. return retval;
  1158. }
  1159. int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
  1160. {
  1161. int retval;
  1162. int rom_size;
  1163. struct bin_attribute *attr;
  1164. if (!sysfs_initialized)
  1165. return -EACCES;
  1166. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1167. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1168. else
  1169. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1170. if (retval)
  1171. goto err;
  1172. retval = pci_create_resource_files(pdev);
  1173. if (retval)
  1174. goto err_config_file;
  1175. /* If the device has a ROM, try to expose it in sysfs. */
  1176. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  1177. if (rom_size) {
  1178. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  1179. if (!attr) {
  1180. retval = -ENOMEM;
  1181. goto err_resource_files;
  1182. }
  1183. sysfs_bin_attr_init(attr);
  1184. attr->size = rom_size;
  1185. attr->attr.name = "rom";
  1186. attr->attr.mode = S_IRUSR | S_IWUSR;
  1187. attr->read = pci_read_rom;
  1188. attr->write = pci_write_rom;
  1189. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  1190. if (retval) {
  1191. kfree(attr);
  1192. goto err_resource_files;
  1193. }
  1194. pdev->rom_attr = attr;
  1195. }
  1196. /* add sysfs entries for various capabilities */
  1197. retval = pci_create_capabilities_sysfs(pdev);
  1198. if (retval)
  1199. goto err_rom_file;
  1200. pci_create_firmware_label_files(pdev);
  1201. return 0;
  1202. err_rom_file:
  1203. if (pdev->rom_attr) {
  1204. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1205. kfree(pdev->rom_attr);
  1206. pdev->rom_attr = NULL;
  1207. }
  1208. err_resource_files:
  1209. pci_remove_resource_files(pdev);
  1210. err_config_file:
  1211. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1212. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1213. else
  1214. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1215. err:
  1216. return retval;
  1217. }
  1218. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  1219. {
  1220. if (dev->vpd && dev->vpd->attr) {
  1221. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  1222. kfree(dev->vpd->attr);
  1223. }
  1224. pcie_aspm_remove_sysfs_dev_files(dev);
  1225. if (dev->reset_fn) {
  1226. device_remove_file(&dev->dev, &reset_attr);
  1227. dev->reset_fn = 0;
  1228. }
  1229. }
  1230. /**
  1231. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  1232. * @pdev: device whose entries we should free
  1233. *
  1234. * Cleanup when @pdev is removed from sysfs.
  1235. */
  1236. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  1237. {
  1238. if (!sysfs_initialized)
  1239. return;
  1240. pci_remove_capabilities_sysfs(pdev);
  1241. if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
  1242. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  1243. else
  1244. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  1245. pci_remove_resource_files(pdev);
  1246. if (pdev->rom_attr) {
  1247. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  1248. kfree(pdev->rom_attr);
  1249. pdev->rom_attr = NULL;
  1250. }
  1251. pci_remove_firmware_label_files(pdev);
  1252. }
  1253. static int __init pci_sysfs_init(void)
  1254. {
  1255. struct pci_dev *pdev = NULL;
  1256. int retval;
  1257. sysfs_initialized = 1;
  1258. for_each_pci_dev(pdev) {
  1259. retval = pci_create_sysfs_dev_files(pdev);
  1260. if (retval) {
  1261. pci_dev_put(pdev);
  1262. return retval;
  1263. }
  1264. }
  1265. return 0;
  1266. }
  1267. late_initcall(pci_sysfs_init);
  1268. static struct attribute *pci_dev_dev_attrs[] = {
  1269. &vga_attr.attr,
  1270. NULL,
  1271. };
  1272. static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
  1273. struct attribute *a, int n)
  1274. {
  1275. struct device *dev = kobj_to_dev(kobj);
  1276. struct pci_dev *pdev = to_pci_dev(dev);
  1277. if (a == &vga_attr.attr)
  1278. if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
  1279. return 0;
  1280. return a->mode;
  1281. }
  1282. static struct attribute *pci_dev_hp_attrs[] = {
  1283. &dev_remove_attr.attr,
  1284. &dev_rescan_attr.attr,
  1285. NULL,
  1286. };
  1287. static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
  1288. struct attribute *a, int n)
  1289. {
  1290. struct device *dev = kobj_to_dev(kobj);
  1291. struct pci_dev *pdev = to_pci_dev(dev);
  1292. if (pdev->is_virtfn)
  1293. return 0;
  1294. return a->mode;
  1295. }
  1296. static struct attribute_group pci_dev_hp_attr_group = {
  1297. .attrs = pci_dev_hp_attrs,
  1298. .is_visible = pci_dev_hp_attrs_are_visible,
  1299. };
  1300. #ifdef CONFIG_PCI_IOV
  1301. static struct attribute *sriov_dev_attrs[] = {
  1302. &sriov_totalvfs_attr.attr,
  1303. &sriov_numvfs_attr.attr,
  1304. NULL,
  1305. };
  1306. static umode_t sriov_attrs_are_visible(struct kobject *kobj,
  1307. struct attribute *a, int n)
  1308. {
  1309. struct device *dev = kobj_to_dev(kobj);
  1310. if (!dev_is_pf(dev))
  1311. return 0;
  1312. return a->mode;
  1313. }
  1314. static struct attribute_group sriov_dev_attr_group = {
  1315. .attrs = sriov_dev_attrs,
  1316. .is_visible = sriov_attrs_are_visible,
  1317. };
  1318. #endif /* CONFIG_PCI_IOV */
  1319. static struct attribute_group pci_dev_attr_group = {
  1320. .attrs = pci_dev_dev_attrs,
  1321. .is_visible = pci_dev_attrs_are_visible,
  1322. };
  1323. static const struct attribute_group *pci_dev_attr_groups[] = {
  1324. &pci_dev_attr_group,
  1325. &pci_dev_hp_attr_group,
  1326. #ifdef CONFIG_PCI_IOV
  1327. &sriov_dev_attr_group,
  1328. #endif
  1329. NULL,
  1330. };
  1331. struct device_type pci_dev_type = {
  1332. .groups = pci_dev_attr_groups,
  1333. };