rdma.c 36 KB

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  1. /*
  2. * NVMe over Fabrics RDMA target.
  3. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/atomic.h>
  16. #include <linux/ctype.h>
  17. #include <linux/delay.h>
  18. #include <linux/err.h>
  19. #include <linux/init.h>
  20. #include <linux/module.h>
  21. #include <linux/nvme.h>
  22. #include <linux/slab.h>
  23. #include <linux/string.h>
  24. #include <linux/wait.h>
  25. #include <linux/inet.h>
  26. #include <asm/unaligned.h>
  27. #include <rdma/ib_verbs.h>
  28. #include <rdma/rdma_cm.h>
  29. #include <rdma/rw.h>
  30. #include <linux/nvme-rdma.h>
  31. #include "nvmet.h"
  32. /*
  33. * We allow up to a page of inline data to go with the SQE
  34. */
  35. #define NVMET_RDMA_INLINE_DATA_SIZE PAGE_SIZE
  36. struct nvmet_rdma_cmd {
  37. struct ib_sge sge[2];
  38. struct ib_cqe cqe;
  39. struct ib_recv_wr wr;
  40. struct scatterlist inline_sg;
  41. struct page *inline_page;
  42. struct nvme_command *nvme_cmd;
  43. struct nvmet_rdma_queue *queue;
  44. };
  45. enum {
  46. NVMET_RDMA_REQ_INLINE_DATA = (1 << 0),
  47. NVMET_RDMA_REQ_INVALIDATE_RKEY = (1 << 1),
  48. };
  49. struct nvmet_rdma_rsp {
  50. struct ib_sge send_sge;
  51. struct ib_cqe send_cqe;
  52. struct ib_send_wr send_wr;
  53. struct nvmet_rdma_cmd *cmd;
  54. struct nvmet_rdma_queue *queue;
  55. struct ib_cqe read_cqe;
  56. struct rdma_rw_ctx rw;
  57. struct nvmet_req req;
  58. u8 n_rdma;
  59. u32 flags;
  60. u32 invalidate_rkey;
  61. struct list_head wait_list;
  62. struct list_head free_list;
  63. };
  64. enum nvmet_rdma_queue_state {
  65. NVMET_RDMA_Q_CONNECTING,
  66. NVMET_RDMA_Q_LIVE,
  67. NVMET_RDMA_Q_DISCONNECTING,
  68. NVMET_RDMA_IN_DEVICE_REMOVAL,
  69. };
  70. struct nvmet_rdma_queue {
  71. struct rdma_cm_id *cm_id;
  72. struct nvmet_port *port;
  73. struct ib_cq *cq;
  74. atomic_t sq_wr_avail;
  75. struct nvmet_rdma_device *dev;
  76. spinlock_t state_lock;
  77. enum nvmet_rdma_queue_state state;
  78. struct nvmet_cq nvme_cq;
  79. struct nvmet_sq nvme_sq;
  80. struct nvmet_rdma_rsp *rsps;
  81. struct list_head free_rsps;
  82. spinlock_t rsps_lock;
  83. struct nvmet_rdma_cmd *cmds;
  84. struct work_struct release_work;
  85. struct list_head rsp_wait_list;
  86. struct list_head rsp_wr_wait_list;
  87. spinlock_t rsp_wr_wait_lock;
  88. int idx;
  89. int host_qid;
  90. int recv_queue_size;
  91. int send_queue_size;
  92. struct list_head queue_list;
  93. };
  94. struct nvmet_rdma_device {
  95. struct ib_device *device;
  96. struct ib_pd *pd;
  97. struct ib_srq *srq;
  98. struct nvmet_rdma_cmd *srq_cmds;
  99. size_t srq_size;
  100. struct kref ref;
  101. struct list_head entry;
  102. };
  103. static bool nvmet_rdma_use_srq;
  104. module_param_named(use_srq, nvmet_rdma_use_srq, bool, 0444);
  105. MODULE_PARM_DESC(use_srq, "Use shared receive queue.");
  106. static DEFINE_IDA(nvmet_rdma_queue_ida);
  107. static LIST_HEAD(nvmet_rdma_queue_list);
  108. static DEFINE_MUTEX(nvmet_rdma_queue_mutex);
  109. static LIST_HEAD(device_list);
  110. static DEFINE_MUTEX(device_list_mutex);
  111. static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp);
  112. static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc);
  113. static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
  114. static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc);
  115. static void nvmet_rdma_qp_event(struct ib_event *event, void *priv);
  116. static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue);
  117. static struct nvmet_fabrics_ops nvmet_rdma_ops;
  118. /* XXX: really should move to a generic header sooner or later.. */
  119. static inline u32 get_unaligned_le24(const u8 *p)
  120. {
  121. return (u32)p[0] | (u32)p[1] << 8 | (u32)p[2] << 16;
  122. }
  123. static inline bool nvmet_rdma_need_data_in(struct nvmet_rdma_rsp *rsp)
  124. {
  125. return nvme_is_write(rsp->req.cmd) &&
  126. rsp->req.data_len &&
  127. !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
  128. }
  129. static inline bool nvmet_rdma_need_data_out(struct nvmet_rdma_rsp *rsp)
  130. {
  131. return !nvme_is_write(rsp->req.cmd) &&
  132. rsp->req.data_len &&
  133. !rsp->req.rsp->status &&
  134. !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
  135. }
  136. static inline struct nvmet_rdma_rsp *
  137. nvmet_rdma_get_rsp(struct nvmet_rdma_queue *queue)
  138. {
  139. struct nvmet_rdma_rsp *rsp;
  140. unsigned long flags;
  141. spin_lock_irqsave(&queue->rsps_lock, flags);
  142. rsp = list_first_entry(&queue->free_rsps,
  143. struct nvmet_rdma_rsp, free_list);
  144. list_del(&rsp->free_list);
  145. spin_unlock_irqrestore(&queue->rsps_lock, flags);
  146. return rsp;
  147. }
  148. static inline void
  149. nvmet_rdma_put_rsp(struct nvmet_rdma_rsp *rsp)
  150. {
  151. unsigned long flags;
  152. spin_lock_irqsave(&rsp->queue->rsps_lock, flags);
  153. list_add_tail(&rsp->free_list, &rsp->queue->free_rsps);
  154. spin_unlock_irqrestore(&rsp->queue->rsps_lock, flags);
  155. }
  156. static void nvmet_rdma_free_sgl(struct scatterlist *sgl, unsigned int nents)
  157. {
  158. struct scatterlist *sg;
  159. int count;
  160. if (!sgl || !nents)
  161. return;
  162. for_each_sg(sgl, sg, nents, count)
  163. __free_page(sg_page(sg));
  164. kfree(sgl);
  165. }
  166. static int nvmet_rdma_alloc_sgl(struct scatterlist **sgl, unsigned int *nents,
  167. u32 length)
  168. {
  169. struct scatterlist *sg;
  170. struct page *page;
  171. unsigned int nent;
  172. int i = 0;
  173. nent = DIV_ROUND_UP(length, PAGE_SIZE);
  174. sg = kmalloc_array(nent, sizeof(struct scatterlist), GFP_KERNEL);
  175. if (!sg)
  176. goto out;
  177. sg_init_table(sg, nent);
  178. while (length) {
  179. u32 page_len = min_t(u32, length, PAGE_SIZE);
  180. page = alloc_page(GFP_KERNEL);
  181. if (!page)
  182. goto out_free_pages;
  183. sg_set_page(&sg[i], page, page_len, 0);
  184. length -= page_len;
  185. i++;
  186. }
  187. *sgl = sg;
  188. *nents = nent;
  189. return 0;
  190. out_free_pages:
  191. while (i > 0) {
  192. i--;
  193. __free_page(sg_page(&sg[i]));
  194. }
  195. kfree(sg);
  196. out:
  197. return NVME_SC_INTERNAL;
  198. }
  199. static int nvmet_rdma_alloc_cmd(struct nvmet_rdma_device *ndev,
  200. struct nvmet_rdma_cmd *c, bool admin)
  201. {
  202. /* NVMe command / RDMA RECV */
  203. c->nvme_cmd = kmalloc(sizeof(*c->nvme_cmd), GFP_KERNEL);
  204. if (!c->nvme_cmd)
  205. goto out;
  206. c->sge[0].addr = ib_dma_map_single(ndev->device, c->nvme_cmd,
  207. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  208. if (ib_dma_mapping_error(ndev->device, c->sge[0].addr))
  209. goto out_free_cmd;
  210. c->sge[0].length = sizeof(*c->nvme_cmd);
  211. c->sge[0].lkey = ndev->pd->local_dma_lkey;
  212. if (!admin) {
  213. c->inline_page = alloc_pages(GFP_KERNEL,
  214. get_order(NVMET_RDMA_INLINE_DATA_SIZE));
  215. if (!c->inline_page)
  216. goto out_unmap_cmd;
  217. c->sge[1].addr = ib_dma_map_page(ndev->device,
  218. c->inline_page, 0, NVMET_RDMA_INLINE_DATA_SIZE,
  219. DMA_FROM_DEVICE);
  220. if (ib_dma_mapping_error(ndev->device, c->sge[1].addr))
  221. goto out_free_inline_page;
  222. c->sge[1].length = NVMET_RDMA_INLINE_DATA_SIZE;
  223. c->sge[1].lkey = ndev->pd->local_dma_lkey;
  224. }
  225. c->cqe.done = nvmet_rdma_recv_done;
  226. c->wr.wr_cqe = &c->cqe;
  227. c->wr.sg_list = c->sge;
  228. c->wr.num_sge = admin ? 1 : 2;
  229. return 0;
  230. out_free_inline_page:
  231. if (!admin) {
  232. __free_pages(c->inline_page,
  233. get_order(NVMET_RDMA_INLINE_DATA_SIZE));
  234. }
  235. out_unmap_cmd:
  236. ib_dma_unmap_single(ndev->device, c->sge[0].addr,
  237. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  238. out_free_cmd:
  239. kfree(c->nvme_cmd);
  240. out:
  241. return -ENOMEM;
  242. }
  243. static void nvmet_rdma_free_cmd(struct nvmet_rdma_device *ndev,
  244. struct nvmet_rdma_cmd *c, bool admin)
  245. {
  246. if (!admin) {
  247. ib_dma_unmap_page(ndev->device, c->sge[1].addr,
  248. NVMET_RDMA_INLINE_DATA_SIZE, DMA_FROM_DEVICE);
  249. __free_pages(c->inline_page,
  250. get_order(NVMET_RDMA_INLINE_DATA_SIZE));
  251. }
  252. ib_dma_unmap_single(ndev->device, c->sge[0].addr,
  253. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  254. kfree(c->nvme_cmd);
  255. }
  256. static struct nvmet_rdma_cmd *
  257. nvmet_rdma_alloc_cmds(struct nvmet_rdma_device *ndev,
  258. int nr_cmds, bool admin)
  259. {
  260. struct nvmet_rdma_cmd *cmds;
  261. int ret = -EINVAL, i;
  262. cmds = kcalloc(nr_cmds, sizeof(struct nvmet_rdma_cmd), GFP_KERNEL);
  263. if (!cmds)
  264. goto out;
  265. for (i = 0; i < nr_cmds; i++) {
  266. ret = nvmet_rdma_alloc_cmd(ndev, cmds + i, admin);
  267. if (ret)
  268. goto out_free;
  269. }
  270. return cmds;
  271. out_free:
  272. while (--i >= 0)
  273. nvmet_rdma_free_cmd(ndev, cmds + i, admin);
  274. kfree(cmds);
  275. out:
  276. return ERR_PTR(ret);
  277. }
  278. static void nvmet_rdma_free_cmds(struct nvmet_rdma_device *ndev,
  279. struct nvmet_rdma_cmd *cmds, int nr_cmds, bool admin)
  280. {
  281. int i;
  282. for (i = 0; i < nr_cmds; i++)
  283. nvmet_rdma_free_cmd(ndev, cmds + i, admin);
  284. kfree(cmds);
  285. }
  286. static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev,
  287. struct nvmet_rdma_rsp *r)
  288. {
  289. /* NVMe CQE / RDMA SEND */
  290. r->req.rsp = kmalloc(sizeof(*r->req.rsp), GFP_KERNEL);
  291. if (!r->req.rsp)
  292. goto out;
  293. r->send_sge.addr = ib_dma_map_single(ndev->device, r->req.rsp,
  294. sizeof(*r->req.rsp), DMA_TO_DEVICE);
  295. if (ib_dma_mapping_error(ndev->device, r->send_sge.addr))
  296. goto out_free_rsp;
  297. r->send_sge.length = sizeof(*r->req.rsp);
  298. r->send_sge.lkey = ndev->pd->local_dma_lkey;
  299. r->send_cqe.done = nvmet_rdma_send_done;
  300. r->send_wr.wr_cqe = &r->send_cqe;
  301. r->send_wr.sg_list = &r->send_sge;
  302. r->send_wr.num_sge = 1;
  303. r->send_wr.send_flags = IB_SEND_SIGNALED;
  304. /* Data In / RDMA READ */
  305. r->read_cqe.done = nvmet_rdma_read_data_done;
  306. return 0;
  307. out_free_rsp:
  308. kfree(r->req.rsp);
  309. out:
  310. return -ENOMEM;
  311. }
  312. static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev,
  313. struct nvmet_rdma_rsp *r)
  314. {
  315. ib_dma_unmap_single(ndev->device, r->send_sge.addr,
  316. sizeof(*r->req.rsp), DMA_TO_DEVICE);
  317. kfree(r->req.rsp);
  318. }
  319. static int
  320. nvmet_rdma_alloc_rsps(struct nvmet_rdma_queue *queue)
  321. {
  322. struct nvmet_rdma_device *ndev = queue->dev;
  323. int nr_rsps = queue->recv_queue_size * 2;
  324. int ret = -EINVAL, i;
  325. queue->rsps = kcalloc(nr_rsps, sizeof(struct nvmet_rdma_rsp),
  326. GFP_KERNEL);
  327. if (!queue->rsps)
  328. goto out;
  329. for (i = 0; i < nr_rsps; i++) {
  330. struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
  331. ret = nvmet_rdma_alloc_rsp(ndev, rsp);
  332. if (ret)
  333. goto out_free;
  334. list_add_tail(&rsp->free_list, &queue->free_rsps);
  335. }
  336. return 0;
  337. out_free:
  338. while (--i >= 0) {
  339. struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
  340. list_del(&rsp->free_list);
  341. nvmet_rdma_free_rsp(ndev, rsp);
  342. }
  343. kfree(queue->rsps);
  344. out:
  345. return ret;
  346. }
  347. static void nvmet_rdma_free_rsps(struct nvmet_rdma_queue *queue)
  348. {
  349. struct nvmet_rdma_device *ndev = queue->dev;
  350. int i, nr_rsps = queue->recv_queue_size * 2;
  351. for (i = 0; i < nr_rsps; i++) {
  352. struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
  353. list_del(&rsp->free_list);
  354. nvmet_rdma_free_rsp(ndev, rsp);
  355. }
  356. kfree(queue->rsps);
  357. }
  358. static int nvmet_rdma_post_recv(struct nvmet_rdma_device *ndev,
  359. struct nvmet_rdma_cmd *cmd)
  360. {
  361. struct ib_recv_wr *bad_wr;
  362. if (ndev->srq)
  363. return ib_post_srq_recv(ndev->srq, &cmd->wr, &bad_wr);
  364. return ib_post_recv(cmd->queue->cm_id->qp, &cmd->wr, &bad_wr);
  365. }
  366. static void nvmet_rdma_process_wr_wait_list(struct nvmet_rdma_queue *queue)
  367. {
  368. spin_lock(&queue->rsp_wr_wait_lock);
  369. while (!list_empty(&queue->rsp_wr_wait_list)) {
  370. struct nvmet_rdma_rsp *rsp;
  371. bool ret;
  372. rsp = list_entry(queue->rsp_wr_wait_list.next,
  373. struct nvmet_rdma_rsp, wait_list);
  374. list_del(&rsp->wait_list);
  375. spin_unlock(&queue->rsp_wr_wait_lock);
  376. ret = nvmet_rdma_execute_command(rsp);
  377. spin_lock(&queue->rsp_wr_wait_lock);
  378. if (!ret) {
  379. list_add(&rsp->wait_list, &queue->rsp_wr_wait_list);
  380. break;
  381. }
  382. }
  383. spin_unlock(&queue->rsp_wr_wait_lock);
  384. }
  385. static void nvmet_rdma_release_rsp(struct nvmet_rdma_rsp *rsp)
  386. {
  387. struct nvmet_rdma_queue *queue = rsp->queue;
  388. atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
  389. if (rsp->n_rdma) {
  390. rdma_rw_ctx_destroy(&rsp->rw, queue->cm_id->qp,
  391. queue->cm_id->port_num, rsp->req.sg,
  392. rsp->req.sg_cnt, nvmet_data_dir(&rsp->req));
  393. }
  394. if (rsp->req.sg != &rsp->cmd->inline_sg)
  395. nvmet_rdma_free_sgl(rsp->req.sg, rsp->req.sg_cnt);
  396. if (unlikely(!list_empty_careful(&queue->rsp_wr_wait_list)))
  397. nvmet_rdma_process_wr_wait_list(queue);
  398. nvmet_rdma_put_rsp(rsp);
  399. }
  400. static void nvmet_rdma_error_comp(struct nvmet_rdma_queue *queue)
  401. {
  402. if (queue->nvme_sq.ctrl) {
  403. nvmet_ctrl_fatal_error(queue->nvme_sq.ctrl);
  404. } else {
  405. /*
  406. * we didn't setup the controller yet in case
  407. * of admin connect error, just disconnect and
  408. * cleanup the queue
  409. */
  410. nvmet_rdma_queue_disconnect(queue);
  411. }
  412. }
  413. static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
  414. {
  415. struct nvmet_rdma_rsp *rsp =
  416. container_of(wc->wr_cqe, struct nvmet_rdma_rsp, send_cqe);
  417. nvmet_rdma_release_rsp(rsp);
  418. if (unlikely(wc->status != IB_WC_SUCCESS &&
  419. wc->status != IB_WC_WR_FLUSH_ERR)) {
  420. pr_err("SEND for CQE 0x%p failed with status %s (%d).\n",
  421. wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
  422. nvmet_rdma_error_comp(rsp->queue);
  423. }
  424. }
  425. static void nvmet_rdma_queue_response(struct nvmet_req *req)
  426. {
  427. struct nvmet_rdma_rsp *rsp =
  428. container_of(req, struct nvmet_rdma_rsp, req);
  429. struct rdma_cm_id *cm_id = rsp->queue->cm_id;
  430. struct ib_send_wr *first_wr, *bad_wr;
  431. if (rsp->flags & NVMET_RDMA_REQ_INVALIDATE_RKEY) {
  432. rsp->send_wr.opcode = IB_WR_SEND_WITH_INV;
  433. rsp->send_wr.ex.invalidate_rkey = rsp->invalidate_rkey;
  434. } else {
  435. rsp->send_wr.opcode = IB_WR_SEND;
  436. }
  437. if (nvmet_rdma_need_data_out(rsp))
  438. first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp,
  439. cm_id->port_num, NULL, &rsp->send_wr);
  440. else
  441. first_wr = &rsp->send_wr;
  442. nvmet_rdma_post_recv(rsp->queue->dev, rsp->cmd);
  443. if (ib_post_send(cm_id->qp, first_wr, &bad_wr)) {
  444. pr_err("sending cmd response failed\n");
  445. nvmet_rdma_release_rsp(rsp);
  446. }
  447. }
  448. static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc)
  449. {
  450. struct nvmet_rdma_rsp *rsp =
  451. container_of(wc->wr_cqe, struct nvmet_rdma_rsp, read_cqe);
  452. struct nvmet_rdma_queue *queue = cq->cq_context;
  453. WARN_ON(rsp->n_rdma <= 0);
  454. atomic_add(rsp->n_rdma, &queue->sq_wr_avail);
  455. rdma_rw_ctx_destroy(&rsp->rw, queue->cm_id->qp,
  456. queue->cm_id->port_num, rsp->req.sg,
  457. rsp->req.sg_cnt, nvmet_data_dir(&rsp->req));
  458. rsp->n_rdma = 0;
  459. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  460. nvmet_rdma_release_rsp(rsp);
  461. if (wc->status != IB_WC_WR_FLUSH_ERR) {
  462. pr_info("RDMA READ for CQE 0x%p failed with status %s (%d).\n",
  463. wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
  464. nvmet_rdma_error_comp(queue);
  465. }
  466. return;
  467. }
  468. rsp->req.execute(&rsp->req);
  469. }
  470. static void nvmet_rdma_use_inline_sg(struct nvmet_rdma_rsp *rsp, u32 len,
  471. u64 off)
  472. {
  473. sg_init_table(&rsp->cmd->inline_sg, 1);
  474. sg_set_page(&rsp->cmd->inline_sg, rsp->cmd->inline_page, len, off);
  475. rsp->req.sg = &rsp->cmd->inline_sg;
  476. rsp->req.sg_cnt = 1;
  477. }
  478. static u16 nvmet_rdma_map_sgl_inline(struct nvmet_rdma_rsp *rsp)
  479. {
  480. struct nvme_sgl_desc *sgl = &rsp->req.cmd->common.dptr.sgl;
  481. u64 off = le64_to_cpu(sgl->addr);
  482. u32 len = le32_to_cpu(sgl->length);
  483. if (!nvme_is_write(rsp->req.cmd))
  484. return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
  485. if (off + len > NVMET_RDMA_INLINE_DATA_SIZE) {
  486. pr_err("invalid inline data offset!\n");
  487. return NVME_SC_SGL_INVALID_OFFSET | NVME_SC_DNR;
  488. }
  489. /* no data command? */
  490. if (!len)
  491. return 0;
  492. nvmet_rdma_use_inline_sg(rsp, len, off);
  493. rsp->flags |= NVMET_RDMA_REQ_INLINE_DATA;
  494. return 0;
  495. }
  496. static u16 nvmet_rdma_map_sgl_keyed(struct nvmet_rdma_rsp *rsp,
  497. struct nvme_keyed_sgl_desc *sgl, bool invalidate)
  498. {
  499. struct rdma_cm_id *cm_id = rsp->queue->cm_id;
  500. u64 addr = le64_to_cpu(sgl->addr);
  501. u32 len = get_unaligned_le24(sgl->length);
  502. u32 key = get_unaligned_le32(sgl->key);
  503. int ret;
  504. u16 status;
  505. /* no data command? */
  506. if (!len)
  507. return 0;
  508. status = nvmet_rdma_alloc_sgl(&rsp->req.sg, &rsp->req.sg_cnt,
  509. len);
  510. if (status)
  511. return status;
  512. ret = rdma_rw_ctx_init(&rsp->rw, cm_id->qp, cm_id->port_num,
  513. rsp->req.sg, rsp->req.sg_cnt, 0, addr, key,
  514. nvmet_data_dir(&rsp->req));
  515. if (ret < 0)
  516. return NVME_SC_INTERNAL;
  517. rsp->n_rdma += ret;
  518. if (invalidate) {
  519. rsp->invalidate_rkey = key;
  520. rsp->flags |= NVMET_RDMA_REQ_INVALIDATE_RKEY;
  521. }
  522. return 0;
  523. }
  524. static u16 nvmet_rdma_map_sgl(struct nvmet_rdma_rsp *rsp)
  525. {
  526. struct nvme_keyed_sgl_desc *sgl = &rsp->req.cmd->common.dptr.ksgl;
  527. switch (sgl->type >> 4) {
  528. case NVME_SGL_FMT_DATA_DESC:
  529. switch (sgl->type & 0xf) {
  530. case NVME_SGL_FMT_OFFSET:
  531. return nvmet_rdma_map_sgl_inline(rsp);
  532. default:
  533. pr_err("invalid SGL subtype: %#x\n", sgl->type);
  534. return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
  535. }
  536. case NVME_KEY_SGL_FMT_DATA_DESC:
  537. switch (sgl->type & 0xf) {
  538. case NVME_SGL_FMT_ADDRESS | NVME_SGL_FMT_INVALIDATE:
  539. return nvmet_rdma_map_sgl_keyed(rsp, sgl, true);
  540. case NVME_SGL_FMT_ADDRESS:
  541. return nvmet_rdma_map_sgl_keyed(rsp, sgl, false);
  542. default:
  543. pr_err("invalid SGL subtype: %#x\n", sgl->type);
  544. return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
  545. }
  546. default:
  547. pr_err("invalid SGL type: %#x\n", sgl->type);
  548. return NVME_SC_SGL_INVALID_TYPE | NVME_SC_DNR;
  549. }
  550. }
  551. static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp)
  552. {
  553. struct nvmet_rdma_queue *queue = rsp->queue;
  554. if (unlikely(atomic_sub_return(1 + rsp->n_rdma,
  555. &queue->sq_wr_avail) < 0)) {
  556. pr_debug("IB send queue full (needed %d): queue %u cntlid %u\n",
  557. 1 + rsp->n_rdma, queue->idx,
  558. queue->nvme_sq.ctrl->cntlid);
  559. atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
  560. return false;
  561. }
  562. if (nvmet_rdma_need_data_in(rsp)) {
  563. if (rdma_rw_ctx_post(&rsp->rw, queue->cm_id->qp,
  564. queue->cm_id->port_num, &rsp->read_cqe, NULL))
  565. nvmet_req_complete(&rsp->req, NVME_SC_DATA_XFER_ERROR);
  566. } else {
  567. rsp->req.execute(&rsp->req);
  568. }
  569. return true;
  570. }
  571. static void nvmet_rdma_handle_command(struct nvmet_rdma_queue *queue,
  572. struct nvmet_rdma_rsp *cmd)
  573. {
  574. u16 status;
  575. cmd->queue = queue;
  576. cmd->n_rdma = 0;
  577. cmd->req.port = queue->port;
  578. if (!nvmet_req_init(&cmd->req, &queue->nvme_cq,
  579. &queue->nvme_sq, &nvmet_rdma_ops))
  580. return;
  581. status = nvmet_rdma_map_sgl(cmd);
  582. if (status)
  583. goto out_err;
  584. if (unlikely(!nvmet_rdma_execute_command(cmd))) {
  585. spin_lock(&queue->rsp_wr_wait_lock);
  586. list_add_tail(&cmd->wait_list, &queue->rsp_wr_wait_list);
  587. spin_unlock(&queue->rsp_wr_wait_lock);
  588. }
  589. return;
  590. out_err:
  591. nvmet_req_complete(&cmd->req, status);
  592. }
  593. static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
  594. {
  595. struct nvmet_rdma_cmd *cmd =
  596. container_of(wc->wr_cqe, struct nvmet_rdma_cmd, cqe);
  597. struct nvmet_rdma_queue *queue = cq->cq_context;
  598. struct nvmet_rdma_rsp *rsp;
  599. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  600. if (wc->status != IB_WC_WR_FLUSH_ERR) {
  601. pr_err("RECV for CQE 0x%p failed with status %s (%d)\n",
  602. wc->wr_cqe, ib_wc_status_msg(wc->status),
  603. wc->status);
  604. nvmet_rdma_error_comp(queue);
  605. }
  606. return;
  607. }
  608. if (unlikely(wc->byte_len < sizeof(struct nvme_command))) {
  609. pr_err("Ctrl Fatal Error: capsule size less than 64 bytes\n");
  610. nvmet_rdma_error_comp(queue);
  611. return;
  612. }
  613. cmd->queue = queue;
  614. rsp = nvmet_rdma_get_rsp(queue);
  615. rsp->cmd = cmd;
  616. rsp->flags = 0;
  617. rsp->req.cmd = cmd->nvme_cmd;
  618. if (unlikely(queue->state != NVMET_RDMA_Q_LIVE)) {
  619. unsigned long flags;
  620. spin_lock_irqsave(&queue->state_lock, flags);
  621. if (queue->state == NVMET_RDMA_Q_CONNECTING)
  622. list_add_tail(&rsp->wait_list, &queue->rsp_wait_list);
  623. else
  624. nvmet_rdma_put_rsp(rsp);
  625. spin_unlock_irqrestore(&queue->state_lock, flags);
  626. return;
  627. }
  628. nvmet_rdma_handle_command(queue, rsp);
  629. }
  630. static void nvmet_rdma_destroy_srq(struct nvmet_rdma_device *ndev)
  631. {
  632. if (!ndev->srq)
  633. return;
  634. nvmet_rdma_free_cmds(ndev, ndev->srq_cmds, ndev->srq_size, false);
  635. ib_destroy_srq(ndev->srq);
  636. }
  637. static int nvmet_rdma_init_srq(struct nvmet_rdma_device *ndev)
  638. {
  639. struct ib_srq_init_attr srq_attr = { NULL, };
  640. struct ib_srq *srq;
  641. size_t srq_size;
  642. int ret, i;
  643. srq_size = 4095; /* XXX: tune */
  644. srq_attr.attr.max_wr = srq_size;
  645. srq_attr.attr.max_sge = 2;
  646. srq_attr.attr.srq_limit = 0;
  647. srq_attr.srq_type = IB_SRQT_BASIC;
  648. srq = ib_create_srq(ndev->pd, &srq_attr);
  649. if (IS_ERR(srq)) {
  650. /*
  651. * If SRQs aren't supported we just go ahead and use normal
  652. * non-shared receive queues.
  653. */
  654. pr_info("SRQ requested but not supported.\n");
  655. return 0;
  656. }
  657. ndev->srq_cmds = nvmet_rdma_alloc_cmds(ndev, srq_size, false);
  658. if (IS_ERR(ndev->srq_cmds)) {
  659. ret = PTR_ERR(ndev->srq_cmds);
  660. goto out_destroy_srq;
  661. }
  662. ndev->srq = srq;
  663. ndev->srq_size = srq_size;
  664. for (i = 0; i < srq_size; i++)
  665. nvmet_rdma_post_recv(ndev, &ndev->srq_cmds[i]);
  666. return 0;
  667. out_destroy_srq:
  668. ib_destroy_srq(srq);
  669. return ret;
  670. }
  671. static void nvmet_rdma_free_dev(struct kref *ref)
  672. {
  673. struct nvmet_rdma_device *ndev =
  674. container_of(ref, struct nvmet_rdma_device, ref);
  675. mutex_lock(&device_list_mutex);
  676. list_del(&ndev->entry);
  677. mutex_unlock(&device_list_mutex);
  678. nvmet_rdma_destroy_srq(ndev);
  679. ib_dealloc_pd(ndev->pd);
  680. kfree(ndev);
  681. }
  682. static struct nvmet_rdma_device *
  683. nvmet_rdma_find_get_device(struct rdma_cm_id *cm_id)
  684. {
  685. struct nvmet_rdma_device *ndev;
  686. int ret;
  687. mutex_lock(&device_list_mutex);
  688. list_for_each_entry(ndev, &device_list, entry) {
  689. if (ndev->device->node_guid == cm_id->device->node_guid &&
  690. kref_get_unless_zero(&ndev->ref))
  691. goto out_unlock;
  692. }
  693. ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
  694. if (!ndev)
  695. goto out_err;
  696. ndev->device = cm_id->device;
  697. kref_init(&ndev->ref);
  698. ndev->pd = ib_alloc_pd(ndev->device);
  699. if (IS_ERR(ndev->pd))
  700. goto out_free_dev;
  701. if (nvmet_rdma_use_srq) {
  702. ret = nvmet_rdma_init_srq(ndev);
  703. if (ret)
  704. goto out_free_pd;
  705. }
  706. list_add(&ndev->entry, &device_list);
  707. out_unlock:
  708. mutex_unlock(&device_list_mutex);
  709. pr_debug("added %s.\n", ndev->device->name);
  710. return ndev;
  711. out_free_pd:
  712. ib_dealloc_pd(ndev->pd);
  713. out_free_dev:
  714. kfree(ndev);
  715. out_err:
  716. mutex_unlock(&device_list_mutex);
  717. return NULL;
  718. }
  719. static int nvmet_rdma_create_queue_ib(struct nvmet_rdma_queue *queue)
  720. {
  721. struct ib_qp_init_attr qp_attr;
  722. struct nvmet_rdma_device *ndev = queue->dev;
  723. int comp_vector, nr_cqe, ret, i;
  724. /*
  725. * Spread the io queues across completion vectors,
  726. * but still keep all admin queues on vector 0.
  727. */
  728. comp_vector = !queue->host_qid ? 0 :
  729. queue->idx % ndev->device->num_comp_vectors;
  730. /*
  731. * Reserve CQ slots for RECV + RDMA_READ/RDMA_WRITE + RDMA_SEND.
  732. */
  733. nr_cqe = queue->recv_queue_size + 2 * queue->send_queue_size;
  734. queue->cq = ib_alloc_cq(ndev->device, queue,
  735. nr_cqe + 1, comp_vector,
  736. IB_POLL_WORKQUEUE);
  737. if (IS_ERR(queue->cq)) {
  738. ret = PTR_ERR(queue->cq);
  739. pr_err("failed to create CQ cqe= %d ret= %d\n",
  740. nr_cqe + 1, ret);
  741. goto out;
  742. }
  743. memset(&qp_attr, 0, sizeof(qp_attr));
  744. qp_attr.qp_context = queue;
  745. qp_attr.event_handler = nvmet_rdma_qp_event;
  746. qp_attr.send_cq = queue->cq;
  747. qp_attr.recv_cq = queue->cq;
  748. qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
  749. qp_attr.qp_type = IB_QPT_RC;
  750. /* +1 for drain */
  751. qp_attr.cap.max_send_wr = queue->send_queue_size + 1;
  752. qp_attr.cap.max_rdma_ctxs = queue->send_queue_size;
  753. qp_attr.cap.max_send_sge = max(ndev->device->attrs.max_sge_rd,
  754. ndev->device->attrs.max_sge);
  755. if (ndev->srq) {
  756. qp_attr.srq = ndev->srq;
  757. } else {
  758. /* +1 for drain */
  759. qp_attr.cap.max_recv_wr = 1 + queue->recv_queue_size;
  760. qp_attr.cap.max_recv_sge = 2;
  761. }
  762. ret = rdma_create_qp(queue->cm_id, ndev->pd, &qp_attr);
  763. if (ret) {
  764. pr_err("failed to create_qp ret= %d\n", ret);
  765. goto err_destroy_cq;
  766. }
  767. atomic_set(&queue->sq_wr_avail, qp_attr.cap.max_send_wr);
  768. pr_debug("%s: max_cqe= %d max_sge= %d sq_size = %d cm_id= %p\n",
  769. __func__, queue->cq->cqe, qp_attr.cap.max_send_sge,
  770. qp_attr.cap.max_send_wr, queue->cm_id);
  771. if (!ndev->srq) {
  772. for (i = 0; i < queue->recv_queue_size; i++) {
  773. queue->cmds[i].queue = queue;
  774. nvmet_rdma_post_recv(ndev, &queue->cmds[i]);
  775. }
  776. }
  777. out:
  778. return ret;
  779. err_destroy_cq:
  780. ib_free_cq(queue->cq);
  781. goto out;
  782. }
  783. static void nvmet_rdma_destroy_queue_ib(struct nvmet_rdma_queue *queue)
  784. {
  785. rdma_destroy_qp(queue->cm_id);
  786. ib_free_cq(queue->cq);
  787. }
  788. static void nvmet_rdma_free_queue(struct nvmet_rdma_queue *queue)
  789. {
  790. pr_info("freeing queue %d\n", queue->idx);
  791. nvmet_sq_destroy(&queue->nvme_sq);
  792. nvmet_rdma_destroy_queue_ib(queue);
  793. if (!queue->dev->srq) {
  794. nvmet_rdma_free_cmds(queue->dev, queue->cmds,
  795. queue->recv_queue_size,
  796. !queue->host_qid);
  797. }
  798. nvmet_rdma_free_rsps(queue);
  799. ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx);
  800. kfree(queue);
  801. }
  802. static void nvmet_rdma_release_queue_work(struct work_struct *w)
  803. {
  804. struct nvmet_rdma_queue *queue =
  805. container_of(w, struct nvmet_rdma_queue, release_work);
  806. struct rdma_cm_id *cm_id = queue->cm_id;
  807. struct nvmet_rdma_device *dev = queue->dev;
  808. nvmet_rdma_free_queue(queue);
  809. if (queue->state != NVMET_RDMA_IN_DEVICE_REMOVAL)
  810. rdma_destroy_id(cm_id);
  811. kref_put(&dev->ref, nvmet_rdma_free_dev);
  812. }
  813. static int
  814. nvmet_rdma_parse_cm_connect_req(struct rdma_conn_param *conn,
  815. struct nvmet_rdma_queue *queue)
  816. {
  817. struct nvme_rdma_cm_req *req;
  818. req = (struct nvme_rdma_cm_req *)conn->private_data;
  819. if (!req || conn->private_data_len == 0)
  820. return NVME_RDMA_CM_INVALID_LEN;
  821. if (le16_to_cpu(req->recfmt) != NVME_RDMA_CM_FMT_1_0)
  822. return NVME_RDMA_CM_INVALID_RECFMT;
  823. queue->host_qid = le16_to_cpu(req->qid);
  824. /*
  825. * req->hsqsize corresponds to our recv queue size
  826. * req->hrqsize corresponds to our send queue size
  827. */
  828. queue->recv_queue_size = le16_to_cpu(req->hsqsize);
  829. queue->send_queue_size = le16_to_cpu(req->hrqsize);
  830. if (!queue->host_qid && queue->recv_queue_size > NVMF_AQ_DEPTH)
  831. return NVME_RDMA_CM_INVALID_HSQSIZE;
  832. /* XXX: Should we enforce some kind of max for IO queues? */
  833. return 0;
  834. }
  835. static int nvmet_rdma_cm_reject(struct rdma_cm_id *cm_id,
  836. enum nvme_rdma_cm_status status)
  837. {
  838. struct nvme_rdma_cm_rej rej;
  839. rej.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  840. rej.sts = cpu_to_le16(status);
  841. return rdma_reject(cm_id, (void *)&rej, sizeof(rej));
  842. }
  843. static struct nvmet_rdma_queue *
  844. nvmet_rdma_alloc_queue(struct nvmet_rdma_device *ndev,
  845. struct rdma_cm_id *cm_id,
  846. struct rdma_cm_event *event)
  847. {
  848. struct nvmet_rdma_queue *queue;
  849. int ret;
  850. queue = kzalloc(sizeof(*queue), GFP_KERNEL);
  851. if (!queue) {
  852. ret = NVME_RDMA_CM_NO_RSC;
  853. goto out_reject;
  854. }
  855. ret = nvmet_sq_init(&queue->nvme_sq);
  856. if (ret)
  857. goto out_free_queue;
  858. ret = nvmet_rdma_parse_cm_connect_req(&event->param.conn, queue);
  859. if (ret)
  860. goto out_destroy_sq;
  861. /*
  862. * Schedules the actual release because calling rdma_destroy_id from
  863. * inside a CM callback would trigger a deadlock. (great API design..)
  864. */
  865. INIT_WORK(&queue->release_work, nvmet_rdma_release_queue_work);
  866. queue->dev = ndev;
  867. queue->cm_id = cm_id;
  868. spin_lock_init(&queue->state_lock);
  869. queue->state = NVMET_RDMA_Q_CONNECTING;
  870. INIT_LIST_HEAD(&queue->rsp_wait_list);
  871. INIT_LIST_HEAD(&queue->rsp_wr_wait_list);
  872. spin_lock_init(&queue->rsp_wr_wait_lock);
  873. INIT_LIST_HEAD(&queue->free_rsps);
  874. spin_lock_init(&queue->rsps_lock);
  875. queue->idx = ida_simple_get(&nvmet_rdma_queue_ida, 0, 0, GFP_KERNEL);
  876. if (queue->idx < 0) {
  877. ret = NVME_RDMA_CM_NO_RSC;
  878. goto out_free_queue;
  879. }
  880. ret = nvmet_rdma_alloc_rsps(queue);
  881. if (ret) {
  882. ret = NVME_RDMA_CM_NO_RSC;
  883. goto out_ida_remove;
  884. }
  885. if (!ndev->srq) {
  886. queue->cmds = nvmet_rdma_alloc_cmds(ndev,
  887. queue->recv_queue_size,
  888. !queue->host_qid);
  889. if (IS_ERR(queue->cmds)) {
  890. ret = NVME_RDMA_CM_NO_RSC;
  891. goto out_free_responses;
  892. }
  893. }
  894. ret = nvmet_rdma_create_queue_ib(queue);
  895. if (ret) {
  896. pr_err("%s: creating RDMA queue failed (%d).\n",
  897. __func__, ret);
  898. ret = NVME_RDMA_CM_NO_RSC;
  899. goto out_free_cmds;
  900. }
  901. return queue;
  902. out_free_cmds:
  903. if (!ndev->srq) {
  904. nvmet_rdma_free_cmds(queue->dev, queue->cmds,
  905. queue->recv_queue_size,
  906. !queue->host_qid);
  907. }
  908. out_free_responses:
  909. nvmet_rdma_free_rsps(queue);
  910. out_ida_remove:
  911. ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx);
  912. out_destroy_sq:
  913. nvmet_sq_destroy(&queue->nvme_sq);
  914. out_free_queue:
  915. kfree(queue);
  916. out_reject:
  917. nvmet_rdma_cm_reject(cm_id, ret);
  918. return NULL;
  919. }
  920. static void nvmet_rdma_qp_event(struct ib_event *event, void *priv)
  921. {
  922. struct nvmet_rdma_queue *queue = priv;
  923. switch (event->event) {
  924. case IB_EVENT_COMM_EST:
  925. rdma_notify(queue->cm_id, event->event);
  926. break;
  927. default:
  928. pr_err("received unrecognized IB QP event %d\n", event->event);
  929. break;
  930. }
  931. }
  932. static int nvmet_rdma_cm_accept(struct rdma_cm_id *cm_id,
  933. struct nvmet_rdma_queue *queue,
  934. struct rdma_conn_param *p)
  935. {
  936. struct rdma_conn_param param = { };
  937. struct nvme_rdma_cm_rep priv = { };
  938. int ret = -ENOMEM;
  939. param.rnr_retry_count = 7;
  940. param.flow_control = 1;
  941. param.initiator_depth = min_t(u8, p->initiator_depth,
  942. queue->dev->device->attrs.max_qp_init_rd_atom);
  943. param.private_data = &priv;
  944. param.private_data_len = sizeof(priv);
  945. priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  946. priv.crqsize = cpu_to_le16(queue->recv_queue_size);
  947. ret = rdma_accept(cm_id, &param);
  948. if (ret)
  949. pr_err("rdma_accept failed (error code = %d)\n", ret);
  950. return ret;
  951. }
  952. static int nvmet_rdma_queue_connect(struct rdma_cm_id *cm_id,
  953. struct rdma_cm_event *event)
  954. {
  955. struct nvmet_rdma_device *ndev;
  956. struct nvmet_rdma_queue *queue;
  957. int ret = -EINVAL;
  958. ndev = nvmet_rdma_find_get_device(cm_id);
  959. if (!ndev) {
  960. pr_err("no client data!\n");
  961. nvmet_rdma_cm_reject(cm_id, NVME_RDMA_CM_NO_RSC);
  962. return -ECONNREFUSED;
  963. }
  964. queue = nvmet_rdma_alloc_queue(ndev, cm_id, event);
  965. if (!queue) {
  966. ret = -ENOMEM;
  967. goto put_device;
  968. }
  969. queue->port = cm_id->context;
  970. ret = nvmet_rdma_cm_accept(cm_id, queue, &event->param.conn);
  971. if (ret)
  972. goto release_queue;
  973. mutex_lock(&nvmet_rdma_queue_mutex);
  974. list_add_tail(&queue->queue_list, &nvmet_rdma_queue_list);
  975. mutex_unlock(&nvmet_rdma_queue_mutex);
  976. return 0;
  977. release_queue:
  978. nvmet_rdma_free_queue(queue);
  979. put_device:
  980. kref_put(&ndev->ref, nvmet_rdma_free_dev);
  981. return ret;
  982. }
  983. static void nvmet_rdma_queue_established(struct nvmet_rdma_queue *queue)
  984. {
  985. unsigned long flags;
  986. spin_lock_irqsave(&queue->state_lock, flags);
  987. if (queue->state != NVMET_RDMA_Q_CONNECTING) {
  988. pr_warn("trying to establish a connected queue\n");
  989. goto out_unlock;
  990. }
  991. queue->state = NVMET_RDMA_Q_LIVE;
  992. while (!list_empty(&queue->rsp_wait_list)) {
  993. struct nvmet_rdma_rsp *cmd;
  994. cmd = list_first_entry(&queue->rsp_wait_list,
  995. struct nvmet_rdma_rsp, wait_list);
  996. list_del(&cmd->wait_list);
  997. spin_unlock_irqrestore(&queue->state_lock, flags);
  998. nvmet_rdma_handle_command(queue, cmd);
  999. spin_lock_irqsave(&queue->state_lock, flags);
  1000. }
  1001. out_unlock:
  1002. spin_unlock_irqrestore(&queue->state_lock, flags);
  1003. }
  1004. static void __nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
  1005. {
  1006. bool disconnect = false;
  1007. unsigned long flags;
  1008. pr_debug("cm_id= %p queue->state= %d\n", queue->cm_id, queue->state);
  1009. spin_lock_irqsave(&queue->state_lock, flags);
  1010. switch (queue->state) {
  1011. case NVMET_RDMA_Q_CONNECTING:
  1012. case NVMET_RDMA_Q_LIVE:
  1013. queue->state = NVMET_RDMA_Q_DISCONNECTING;
  1014. case NVMET_RDMA_IN_DEVICE_REMOVAL:
  1015. disconnect = true;
  1016. break;
  1017. case NVMET_RDMA_Q_DISCONNECTING:
  1018. break;
  1019. }
  1020. spin_unlock_irqrestore(&queue->state_lock, flags);
  1021. if (disconnect) {
  1022. rdma_disconnect(queue->cm_id);
  1023. ib_drain_qp(queue->cm_id->qp);
  1024. schedule_work(&queue->release_work);
  1025. }
  1026. }
  1027. static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
  1028. {
  1029. bool disconnect = false;
  1030. mutex_lock(&nvmet_rdma_queue_mutex);
  1031. if (!list_empty(&queue->queue_list)) {
  1032. list_del_init(&queue->queue_list);
  1033. disconnect = true;
  1034. }
  1035. mutex_unlock(&nvmet_rdma_queue_mutex);
  1036. if (disconnect)
  1037. __nvmet_rdma_queue_disconnect(queue);
  1038. }
  1039. static void nvmet_rdma_queue_connect_fail(struct rdma_cm_id *cm_id,
  1040. struct nvmet_rdma_queue *queue)
  1041. {
  1042. WARN_ON_ONCE(queue->state != NVMET_RDMA_Q_CONNECTING);
  1043. pr_err("failed to connect queue\n");
  1044. schedule_work(&queue->release_work);
  1045. }
  1046. /**
  1047. * nvme_rdma_device_removal() - Handle RDMA device removal
  1048. * @queue: nvmet rdma queue (cm id qp_context)
  1049. * @addr: nvmet address (cm_id context)
  1050. *
  1051. * DEVICE_REMOVAL event notifies us that the RDMA device is about
  1052. * to unplug so we should take care of destroying our RDMA resources.
  1053. * This event will be generated for each allocated cm_id.
  1054. *
  1055. * Note that this event can be generated on a normal queue cm_id
  1056. * and/or a device bound listener cm_id (where in this case
  1057. * queue will be null).
  1058. *
  1059. * we claim ownership on destroying the cm_id. For queues we move
  1060. * the queue state to NVMET_RDMA_IN_DEVICE_REMOVAL and for port
  1061. * we nullify the priv to prevent double cm_id destruction and destroying
  1062. * the cm_id implicitely by returning a non-zero rc to the callout.
  1063. */
  1064. static int nvmet_rdma_device_removal(struct rdma_cm_id *cm_id,
  1065. struct nvmet_rdma_queue *queue)
  1066. {
  1067. unsigned long flags;
  1068. if (!queue) {
  1069. struct nvmet_port *port = cm_id->context;
  1070. /*
  1071. * This is a listener cm_id. Make sure that
  1072. * future remove_port won't invoke a double
  1073. * cm_id destroy. use atomic xchg to make sure
  1074. * we don't compete with remove_port.
  1075. */
  1076. if (xchg(&port->priv, NULL) != cm_id)
  1077. return 0;
  1078. } else {
  1079. /*
  1080. * This is a queue cm_id. Make sure that
  1081. * release queue will not destroy the cm_id
  1082. * and schedule all ctrl queues removal (only
  1083. * if the queue is not disconnecting already).
  1084. */
  1085. spin_lock_irqsave(&queue->state_lock, flags);
  1086. if (queue->state != NVMET_RDMA_Q_DISCONNECTING)
  1087. queue->state = NVMET_RDMA_IN_DEVICE_REMOVAL;
  1088. spin_unlock_irqrestore(&queue->state_lock, flags);
  1089. nvmet_rdma_queue_disconnect(queue);
  1090. flush_scheduled_work();
  1091. }
  1092. /*
  1093. * We need to return 1 so that the core will destroy
  1094. * it's own ID. What a great API design..
  1095. */
  1096. return 1;
  1097. }
  1098. static int nvmet_rdma_cm_handler(struct rdma_cm_id *cm_id,
  1099. struct rdma_cm_event *event)
  1100. {
  1101. struct nvmet_rdma_queue *queue = NULL;
  1102. int ret = 0;
  1103. if (cm_id->qp)
  1104. queue = cm_id->qp->qp_context;
  1105. pr_debug("%s (%d): status %d id %p\n",
  1106. rdma_event_msg(event->event), event->event,
  1107. event->status, cm_id);
  1108. switch (event->event) {
  1109. case RDMA_CM_EVENT_CONNECT_REQUEST:
  1110. ret = nvmet_rdma_queue_connect(cm_id, event);
  1111. break;
  1112. case RDMA_CM_EVENT_ESTABLISHED:
  1113. nvmet_rdma_queue_established(queue);
  1114. break;
  1115. case RDMA_CM_EVENT_ADDR_CHANGE:
  1116. case RDMA_CM_EVENT_DISCONNECTED:
  1117. case RDMA_CM_EVENT_TIMEWAIT_EXIT:
  1118. nvmet_rdma_queue_disconnect(queue);
  1119. break;
  1120. case RDMA_CM_EVENT_DEVICE_REMOVAL:
  1121. ret = nvmet_rdma_device_removal(cm_id, queue);
  1122. break;
  1123. case RDMA_CM_EVENT_REJECTED:
  1124. case RDMA_CM_EVENT_UNREACHABLE:
  1125. case RDMA_CM_EVENT_CONNECT_ERROR:
  1126. nvmet_rdma_queue_connect_fail(cm_id, queue);
  1127. break;
  1128. default:
  1129. pr_err("received unrecognized RDMA CM event %d\n",
  1130. event->event);
  1131. break;
  1132. }
  1133. return ret;
  1134. }
  1135. static void nvmet_rdma_delete_ctrl(struct nvmet_ctrl *ctrl)
  1136. {
  1137. struct nvmet_rdma_queue *queue;
  1138. restart:
  1139. mutex_lock(&nvmet_rdma_queue_mutex);
  1140. list_for_each_entry(queue, &nvmet_rdma_queue_list, queue_list) {
  1141. if (queue->nvme_sq.ctrl == ctrl) {
  1142. list_del_init(&queue->queue_list);
  1143. mutex_unlock(&nvmet_rdma_queue_mutex);
  1144. __nvmet_rdma_queue_disconnect(queue);
  1145. goto restart;
  1146. }
  1147. }
  1148. mutex_unlock(&nvmet_rdma_queue_mutex);
  1149. }
  1150. static int nvmet_rdma_add_port(struct nvmet_port *port)
  1151. {
  1152. struct rdma_cm_id *cm_id;
  1153. struct sockaddr_in addr_in;
  1154. u16 port_in;
  1155. int ret;
  1156. switch (port->disc_addr.adrfam) {
  1157. case NVMF_ADDR_FAMILY_IP4:
  1158. break;
  1159. default:
  1160. pr_err("address family %d not supported\n",
  1161. port->disc_addr.adrfam);
  1162. return -EINVAL;
  1163. }
  1164. ret = kstrtou16(port->disc_addr.trsvcid, 0, &port_in);
  1165. if (ret)
  1166. return ret;
  1167. addr_in.sin_family = AF_INET;
  1168. addr_in.sin_addr.s_addr = in_aton(port->disc_addr.traddr);
  1169. addr_in.sin_port = htons(port_in);
  1170. cm_id = rdma_create_id(&init_net, nvmet_rdma_cm_handler, port,
  1171. RDMA_PS_TCP, IB_QPT_RC);
  1172. if (IS_ERR(cm_id)) {
  1173. pr_err("CM ID creation failed\n");
  1174. return PTR_ERR(cm_id);
  1175. }
  1176. ret = rdma_bind_addr(cm_id, (struct sockaddr *)&addr_in);
  1177. if (ret) {
  1178. pr_err("binding CM ID to %pISpc failed (%d)\n", &addr_in, ret);
  1179. goto out_destroy_id;
  1180. }
  1181. ret = rdma_listen(cm_id, 128);
  1182. if (ret) {
  1183. pr_err("listening to %pISpc failed (%d)\n", &addr_in, ret);
  1184. goto out_destroy_id;
  1185. }
  1186. pr_info("enabling port %d (%pISpc)\n",
  1187. le16_to_cpu(port->disc_addr.portid), &addr_in);
  1188. port->priv = cm_id;
  1189. return 0;
  1190. out_destroy_id:
  1191. rdma_destroy_id(cm_id);
  1192. return ret;
  1193. }
  1194. static void nvmet_rdma_remove_port(struct nvmet_port *port)
  1195. {
  1196. struct rdma_cm_id *cm_id = xchg(&port->priv, NULL);
  1197. if (cm_id)
  1198. rdma_destroy_id(cm_id);
  1199. }
  1200. static struct nvmet_fabrics_ops nvmet_rdma_ops = {
  1201. .owner = THIS_MODULE,
  1202. .type = NVMF_TRTYPE_RDMA,
  1203. .sqe_inline_size = NVMET_RDMA_INLINE_DATA_SIZE,
  1204. .msdbd = 1,
  1205. .has_keyed_sgls = 1,
  1206. .add_port = nvmet_rdma_add_port,
  1207. .remove_port = nvmet_rdma_remove_port,
  1208. .queue_response = nvmet_rdma_queue_response,
  1209. .delete_ctrl = nvmet_rdma_delete_ctrl,
  1210. };
  1211. static int __init nvmet_rdma_init(void)
  1212. {
  1213. return nvmet_register_transport(&nvmet_rdma_ops);
  1214. }
  1215. static void __exit nvmet_rdma_exit(void)
  1216. {
  1217. struct nvmet_rdma_queue *queue;
  1218. nvmet_unregister_transport(&nvmet_rdma_ops);
  1219. flush_scheduled_work();
  1220. mutex_lock(&nvmet_rdma_queue_mutex);
  1221. while ((queue = list_first_entry_or_null(&nvmet_rdma_queue_list,
  1222. struct nvmet_rdma_queue, queue_list))) {
  1223. list_del_init(&queue->queue_list);
  1224. mutex_unlock(&nvmet_rdma_queue_mutex);
  1225. __nvmet_rdma_queue_disconnect(queue);
  1226. mutex_lock(&nvmet_rdma_queue_mutex);
  1227. }
  1228. mutex_unlock(&nvmet_rdma_queue_mutex);
  1229. flush_scheduled_work();
  1230. ida_destroy(&nvmet_rdma_queue_ida);
  1231. }
  1232. module_init(nvmet_rdma_init);
  1233. module_exit(nvmet_rdma_exit);
  1234. MODULE_LICENSE("GPL v2");
  1235. MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */