region_devs.c 24 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942
  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/scatterlist.h>
  14. #include <linux/highmem.h>
  15. #include <linux/sched.h>
  16. #include <linux/slab.h>
  17. #include <linux/hash.h>
  18. #include <linux/pmem.h>
  19. #include <linux/sort.h>
  20. #include <linux/io.h>
  21. #include <linux/nd.h>
  22. #include "nd-core.h"
  23. #include "nd.h"
  24. /*
  25. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  26. * irrelevant.
  27. */
  28. #include <linux/io-64-nonatomic-hi-lo.h>
  29. static DEFINE_IDA(region_ida);
  30. static DEFINE_PER_CPU(int, flush_idx);
  31. static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
  32. struct nd_region_data *ndrd)
  33. {
  34. int i, j;
  35. dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
  36. nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
  37. for (i = 0; i < nvdimm->num_flush; i++) {
  38. struct resource *res = &nvdimm->flush_wpq[i];
  39. unsigned long pfn = PHYS_PFN(res->start);
  40. void __iomem *flush_page;
  41. /* check if flush hints share a page */
  42. for (j = 0; j < i; j++) {
  43. struct resource *res_j = &nvdimm->flush_wpq[j];
  44. unsigned long pfn_j = PHYS_PFN(res_j->start);
  45. if (pfn == pfn_j)
  46. break;
  47. }
  48. if (j < i)
  49. flush_page = (void __iomem *) ((unsigned long)
  50. ndrd->flush_wpq[dimm][j] & PAGE_MASK);
  51. else
  52. flush_page = devm_nvdimm_ioremap(dev,
  53. PHYS_PFN(pfn), PAGE_SIZE);
  54. if (!flush_page)
  55. return -ENXIO;
  56. ndrd->flush_wpq[dimm][i] = flush_page
  57. + (res->start & ~PAGE_MASK);
  58. }
  59. return 0;
  60. }
  61. int nd_region_activate(struct nd_region *nd_region)
  62. {
  63. int i, num_flush = 0;
  64. struct nd_region_data *ndrd;
  65. struct device *dev = &nd_region->dev;
  66. size_t flush_data_size = sizeof(void *);
  67. nvdimm_bus_lock(&nd_region->dev);
  68. for (i = 0; i < nd_region->ndr_mappings; i++) {
  69. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  70. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  71. /* at least one null hint slot per-dimm for the "no-hint" case */
  72. flush_data_size += sizeof(void *);
  73. num_flush = min_not_zero(num_flush, nvdimm->num_flush);
  74. if (!nvdimm->num_flush)
  75. continue;
  76. flush_data_size += nvdimm->num_flush * sizeof(void *);
  77. }
  78. nvdimm_bus_unlock(&nd_region->dev);
  79. ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
  80. if (!ndrd)
  81. return -ENOMEM;
  82. dev_set_drvdata(dev, ndrd);
  83. ndrd->flush_mask = (1 << ilog2(num_flush)) - 1;
  84. for (i = 0; i < nd_region->ndr_mappings; i++) {
  85. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  86. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  87. int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
  88. if (rc)
  89. return rc;
  90. }
  91. return 0;
  92. }
  93. static void nd_region_release(struct device *dev)
  94. {
  95. struct nd_region *nd_region = to_nd_region(dev);
  96. u16 i;
  97. for (i = 0; i < nd_region->ndr_mappings; i++) {
  98. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  99. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  100. put_device(&nvdimm->dev);
  101. }
  102. free_percpu(nd_region->lane);
  103. ida_simple_remove(&region_ida, nd_region->id);
  104. if (is_nd_blk(dev))
  105. kfree(to_nd_blk_region(dev));
  106. else
  107. kfree(nd_region);
  108. }
  109. static struct device_type nd_blk_device_type = {
  110. .name = "nd_blk",
  111. .release = nd_region_release,
  112. };
  113. static struct device_type nd_pmem_device_type = {
  114. .name = "nd_pmem",
  115. .release = nd_region_release,
  116. };
  117. static struct device_type nd_volatile_device_type = {
  118. .name = "nd_volatile",
  119. .release = nd_region_release,
  120. };
  121. bool is_nd_pmem(struct device *dev)
  122. {
  123. return dev ? dev->type == &nd_pmem_device_type : false;
  124. }
  125. bool is_nd_blk(struct device *dev)
  126. {
  127. return dev ? dev->type == &nd_blk_device_type : false;
  128. }
  129. struct nd_region *to_nd_region(struct device *dev)
  130. {
  131. struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
  132. WARN_ON(dev->type->release != nd_region_release);
  133. return nd_region;
  134. }
  135. EXPORT_SYMBOL_GPL(to_nd_region);
  136. struct nd_blk_region *to_nd_blk_region(struct device *dev)
  137. {
  138. struct nd_region *nd_region = to_nd_region(dev);
  139. WARN_ON(!is_nd_blk(dev));
  140. return container_of(nd_region, struct nd_blk_region, nd_region);
  141. }
  142. EXPORT_SYMBOL_GPL(to_nd_blk_region);
  143. void *nd_region_provider_data(struct nd_region *nd_region)
  144. {
  145. return nd_region->provider_data;
  146. }
  147. EXPORT_SYMBOL_GPL(nd_region_provider_data);
  148. void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
  149. {
  150. return ndbr->blk_provider_data;
  151. }
  152. EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
  153. void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
  154. {
  155. ndbr->blk_provider_data = data;
  156. }
  157. EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
  158. /**
  159. * nd_region_to_nstype() - region to an integer namespace type
  160. * @nd_region: region-device to interrogate
  161. *
  162. * This is the 'nstype' attribute of a region as well, an input to the
  163. * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
  164. * namespace devices with namespace drivers.
  165. */
  166. int nd_region_to_nstype(struct nd_region *nd_region)
  167. {
  168. if (is_nd_pmem(&nd_region->dev)) {
  169. u16 i, alias;
  170. for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
  171. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  172. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  173. if (nvdimm->flags & NDD_ALIASING)
  174. alias++;
  175. }
  176. if (alias)
  177. return ND_DEVICE_NAMESPACE_PMEM;
  178. else
  179. return ND_DEVICE_NAMESPACE_IO;
  180. } else if (is_nd_blk(&nd_region->dev)) {
  181. return ND_DEVICE_NAMESPACE_BLK;
  182. }
  183. return 0;
  184. }
  185. EXPORT_SYMBOL(nd_region_to_nstype);
  186. static ssize_t size_show(struct device *dev,
  187. struct device_attribute *attr, char *buf)
  188. {
  189. struct nd_region *nd_region = to_nd_region(dev);
  190. unsigned long long size = 0;
  191. if (is_nd_pmem(dev)) {
  192. size = nd_region->ndr_size;
  193. } else if (nd_region->ndr_mappings == 1) {
  194. struct nd_mapping *nd_mapping = &nd_region->mapping[0];
  195. size = nd_mapping->size;
  196. }
  197. return sprintf(buf, "%llu\n", size);
  198. }
  199. static DEVICE_ATTR_RO(size);
  200. static ssize_t mappings_show(struct device *dev,
  201. struct device_attribute *attr, char *buf)
  202. {
  203. struct nd_region *nd_region = to_nd_region(dev);
  204. return sprintf(buf, "%d\n", nd_region->ndr_mappings);
  205. }
  206. static DEVICE_ATTR_RO(mappings);
  207. static ssize_t nstype_show(struct device *dev,
  208. struct device_attribute *attr, char *buf)
  209. {
  210. struct nd_region *nd_region = to_nd_region(dev);
  211. return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
  212. }
  213. static DEVICE_ATTR_RO(nstype);
  214. static ssize_t set_cookie_show(struct device *dev,
  215. struct device_attribute *attr, char *buf)
  216. {
  217. struct nd_region *nd_region = to_nd_region(dev);
  218. struct nd_interleave_set *nd_set = nd_region->nd_set;
  219. if (is_nd_pmem(dev) && nd_set)
  220. /* pass, should be precluded by region_visible */;
  221. else
  222. return -ENXIO;
  223. return sprintf(buf, "%#llx\n", nd_set->cookie);
  224. }
  225. static DEVICE_ATTR_RO(set_cookie);
  226. resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
  227. {
  228. resource_size_t blk_max_overlap = 0, available, overlap;
  229. int i;
  230. WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
  231. retry:
  232. available = 0;
  233. overlap = blk_max_overlap;
  234. for (i = 0; i < nd_region->ndr_mappings; i++) {
  235. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  236. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  237. /* if a dimm is disabled the available capacity is zero */
  238. if (!ndd)
  239. return 0;
  240. if (is_nd_pmem(&nd_region->dev)) {
  241. available += nd_pmem_available_dpa(nd_region,
  242. nd_mapping, &overlap);
  243. if (overlap > blk_max_overlap) {
  244. blk_max_overlap = overlap;
  245. goto retry;
  246. }
  247. } else if (is_nd_blk(&nd_region->dev)) {
  248. available += nd_blk_available_dpa(nd_mapping);
  249. }
  250. }
  251. return available;
  252. }
  253. static ssize_t available_size_show(struct device *dev,
  254. struct device_attribute *attr, char *buf)
  255. {
  256. struct nd_region *nd_region = to_nd_region(dev);
  257. unsigned long long available = 0;
  258. /*
  259. * Flush in-flight updates and grab a snapshot of the available
  260. * size. Of course, this value is potentially invalidated the
  261. * memory nvdimm_bus_lock() is dropped, but that's userspace's
  262. * problem to not race itself.
  263. */
  264. nvdimm_bus_lock(dev);
  265. wait_nvdimm_bus_probe_idle(dev);
  266. available = nd_region_available_dpa(nd_region);
  267. nvdimm_bus_unlock(dev);
  268. return sprintf(buf, "%llu\n", available);
  269. }
  270. static DEVICE_ATTR_RO(available_size);
  271. static ssize_t init_namespaces_show(struct device *dev,
  272. struct device_attribute *attr, char *buf)
  273. {
  274. struct nd_region_data *ndrd = dev_get_drvdata(dev);
  275. ssize_t rc;
  276. nvdimm_bus_lock(dev);
  277. if (ndrd)
  278. rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
  279. else
  280. rc = -ENXIO;
  281. nvdimm_bus_unlock(dev);
  282. return rc;
  283. }
  284. static DEVICE_ATTR_RO(init_namespaces);
  285. static ssize_t namespace_seed_show(struct device *dev,
  286. struct device_attribute *attr, char *buf)
  287. {
  288. struct nd_region *nd_region = to_nd_region(dev);
  289. ssize_t rc;
  290. nvdimm_bus_lock(dev);
  291. if (nd_region->ns_seed)
  292. rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
  293. else
  294. rc = sprintf(buf, "\n");
  295. nvdimm_bus_unlock(dev);
  296. return rc;
  297. }
  298. static DEVICE_ATTR_RO(namespace_seed);
  299. static ssize_t btt_seed_show(struct device *dev,
  300. struct device_attribute *attr, char *buf)
  301. {
  302. struct nd_region *nd_region = to_nd_region(dev);
  303. ssize_t rc;
  304. nvdimm_bus_lock(dev);
  305. if (nd_region->btt_seed)
  306. rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
  307. else
  308. rc = sprintf(buf, "\n");
  309. nvdimm_bus_unlock(dev);
  310. return rc;
  311. }
  312. static DEVICE_ATTR_RO(btt_seed);
  313. static ssize_t pfn_seed_show(struct device *dev,
  314. struct device_attribute *attr, char *buf)
  315. {
  316. struct nd_region *nd_region = to_nd_region(dev);
  317. ssize_t rc;
  318. nvdimm_bus_lock(dev);
  319. if (nd_region->pfn_seed)
  320. rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
  321. else
  322. rc = sprintf(buf, "\n");
  323. nvdimm_bus_unlock(dev);
  324. return rc;
  325. }
  326. static DEVICE_ATTR_RO(pfn_seed);
  327. static ssize_t dax_seed_show(struct device *dev,
  328. struct device_attribute *attr, char *buf)
  329. {
  330. struct nd_region *nd_region = to_nd_region(dev);
  331. ssize_t rc;
  332. nvdimm_bus_lock(dev);
  333. if (nd_region->dax_seed)
  334. rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
  335. else
  336. rc = sprintf(buf, "\n");
  337. nvdimm_bus_unlock(dev);
  338. return rc;
  339. }
  340. static DEVICE_ATTR_RO(dax_seed);
  341. static ssize_t read_only_show(struct device *dev,
  342. struct device_attribute *attr, char *buf)
  343. {
  344. struct nd_region *nd_region = to_nd_region(dev);
  345. return sprintf(buf, "%d\n", nd_region->ro);
  346. }
  347. static ssize_t read_only_store(struct device *dev,
  348. struct device_attribute *attr, const char *buf, size_t len)
  349. {
  350. bool ro;
  351. int rc = strtobool(buf, &ro);
  352. struct nd_region *nd_region = to_nd_region(dev);
  353. if (rc)
  354. return rc;
  355. nd_region->ro = ro;
  356. return len;
  357. }
  358. static DEVICE_ATTR_RW(read_only);
  359. static struct attribute *nd_region_attributes[] = {
  360. &dev_attr_size.attr,
  361. &dev_attr_nstype.attr,
  362. &dev_attr_mappings.attr,
  363. &dev_attr_btt_seed.attr,
  364. &dev_attr_pfn_seed.attr,
  365. &dev_attr_dax_seed.attr,
  366. &dev_attr_read_only.attr,
  367. &dev_attr_set_cookie.attr,
  368. &dev_attr_available_size.attr,
  369. &dev_attr_namespace_seed.attr,
  370. &dev_attr_init_namespaces.attr,
  371. NULL,
  372. };
  373. static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
  374. {
  375. struct device *dev = container_of(kobj, typeof(*dev), kobj);
  376. struct nd_region *nd_region = to_nd_region(dev);
  377. struct nd_interleave_set *nd_set = nd_region->nd_set;
  378. int type = nd_region_to_nstype(nd_region);
  379. if (!is_nd_pmem(dev) && a == &dev_attr_pfn_seed.attr)
  380. return 0;
  381. if (!is_nd_pmem(dev) && a == &dev_attr_dax_seed.attr)
  382. return 0;
  383. if (a != &dev_attr_set_cookie.attr
  384. && a != &dev_attr_available_size.attr)
  385. return a->mode;
  386. if ((type == ND_DEVICE_NAMESPACE_PMEM
  387. || type == ND_DEVICE_NAMESPACE_BLK)
  388. && a == &dev_attr_available_size.attr)
  389. return a->mode;
  390. else if (is_nd_pmem(dev) && nd_set)
  391. return a->mode;
  392. return 0;
  393. }
  394. struct attribute_group nd_region_attribute_group = {
  395. .attrs = nd_region_attributes,
  396. .is_visible = region_visible,
  397. };
  398. EXPORT_SYMBOL_GPL(nd_region_attribute_group);
  399. u64 nd_region_interleave_set_cookie(struct nd_region *nd_region)
  400. {
  401. struct nd_interleave_set *nd_set = nd_region->nd_set;
  402. if (nd_set)
  403. return nd_set->cookie;
  404. return 0;
  405. }
  406. /*
  407. * Upon successful probe/remove, take/release a reference on the
  408. * associated interleave set (if present), and plant new btt + namespace
  409. * seeds. Also, on the removal of a BLK region, notify the provider to
  410. * disable the region.
  411. */
  412. static void nd_region_notify_driver_action(struct nvdimm_bus *nvdimm_bus,
  413. struct device *dev, bool probe)
  414. {
  415. struct nd_region *nd_region;
  416. if (!probe && (is_nd_pmem(dev) || is_nd_blk(dev))) {
  417. int i;
  418. nd_region = to_nd_region(dev);
  419. for (i = 0; i < nd_region->ndr_mappings; i++) {
  420. struct nd_mapping *nd_mapping = &nd_region->mapping[i];
  421. struct nvdimm_drvdata *ndd = nd_mapping->ndd;
  422. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  423. kfree(nd_mapping->labels);
  424. nd_mapping->labels = NULL;
  425. put_ndd(ndd);
  426. nd_mapping->ndd = NULL;
  427. if (ndd)
  428. atomic_dec(&nvdimm->busy);
  429. }
  430. if (is_nd_pmem(dev))
  431. return;
  432. }
  433. if (dev->parent && is_nd_blk(dev->parent) && probe) {
  434. nd_region = to_nd_region(dev->parent);
  435. nvdimm_bus_lock(dev);
  436. if (nd_region->ns_seed == dev)
  437. nd_region_create_blk_seed(nd_region);
  438. nvdimm_bus_unlock(dev);
  439. }
  440. if (is_nd_btt(dev) && probe) {
  441. struct nd_btt *nd_btt = to_nd_btt(dev);
  442. nd_region = to_nd_region(dev->parent);
  443. nvdimm_bus_lock(dev);
  444. if (nd_region->btt_seed == dev)
  445. nd_region_create_btt_seed(nd_region);
  446. if (nd_region->ns_seed == &nd_btt->ndns->dev &&
  447. is_nd_blk(dev->parent))
  448. nd_region_create_blk_seed(nd_region);
  449. nvdimm_bus_unlock(dev);
  450. }
  451. if (is_nd_pfn(dev) && probe) {
  452. nd_region = to_nd_region(dev->parent);
  453. nvdimm_bus_lock(dev);
  454. if (nd_region->pfn_seed == dev)
  455. nd_region_create_pfn_seed(nd_region);
  456. nvdimm_bus_unlock(dev);
  457. }
  458. if (is_nd_dax(dev) && probe) {
  459. nd_region = to_nd_region(dev->parent);
  460. nvdimm_bus_lock(dev);
  461. if (nd_region->dax_seed == dev)
  462. nd_region_create_dax_seed(nd_region);
  463. nvdimm_bus_unlock(dev);
  464. }
  465. }
  466. void nd_region_probe_success(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  467. {
  468. nd_region_notify_driver_action(nvdimm_bus, dev, true);
  469. }
  470. void nd_region_disable(struct nvdimm_bus *nvdimm_bus, struct device *dev)
  471. {
  472. nd_region_notify_driver_action(nvdimm_bus, dev, false);
  473. }
  474. static ssize_t mappingN(struct device *dev, char *buf, int n)
  475. {
  476. struct nd_region *nd_region = to_nd_region(dev);
  477. struct nd_mapping *nd_mapping;
  478. struct nvdimm *nvdimm;
  479. if (n >= nd_region->ndr_mappings)
  480. return -ENXIO;
  481. nd_mapping = &nd_region->mapping[n];
  482. nvdimm = nd_mapping->nvdimm;
  483. return sprintf(buf, "%s,%llu,%llu\n", dev_name(&nvdimm->dev),
  484. nd_mapping->start, nd_mapping->size);
  485. }
  486. #define REGION_MAPPING(idx) \
  487. static ssize_t mapping##idx##_show(struct device *dev, \
  488. struct device_attribute *attr, char *buf) \
  489. { \
  490. return mappingN(dev, buf, idx); \
  491. } \
  492. static DEVICE_ATTR_RO(mapping##idx)
  493. /*
  494. * 32 should be enough for a while, even in the presence of socket
  495. * interleave a 32-way interleave set is a degenerate case.
  496. */
  497. REGION_MAPPING(0);
  498. REGION_MAPPING(1);
  499. REGION_MAPPING(2);
  500. REGION_MAPPING(3);
  501. REGION_MAPPING(4);
  502. REGION_MAPPING(5);
  503. REGION_MAPPING(6);
  504. REGION_MAPPING(7);
  505. REGION_MAPPING(8);
  506. REGION_MAPPING(9);
  507. REGION_MAPPING(10);
  508. REGION_MAPPING(11);
  509. REGION_MAPPING(12);
  510. REGION_MAPPING(13);
  511. REGION_MAPPING(14);
  512. REGION_MAPPING(15);
  513. REGION_MAPPING(16);
  514. REGION_MAPPING(17);
  515. REGION_MAPPING(18);
  516. REGION_MAPPING(19);
  517. REGION_MAPPING(20);
  518. REGION_MAPPING(21);
  519. REGION_MAPPING(22);
  520. REGION_MAPPING(23);
  521. REGION_MAPPING(24);
  522. REGION_MAPPING(25);
  523. REGION_MAPPING(26);
  524. REGION_MAPPING(27);
  525. REGION_MAPPING(28);
  526. REGION_MAPPING(29);
  527. REGION_MAPPING(30);
  528. REGION_MAPPING(31);
  529. static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
  530. {
  531. struct device *dev = container_of(kobj, struct device, kobj);
  532. struct nd_region *nd_region = to_nd_region(dev);
  533. if (n < nd_region->ndr_mappings)
  534. return a->mode;
  535. return 0;
  536. }
  537. static struct attribute *mapping_attributes[] = {
  538. &dev_attr_mapping0.attr,
  539. &dev_attr_mapping1.attr,
  540. &dev_attr_mapping2.attr,
  541. &dev_attr_mapping3.attr,
  542. &dev_attr_mapping4.attr,
  543. &dev_attr_mapping5.attr,
  544. &dev_attr_mapping6.attr,
  545. &dev_attr_mapping7.attr,
  546. &dev_attr_mapping8.attr,
  547. &dev_attr_mapping9.attr,
  548. &dev_attr_mapping10.attr,
  549. &dev_attr_mapping11.attr,
  550. &dev_attr_mapping12.attr,
  551. &dev_attr_mapping13.attr,
  552. &dev_attr_mapping14.attr,
  553. &dev_attr_mapping15.attr,
  554. &dev_attr_mapping16.attr,
  555. &dev_attr_mapping17.attr,
  556. &dev_attr_mapping18.attr,
  557. &dev_attr_mapping19.attr,
  558. &dev_attr_mapping20.attr,
  559. &dev_attr_mapping21.attr,
  560. &dev_attr_mapping22.attr,
  561. &dev_attr_mapping23.attr,
  562. &dev_attr_mapping24.attr,
  563. &dev_attr_mapping25.attr,
  564. &dev_attr_mapping26.attr,
  565. &dev_attr_mapping27.attr,
  566. &dev_attr_mapping28.attr,
  567. &dev_attr_mapping29.attr,
  568. &dev_attr_mapping30.attr,
  569. &dev_attr_mapping31.attr,
  570. NULL,
  571. };
  572. struct attribute_group nd_mapping_attribute_group = {
  573. .is_visible = mapping_visible,
  574. .attrs = mapping_attributes,
  575. };
  576. EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
  577. int nd_blk_region_init(struct nd_region *nd_region)
  578. {
  579. struct device *dev = &nd_region->dev;
  580. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
  581. if (!is_nd_blk(dev))
  582. return 0;
  583. if (nd_region->ndr_mappings < 1) {
  584. dev_err(dev, "invalid BLK region\n");
  585. return -ENXIO;
  586. }
  587. return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
  588. }
  589. /**
  590. * nd_region_acquire_lane - allocate and lock a lane
  591. * @nd_region: region id and number of lanes possible
  592. *
  593. * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
  594. * We optimize for the common case where there are 256 lanes, one
  595. * per-cpu. For larger systems we need to lock to share lanes. For now
  596. * this implementation assumes the cost of maintaining an allocator for
  597. * free lanes is on the order of the lock hold time, so it implements a
  598. * static lane = cpu % num_lanes mapping.
  599. *
  600. * In the case of a BTT instance on top of a BLK namespace a lane may be
  601. * acquired recursively. We lock on the first instance.
  602. *
  603. * In the case of a BTT instance on top of PMEM, we only acquire a lane
  604. * for the BTT metadata updates.
  605. */
  606. unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
  607. {
  608. unsigned int cpu, lane;
  609. cpu = get_cpu();
  610. if (nd_region->num_lanes < nr_cpu_ids) {
  611. struct nd_percpu_lane *ndl_lock, *ndl_count;
  612. lane = cpu % nd_region->num_lanes;
  613. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  614. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  615. if (ndl_count->count++ == 0)
  616. spin_lock(&ndl_lock->lock);
  617. } else
  618. lane = cpu;
  619. return lane;
  620. }
  621. EXPORT_SYMBOL(nd_region_acquire_lane);
  622. void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
  623. {
  624. if (nd_region->num_lanes < nr_cpu_ids) {
  625. unsigned int cpu = get_cpu();
  626. struct nd_percpu_lane *ndl_lock, *ndl_count;
  627. ndl_count = per_cpu_ptr(nd_region->lane, cpu);
  628. ndl_lock = per_cpu_ptr(nd_region->lane, lane);
  629. if (--ndl_count->count == 0)
  630. spin_unlock(&ndl_lock->lock);
  631. put_cpu();
  632. }
  633. put_cpu();
  634. }
  635. EXPORT_SYMBOL(nd_region_release_lane);
  636. static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
  637. struct nd_region_desc *ndr_desc, struct device_type *dev_type,
  638. const char *caller)
  639. {
  640. struct nd_region *nd_region;
  641. struct device *dev;
  642. void *region_buf;
  643. unsigned int i;
  644. int ro = 0;
  645. for (i = 0; i < ndr_desc->num_mappings; i++) {
  646. struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
  647. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  648. if ((nd_mapping->start | nd_mapping->size) % SZ_4K) {
  649. dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not 4K aligned\n",
  650. caller, dev_name(&nvdimm->dev), i);
  651. return NULL;
  652. }
  653. if (nvdimm->flags & NDD_UNARMED)
  654. ro = 1;
  655. }
  656. if (dev_type == &nd_blk_device_type) {
  657. struct nd_blk_region_desc *ndbr_desc;
  658. struct nd_blk_region *ndbr;
  659. ndbr_desc = to_blk_region_desc(ndr_desc);
  660. ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
  661. * ndr_desc->num_mappings,
  662. GFP_KERNEL);
  663. if (ndbr) {
  664. nd_region = &ndbr->nd_region;
  665. ndbr->enable = ndbr_desc->enable;
  666. ndbr->do_io = ndbr_desc->do_io;
  667. }
  668. region_buf = ndbr;
  669. } else {
  670. nd_region = kzalloc(sizeof(struct nd_region)
  671. + sizeof(struct nd_mapping)
  672. * ndr_desc->num_mappings,
  673. GFP_KERNEL);
  674. region_buf = nd_region;
  675. }
  676. if (!region_buf)
  677. return NULL;
  678. nd_region->id = ida_simple_get(&region_ida, 0, 0, GFP_KERNEL);
  679. if (nd_region->id < 0)
  680. goto err_id;
  681. nd_region->lane = alloc_percpu(struct nd_percpu_lane);
  682. if (!nd_region->lane)
  683. goto err_percpu;
  684. for (i = 0; i < nr_cpu_ids; i++) {
  685. struct nd_percpu_lane *ndl;
  686. ndl = per_cpu_ptr(nd_region->lane, i);
  687. spin_lock_init(&ndl->lock);
  688. ndl->count = 0;
  689. }
  690. memcpy(nd_region->mapping, ndr_desc->nd_mapping,
  691. sizeof(struct nd_mapping) * ndr_desc->num_mappings);
  692. for (i = 0; i < ndr_desc->num_mappings; i++) {
  693. struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
  694. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  695. get_device(&nvdimm->dev);
  696. }
  697. nd_region->ndr_mappings = ndr_desc->num_mappings;
  698. nd_region->provider_data = ndr_desc->provider_data;
  699. nd_region->nd_set = ndr_desc->nd_set;
  700. nd_region->num_lanes = ndr_desc->num_lanes;
  701. nd_region->flags = ndr_desc->flags;
  702. nd_region->ro = ro;
  703. nd_region->numa_node = ndr_desc->numa_node;
  704. ida_init(&nd_region->ns_ida);
  705. ida_init(&nd_region->btt_ida);
  706. ida_init(&nd_region->pfn_ida);
  707. ida_init(&nd_region->dax_ida);
  708. dev = &nd_region->dev;
  709. dev_set_name(dev, "region%d", nd_region->id);
  710. dev->parent = &nvdimm_bus->dev;
  711. dev->type = dev_type;
  712. dev->groups = ndr_desc->attr_groups;
  713. nd_region->ndr_size = resource_size(ndr_desc->res);
  714. nd_region->ndr_start = ndr_desc->res->start;
  715. nd_device_register(dev);
  716. return nd_region;
  717. err_percpu:
  718. ida_simple_remove(&region_ida, nd_region->id);
  719. err_id:
  720. kfree(region_buf);
  721. return NULL;
  722. }
  723. struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
  724. struct nd_region_desc *ndr_desc)
  725. {
  726. ndr_desc->num_lanes = ND_MAX_LANES;
  727. return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
  728. __func__);
  729. }
  730. EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
  731. struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
  732. struct nd_region_desc *ndr_desc)
  733. {
  734. if (ndr_desc->num_mappings > 1)
  735. return NULL;
  736. ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
  737. return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
  738. __func__);
  739. }
  740. EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
  741. struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
  742. struct nd_region_desc *ndr_desc)
  743. {
  744. ndr_desc->num_lanes = ND_MAX_LANES;
  745. return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
  746. __func__);
  747. }
  748. EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
  749. /**
  750. * nvdimm_flush - flush any posted write queues between the cpu and pmem media
  751. * @nd_region: blk or interleaved pmem region
  752. */
  753. void nvdimm_flush(struct nd_region *nd_region)
  754. {
  755. struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
  756. int i, idx;
  757. /*
  758. * Try to encourage some diversity in flush hint addresses
  759. * across cpus assuming a limited number of flush hints.
  760. */
  761. idx = this_cpu_read(flush_idx);
  762. idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
  763. /*
  764. * The first wmb() is needed to 'sfence' all previous writes
  765. * such that they are architecturally visible for the platform
  766. * buffer flush. Note that we've already arranged for pmem
  767. * writes to avoid the cache via arch_memcpy_to_pmem(). The
  768. * final wmb() ensures ordering for the NVDIMM flush write.
  769. */
  770. wmb();
  771. for (i = 0; i < nd_region->ndr_mappings; i++)
  772. if (ndrd->flush_wpq[i][0])
  773. writeq(1, ndrd->flush_wpq[i][idx & ndrd->flush_mask]);
  774. wmb();
  775. }
  776. EXPORT_SYMBOL_GPL(nvdimm_flush);
  777. /**
  778. * nvdimm_has_flush - determine write flushing requirements
  779. * @nd_region: blk or interleaved pmem region
  780. *
  781. * Returns 1 if writes require flushing
  782. * Returns 0 if writes do not require flushing
  783. * Returns -ENXIO if flushing capability can not be determined
  784. */
  785. int nvdimm_has_flush(struct nd_region *nd_region)
  786. {
  787. struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
  788. int i;
  789. /* no nvdimm == flushing capability unknown */
  790. if (nd_region->ndr_mappings == 0)
  791. return -ENXIO;
  792. for (i = 0; i < nd_region->ndr_mappings; i++)
  793. /* flush hints present, flushing required */
  794. if (ndrd->flush_wpq[i][0])
  795. return 1;
  796. /*
  797. * The platform defines dimm devices without hints, assume
  798. * platform persistence mechanism like ADR
  799. */
  800. return 0;
  801. }
  802. EXPORT_SYMBOL_GPL(nvdimm_has_flush);
  803. void __exit nd_region_devs_exit(void)
  804. {
  805. ida_destroy(&region_ida);
  806. }