htt_rx.c 65 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "core.h"
  18. #include "htc.h"
  19. #include "htt.h"
  20. #include "txrx.h"
  21. #include "debug.h"
  22. #include "trace.h"
  23. #include "mac.h"
  24. #include <linux/log2.h>
  25. #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX
  26. #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1)
  27. /* when under memory pressure rx ring refill may fail and needs a retry */
  28. #define HTT_RX_RING_REFILL_RETRY_MS 50
  29. #define HTT_RX_RING_REFILL_RESCHED_MS 5
  30. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb);
  31. static void ath10k_htt_txrx_compl_task(unsigned long ptr);
  32. static struct sk_buff *
  33. ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u32 paddr)
  34. {
  35. struct ath10k_skb_rxcb *rxcb;
  36. hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr)
  37. if (rxcb->paddr == paddr)
  38. return ATH10K_RXCB_SKB(rxcb);
  39. WARN_ON_ONCE(1);
  40. return NULL;
  41. }
  42. static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt)
  43. {
  44. struct sk_buff *skb;
  45. struct ath10k_skb_rxcb *rxcb;
  46. struct hlist_node *n;
  47. int i;
  48. if (htt->rx_ring.in_ord_rx) {
  49. hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) {
  50. skb = ATH10K_RXCB_SKB(rxcb);
  51. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  52. skb->len + skb_tailroom(skb),
  53. DMA_FROM_DEVICE);
  54. hash_del(&rxcb->hlist);
  55. dev_kfree_skb_any(skb);
  56. }
  57. } else {
  58. for (i = 0; i < htt->rx_ring.size; i++) {
  59. skb = htt->rx_ring.netbufs_ring[i];
  60. if (!skb)
  61. continue;
  62. rxcb = ATH10K_SKB_RXCB(skb);
  63. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  64. skb->len + skb_tailroom(skb),
  65. DMA_FROM_DEVICE);
  66. dev_kfree_skb_any(skb);
  67. }
  68. }
  69. htt->rx_ring.fill_cnt = 0;
  70. hash_init(htt->rx_ring.skb_table);
  71. memset(htt->rx_ring.netbufs_ring, 0,
  72. htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0]));
  73. }
  74. static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  75. {
  76. struct htt_rx_desc *rx_desc;
  77. struct ath10k_skb_rxcb *rxcb;
  78. struct sk_buff *skb;
  79. dma_addr_t paddr;
  80. int ret = 0, idx;
  81. /* The Full Rx Reorder firmware has no way of telling the host
  82. * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring.
  83. * To keep things simple make sure ring is always half empty. This
  84. * guarantees there'll be no replenishment overruns possible.
  85. */
  86. BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2);
  87. idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr);
  88. while (num > 0) {
  89. skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN);
  90. if (!skb) {
  91. ret = -ENOMEM;
  92. goto fail;
  93. }
  94. if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN))
  95. skb_pull(skb,
  96. PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) -
  97. skb->data);
  98. /* Clear rx_desc attention word before posting to Rx ring */
  99. rx_desc = (struct htt_rx_desc *)skb->data;
  100. rx_desc->attention.flags = __cpu_to_le32(0);
  101. paddr = dma_map_single(htt->ar->dev, skb->data,
  102. skb->len + skb_tailroom(skb),
  103. DMA_FROM_DEVICE);
  104. if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) {
  105. dev_kfree_skb_any(skb);
  106. ret = -ENOMEM;
  107. goto fail;
  108. }
  109. rxcb = ATH10K_SKB_RXCB(skb);
  110. rxcb->paddr = paddr;
  111. htt->rx_ring.netbufs_ring[idx] = skb;
  112. htt->rx_ring.paddrs_ring[idx] = __cpu_to_le32(paddr);
  113. htt->rx_ring.fill_cnt++;
  114. if (htt->rx_ring.in_ord_rx) {
  115. hash_add(htt->rx_ring.skb_table,
  116. &ATH10K_SKB_RXCB(skb)->hlist,
  117. (u32)paddr);
  118. }
  119. num--;
  120. idx++;
  121. idx &= htt->rx_ring.size_mask;
  122. }
  123. fail:
  124. /*
  125. * Make sure the rx buffer is updated before available buffer
  126. * index to avoid any potential rx ring corruption.
  127. */
  128. mb();
  129. *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx);
  130. return ret;
  131. }
  132. static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num)
  133. {
  134. lockdep_assert_held(&htt->rx_ring.lock);
  135. return __ath10k_htt_rx_ring_fill_n(htt, num);
  136. }
  137. static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt)
  138. {
  139. int ret, num_deficit, num_to_fill;
  140. /* Refilling the whole RX ring buffer proves to be a bad idea. The
  141. * reason is RX may take up significant amount of CPU cycles and starve
  142. * other tasks, e.g. TX on an ethernet device while acting as a bridge
  143. * with ath10k wlan interface. This ended up with very poor performance
  144. * once CPU the host system was overwhelmed with RX on ath10k.
  145. *
  146. * By limiting the number of refills the replenishing occurs
  147. * progressively. This in turns makes use of the fact tasklets are
  148. * processed in FIFO order. This means actual RX processing can starve
  149. * out refilling. If there's not enough buffers on RX ring FW will not
  150. * report RX until it is refilled with enough buffers. This
  151. * automatically balances load wrt to CPU power.
  152. *
  153. * This probably comes at a cost of lower maximum throughput but
  154. * improves the average and stability. */
  155. spin_lock_bh(&htt->rx_ring.lock);
  156. num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt;
  157. num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit);
  158. num_deficit -= num_to_fill;
  159. ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill);
  160. if (ret == -ENOMEM) {
  161. /*
  162. * Failed to fill it to the desired level -
  163. * we'll start a timer and try again next time.
  164. * As long as enough buffers are left in the ring for
  165. * another A-MPDU rx, no special recovery is needed.
  166. */
  167. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  168. msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS));
  169. } else if (num_deficit > 0) {
  170. mod_timer(&htt->rx_ring.refill_retry_timer, jiffies +
  171. msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS));
  172. }
  173. spin_unlock_bh(&htt->rx_ring.lock);
  174. }
  175. static void ath10k_htt_rx_ring_refill_retry(unsigned long arg)
  176. {
  177. struct ath10k_htt *htt = (struct ath10k_htt *)arg;
  178. ath10k_htt_rx_msdu_buff_replenish(htt);
  179. }
  180. int ath10k_htt_rx_ring_refill(struct ath10k *ar)
  181. {
  182. struct ath10k_htt *htt = &ar->htt;
  183. int ret;
  184. spin_lock_bh(&htt->rx_ring.lock);
  185. ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level -
  186. htt->rx_ring.fill_cnt));
  187. spin_unlock_bh(&htt->rx_ring.lock);
  188. if (ret)
  189. ath10k_htt_rx_ring_free(htt);
  190. return ret;
  191. }
  192. void ath10k_htt_rx_free(struct ath10k_htt *htt)
  193. {
  194. del_timer_sync(&htt->rx_ring.refill_retry_timer);
  195. tasklet_kill(&htt->txrx_compl_task);
  196. skb_queue_purge(&htt->rx_compl_q);
  197. skb_queue_purge(&htt->rx_in_ord_compl_q);
  198. skb_queue_purge(&htt->tx_fetch_ind_q);
  199. ath10k_htt_rx_ring_free(htt);
  200. dma_free_coherent(htt->ar->dev,
  201. (htt->rx_ring.size *
  202. sizeof(htt->rx_ring.paddrs_ring)),
  203. htt->rx_ring.paddrs_ring,
  204. htt->rx_ring.base_paddr);
  205. dma_free_coherent(htt->ar->dev,
  206. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  207. htt->rx_ring.alloc_idx.vaddr,
  208. htt->rx_ring.alloc_idx.paddr);
  209. kfree(htt->rx_ring.netbufs_ring);
  210. }
  211. static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
  212. {
  213. struct ath10k *ar = htt->ar;
  214. int idx;
  215. struct sk_buff *msdu;
  216. lockdep_assert_held(&htt->rx_ring.lock);
  217. if (htt->rx_ring.fill_cnt == 0) {
  218. ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
  219. return NULL;
  220. }
  221. idx = htt->rx_ring.sw_rd_idx.msdu_payld;
  222. msdu = htt->rx_ring.netbufs_ring[idx];
  223. htt->rx_ring.netbufs_ring[idx] = NULL;
  224. htt->rx_ring.paddrs_ring[idx] = 0;
  225. idx++;
  226. idx &= htt->rx_ring.size_mask;
  227. htt->rx_ring.sw_rd_idx.msdu_payld = idx;
  228. htt->rx_ring.fill_cnt--;
  229. dma_unmap_single(htt->ar->dev,
  230. ATH10K_SKB_RXCB(msdu)->paddr,
  231. msdu->len + skb_tailroom(msdu),
  232. DMA_FROM_DEVICE);
  233. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  234. msdu->data, msdu->len + skb_tailroom(msdu));
  235. return msdu;
  236. }
  237. /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */
  238. static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
  239. struct sk_buff_head *amsdu)
  240. {
  241. struct ath10k *ar = htt->ar;
  242. int msdu_len, msdu_chaining = 0;
  243. struct sk_buff *msdu;
  244. struct htt_rx_desc *rx_desc;
  245. lockdep_assert_held(&htt->rx_ring.lock);
  246. for (;;) {
  247. int last_msdu, msdu_len_invalid, msdu_chained;
  248. msdu = ath10k_htt_rx_netbuf_pop(htt);
  249. if (!msdu) {
  250. __skb_queue_purge(amsdu);
  251. return -ENOENT;
  252. }
  253. __skb_queue_tail(amsdu, msdu);
  254. rx_desc = (struct htt_rx_desc *)msdu->data;
  255. /* FIXME: we must report msdu payload since this is what caller
  256. * expects now */
  257. skb_put(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  258. skb_pull(msdu, offsetof(struct htt_rx_desc, msdu_payload));
  259. /*
  260. * Sanity check - confirm the HW is finished filling in the
  261. * rx data.
  262. * If the HW and SW are working correctly, then it's guaranteed
  263. * that the HW's MAC DMA is done before this point in the SW.
  264. * To prevent the case that we handle a stale Rx descriptor,
  265. * just assert for now until we have a way to recover.
  266. */
  267. if (!(__le32_to_cpu(rx_desc->attention.flags)
  268. & RX_ATTENTION_FLAGS_MSDU_DONE)) {
  269. __skb_queue_purge(amsdu);
  270. return -EIO;
  271. }
  272. msdu_len_invalid = !!(__le32_to_cpu(rx_desc->attention.flags)
  273. & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR |
  274. RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR));
  275. msdu_len = MS(__le32_to_cpu(rx_desc->msdu_start.common.info0),
  276. RX_MSDU_START_INFO0_MSDU_LENGTH);
  277. msdu_chained = rx_desc->frag_info.ring2_more_count;
  278. if (msdu_len_invalid)
  279. msdu_len = 0;
  280. skb_trim(msdu, 0);
  281. skb_put(msdu, min(msdu_len, HTT_RX_MSDU_SIZE));
  282. msdu_len -= msdu->len;
  283. /* Note: Chained buffers do not contain rx descriptor */
  284. while (msdu_chained--) {
  285. msdu = ath10k_htt_rx_netbuf_pop(htt);
  286. if (!msdu) {
  287. __skb_queue_purge(amsdu);
  288. return -ENOENT;
  289. }
  290. __skb_queue_tail(amsdu, msdu);
  291. skb_trim(msdu, 0);
  292. skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE));
  293. msdu_len -= msdu->len;
  294. msdu_chaining = 1;
  295. }
  296. last_msdu = __le32_to_cpu(rx_desc->msdu_end.common.info0) &
  297. RX_MSDU_END_INFO0_LAST_MSDU;
  298. trace_ath10k_htt_rx_desc(ar, &rx_desc->attention,
  299. sizeof(*rx_desc) - sizeof(u32));
  300. if (last_msdu)
  301. break;
  302. }
  303. if (skb_queue_empty(amsdu))
  304. msdu_chaining = -1;
  305. /*
  306. * Don't refill the ring yet.
  307. *
  308. * First, the elements popped here are still in use - it is not
  309. * safe to overwrite them until the matching call to
  310. * mpdu_desc_list_next. Second, for efficiency it is preferable to
  311. * refill the rx ring with 1 PPDU's worth of rx buffers (something
  312. * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers
  313. * (something like 3 buffers). Consequently, we'll rely on the txrx
  314. * SW to tell us when it is done pulling all the PPDU's rx buffers
  315. * out of the rx ring, and then refill it just once.
  316. */
  317. return msdu_chaining;
  318. }
  319. static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt,
  320. u32 paddr)
  321. {
  322. struct ath10k *ar = htt->ar;
  323. struct ath10k_skb_rxcb *rxcb;
  324. struct sk_buff *msdu;
  325. lockdep_assert_held(&htt->rx_ring.lock);
  326. msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr);
  327. if (!msdu)
  328. return NULL;
  329. rxcb = ATH10K_SKB_RXCB(msdu);
  330. hash_del(&rxcb->hlist);
  331. htt->rx_ring.fill_cnt--;
  332. dma_unmap_single(htt->ar->dev, rxcb->paddr,
  333. msdu->len + skb_tailroom(msdu),
  334. DMA_FROM_DEVICE);
  335. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ",
  336. msdu->data, msdu->len + skb_tailroom(msdu));
  337. return msdu;
  338. }
  339. static int ath10k_htt_rx_pop_paddr_list(struct ath10k_htt *htt,
  340. struct htt_rx_in_ord_ind *ev,
  341. struct sk_buff_head *list)
  342. {
  343. struct ath10k *ar = htt->ar;
  344. struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs;
  345. struct htt_rx_desc *rxd;
  346. struct sk_buff *msdu;
  347. int msdu_count;
  348. bool is_offload;
  349. u32 paddr;
  350. lockdep_assert_held(&htt->rx_ring.lock);
  351. msdu_count = __le16_to_cpu(ev->msdu_count);
  352. is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  353. while (msdu_count--) {
  354. paddr = __le32_to_cpu(msdu_desc->msdu_paddr);
  355. msdu = ath10k_htt_rx_pop_paddr(htt, paddr);
  356. if (!msdu) {
  357. __skb_queue_purge(list);
  358. return -ENOENT;
  359. }
  360. __skb_queue_tail(list, msdu);
  361. if (!is_offload) {
  362. rxd = (void *)msdu->data;
  363. trace_ath10k_htt_rx_desc(ar, rxd, sizeof(*rxd));
  364. skb_put(msdu, sizeof(*rxd));
  365. skb_pull(msdu, sizeof(*rxd));
  366. skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len));
  367. if (!(__le32_to_cpu(rxd->attention.flags) &
  368. RX_ATTENTION_FLAGS_MSDU_DONE)) {
  369. ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n");
  370. return -EIO;
  371. }
  372. }
  373. msdu_desc++;
  374. }
  375. return 0;
  376. }
  377. int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
  378. {
  379. struct ath10k *ar = htt->ar;
  380. dma_addr_t paddr;
  381. void *vaddr;
  382. size_t size;
  383. struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
  384. htt->rx_confused = false;
  385. /* XXX: The fill level could be changed during runtime in response to
  386. * the host processing latency. Is this really worth it?
  387. */
  388. htt->rx_ring.size = HTT_RX_RING_SIZE;
  389. htt->rx_ring.size_mask = htt->rx_ring.size - 1;
  390. htt->rx_ring.fill_level = HTT_RX_RING_FILL_LEVEL;
  391. if (!is_power_of_2(htt->rx_ring.size)) {
  392. ath10k_warn(ar, "htt rx ring size is not power of 2\n");
  393. return -EINVAL;
  394. }
  395. htt->rx_ring.netbufs_ring =
  396. kzalloc(htt->rx_ring.size * sizeof(struct sk_buff *),
  397. GFP_KERNEL);
  398. if (!htt->rx_ring.netbufs_ring)
  399. goto err_netbuf;
  400. size = htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring);
  401. vaddr = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL);
  402. if (!vaddr)
  403. goto err_dma_ring;
  404. htt->rx_ring.paddrs_ring = vaddr;
  405. htt->rx_ring.base_paddr = paddr;
  406. vaddr = dma_alloc_coherent(htt->ar->dev,
  407. sizeof(*htt->rx_ring.alloc_idx.vaddr),
  408. &paddr, GFP_KERNEL);
  409. if (!vaddr)
  410. goto err_dma_idx;
  411. htt->rx_ring.alloc_idx.vaddr = vaddr;
  412. htt->rx_ring.alloc_idx.paddr = paddr;
  413. htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask;
  414. *htt->rx_ring.alloc_idx.vaddr = 0;
  415. /* Initialize the Rx refill retry timer */
  416. setup_timer(timer, ath10k_htt_rx_ring_refill_retry, (unsigned long)htt);
  417. spin_lock_init(&htt->rx_ring.lock);
  418. htt->rx_ring.fill_cnt = 0;
  419. htt->rx_ring.sw_rd_idx.msdu_payld = 0;
  420. hash_init(htt->rx_ring.skb_table);
  421. skb_queue_head_init(&htt->rx_compl_q);
  422. skb_queue_head_init(&htt->rx_in_ord_compl_q);
  423. skb_queue_head_init(&htt->tx_fetch_ind_q);
  424. atomic_set(&htt->num_mpdus_ready, 0);
  425. tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
  426. (unsigned long)htt);
  427. ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
  428. htt->rx_ring.size, htt->rx_ring.fill_level);
  429. return 0;
  430. err_dma_idx:
  431. dma_free_coherent(htt->ar->dev,
  432. (htt->rx_ring.size *
  433. sizeof(htt->rx_ring.paddrs_ring)),
  434. htt->rx_ring.paddrs_ring,
  435. htt->rx_ring.base_paddr);
  436. err_dma_ring:
  437. kfree(htt->rx_ring.netbufs_ring);
  438. err_netbuf:
  439. return -ENOMEM;
  440. }
  441. static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
  442. enum htt_rx_mpdu_encrypt_type type)
  443. {
  444. switch (type) {
  445. case HTT_RX_MPDU_ENCRYPT_NONE:
  446. return 0;
  447. case HTT_RX_MPDU_ENCRYPT_WEP40:
  448. case HTT_RX_MPDU_ENCRYPT_WEP104:
  449. return IEEE80211_WEP_IV_LEN;
  450. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  451. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  452. return IEEE80211_TKIP_IV_LEN;
  453. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  454. return IEEE80211_CCMP_HDR_LEN;
  455. case HTT_RX_MPDU_ENCRYPT_WEP128:
  456. case HTT_RX_MPDU_ENCRYPT_WAPI:
  457. break;
  458. }
  459. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  460. return 0;
  461. }
  462. #define MICHAEL_MIC_LEN 8
  463. static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
  464. enum htt_rx_mpdu_encrypt_type type)
  465. {
  466. switch (type) {
  467. case HTT_RX_MPDU_ENCRYPT_NONE:
  468. return 0;
  469. case HTT_RX_MPDU_ENCRYPT_WEP40:
  470. case HTT_RX_MPDU_ENCRYPT_WEP104:
  471. return IEEE80211_WEP_ICV_LEN;
  472. case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC:
  473. case HTT_RX_MPDU_ENCRYPT_TKIP_WPA:
  474. return IEEE80211_TKIP_ICV_LEN;
  475. case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2:
  476. return IEEE80211_CCMP_MIC_LEN;
  477. case HTT_RX_MPDU_ENCRYPT_WEP128:
  478. case HTT_RX_MPDU_ENCRYPT_WAPI:
  479. break;
  480. }
  481. ath10k_warn(ar, "unsupported encryption type %d\n", type);
  482. return 0;
  483. }
  484. struct amsdu_subframe_hdr {
  485. u8 dst[ETH_ALEN];
  486. u8 src[ETH_ALEN];
  487. __be16 len;
  488. } __packed;
  489. #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63)
  490. static void ath10k_htt_rx_h_rates(struct ath10k *ar,
  491. struct ieee80211_rx_status *status,
  492. struct htt_rx_desc *rxd)
  493. {
  494. struct ieee80211_supported_band *sband;
  495. u8 cck, rate, bw, sgi, mcs, nss;
  496. u8 preamble = 0;
  497. u8 group_id;
  498. u32 info1, info2, info3;
  499. info1 = __le32_to_cpu(rxd->ppdu_start.info1);
  500. info2 = __le32_to_cpu(rxd->ppdu_start.info2);
  501. info3 = __le32_to_cpu(rxd->ppdu_start.info3);
  502. preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE);
  503. switch (preamble) {
  504. case HTT_RX_LEGACY:
  505. /* To get legacy rate index band is required. Since band can't
  506. * be undefined check if freq is non-zero.
  507. */
  508. if (!status->freq)
  509. return;
  510. cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT;
  511. rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE);
  512. rate &= ~RX_PPDU_START_RATE_FLAG;
  513. sband = &ar->mac.sbands[status->band];
  514. status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck);
  515. break;
  516. case HTT_RX_HT:
  517. case HTT_RX_HT_WITH_TXBF:
  518. /* HT-SIG - Table 20-11 in info2 and info3 */
  519. mcs = info2 & 0x1F;
  520. nss = mcs >> 3;
  521. bw = (info2 >> 7) & 1;
  522. sgi = (info3 >> 7) & 1;
  523. status->rate_idx = mcs;
  524. status->flag |= RX_FLAG_HT;
  525. if (sgi)
  526. status->flag |= RX_FLAG_SHORT_GI;
  527. if (bw)
  528. status->flag |= RX_FLAG_40MHZ;
  529. break;
  530. case HTT_RX_VHT:
  531. case HTT_RX_VHT_WITH_TXBF:
  532. /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3
  533. TODO check this */
  534. bw = info2 & 3;
  535. sgi = info3 & 1;
  536. group_id = (info2 >> 4) & 0x3F;
  537. if (GROUP_ID_IS_SU_MIMO(group_id)) {
  538. mcs = (info3 >> 4) & 0x0F;
  539. nss = ((info2 >> 10) & 0x07) + 1;
  540. } else {
  541. /* Hardware doesn't decode VHT-SIG-B into Rx descriptor
  542. * so it's impossible to decode MCS. Also since
  543. * firmware consumes Group Id Management frames host
  544. * has no knowledge regarding group/user position
  545. * mapping so it's impossible to pick the correct Nsts
  546. * from VHT-SIG-A1.
  547. *
  548. * Bandwidth and SGI are valid so report the rateinfo
  549. * on best-effort basis.
  550. */
  551. mcs = 0;
  552. nss = 1;
  553. }
  554. if (mcs > 0x09) {
  555. ath10k_warn(ar, "invalid MCS received %u\n", mcs);
  556. ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n",
  557. __le32_to_cpu(rxd->attention.flags),
  558. __le32_to_cpu(rxd->mpdu_start.info0),
  559. __le32_to_cpu(rxd->mpdu_start.info1),
  560. __le32_to_cpu(rxd->msdu_start.common.info0),
  561. __le32_to_cpu(rxd->msdu_start.common.info1),
  562. rxd->ppdu_start.info0,
  563. __le32_to_cpu(rxd->ppdu_start.info1),
  564. __le32_to_cpu(rxd->ppdu_start.info2),
  565. __le32_to_cpu(rxd->ppdu_start.info3),
  566. __le32_to_cpu(rxd->ppdu_start.info4));
  567. ath10k_warn(ar, "msdu end %08x mpdu end %08x\n",
  568. __le32_to_cpu(rxd->msdu_end.common.info0),
  569. __le32_to_cpu(rxd->mpdu_end.info0));
  570. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
  571. "rx desc msdu payload: ",
  572. rxd->msdu_payload, 50);
  573. }
  574. status->rate_idx = mcs;
  575. status->vht_nss = nss;
  576. if (sgi)
  577. status->flag |= RX_FLAG_SHORT_GI;
  578. switch (bw) {
  579. /* 20MHZ */
  580. case 0:
  581. break;
  582. /* 40MHZ */
  583. case 1:
  584. status->flag |= RX_FLAG_40MHZ;
  585. break;
  586. /* 80MHZ */
  587. case 2:
  588. status->vht_flag |= RX_VHT_FLAG_80MHZ;
  589. }
  590. status->flag |= RX_FLAG_VHT;
  591. break;
  592. default:
  593. break;
  594. }
  595. }
  596. static struct ieee80211_channel *
  597. ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd)
  598. {
  599. struct ath10k_peer *peer;
  600. struct ath10k_vif *arvif;
  601. struct cfg80211_chan_def def;
  602. u16 peer_id;
  603. lockdep_assert_held(&ar->data_lock);
  604. if (!rxd)
  605. return NULL;
  606. if (rxd->attention.flags &
  607. __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID))
  608. return NULL;
  609. if (!(rxd->msdu_end.common.info0 &
  610. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)))
  611. return NULL;
  612. peer_id = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  613. RX_MPDU_START_INFO0_PEER_IDX);
  614. peer = ath10k_peer_find_by_id(ar, peer_id);
  615. if (!peer)
  616. return NULL;
  617. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  618. if (WARN_ON_ONCE(!arvif))
  619. return NULL;
  620. if (ath10k_mac_vif_chan(arvif->vif, &def))
  621. return NULL;
  622. return def.chan;
  623. }
  624. static struct ieee80211_channel *
  625. ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id)
  626. {
  627. struct ath10k_vif *arvif;
  628. struct cfg80211_chan_def def;
  629. lockdep_assert_held(&ar->data_lock);
  630. list_for_each_entry(arvif, &ar->arvifs, list) {
  631. if (arvif->vdev_id == vdev_id &&
  632. ath10k_mac_vif_chan(arvif->vif, &def) == 0)
  633. return def.chan;
  634. }
  635. return NULL;
  636. }
  637. static void
  638. ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw,
  639. struct ieee80211_chanctx_conf *conf,
  640. void *data)
  641. {
  642. struct cfg80211_chan_def *def = data;
  643. *def = conf->def;
  644. }
  645. static struct ieee80211_channel *
  646. ath10k_htt_rx_h_any_channel(struct ath10k *ar)
  647. {
  648. struct cfg80211_chan_def def = {};
  649. ieee80211_iter_chan_contexts_atomic(ar->hw,
  650. ath10k_htt_rx_h_any_chan_iter,
  651. &def);
  652. return def.chan;
  653. }
  654. static bool ath10k_htt_rx_h_channel(struct ath10k *ar,
  655. struct ieee80211_rx_status *status,
  656. struct htt_rx_desc *rxd,
  657. u32 vdev_id)
  658. {
  659. struct ieee80211_channel *ch;
  660. spin_lock_bh(&ar->data_lock);
  661. ch = ar->scan_channel;
  662. if (!ch)
  663. ch = ar->rx_channel;
  664. if (!ch)
  665. ch = ath10k_htt_rx_h_peer_channel(ar, rxd);
  666. if (!ch)
  667. ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id);
  668. if (!ch)
  669. ch = ath10k_htt_rx_h_any_channel(ar);
  670. if (!ch)
  671. ch = ar->tgt_oper_chan;
  672. spin_unlock_bh(&ar->data_lock);
  673. if (!ch)
  674. return false;
  675. status->band = ch->band;
  676. status->freq = ch->center_freq;
  677. return true;
  678. }
  679. static void ath10k_htt_rx_h_signal(struct ath10k *ar,
  680. struct ieee80211_rx_status *status,
  681. struct htt_rx_desc *rxd)
  682. {
  683. /* FIXME: Get real NF */
  684. status->signal = ATH10K_DEFAULT_NOISE_FLOOR +
  685. rxd->ppdu_start.rssi_comb;
  686. status->flag &= ~RX_FLAG_NO_SIGNAL_VAL;
  687. }
  688. static void ath10k_htt_rx_h_mactime(struct ath10k *ar,
  689. struct ieee80211_rx_status *status,
  690. struct htt_rx_desc *rxd)
  691. {
  692. /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This
  693. * means all prior MSDUs in a PPDU are reported to mac80211 without the
  694. * TSF. Is it worth holding frames until end of PPDU is known?
  695. *
  696. * FIXME: Can we get/compute 64bit TSF?
  697. */
  698. status->mactime = __le32_to_cpu(rxd->ppdu_end.common.tsf_timestamp);
  699. status->flag |= RX_FLAG_MACTIME_END;
  700. }
  701. static void ath10k_htt_rx_h_ppdu(struct ath10k *ar,
  702. struct sk_buff_head *amsdu,
  703. struct ieee80211_rx_status *status,
  704. u32 vdev_id)
  705. {
  706. struct sk_buff *first;
  707. struct htt_rx_desc *rxd;
  708. bool is_first_ppdu;
  709. bool is_last_ppdu;
  710. if (skb_queue_empty(amsdu))
  711. return;
  712. first = skb_peek(amsdu);
  713. rxd = (void *)first->data - sizeof(*rxd);
  714. is_first_ppdu = !!(rxd->attention.flags &
  715. __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU));
  716. is_last_ppdu = !!(rxd->attention.flags &
  717. __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU));
  718. if (is_first_ppdu) {
  719. /* New PPDU starts so clear out the old per-PPDU status. */
  720. status->freq = 0;
  721. status->rate_idx = 0;
  722. status->vht_nss = 0;
  723. status->vht_flag &= ~RX_VHT_FLAG_80MHZ;
  724. status->flag &= ~(RX_FLAG_HT |
  725. RX_FLAG_VHT |
  726. RX_FLAG_SHORT_GI |
  727. RX_FLAG_40MHZ |
  728. RX_FLAG_MACTIME_END);
  729. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  730. ath10k_htt_rx_h_signal(ar, status, rxd);
  731. ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id);
  732. ath10k_htt_rx_h_rates(ar, status, rxd);
  733. }
  734. if (is_last_ppdu)
  735. ath10k_htt_rx_h_mactime(ar, status, rxd);
  736. }
  737. static const char * const tid_to_ac[] = {
  738. "BE",
  739. "BK",
  740. "BK",
  741. "BE",
  742. "VI",
  743. "VI",
  744. "VO",
  745. "VO",
  746. };
  747. static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size)
  748. {
  749. u8 *qc;
  750. int tid;
  751. if (!ieee80211_is_data_qos(hdr->frame_control))
  752. return "";
  753. qc = ieee80211_get_qos_ctl(hdr);
  754. tid = *qc & IEEE80211_QOS_CTL_TID_MASK;
  755. if (tid < 8)
  756. snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]);
  757. else
  758. snprintf(out, size, "tid %d", tid);
  759. return out;
  760. }
  761. static void ath10k_process_rx(struct ath10k *ar,
  762. struct ieee80211_rx_status *rx_status,
  763. struct sk_buff *skb)
  764. {
  765. struct ieee80211_rx_status *status;
  766. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  767. char tid[32];
  768. status = IEEE80211_SKB_RXCB(skb);
  769. *status = *rx_status;
  770. ath10k_dbg(ar, ATH10K_DBG_DATA,
  771. "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%llx fcs-err %i mic-err %i amsdu-more %i\n",
  772. skb,
  773. skb->len,
  774. ieee80211_get_SA(hdr),
  775. ath10k_get_tid(hdr, tid, sizeof(tid)),
  776. is_multicast_ether_addr(ieee80211_get_DA(hdr)) ?
  777. "mcast" : "ucast",
  778. (__le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4,
  779. (status->flag & (RX_FLAG_HT | RX_FLAG_VHT)) == 0 ?
  780. "legacy" : "",
  781. status->flag & RX_FLAG_HT ? "ht" : "",
  782. status->flag & RX_FLAG_VHT ? "vht" : "",
  783. status->flag & RX_FLAG_40MHZ ? "40" : "",
  784. status->vht_flag & RX_VHT_FLAG_80MHZ ? "80" : "",
  785. status->flag & RX_FLAG_SHORT_GI ? "sgi " : "",
  786. status->rate_idx,
  787. status->vht_nss,
  788. status->freq,
  789. status->band, status->flag,
  790. !!(status->flag & RX_FLAG_FAILED_FCS_CRC),
  791. !!(status->flag & RX_FLAG_MMIC_ERROR),
  792. !!(status->flag & RX_FLAG_AMSDU_MORE));
  793. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
  794. skb->data, skb->len);
  795. trace_ath10k_rx_hdr(ar, skb->data, skb->len);
  796. trace_ath10k_rx_payload(ar, skb->data, skb->len);
  797. ieee80211_rx(ar->hw, skb);
  798. }
  799. static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar,
  800. struct ieee80211_hdr *hdr)
  801. {
  802. int len = ieee80211_hdrlen(hdr->frame_control);
  803. if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
  804. ar->running_fw->fw_file.fw_features))
  805. len = round_up(len, 4);
  806. return len;
  807. }
  808. static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar,
  809. struct sk_buff *msdu,
  810. struct ieee80211_rx_status *status,
  811. enum htt_rx_mpdu_encrypt_type enctype,
  812. bool is_decrypted)
  813. {
  814. struct ieee80211_hdr *hdr;
  815. struct htt_rx_desc *rxd;
  816. size_t hdr_len;
  817. size_t crypto_len;
  818. bool is_first;
  819. bool is_last;
  820. rxd = (void *)msdu->data - sizeof(*rxd);
  821. is_first = !!(rxd->msdu_end.common.info0 &
  822. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  823. is_last = !!(rxd->msdu_end.common.info0 &
  824. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  825. /* Delivered decapped frame:
  826. * [802.11 header]
  827. * [crypto param] <-- can be trimmed if !fcs_err &&
  828. * !decrypt_err && !peer_idx_invalid
  829. * [amsdu header] <-- only if A-MSDU
  830. * [rfc1042/llc]
  831. * [payload]
  832. * [FCS] <-- at end, needs to be trimmed
  833. */
  834. /* This probably shouldn't happen but warn just in case */
  835. if (unlikely(WARN_ON_ONCE(!is_first)))
  836. return;
  837. /* This probably shouldn't happen but warn just in case */
  838. if (unlikely(WARN_ON_ONCE(!(is_first && is_last))))
  839. return;
  840. skb_trim(msdu, msdu->len - FCS_LEN);
  841. /* In most cases this will be true for sniffed frames. It makes sense
  842. * to deliver them as-is without stripping the crypto param. This is
  843. * necessary for software based decryption.
  844. *
  845. * If there's no error then the frame is decrypted. At least that is
  846. * the case for frames that come in via fragmented rx indication.
  847. */
  848. if (!is_decrypted)
  849. return;
  850. /* The payload is decrypted so strip crypto params. Start from tail
  851. * since hdr is used to compute some stuff.
  852. */
  853. hdr = (void *)msdu->data;
  854. /* Tail */
  855. if (status->flag & RX_FLAG_IV_STRIPPED)
  856. skb_trim(msdu, msdu->len -
  857. ath10k_htt_rx_crypto_tail_len(ar, enctype));
  858. /* MMIC */
  859. if ((status->flag & RX_FLAG_MMIC_STRIPPED) &&
  860. !ieee80211_has_morefrags(hdr->frame_control) &&
  861. enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA)
  862. skb_trim(msdu, msdu->len - 8);
  863. /* Head */
  864. if (status->flag & RX_FLAG_IV_STRIPPED) {
  865. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  866. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  867. memmove((void *)msdu->data + crypto_len,
  868. (void *)msdu->data, hdr_len);
  869. skb_pull(msdu, crypto_len);
  870. }
  871. }
  872. static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar,
  873. struct sk_buff *msdu,
  874. struct ieee80211_rx_status *status,
  875. const u8 first_hdr[64])
  876. {
  877. struct ieee80211_hdr *hdr;
  878. size_t hdr_len;
  879. u8 da[ETH_ALEN];
  880. u8 sa[ETH_ALEN];
  881. /* Delivered decapped frame:
  882. * [nwifi 802.11 header] <-- replaced with 802.11 hdr
  883. * [rfc1042/llc]
  884. *
  885. * Note: The nwifi header doesn't have QoS Control and is
  886. * (always?) a 3addr frame.
  887. *
  888. * Note2: There's no A-MSDU subframe header. Even if it's part
  889. * of an A-MSDU.
  890. */
  891. /* pull decapped header and copy SA & DA */
  892. if ((ar->hw_params.hw_4addr_pad == ATH10K_HW_4ADDR_PAD_BEFORE) &&
  893. ieee80211_has_a4(((struct ieee80211_hdr *)first_hdr)->frame_control)) {
  894. /* The QCA99X0 4 address mode pad 2 bytes at the
  895. * beginning of MSDU
  896. */
  897. hdr = (struct ieee80211_hdr *)(msdu->data + 2);
  898. /* The skb length need be extended 2 as the 2 bytes at the tail
  899. * be excluded due to the padding
  900. */
  901. skb_put(msdu, 2);
  902. } else {
  903. hdr = (struct ieee80211_hdr *)(msdu->data);
  904. }
  905. hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr);
  906. ether_addr_copy(da, ieee80211_get_DA(hdr));
  907. ether_addr_copy(sa, ieee80211_get_SA(hdr));
  908. skb_pull(msdu, hdr_len);
  909. /* push original 802.11 header */
  910. hdr = (struct ieee80211_hdr *)first_hdr;
  911. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  912. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  913. /* original 802.11 header has a different DA and in
  914. * case of 4addr it may also have different SA
  915. */
  916. hdr = (struct ieee80211_hdr *)msdu->data;
  917. ether_addr_copy(ieee80211_get_DA(hdr), da);
  918. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  919. }
  920. static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar,
  921. struct sk_buff *msdu,
  922. enum htt_rx_mpdu_encrypt_type enctype)
  923. {
  924. struct ieee80211_hdr *hdr;
  925. struct htt_rx_desc *rxd;
  926. size_t hdr_len, crypto_len;
  927. void *rfc1042;
  928. bool is_first, is_last, is_amsdu;
  929. rxd = (void *)msdu->data - sizeof(*rxd);
  930. hdr = (void *)rxd->rx_hdr_status;
  931. is_first = !!(rxd->msdu_end.common.info0 &
  932. __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU));
  933. is_last = !!(rxd->msdu_end.common.info0 &
  934. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU));
  935. is_amsdu = !(is_first && is_last);
  936. rfc1042 = hdr;
  937. if (is_first) {
  938. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  939. crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype);
  940. rfc1042 += round_up(hdr_len, 4) +
  941. round_up(crypto_len, 4);
  942. }
  943. if (is_amsdu)
  944. rfc1042 += sizeof(struct amsdu_subframe_hdr);
  945. return rfc1042;
  946. }
  947. static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar,
  948. struct sk_buff *msdu,
  949. struct ieee80211_rx_status *status,
  950. const u8 first_hdr[64],
  951. enum htt_rx_mpdu_encrypt_type enctype)
  952. {
  953. struct ieee80211_hdr *hdr;
  954. struct ethhdr *eth;
  955. size_t hdr_len;
  956. void *rfc1042;
  957. u8 da[ETH_ALEN];
  958. u8 sa[ETH_ALEN];
  959. /* Delivered decapped frame:
  960. * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc
  961. * [payload]
  962. */
  963. rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype);
  964. if (WARN_ON_ONCE(!rfc1042))
  965. return;
  966. /* pull decapped header and copy SA & DA */
  967. eth = (struct ethhdr *)msdu->data;
  968. ether_addr_copy(da, eth->h_dest);
  969. ether_addr_copy(sa, eth->h_source);
  970. skb_pull(msdu, sizeof(struct ethhdr));
  971. /* push rfc1042/llc/snap */
  972. memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042,
  973. sizeof(struct rfc1042_hdr));
  974. /* push original 802.11 header */
  975. hdr = (struct ieee80211_hdr *)first_hdr;
  976. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  977. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  978. /* original 802.11 header has a different DA and in
  979. * case of 4addr it may also have different SA
  980. */
  981. hdr = (struct ieee80211_hdr *)msdu->data;
  982. ether_addr_copy(ieee80211_get_DA(hdr), da);
  983. ether_addr_copy(ieee80211_get_SA(hdr), sa);
  984. }
  985. static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar,
  986. struct sk_buff *msdu,
  987. struct ieee80211_rx_status *status,
  988. const u8 first_hdr[64])
  989. {
  990. struct ieee80211_hdr *hdr;
  991. size_t hdr_len;
  992. /* Delivered decapped frame:
  993. * [amsdu header] <-- replaced with 802.11 hdr
  994. * [rfc1042/llc]
  995. * [payload]
  996. */
  997. skb_pull(msdu, sizeof(struct amsdu_subframe_hdr));
  998. hdr = (struct ieee80211_hdr *)first_hdr;
  999. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1000. memcpy(skb_push(msdu, hdr_len), hdr, hdr_len);
  1001. }
  1002. static void ath10k_htt_rx_h_undecap(struct ath10k *ar,
  1003. struct sk_buff *msdu,
  1004. struct ieee80211_rx_status *status,
  1005. u8 first_hdr[64],
  1006. enum htt_rx_mpdu_encrypt_type enctype,
  1007. bool is_decrypted)
  1008. {
  1009. struct htt_rx_desc *rxd;
  1010. enum rx_msdu_decap_format decap;
  1011. /* First msdu's decapped header:
  1012. * [802.11 header] <-- padded to 4 bytes long
  1013. * [crypto param] <-- padded to 4 bytes long
  1014. * [amsdu header] <-- only if A-MSDU
  1015. * [rfc1042/llc]
  1016. *
  1017. * Other (2nd, 3rd, ..) msdu's decapped header:
  1018. * [amsdu header] <-- only if A-MSDU
  1019. * [rfc1042/llc]
  1020. */
  1021. rxd = (void *)msdu->data - sizeof(*rxd);
  1022. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1023. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1024. switch (decap) {
  1025. case RX_MSDU_DECAP_RAW:
  1026. ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype,
  1027. is_decrypted);
  1028. break;
  1029. case RX_MSDU_DECAP_NATIVE_WIFI:
  1030. ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr);
  1031. break;
  1032. case RX_MSDU_DECAP_ETHERNET2_DIX:
  1033. ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype);
  1034. break;
  1035. case RX_MSDU_DECAP_8023_SNAP_LLC:
  1036. ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr);
  1037. break;
  1038. }
  1039. }
  1040. static int ath10k_htt_rx_get_csum_state(struct sk_buff *skb)
  1041. {
  1042. struct htt_rx_desc *rxd;
  1043. u32 flags, info;
  1044. bool is_ip4, is_ip6;
  1045. bool is_tcp, is_udp;
  1046. bool ip_csum_ok, tcpudp_csum_ok;
  1047. rxd = (void *)skb->data - sizeof(*rxd);
  1048. flags = __le32_to_cpu(rxd->attention.flags);
  1049. info = __le32_to_cpu(rxd->msdu_start.common.info1);
  1050. is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO);
  1051. is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO);
  1052. is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO);
  1053. is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO);
  1054. ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL);
  1055. tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL);
  1056. if (!is_ip4 && !is_ip6)
  1057. return CHECKSUM_NONE;
  1058. if (!is_tcp && !is_udp)
  1059. return CHECKSUM_NONE;
  1060. if (!ip_csum_ok)
  1061. return CHECKSUM_NONE;
  1062. if (!tcpudp_csum_ok)
  1063. return CHECKSUM_NONE;
  1064. return CHECKSUM_UNNECESSARY;
  1065. }
  1066. static void ath10k_htt_rx_h_csum_offload(struct sk_buff *msdu)
  1067. {
  1068. msdu->ip_summed = ath10k_htt_rx_get_csum_state(msdu);
  1069. }
  1070. static void ath10k_htt_rx_h_mpdu(struct ath10k *ar,
  1071. struct sk_buff_head *amsdu,
  1072. struct ieee80211_rx_status *status)
  1073. {
  1074. struct sk_buff *first;
  1075. struct sk_buff *last;
  1076. struct sk_buff *msdu;
  1077. struct htt_rx_desc *rxd;
  1078. struct ieee80211_hdr *hdr;
  1079. enum htt_rx_mpdu_encrypt_type enctype;
  1080. u8 first_hdr[64];
  1081. u8 *qos;
  1082. size_t hdr_len;
  1083. bool has_fcs_err;
  1084. bool has_crypto_err;
  1085. bool has_tkip_err;
  1086. bool has_peer_idx_invalid;
  1087. bool is_decrypted;
  1088. bool is_mgmt;
  1089. u32 attention;
  1090. if (skb_queue_empty(amsdu))
  1091. return;
  1092. first = skb_peek(amsdu);
  1093. rxd = (void *)first->data - sizeof(*rxd);
  1094. is_mgmt = !!(rxd->attention.flags &
  1095. __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE));
  1096. enctype = MS(__le32_to_cpu(rxd->mpdu_start.info0),
  1097. RX_MPDU_START_INFO0_ENCRYPT_TYPE);
  1098. /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11
  1099. * decapped header. It'll be used for undecapping of each MSDU.
  1100. */
  1101. hdr = (void *)rxd->rx_hdr_status;
  1102. hdr_len = ieee80211_hdrlen(hdr->frame_control);
  1103. memcpy(first_hdr, hdr, hdr_len);
  1104. /* Each A-MSDU subframe will use the original header as the base and be
  1105. * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl.
  1106. */
  1107. hdr = (void *)first_hdr;
  1108. qos = ieee80211_get_qos_ctl(hdr);
  1109. qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT;
  1110. /* Some attention flags are valid only in the last MSDU. */
  1111. last = skb_peek_tail(amsdu);
  1112. rxd = (void *)last->data - sizeof(*rxd);
  1113. attention = __le32_to_cpu(rxd->attention.flags);
  1114. has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR);
  1115. has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR);
  1116. has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR);
  1117. has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID);
  1118. /* Note: If hardware captures an encrypted frame that it can't decrypt,
  1119. * e.g. due to fcs error, missing peer or invalid key data it will
  1120. * report the frame as raw.
  1121. */
  1122. is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE &&
  1123. !has_fcs_err &&
  1124. !has_crypto_err &&
  1125. !has_peer_idx_invalid);
  1126. /* Clear per-MPDU flags while leaving per-PPDU flags intact. */
  1127. status->flag &= ~(RX_FLAG_FAILED_FCS_CRC |
  1128. RX_FLAG_MMIC_ERROR |
  1129. RX_FLAG_DECRYPTED |
  1130. RX_FLAG_IV_STRIPPED |
  1131. RX_FLAG_ONLY_MONITOR |
  1132. RX_FLAG_MMIC_STRIPPED);
  1133. if (has_fcs_err)
  1134. status->flag |= RX_FLAG_FAILED_FCS_CRC;
  1135. if (has_tkip_err)
  1136. status->flag |= RX_FLAG_MMIC_ERROR;
  1137. /* Firmware reports all necessary management frames via WMI already.
  1138. * They are not reported to monitor interfaces at all so pass the ones
  1139. * coming via HTT to monitor interfaces instead. This simplifies
  1140. * matters a lot.
  1141. */
  1142. if (is_mgmt)
  1143. status->flag |= RX_FLAG_ONLY_MONITOR;
  1144. if (is_decrypted) {
  1145. status->flag |= RX_FLAG_DECRYPTED;
  1146. if (likely(!is_mgmt))
  1147. status->flag |= RX_FLAG_IV_STRIPPED |
  1148. RX_FLAG_MMIC_STRIPPED;
  1149. }
  1150. skb_queue_walk(amsdu, msdu) {
  1151. ath10k_htt_rx_h_csum_offload(msdu);
  1152. ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype,
  1153. is_decrypted);
  1154. /* Undecapping involves copying the original 802.11 header back
  1155. * to sk_buff. If frame is protected and hardware has decrypted
  1156. * it then remove the protected bit.
  1157. */
  1158. if (!is_decrypted)
  1159. continue;
  1160. if (is_mgmt)
  1161. continue;
  1162. hdr = (void *)msdu->data;
  1163. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1164. }
  1165. }
  1166. static void ath10k_htt_rx_h_deliver(struct ath10k *ar,
  1167. struct sk_buff_head *amsdu,
  1168. struct ieee80211_rx_status *status)
  1169. {
  1170. struct sk_buff *msdu;
  1171. while ((msdu = __skb_dequeue(amsdu))) {
  1172. /* Setup per-MSDU flags */
  1173. if (skb_queue_empty(amsdu))
  1174. status->flag &= ~RX_FLAG_AMSDU_MORE;
  1175. else
  1176. status->flag |= RX_FLAG_AMSDU_MORE;
  1177. ath10k_process_rx(ar, status, msdu);
  1178. }
  1179. }
  1180. static int ath10k_unchain_msdu(struct sk_buff_head *amsdu)
  1181. {
  1182. struct sk_buff *skb, *first;
  1183. int space;
  1184. int total_len = 0;
  1185. /* TODO: Might could optimize this by using
  1186. * skb_try_coalesce or similar method to
  1187. * decrease copying, or maybe get mac80211 to
  1188. * provide a way to just receive a list of
  1189. * skb?
  1190. */
  1191. first = __skb_dequeue(amsdu);
  1192. /* Allocate total length all at once. */
  1193. skb_queue_walk(amsdu, skb)
  1194. total_len += skb->len;
  1195. space = total_len - skb_tailroom(first);
  1196. if ((space > 0) &&
  1197. (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) {
  1198. /* TODO: bump some rx-oom error stat */
  1199. /* put it back together so we can free the
  1200. * whole list at once.
  1201. */
  1202. __skb_queue_head(amsdu, first);
  1203. return -1;
  1204. }
  1205. /* Walk list again, copying contents into
  1206. * msdu_head
  1207. */
  1208. while ((skb = __skb_dequeue(amsdu))) {
  1209. skb_copy_from_linear_data(skb, skb_put(first, skb->len),
  1210. skb->len);
  1211. dev_kfree_skb_any(skb);
  1212. }
  1213. __skb_queue_head(amsdu, first);
  1214. return 0;
  1215. }
  1216. static void ath10k_htt_rx_h_unchain(struct ath10k *ar,
  1217. struct sk_buff_head *amsdu,
  1218. bool chained)
  1219. {
  1220. struct sk_buff *first;
  1221. struct htt_rx_desc *rxd;
  1222. enum rx_msdu_decap_format decap;
  1223. first = skb_peek(amsdu);
  1224. rxd = (void *)first->data - sizeof(*rxd);
  1225. decap = MS(__le32_to_cpu(rxd->msdu_start.common.info1),
  1226. RX_MSDU_START_INFO1_DECAP_FORMAT);
  1227. if (!chained)
  1228. return;
  1229. /* FIXME: Current unchaining logic can only handle simple case of raw
  1230. * msdu chaining. If decapping is other than raw the chaining may be
  1231. * more complex and this isn't handled by the current code. Don't even
  1232. * try re-constructing such frames - it'll be pretty much garbage.
  1233. */
  1234. if (decap != RX_MSDU_DECAP_RAW ||
  1235. skb_queue_len(amsdu) != 1 + rxd->frag_info.ring2_more_count) {
  1236. __skb_queue_purge(amsdu);
  1237. return;
  1238. }
  1239. ath10k_unchain_msdu(amsdu);
  1240. }
  1241. static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar,
  1242. struct sk_buff_head *amsdu,
  1243. struct ieee80211_rx_status *rx_status)
  1244. {
  1245. /* FIXME: It might be a good idea to do some fuzzy-testing to drop
  1246. * invalid/dangerous frames.
  1247. */
  1248. if (!rx_status->freq) {
  1249. ath10k_warn(ar, "no channel configured; ignoring frame(s)!\n");
  1250. return false;
  1251. }
  1252. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  1253. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n");
  1254. return false;
  1255. }
  1256. return true;
  1257. }
  1258. static void ath10k_htt_rx_h_filter(struct ath10k *ar,
  1259. struct sk_buff_head *amsdu,
  1260. struct ieee80211_rx_status *rx_status)
  1261. {
  1262. if (skb_queue_empty(amsdu))
  1263. return;
  1264. if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status))
  1265. return;
  1266. __skb_queue_purge(amsdu);
  1267. }
  1268. static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt)
  1269. {
  1270. struct ath10k *ar = htt->ar;
  1271. static struct ieee80211_rx_status rx_status;
  1272. struct sk_buff_head amsdu;
  1273. int ret;
  1274. __skb_queue_head_init(&amsdu);
  1275. spin_lock_bh(&htt->rx_ring.lock);
  1276. if (htt->rx_confused) {
  1277. spin_unlock_bh(&htt->rx_ring.lock);
  1278. return -EIO;
  1279. }
  1280. ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu);
  1281. spin_unlock_bh(&htt->rx_ring.lock);
  1282. if (ret < 0) {
  1283. ath10k_warn(ar, "rx ring became corrupted: %d\n", ret);
  1284. __skb_queue_purge(&amsdu);
  1285. /* FIXME: It's probably a good idea to reboot the
  1286. * device instead of leaving it inoperable.
  1287. */
  1288. htt->rx_confused = true;
  1289. return ret;
  1290. }
  1291. ath10k_htt_rx_h_ppdu(ar, &amsdu, &rx_status, 0xffff);
  1292. ath10k_htt_rx_h_unchain(ar, &amsdu, ret > 0);
  1293. ath10k_htt_rx_h_filter(ar, &amsdu, &rx_status);
  1294. ath10k_htt_rx_h_mpdu(ar, &amsdu, &rx_status);
  1295. ath10k_htt_rx_h_deliver(ar, &amsdu, &rx_status);
  1296. return 0;
  1297. }
  1298. static void ath10k_htt_rx_proc_rx_ind(struct ath10k_htt *htt,
  1299. struct htt_rx_indication *rx)
  1300. {
  1301. struct ath10k *ar = htt->ar;
  1302. struct htt_rx_indication_mpdu_range *mpdu_ranges;
  1303. int num_mpdu_ranges;
  1304. int i, mpdu_count = 0;
  1305. num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1),
  1306. HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES);
  1307. mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx);
  1308. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
  1309. rx, sizeof(*rx) +
  1310. (sizeof(struct htt_rx_indication_mpdu_range) *
  1311. num_mpdu_ranges));
  1312. for (i = 0; i < num_mpdu_ranges; i++)
  1313. mpdu_count += mpdu_ranges[i].mpdu_count;
  1314. atomic_add(mpdu_count, &htt->num_mpdus_ready);
  1315. tasklet_schedule(&htt->txrx_compl_task);
  1316. }
  1317. static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt)
  1318. {
  1319. atomic_inc(&htt->num_mpdus_ready);
  1320. tasklet_schedule(&htt->txrx_compl_task);
  1321. }
  1322. static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar,
  1323. struct sk_buff *skb)
  1324. {
  1325. struct ath10k_htt *htt = &ar->htt;
  1326. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1327. struct htt_tx_done tx_done = {};
  1328. int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS);
  1329. __le16 msdu_id;
  1330. int i;
  1331. switch (status) {
  1332. case HTT_DATA_TX_STATUS_NO_ACK:
  1333. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1334. break;
  1335. case HTT_DATA_TX_STATUS_OK:
  1336. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1337. break;
  1338. case HTT_DATA_TX_STATUS_DISCARD:
  1339. case HTT_DATA_TX_STATUS_POSTPONE:
  1340. case HTT_DATA_TX_STATUS_DOWNLOAD_FAIL:
  1341. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1342. break;
  1343. default:
  1344. ath10k_warn(ar, "unhandled tx completion status %d\n", status);
  1345. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1346. break;
  1347. }
  1348. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
  1349. resp->data_tx_completion.num_msdus);
  1350. for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
  1351. msdu_id = resp->data_tx_completion.msdus[i];
  1352. tx_done.msdu_id = __le16_to_cpu(msdu_id);
  1353. /* kfifo_put: In practice firmware shouldn't fire off per-CE
  1354. * interrupt and main interrupt (MSI/-X range case) for the same
  1355. * HTC service so it should be safe to use kfifo_put w/o lock.
  1356. *
  1357. * From kfifo_put() documentation:
  1358. * Note that with only one concurrent reader and one concurrent
  1359. * writer, you don't need extra locking to use these macro.
  1360. */
  1361. if (!kfifo_put(&htt->txdone_fifo, tx_done)) {
  1362. ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n",
  1363. tx_done.msdu_id, tx_done.status);
  1364. ath10k_txrx_tx_unref(htt, &tx_done);
  1365. }
  1366. }
  1367. }
  1368. static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
  1369. {
  1370. struct htt_rx_addba *ev = &resp->rx_addba;
  1371. struct ath10k_peer *peer;
  1372. struct ath10k_vif *arvif;
  1373. u16 info0, tid, peer_id;
  1374. info0 = __le16_to_cpu(ev->info0);
  1375. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1376. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1377. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1378. "htt rx addba tid %hu peer_id %hu size %hhu\n",
  1379. tid, peer_id, ev->window_size);
  1380. spin_lock_bh(&ar->data_lock);
  1381. peer = ath10k_peer_find_by_id(ar, peer_id);
  1382. if (!peer) {
  1383. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1384. peer_id);
  1385. spin_unlock_bh(&ar->data_lock);
  1386. return;
  1387. }
  1388. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1389. if (!arvif) {
  1390. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1391. peer->vdev_id);
  1392. spin_unlock_bh(&ar->data_lock);
  1393. return;
  1394. }
  1395. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1396. "htt rx start rx ba session sta %pM tid %hu size %hhu\n",
  1397. peer->addr, tid, ev->window_size);
  1398. ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1399. spin_unlock_bh(&ar->data_lock);
  1400. }
  1401. static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
  1402. {
  1403. struct htt_rx_delba *ev = &resp->rx_delba;
  1404. struct ath10k_peer *peer;
  1405. struct ath10k_vif *arvif;
  1406. u16 info0, tid, peer_id;
  1407. info0 = __le16_to_cpu(ev->info0);
  1408. tid = MS(info0, HTT_RX_BA_INFO0_TID);
  1409. peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
  1410. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1411. "htt rx delba tid %hu peer_id %hu\n",
  1412. tid, peer_id);
  1413. spin_lock_bh(&ar->data_lock);
  1414. peer = ath10k_peer_find_by_id(ar, peer_id);
  1415. if (!peer) {
  1416. ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
  1417. peer_id);
  1418. spin_unlock_bh(&ar->data_lock);
  1419. return;
  1420. }
  1421. arvif = ath10k_get_arvif(ar, peer->vdev_id);
  1422. if (!arvif) {
  1423. ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
  1424. peer->vdev_id);
  1425. spin_unlock_bh(&ar->data_lock);
  1426. return;
  1427. }
  1428. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1429. "htt rx stop rx ba session sta %pM tid %hu\n",
  1430. peer->addr, tid);
  1431. ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid);
  1432. spin_unlock_bh(&ar->data_lock);
  1433. }
  1434. static int ath10k_htt_rx_extract_amsdu(struct sk_buff_head *list,
  1435. struct sk_buff_head *amsdu)
  1436. {
  1437. struct sk_buff *msdu;
  1438. struct htt_rx_desc *rxd;
  1439. if (skb_queue_empty(list))
  1440. return -ENOBUFS;
  1441. if (WARN_ON(!skb_queue_empty(amsdu)))
  1442. return -EINVAL;
  1443. while ((msdu = __skb_dequeue(list))) {
  1444. __skb_queue_tail(amsdu, msdu);
  1445. rxd = (void *)msdu->data - sizeof(*rxd);
  1446. if (rxd->msdu_end.common.info0 &
  1447. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))
  1448. break;
  1449. }
  1450. msdu = skb_peek_tail(amsdu);
  1451. rxd = (void *)msdu->data - sizeof(*rxd);
  1452. if (!(rxd->msdu_end.common.info0 &
  1453. __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) {
  1454. skb_queue_splice_init(amsdu, list);
  1455. return -EAGAIN;
  1456. }
  1457. return 0;
  1458. }
  1459. static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status,
  1460. struct sk_buff *skb)
  1461. {
  1462. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1463. if (!ieee80211_has_protected(hdr->frame_control))
  1464. return;
  1465. /* Offloaded frames are already decrypted but firmware insists they are
  1466. * protected in the 802.11 header. Strip the flag. Otherwise mac80211
  1467. * will drop the frame.
  1468. */
  1469. hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED);
  1470. status->flag |= RX_FLAG_DECRYPTED |
  1471. RX_FLAG_IV_STRIPPED |
  1472. RX_FLAG_MMIC_STRIPPED;
  1473. }
  1474. static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar,
  1475. struct sk_buff_head *list)
  1476. {
  1477. struct ath10k_htt *htt = &ar->htt;
  1478. struct ieee80211_rx_status *status = &htt->rx_status;
  1479. struct htt_rx_offload_msdu *rx;
  1480. struct sk_buff *msdu;
  1481. size_t offset;
  1482. while ((msdu = __skb_dequeue(list))) {
  1483. /* Offloaded frames don't have Rx descriptor. Instead they have
  1484. * a short meta information header.
  1485. */
  1486. rx = (void *)msdu->data;
  1487. skb_put(msdu, sizeof(*rx));
  1488. skb_pull(msdu, sizeof(*rx));
  1489. if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) {
  1490. ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n");
  1491. dev_kfree_skb_any(msdu);
  1492. continue;
  1493. }
  1494. skb_put(msdu, __le16_to_cpu(rx->msdu_len));
  1495. /* Offloaded rx header length isn't multiple of 2 nor 4 so the
  1496. * actual payload is unaligned. Align the frame. Otherwise
  1497. * mac80211 complains. This shouldn't reduce performance much
  1498. * because these offloaded frames are rare.
  1499. */
  1500. offset = 4 - ((unsigned long)msdu->data & 3);
  1501. skb_put(msdu, offset);
  1502. memmove(msdu->data + offset, msdu->data, msdu->len);
  1503. skb_pull(msdu, offset);
  1504. /* FIXME: The frame is NWifi. Re-construct QoS Control
  1505. * if possible later.
  1506. */
  1507. memset(status, 0, sizeof(*status));
  1508. status->flag |= RX_FLAG_NO_SIGNAL_VAL;
  1509. ath10k_htt_rx_h_rx_offload_prot(status, msdu);
  1510. ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id);
  1511. ath10k_process_rx(ar, status, msdu);
  1512. }
  1513. }
  1514. static void ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb)
  1515. {
  1516. struct ath10k_htt *htt = &ar->htt;
  1517. struct htt_resp *resp = (void *)skb->data;
  1518. struct ieee80211_rx_status *status = &htt->rx_status;
  1519. struct sk_buff_head list;
  1520. struct sk_buff_head amsdu;
  1521. u16 peer_id;
  1522. u16 msdu_count;
  1523. u8 vdev_id;
  1524. u8 tid;
  1525. bool offload;
  1526. bool frag;
  1527. int ret;
  1528. lockdep_assert_held(&htt->rx_ring.lock);
  1529. if (htt->rx_confused)
  1530. return;
  1531. skb_pull(skb, sizeof(resp->hdr));
  1532. skb_pull(skb, sizeof(resp->rx_in_ord_ind));
  1533. peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id);
  1534. msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count);
  1535. vdev_id = resp->rx_in_ord_ind.vdev_id;
  1536. tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID);
  1537. offload = !!(resp->rx_in_ord_ind.info &
  1538. HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK);
  1539. frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK);
  1540. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1541. "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n",
  1542. vdev_id, peer_id, tid, offload, frag, msdu_count);
  1543. if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs)) {
  1544. ath10k_warn(ar, "dropping invalid in order rx indication\n");
  1545. return;
  1546. }
  1547. /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later
  1548. * extracted and processed.
  1549. */
  1550. __skb_queue_head_init(&list);
  1551. ret = ath10k_htt_rx_pop_paddr_list(htt, &resp->rx_in_ord_ind, &list);
  1552. if (ret < 0) {
  1553. ath10k_warn(ar, "failed to pop paddr list: %d\n", ret);
  1554. htt->rx_confused = true;
  1555. return;
  1556. }
  1557. /* Offloaded frames are very different and need to be handled
  1558. * separately.
  1559. */
  1560. if (offload)
  1561. ath10k_htt_rx_h_rx_offload(ar, &list);
  1562. while (!skb_queue_empty(&list)) {
  1563. __skb_queue_head_init(&amsdu);
  1564. ret = ath10k_htt_rx_extract_amsdu(&list, &amsdu);
  1565. switch (ret) {
  1566. case 0:
  1567. /* Note: The in-order indication may report interleaved
  1568. * frames from different PPDUs meaning reported rx rate
  1569. * to mac80211 isn't accurate/reliable. It's still
  1570. * better to report something than nothing though. This
  1571. * should still give an idea about rx rate to the user.
  1572. */
  1573. ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id);
  1574. ath10k_htt_rx_h_filter(ar, &amsdu, status);
  1575. ath10k_htt_rx_h_mpdu(ar, &amsdu, status);
  1576. ath10k_htt_rx_h_deliver(ar, &amsdu, status);
  1577. break;
  1578. case -EAGAIN:
  1579. /* fall through */
  1580. default:
  1581. /* Should not happen. */
  1582. ath10k_warn(ar, "failed to extract amsdu: %d\n", ret);
  1583. htt->rx_confused = true;
  1584. __skb_queue_purge(&list);
  1585. return;
  1586. }
  1587. }
  1588. }
  1589. static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar,
  1590. const __le32 *resp_ids,
  1591. int num_resp_ids)
  1592. {
  1593. int i;
  1594. u32 resp_id;
  1595. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n",
  1596. num_resp_ids);
  1597. for (i = 0; i < num_resp_ids; i++) {
  1598. resp_id = le32_to_cpu(resp_ids[i]);
  1599. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n",
  1600. resp_id);
  1601. /* TODO: free resp_id */
  1602. }
  1603. }
  1604. static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb)
  1605. {
  1606. struct ieee80211_hw *hw = ar->hw;
  1607. struct ieee80211_txq *txq;
  1608. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1609. struct htt_tx_fetch_record *record;
  1610. size_t len;
  1611. size_t max_num_bytes;
  1612. size_t max_num_msdus;
  1613. size_t num_bytes;
  1614. size_t num_msdus;
  1615. const __le32 *resp_ids;
  1616. u16 num_records;
  1617. u16 num_resp_ids;
  1618. u16 peer_id;
  1619. u8 tid;
  1620. int ret;
  1621. int i;
  1622. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n");
  1623. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind);
  1624. if (unlikely(skb->len < len)) {
  1625. ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n");
  1626. return;
  1627. }
  1628. num_records = le16_to_cpu(resp->tx_fetch_ind.num_records);
  1629. num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids);
  1630. len += sizeof(resp->tx_fetch_ind.records[0]) * num_records;
  1631. len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids;
  1632. if (unlikely(skb->len < len)) {
  1633. ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n");
  1634. return;
  1635. }
  1636. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %hu num resps %hu seq %hu\n",
  1637. num_records, num_resp_ids,
  1638. le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num));
  1639. if (!ar->htt.tx_q_state.enabled) {
  1640. ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n");
  1641. return;
  1642. }
  1643. if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) {
  1644. ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n");
  1645. return;
  1646. }
  1647. rcu_read_lock();
  1648. for (i = 0; i < num_records; i++) {
  1649. record = &resp->tx_fetch_ind.records[i];
  1650. peer_id = MS(le16_to_cpu(record->info),
  1651. HTT_TX_FETCH_RECORD_INFO_PEER_ID);
  1652. tid = MS(le16_to_cpu(record->info),
  1653. HTT_TX_FETCH_RECORD_INFO_TID);
  1654. max_num_msdus = le16_to_cpu(record->num_msdus);
  1655. max_num_bytes = le32_to_cpu(record->num_bytes);
  1656. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %hu tid %hhu msdus %zu bytes %zu\n",
  1657. i, peer_id, tid, max_num_msdus, max_num_bytes);
  1658. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1659. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1660. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1661. peer_id, tid);
  1662. continue;
  1663. }
  1664. spin_lock_bh(&ar->data_lock);
  1665. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1666. spin_unlock_bh(&ar->data_lock);
  1667. /* It is okay to release the lock and use txq because RCU read
  1668. * lock is held.
  1669. */
  1670. if (unlikely(!txq)) {
  1671. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1672. peer_id, tid);
  1673. continue;
  1674. }
  1675. num_msdus = 0;
  1676. num_bytes = 0;
  1677. while (num_msdus < max_num_msdus &&
  1678. num_bytes < max_num_bytes) {
  1679. ret = ath10k_mac_tx_push_txq(hw, txq);
  1680. if (ret < 0)
  1681. break;
  1682. num_msdus++;
  1683. num_bytes += ret;
  1684. }
  1685. record->num_msdus = cpu_to_le16(num_msdus);
  1686. record->num_bytes = cpu_to_le32(num_bytes);
  1687. ath10k_htt_tx_txq_recalc(hw, txq);
  1688. }
  1689. rcu_read_unlock();
  1690. resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind);
  1691. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids);
  1692. ret = ath10k_htt_tx_fetch_resp(ar,
  1693. resp->tx_fetch_ind.token,
  1694. resp->tx_fetch_ind.fetch_seq_num,
  1695. resp->tx_fetch_ind.records,
  1696. num_records);
  1697. if (unlikely(ret)) {
  1698. ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n",
  1699. le32_to_cpu(resp->tx_fetch_ind.token), ret);
  1700. /* FIXME: request fw restart */
  1701. }
  1702. ath10k_htt_tx_txq_sync(ar);
  1703. }
  1704. static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar,
  1705. struct sk_buff *skb)
  1706. {
  1707. const struct htt_resp *resp = (void *)skb->data;
  1708. size_t len;
  1709. int num_resp_ids;
  1710. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n");
  1711. len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm);
  1712. if (unlikely(skb->len < len)) {
  1713. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n");
  1714. return;
  1715. }
  1716. num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids);
  1717. len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids;
  1718. if (unlikely(skb->len < len)) {
  1719. ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n");
  1720. return;
  1721. }
  1722. ath10k_htt_rx_tx_fetch_resp_id_confirm(ar,
  1723. resp->tx_fetch_confirm.resp_ids,
  1724. num_resp_ids);
  1725. }
  1726. static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar,
  1727. struct sk_buff *skb)
  1728. {
  1729. const struct htt_resp *resp = (void *)skb->data;
  1730. const struct htt_tx_mode_switch_record *record;
  1731. struct ieee80211_txq *txq;
  1732. struct ath10k_txq *artxq;
  1733. size_t len;
  1734. size_t num_records;
  1735. enum htt_tx_mode_switch_mode mode;
  1736. bool enable;
  1737. u16 info0;
  1738. u16 info1;
  1739. u16 threshold;
  1740. u16 peer_id;
  1741. u8 tid;
  1742. int i;
  1743. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n");
  1744. len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind);
  1745. if (unlikely(skb->len < len)) {
  1746. ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n");
  1747. return;
  1748. }
  1749. info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0);
  1750. info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1);
  1751. enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE);
  1752. num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1753. mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE);
  1754. threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD);
  1755. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1756. "htt rx tx mode switch ind info0 0x%04hx info1 0x%04hx enable %d num records %zd mode %d threshold %hu\n",
  1757. info0, info1, enable, num_records, mode, threshold);
  1758. len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records;
  1759. if (unlikely(skb->len < len)) {
  1760. ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n");
  1761. return;
  1762. }
  1763. switch (mode) {
  1764. case HTT_TX_MODE_SWITCH_PUSH:
  1765. case HTT_TX_MODE_SWITCH_PUSH_PULL:
  1766. break;
  1767. default:
  1768. ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n",
  1769. mode);
  1770. return;
  1771. }
  1772. if (!enable)
  1773. return;
  1774. ar->htt.tx_q_state.enabled = enable;
  1775. ar->htt.tx_q_state.mode = mode;
  1776. ar->htt.tx_q_state.num_push_allowed = threshold;
  1777. rcu_read_lock();
  1778. for (i = 0; i < num_records; i++) {
  1779. record = &resp->tx_mode_switch_ind.records[i];
  1780. info0 = le16_to_cpu(record->info0);
  1781. peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID);
  1782. tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID);
  1783. if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) ||
  1784. unlikely(tid >= ar->htt.tx_q_state.num_tids)) {
  1785. ath10k_warn(ar, "received out of range peer_id %hu tid %hhu\n",
  1786. peer_id, tid);
  1787. continue;
  1788. }
  1789. spin_lock_bh(&ar->data_lock);
  1790. txq = ath10k_mac_txq_lookup(ar, peer_id, tid);
  1791. spin_unlock_bh(&ar->data_lock);
  1792. /* It is okay to release the lock and use txq because RCU read
  1793. * lock is held.
  1794. */
  1795. if (unlikely(!txq)) {
  1796. ath10k_warn(ar, "failed to lookup txq for peer_id %hu tid %hhu\n",
  1797. peer_id, tid);
  1798. continue;
  1799. }
  1800. spin_lock_bh(&ar->htt.tx_lock);
  1801. artxq = (void *)txq->drv_priv;
  1802. artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus);
  1803. spin_unlock_bh(&ar->htt.tx_lock);
  1804. }
  1805. rcu_read_unlock();
  1806. ath10k_mac_tx_push_pending(ar);
  1807. }
  1808. void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1809. {
  1810. bool release;
  1811. release = ath10k_htt_t2h_msg_handler(ar, skb);
  1812. /* Free the indication buffer */
  1813. if (release)
  1814. dev_kfree_skb_any(skb);
  1815. }
  1816. bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
  1817. {
  1818. struct ath10k_htt *htt = &ar->htt;
  1819. struct htt_resp *resp = (struct htt_resp *)skb->data;
  1820. enum htt_t2h_msg_type type;
  1821. /* confirm alignment */
  1822. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1823. ath10k_warn(ar, "unaligned htt message, expect trouble\n");
  1824. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
  1825. resp->hdr.msg_type);
  1826. if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) {
  1827. ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X",
  1828. resp->hdr.msg_type, ar->htt.t2h_msg_types_max);
  1829. return true;
  1830. }
  1831. type = ar->htt.t2h_msg_types[resp->hdr.msg_type];
  1832. switch (type) {
  1833. case HTT_T2H_MSG_TYPE_VERSION_CONF: {
  1834. htt->target_version_major = resp->ver_resp.major;
  1835. htt->target_version_minor = resp->ver_resp.minor;
  1836. complete(&htt->target_version_received);
  1837. break;
  1838. }
  1839. case HTT_T2H_MSG_TYPE_RX_IND:
  1840. ath10k_htt_rx_proc_rx_ind(htt, &resp->rx_ind);
  1841. break;
  1842. case HTT_T2H_MSG_TYPE_PEER_MAP: {
  1843. struct htt_peer_map_event ev = {
  1844. .vdev_id = resp->peer_map.vdev_id,
  1845. .peer_id = __le16_to_cpu(resp->peer_map.peer_id),
  1846. };
  1847. memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr));
  1848. ath10k_peer_map_event(htt, &ev);
  1849. break;
  1850. }
  1851. case HTT_T2H_MSG_TYPE_PEER_UNMAP: {
  1852. struct htt_peer_unmap_event ev = {
  1853. .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id),
  1854. };
  1855. ath10k_peer_unmap_event(htt, &ev);
  1856. break;
  1857. }
  1858. case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: {
  1859. struct htt_tx_done tx_done = {};
  1860. int status = __le32_to_cpu(resp->mgmt_tx_completion.status);
  1861. tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id);
  1862. switch (status) {
  1863. case HTT_MGMT_TX_STATUS_OK:
  1864. tx_done.status = HTT_TX_COMPL_STATE_ACK;
  1865. break;
  1866. case HTT_MGMT_TX_STATUS_RETRY:
  1867. tx_done.status = HTT_TX_COMPL_STATE_NOACK;
  1868. break;
  1869. case HTT_MGMT_TX_STATUS_DROP:
  1870. tx_done.status = HTT_TX_COMPL_STATE_DISCARD;
  1871. break;
  1872. }
  1873. status = ath10k_txrx_tx_unref(htt, &tx_done);
  1874. if (!status) {
  1875. spin_lock_bh(&htt->tx_lock);
  1876. ath10k_htt_tx_mgmt_dec_pending(htt);
  1877. spin_unlock_bh(&htt->tx_lock);
  1878. }
  1879. break;
  1880. }
  1881. case HTT_T2H_MSG_TYPE_TX_COMPL_IND:
  1882. ath10k_htt_rx_tx_compl_ind(htt->ar, skb);
  1883. tasklet_schedule(&htt->txrx_compl_task);
  1884. break;
  1885. case HTT_T2H_MSG_TYPE_SEC_IND: {
  1886. struct ath10k *ar = htt->ar;
  1887. struct htt_security_indication *ev = &resp->security_indication;
  1888. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1889. "sec ind peer_id %d unicast %d type %d\n",
  1890. __le16_to_cpu(ev->peer_id),
  1891. !!(ev->flags & HTT_SECURITY_IS_UNICAST),
  1892. MS(ev->flags, HTT_SECURITY_TYPE));
  1893. complete(&ar->install_key_done);
  1894. break;
  1895. }
  1896. case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
  1897. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1898. skb->data, skb->len);
  1899. ath10k_htt_rx_frag_handler(htt);
  1900. break;
  1901. }
  1902. case HTT_T2H_MSG_TYPE_TEST:
  1903. break;
  1904. case HTT_T2H_MSG_TYPE_STATS_CONF:
  1905. trace_ath10k_htt_stats(ar, skb->data, skb->len);
  1906. break;
  1907. case HTT_T2H_MSG_TYPE_TX_INSPECT_IND:
  1908. /* Firmware can return tx frames if it's unable to fully
  1909. * process them and suspects host may be able to fix it. ath10k
  1910. * sends all tx frames as already inspected so this shouldn't
  1911. * happen unless fw has a bug.
  1912. */
  1913. ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
  1914. break;
  1915. case HTT_T2H_MSG_TYPE_RX_ADDBA:
  1916. ath10k_htt_rx_addba(ar, resp);
  1917. break;
  1918. case HTT_T2H_MSG_TYPE_RX_DELBA:
  1919. ath10k_htt_rx_delba(ar, resp);
  1920. break;
  1921. case HTT_T2H_MSG_TYPE_PKTLOG: {
  1922. trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload,
  1923. skb->len -
  1924. offsetof(struct htt_resp,
  1925. pktlog_msg.payload));
  1926. break;
  1927. }
  1928. case HTT_T2H_MSG_TYPE_RX_FLUSH: {
  1929. /* Ignore this event because mac80211 takes care of Rx
  1930. * aggregation reordering.
  1931. */
  1932. break;
  1933. }
  1934. case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: {
  1935. skb_queue_tail(&htt->rx_in_ord_compl_q, skb);
  1936. tasklet_schedule(&htt->txrx_compl_task);
  1937. return false;
  1938. }
  1939. case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND:
  1940. break;
  1941. case HTT_T2H_MSG_TYPE_CHAN_CHANGE: {
  1942. u32 phymode = __le32_to_cpu(resp->chan_change.phymode);
  1943. u32 freq = __le32_to_cpu(resp->chan_change.freq);
  1944. ar->tgt_oper_chan =
  1945. __ieee80211_get_channel(ar->hw->wiphy, freq);
  1946. ath10k_dbg(ar, ATH10K_DBG_HTT,
  1947. "htt chan change freq %u phymode %s\n",
  1948. freq, ath10k_wmi_phymode_str(phymode));
  1949. break;
  1950. }
  1951. case HTT_T2H_MSG_TYPE_AGGR_CONF:
  1952. break;
  1953. case HTT_T2H_MSG_TYPE_TX_FETCH_IND: {
  1954. struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC);
  1955. if (!tx_fetch_ind) {
  1956. ath10k_warn(ar, "failed to copy htt tx fetch ind\n");
  1957. break;
  1958. }
  1959. skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind);
  1960. tasklet_schedule(&htt->txrx_compl_task);
  1961. break;
  1962. }
  1963. case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM:
  1964. ath10k_htt_rx_tx_fetch_confirm(ar, skb);
  1965. break;
  1966. case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND:
  1967. ath10k_htt_rx_tx_mode_switch_ind(ar, skb);
  1968. break;
  1969. case HTT_T2H_MSG_TYPE_EN_STATS:
  1970. default:
  1971. ath10k_warn(ar, "htt event (%d) not handled\n",
  1972. resp->hdr.msg_type);
  1973. ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
  1974. skb->data, skb->len);
  1975. break;
  1976. };
  1977. return true;
  1978. }
  1979. EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler);
  1980. void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar,
  1981. struct sk_buff *skb)
  1982. {
  1983. trace_ath10k_htt_pktlog(ar, skb->data, skb->len);
  1984. dev_kfree_skb_any(skb);
  1985. }
  1986. EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler);
  1987. static void ath10k_htt_txrx_compl_task(unsigned long ptr)
  1988. {
  1989. struct ath10k_htt *htt = (struct ath10k_htt *)ptr;
  1990. struct ath10k *ar = htt->ar;
  1991. struct htt_tx_done tx_done = {};
  1992. struct sk_buff_head rx_ind_q;
  1993. struct sk_buff_head tx_ind_q;
  1994. struct sk_buff *skb;
  1995. unsigned long flags;
  1996. int num_mpdus;
  1997. __skb_queue_head_init(&rx_ind_q);
  1998. __skb_queue_head_init(&tx_ind_q);
  1999. spin_lock_irqsave(&htt->rx_in_ord_compl_q.lock, flags);
  2000. skb_queue_splice_init(&htt->rx_in_ord_compl_q, &rx_ind_q);
  2001. spin_unlock_irqrestore(&htt->rx_in_ord_compl_q.lock, flags);
  2002. spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags);
  2003. skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q);
  2004. spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags);
  2005. /* kfifo_get: called only within txrx_tasklet so it's neatly serialized.
  2006. * From kfifo_get() documentation:
  2007. * Note that with only one concurrent reader and one concurrent writer,
  2008. * you don't need extra locking to use these macro.
  2009. */
  2010. while (kfifo_get(&htt->txdone_fifo, &tx_done))
  2011. ath10k_txrx_tx_unref(htt, &tx_done);
  2012. while ((skb = __skb_dequeue(&tx_ind_q))) {
  2013. ath10k_htt_rx_tx_fetch_ind(ar, skb);
  2014. dev_kfree_skb_any(skb);
  2015. }
  2016. num_mpdus = atomic_read(&htt->num_mpdus_ready);
  2017. while (num_mpdus) {
  2018. if (ath10k_htt_rx_handle_amsdu(htt))
  2019. break;
  2020. num_mpdus--;
  2021. atomic_dec(&htt->num_mpdus_ready);
  2022. }
  2023. while ((skb = __skb_dequeue(&rx_ind_q))) {
  2024. spin_lock_bh(&htt->rx_ring.lock);
  2025. ath10k_htt_rx_in_ord_ind(ar, skb);
  2026. spin_unlock_bh(&htt->rx_ring.lock);
  2027. dev_kfree_skb_any(skb);
  2028. }
  2029. ath10k_htt_rx_msdu_buff_replenish(htt);
  2030. }