smsc95xx.c 52 KB

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  1. /***************************************************************************
  2. *
  3. * Copyright (C) 2007-2008 SMSC
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  17. *
  18. *****************************************************************************/
  19. #include <linux/module.h>
  20. #include <linux/kmod.h>
  21. #include <linux/netdevice.h>
  22. #include <linux/etherdevice.h>
  23. #include <linux/ethtool.h>
  24. #include <linux/mii.h>
  25. #include <linux/usb.h>
  26. #include <linux/bitrev.h>
  27. #include <linux/crc16.h>
  28. #include <linux/crc32.h>
  29. #include <linux/usb/usbnet.h>
  30. #include <linux/slab.h>
  31. #include <linux/of_net.h>
  32. #include "smsc95xx.h"
  33. #define SMSC_CHIPNAME "smsc95xx"
  34. #define SMSC_DRIVER_VERSION "1.0.4"
  35. #define HS_USB_PKT_SIZE (512)
  36. #define FS_USB_PKT_SIZE (64)
  37. #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
  38. #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
  39. #define DEFAULT_BULK_IN_DELAY (0x00002000)
  40. #define MAX_SINGLE_PACKET_SIZE (2048)
  41. #define LAN95XX_EEPROM_MAGIC (0x9500)
  42. #define EEPROM_MAC_OFFSET (0x01)
  43. #define DEFAULT_TX_CSUM_ENABLE (true)
  44. #define DEFAULT_RX_CSUM_ENABLE (true)
  45. #define SMSC95XX_INTERNAL_PHY_ID (1)
  46. #define SMSC95XX_TX_OVERHEAD (8)
  47. #define SMSC95XX_TX_OVERHEAD_CSUM (12)
  48. #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
  49. WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
  50. #define FEATURE_8_WAKEUP_FILTERS (0x01)
  51. #define FEATURE_PHY_NLP_CROSSOVER (0x02)
  52. #define FEATURE_REMOTE_WAKEUP (0x04)
  53. #define SUSPEND_SUSPEND0 (0x01)
  54. #define SUSPEND_SUSPEND1 (0x02)
  55. #define SUSPEND_SUSPEND2 (0x04)
  56. #define SUSPEND_SUSPEND3 (0x08)
  57. #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
  58. SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
  59. #define CARRIER_CHECK_DELAY (2 * HZ)
  60. struct smsc95xx_priv {
  61. u32 mac_cr;
  62. u32 hash_hi;
  63. u32 hash_lo;
  64. u32 wolopts;
  65. spinlock_t mac_cr_lock;
  66. u8 features;
  67. u8 suspend_flags;
  68. bool link_ok;
  69. struct delayed_work carrier_check;
  70. struct usbnet *dev;
  71. };
  72. static bool turbo_mode = true;
  73. module_param(turbo_mode, bool, 0644);
  74. MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
  75. static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
  76. u32 *data, int in_pm)
  77. {
  78. u32 buf;
  79. int ret;
  80. int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
  81. BUG_ON(!dev);
  82. if (!in_pm)
  83. fn = usbnet_read_cmd;
  84. else
  85. fn = usbnet_read_cmd_nopm;
  86. ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
  87. | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  88. 0, index, &buf, 4);
  89. if (unlikely(ret < 0)) {
  90. netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
  91. index, ret);
  92. return ret;
  93. }
  94. le32_to_cpus(&buf);
  95. *data = buf;
  96. return ret;
  97. }
  98. static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index,
  99. u32 data, int in_pm)
  100. {
  101. u32 buf;
  102. int ret;
  103. int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
  104. BUG_ON(!dev);
  105. if (!in_pm)
  106. fn = usbnet_write_cmd;
  107. else
  108. fn = usbnet_write_cmd_nopm;
  109. buf = data;
  110. cpu_to_le32s(&buf);
  111. ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
  112. | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  113. 0, index, &buf, 4);
  114. if (unlikely(ret < 0))
  115. netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
  116. index, ret);
  117. return ret;
  118. }
  119. static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index,
  120. u32 *data)
  121. {
  122. return __smsc95xx_read_reg(dev, index, data, 1);
  123. }
  124. static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index,
  125. u32 data)
  126. {
  127. return __smsc95xx_write_reg(dev, index, data, 1);
  128. }
  129. static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
  130. u32 *data)
  131. {
  132. return __smsc95xx_read_reg(dev, index, data, 0);
  133. }
  134. static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
  135. u32 data)
  136. {
  137. return __smsc95xx_write_reg(dev, index, data, 0);
  138. }
  139. /* Loop until the read is completed with timeout
  140. * called with phy_mutex held */
  141. static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev,
  142. int in_pm)
  143. {
  144. unsigned long start_time = jiffies;
  145. u32 val;
  146. int ret;
  147. do {
  148. ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm);
  149. if (ret < 0) {
  150. netdev_warn(dev->net, "Error reading MII_ACCESS\n");
  151. return ret;
  152. }
  153. if (!(val & MII_BUSY_))
  154. return 0;
  155. } while (!time_after(jiffies, start_time + HZ));
  156. return -EIO;
  157. }
  158. static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
  159. int in_pm)
  160. {
  161. struct usbnet *dev = netdev_priv(netdev);
  162. u32 val, addr;
  163. int ret;
  164. mutex_lock(&dev->phy_mutex);
  165. /* confirm MII not busy */
  166. ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
  167. if (ret < 0) {
  168. netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
  169. goto done;
  170. }
  171. /* set the address, index & direction (read from PHY) */
  172. phy_id &= dev->mii.phy_id_mask;
  173. idx &= dev->mii.reg_num_mask;
  174. addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_;
  175. ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
  176. if (ret < 0) {
  177. netdev_warn(dev->net, "Error writing MII_ADDR\n");
  178. goto done;
  179. }
  180. ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
  181. if (ret < 0) {
  182. netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
  183. goto done;
  184. }
  185. ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm);
  186. if (ret < 0) {
  187. netdev_warn(dev->net, "Error reading MII_DATA\n");
  188. goto done;
  189. }
  190. ret = (u16)(val & 0xFFFF);
  191. done:
  192. mutex_unlock(&dev->phy_mutex);
  193. return ret;
  194. }
  195. static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id,
  196. int idx, int regval, int in_pm)
  197. {
  198. struct usbnet *dev = netdev_priv(netdev);
  199. u32 val, addr;
  200. int ret;
  201. mutex_lock(&dev->phy_mutex);
  202. /* confirm MII not busy */
  203. ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
  204. if (ret < 0) {
  205. netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
  206. goto done;
  207. }
  208. val = regval;
  209. ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm);
  210. if (ret < 0) {
  211. netdev_warn(dev->net, "Error writing MII_DATA\n");
  212. goto done;
  213. }
  214. /* set the address, index & direction (write to PHY) */
  215. phy_id &= dev->mii.phy_id_mask;
  216. idx &= dev->mii.reg_num_mask;
  217. addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_;
  218. ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
  219. if (ret < 0) {
  220. netdev_warn(dev->net, "Error writing MII_ADDR\n");
  221. goto done;
  222. }
  223. ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
  224. if (ret < 0) {
  225. netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
  226. goto done;
  227. }
  228. done:
  229. mutex_unlock(&dev->phy_mutex);
  230. }
  231. static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
  232. int idx)
  233. {
  234. return __smsc95xx_mdio_read(netdev, phy_id, idx, 1);
  235. }
  236. static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
  237. int idx, int regval)
  238. {
  239. __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1);
  240. }
  241. static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
  242. {
  243. return __smsc95xx_mdio_read(netdev, phy_id, idx, 0);
  244. }
  245. static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
  246. int regval)
  247. {
  248. __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0);
  249. }
  250. static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
  251. {
  252. unsigned long start_time = jiffies;
  253. u32 val;
  254. int ret;
  255. do {
  256. ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
  257. if (ret < 0) {
  258. netdev_warn(dev->net, "Error reading E2P_CMD\n");
  259. return ret;
  260. }
  261. if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
  262. break;
  263. udelay(40);
  264. } while (!time_after(jiffies, start_time + HZ));
  265. if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
  266. netdev_warn(dev->net, "EEPROM read operation timeout\n");
  267. return -EIO;
  268. }
  269. return 0;
  270. }
  271. static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
  272. {
  273. unsigned long start_time = jiffies;
  274. u32 val;
  275. int ret;
  276. do {
  277. ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
  278. if (ret < 0) {
  279. netdev_warn(dev->net, "Error reading E2P_CMD\n");
  280. return ret;
  281. }
  282. if (!(val & E2P_CMD_BUSY_))
  283. return 0;
  284. udelay(40);
  285. } while (!time_after(jiffies, start_time + HZ));
  286. netdev_warn(dev->net, "EEPROM is busy\n");
  287. return -EIO;
  288. }
  289. static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
  290. u8 *data)
  291. {
  292. u32 val;
  293. int i, ret;
  294. BUG_ON(!dev);
  295. BUG_ON(!data);
  296. ret = smsc95xx_eeprom_confirm_not_busy(dev);
  297. if (ret)
  298. return ret;
  299. for (i = 0; i < length; i++) {
  300. val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
  301. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  302. if (ret < 0) {
  303. netdev_warn(dev->net, "Error writing E2P_CMD\n");
  304. return ret;
  305. }
  306. ret = smsc95xx_wait_eeprom(dev);
  307. if (ret < 0)
  308. return ret;
  309. ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
  310. if (ret < 0) {
  311. netdev_warn(dev->net, "Error reading E2P_DATA\n");
  312. return ret;
  313. }
  314. data[i] = val & 0xFF;
  315. offset++;
  316. }
  317. return 0;
  318. }
  319. static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
  320. u8 *data)
  321. {
  322. u32 val;
  323. int i, ret;
  324. BUG_ON(!dev);
  325. BUG_ON(!data);
  326. ret = smsc95xx_eeprom_confirm_not_busy(dev);
  327. if (ret)
  328. return ret;
  329. /* Issue write/erase enable command */
  330. val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
  331. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  332. if (ret < 0) {
  333. netdev_warn(dev->net, "Error writing E2P_DATA\n");
  334. return ret;
  335. }
  336. ret = smsc95xx_wait_eeprom(dev);
  337. if (ret < 0)
  338. return ret;
  339. for (i = 0; i < length; i++) {
  340. /* Fill data register */
  341. val = data[i];
  342. ret = smsc95xx_write_reg(dev, E2P_DATA, val);
  343. if (ret < 0) {
  344. netdev_warn(dev->net, "Error writing E2P_DATA\n");
  345. return ret;
  346. }
  347. /* Send "write" command */
  348. val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
  349. ret = smsc95xx_write_reg(dev, E2P_CMD, val);
  350. if (ret < 0) {
  351. netdev_warn(dev->net, "Error writing E2P_CMD\n");
  352. return ret;
  353. }
  354. ret = smsc95xx_wait_eeprom(dev);
  355. if (ret < 0)
  356. return ret;
  357. offset++;
  358. }
  359. return 0;
  360. }
  361. static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
  362. u32 data)
  363. {
  364. const u16 size = 4;
  365. u32 buf;
  366. int ret;
  367. buf = data;
  368. cpu_to_le32s(&buf);
  369. ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
  370. USB_DIR_OUT | USB_TYPE_VENDOR |
  371. USB_RECIP_DEVICE,
  372. 0, index, &buf, size);
  373. if (ret < 0)
  374. netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
  375. ret);
  376. return ret;
  377. }
  378. /* returns hash bit number for given MAC address
  379. * example:
  380. * 01 00 5E 00 00 01 -> returns bit number 31 */
  381. static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
  382. {
  383. return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
  384. }
  385. static void smsc95xx_set_multicast(struct net_device *netdev)
  386. {
  387. struct usbnet *dev = netdev_priv(netdev);
  388. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  389. unsigned long flags;
  390. int ret;
  391. pdata->hash_hi = 0;
  392. pdata->hash_lo = 0;
  393. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  394. if (dev->net->flags & IFF_PROMISC) {
  395. netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
  396. pdata->mac_cr |= MAC_CR_PRMS_;
  397. pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  398. } else if (dev->net->flags & IFF_ALLMULTI) {
  399. netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
  400. pdata->mac_cr |= MAC_CR_MCPAS_;
  401. pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
  402. } else if (!netdev_mc_empty(dev->net)) {
  403. struct netdev_hw_addr *ha;
  404. pdata->mac_cr |= MAC_CR_HPFILT_;
  405. pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  406. netdev_for_each_mc_addr(ha, netdev) {
  407. u32 bitnum = smsc95xx_hash(ha->addr);
  408. u32 mask = 0x01 << (bitnum & 0x1F);
  409. if (bitnum & 0x20)
  410. pdata->hash_hi |= mask;
  411. else
  412. pdata->hash_lo |= mask;
  413. }
  414. netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
  415. pdata->hash_hi, pdata->hash_lo);
  416. } else {
  417. netif_dbg(dev, drv, dev->net, "receive own packets only\n");
  418. pdata->mac_cr &=
  419. ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
  420. }
  421. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  422. /* Initiate async writes, as we can't wait for completion here */
  423. ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi);
  424. if (ret < 0)
  425. netdev_warn(dev->net, "failed to initiate async write to HASHH\n");
  426. ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo);
  427. if (ret < 0)
  428. netdev_warn(dev->net, "failed to initiate async write to HASHL\n");
  429. ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr);
  430. if (ret < 0)
  431. netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n");
  432. }
  433. static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
  434. u16 lcladv, u16 rmtadv)
  435. {
  436. u32 flow, afc_cfg = 0;
  437. int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
  438. if (ret < 0)
  439. return ret;
  440. if (duplex == DUPLEX_FULL) {
  441. u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
  442. if (cap & FLOW_CTRL_RX)
  443. flow = 0xFFFF0002;
  444. else
  445. flow = 0;
  446. if (cap & FLOW_CTRL_TX)
  447. afc_cfg |= 0xF;
  448. else
  449. afc_cfg &= ~0xF;
  450. netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
  451. cap & FLOW_CTRL_RX ? "enabled" : "disabled",
  452. cap & FLOW_CTRL_TX ? "enabled" : "disabled");
  453. } else {
  454. netif_dbg(dev, link, dev->net, "half duplex\n");
  455. flow = 0;
  456. afc_cfg |= 0xF;
  457. }
  458. ret = smsc95xx_write_reg(dev, FLOW, flow);
  459. if (ret < 0)
  460. return ret;
  461. return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
  462. }
  463. static int smsc95xx_link_reset(struct usbnet *dev)
  464. {
  465. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  466. struct mii_if_info *mii = &dev->mii;
  467. struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
  468. unsigned long flags;
  469. u16 lcladv, rmtadv;
  470. int ret;
  471. /* clear interrupt status */
  472. ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
  473. if (ret < 0)
  474. return ret;
  475. ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
  476. if (ret < 0)
  477. return ret;
  478. mii_check_media(mii, 1, 1);
  479. mii_ethtool_gset(&dev->mii, &ecmd);
  480. lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
  481. rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
  482. netif_dbg(dev, link, dev->net,
  483. "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
  484. ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
  485. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  486. if (ecmd.duplex != DUPLEX_FULL) {
  487. pdata->mac_cr &= ~MAC_CR_FDPX_;
  488. pdata->mac_cr |= MAC_CR_RCVOWN_;
  489. } else {
  490. pdata->mac_cr &= ~MAC_CR_RCVOWN_;
  491. pdata->mac_cr |= MAC_CR_FDPX_;
  492. }
  493. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  494. ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
  495. if (ret < 0)
  496. return ret;
  497. ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
  498. if (ret < 0)
  499. netdev_warn(dev->net, "Error updating PHY flow control\n");
  500. return ret;
  501. }
  502. static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
  503. {
  504. u32 intdata;
  505. if (urb->actual_length != 4) {
  506. netdev_warn(dev->net, "unexpected urb length %d\n",
  507. urb->actual_length);
  508. return;
  509. }
  510. memcpy(&intdata, urb->transfer_buffer, 4);
  511. le32_to_cpus(&intdata);
  512. netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
  513. if (intdata & INT_ENP_PHY_INT_)
  514. usbnet_defer_kevent(dev, EVENT_LINK_RESET);
  515. else
  516. netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
  517. intdata);
  518. }
  519. static void set_carrier(struct usbnet *dev, bool link)
  520. {
  521. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  522. if (pdata->link_ok == link)
  523. return;
  524. pdata->link_ok = link;
  525. if (link)
  526. usbnet_link_change(dev, 1, 0);
  527. else
  528. usbnet_link_change(dev, 0, 0);
  529. }
  530. static void check_carrier(struct work_struct *work)
  531. {
  532. struct smsc95xx_priv *pdata = container_of(work, struct smsc95xx_priv,
  533. carrier_check.work);
  534. struct usbnet *dev = pdata->dev;
  535. int ret;
  536. if (pdata->suspend_flags != 0)
  537. return;
  538. ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMSR);
  539. if (ret < 0) {
  540. netdev_warn(dev->net, "Failed to read MII_BMSR\n");
  541. return;
  542. }
  543. if (ret & BMSR_LSTATUS)
  544. set_carrier(dev, 1);
  545. else
  546. set_carrier(dev, 0);
  547. schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
  548. }
  549. /* Enable or disable Tx & Rx checksum offload engines */
  550. static int smsc95xx_set_features(struct net_device *netdev,
  551. netdev_features_t features)
  552. {
  553. struct usbnet *dev = netdev_priv(netdev);
  554. u32 read_buf;
  555. int ret;
  556. ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
  557. if (ret < 0)
  558. return ret;
  559. if (features & NETIF_F_HW_CSUM)
  560. read_buf |= Tx_COE_EN_;
  561. else
  562. read_buf &= ~Tx_COE_EN_;
  563. if (features & NETIF_F_RXCSUM)
  564. read_buf |= Rx_COE_EN_;
  565. else
  566. read_buf &= ~Rx_COE_EN_;
  567. ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
  568. if (ret < 0)
  569. return ret;
  570. netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
  571. return 0;
  572. }
  573. static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
  574. {
  575. return MAX_EEPROM_SIZE;
  576. }
  577. static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
  578. struct ethtool_eeprom *ee, u8 *data)
  579. {
  580. struct usbnet *dev = netdev_priv(netdev);
  581. ee->magic = LAN95XX_EEPROM_MAGIC;
  582. return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
  583. }
  584. static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
  585. struct ethtool_eeprom *ee, u8 *data)
  586. {
  587. struct usbnet *dev = netdev_priv(netdev);
  588. if (ee->magic != LAN95XX_EEPROM_MAGIC) {
  589. netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
  590. ee->magic);
  591. return -EINVAL;
  592. }
  593. return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
  594. }
  595. static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
  596. {
  597. /* all smsc95xx registers */
  598. return COE_CR - ID_REV + sizeof(u32);
  599. }
  600. static void
  601. smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
  602. void *buf)
  603. {
  604. struct usbnet *dev = netdev_priv(netdev);
  605. unsigned int i, j;
  606. int retval;
  607. u32 *data = buf;
  608. retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
  609. if (retval < 0) {
  610. netdev_warn(netdev, "REGS: cannot read ID_REV\n");
  611. return;
  612. }
  613. for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
  614. retval = smsc95xx_read_reg(dev, i, &data[j]);
  615. if (retval < 0) {
  616. netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
  617. return;
  618. }
  619. }
  620. }
  621. static void smsc95xx_ethtool_get_wol(struct net_device *net,
  622. struct ethtool_wolinfo *wolinfo)
  623. {
  624. struct usbnet *dev = netdev_priv(net);
  625. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  626. wolinfo->supported = SUPPORTED_WAKE;
  627. wolinfo->wolopts = pdata->wolopts;
  628. }
  629. static int smsc95xx_ethtool_set_wol(struct net_device *net,
  630. struct ethtool_wolinfo *wolinfo)
  631. {
  632. struct usbnet *dev = netdev_priv(net);
  633. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  634. int ret;
  635. pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
  636. ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
  637. if (ret < 0)
  638. netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
  639. return ret;
  640. }
  641. static const struct ethtool_ops smsc95xx_ethtool_ops = {
  642. .get_link = usbnet_get_link,
  643. .nway_reset = usbnet_nway_reset,
  644. .get_drvinfo = usbnet_get_drvinfo,
  645. .get_msglevel = usbnet_get_msglevel,
  646. .set_msglevel = usbnet_set_msglevel,
  647. .get_settings = usbnet_get_settings,
  648. .set_settings = usbnet_set_settings,
  649. .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
  650. .get_eeprom = smsc95xx_ethtool_get_eeprom,
  651. .set_eeprom = smsc95xx_ethtool_set_eeprom,
  652. .get_regs_len = smsc95xx_ethtool_getregslen,
  653. .get_regs = smsc95xx_ethtool_getregs,
  654. .get_wol = smsc95xx_ethtool_get_wol,
  655. .set_wol = smsc95xx_ethtool_set_wol,
  656. };
  657. static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
  658. {
  659. struct usbnet *dev = netdev_priv(netdev);
  660. if (!netif_running(netdev))
  661. return -EINVAL;
  662. return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
  663. }
  664. static void smsc95xx_init_mac_address(struct usbnet *dev)
  665. {
  666. const u8 *mac_addr;
  667. /* maybe the boot loader passed the MAC address in devicetree */
  668. mac_addr = of_get_mac_address(dev->udev->dev.of_node);
  669. if (mac_addr) {
  670. memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN);
  671. return;
  672. }
  673. /* try reading mac address from EEPROM */
  674. if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
  675. dev->net->dev_addr) == 0) {
  676. if (is_valid_ether_addr(dev->net->dev_addr)) {
  677. /* eeprom values are valid so use them */
  678. netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
  679. return;
  680. }
  681. }
  682. /* no useful static MAC address found. generate a random one */
  683. eth_hw_addr_random(dev->net);
  684. netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
  685. }
  686. static int smsc95xx_set_mac_address(struct usbnet *dev)
  687. {
  688. u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
  689. dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
  690. u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
  691. int ret;
  692. ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
  693. if (ret < 0)
  694. return ret;
  695. return smsc95xx_write_reg(dev, ADDRH, addr_hi);
  696. }
  697. /* starts the TX path */
  698. static int smsc95xx_start_tx_path(struct usbnet *dev)
  699. {
  700. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  701. unsigned long flags;
  702. int ret;
  703. /* Enable Tx at MAC */
  704. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  705. pdata->mac_cr |= MAC_CR_TXEN_;
  706. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  707. ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
  708. if (ret < 0)
  709. return ret;
  710. /* Enable Tx at SCSRs */
  711. return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
  712. }
  713. /* Starts the Receive path */
  714. static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm)
  715. {
  716. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  717. unsigned long flags;
  718. spin_lock_irqsave(&pdata->mac_cr_lock, flags);
  719. pdata->mac_cr |= MAC_CR_RXEN_;
  720. spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
  721. return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm);
  722. }
  723. static int smsc95xx_phy_initialize(struct usbnet *dev)
  724. {
  725. int bmcr, ret, timeout = 0;
  726. /* Initialize MII structure */
  727. dev->mii.dev = dev->net;
  728. dev->mii.mdio_read = smsc95xx_mdio_read;
  729. dev->mii.mdio_write = smsc95xx_mdio_write;
  730. dev->mii.phy_id_mask = 0x1f;
  731. dev->mii.reg_num_mask = 0x1f;
  732. dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
  733. /* reset phy and wait for reset to complete */
  734. smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
  735. do {
  736. msleep(10);
  737. bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
  738. timeout++;
  739. } while ((bmcr & BMCR_RESET) && (timeout < 100));
  740. if (timeout >= 100) {
  741. netdev_warn(dev->net, "timeout on PHY Reset");
  742. return -EIO;
  743. }
  744. smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
  745. ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
  746. ADVERTISE_PAUSE_ASYM);
  747. /* read to clear */
  748. ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
  749. if (ret < 0) {
  750. netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n");
  751. return ret;
  752. }
  753. smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
  754. PHY_INT_MASK_DEFAULT_);
  755. mii_nway_restart(&dev->mii);
  756. netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
  757. return 0;
  758. }
  759. static int smsc95xx_reset(struct usbnet *dev)
  760. {
  761. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  762. u32 read_buf, write_buf, burst_cap;
  763. int ret = 0, timeout;
  764. netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
  765. ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
  766. if (ret < 0)
  767. return ret;
  768. timeout = 0;
  769. do {
  770. msleep(10);
  771. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  772. if (ret < 0)
  773. return ret;
  774. timeout++;
  775. } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
  776. if (timeout >= 100) {
  777. netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
  778. return ret;
  779. }
  780. ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
  781. if (ret < 0)
  782. return ret;
  783. timeout = 0;
  784. do {
  785. msleep(10);
  786. ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
  787. if (ret < 0)
  788. return ret;
  789. timeout++;
  790. } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
  791. if (timeout >= 100) {
  792. netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
  793. return ret;
  794. }
  795. ret = smsc95xx_set_mac_address(dev);
  796. if (ret < 0)
  797. return ret;
  798. netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
  799. dev->net->dev_addr);
  800. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  801. if (ret < 0)
  802. return ret;
  803. netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
  804. read_buf);
  805. read_buf |= HW_CFG_BIR_;
  806. ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
  807. if (ret < 0)
  808. return ret;
  809. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  810. if (ret < 0)
  811. return ret;
  812. netif_dbg(dev, ifup, dev->net,
  813. "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
  814. read_buf);
  815. if (!turbo_mode) {
  816. burst_cap = 0;
  817. dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
  818. } else if (dev->udev->speed == USB_SPEED_HIGH) {
  819. burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
  820. dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
  821. } else {
  822. burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
  823. dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
  824. }
  825. netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
  826. (ulong)dev->rx_urb_size);
  827. ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
  828. if (ret < 0)
  829. return ret;
  830. ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
  831. if (ret < 0)
  832. return ret;
  833. netif_dbg(dev, ifup, dev->net,
  834. "Read Value from BURST_CAP after writing: 0x%08x\n",
  835. read_buf);
  836. ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
  837. if (ret < 0)
  838. return ret;
  839. ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
  840. if (ret < 0)
  841. return ret;
  842. netif_dbg(dev, ifup, dev->net,
  843. "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
  844. read_buf);
  845. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  846. if (ret < 0)
  847. return ret;
  848. netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n",
  849. read_buf);
  850. if (turbo_mode)
  851. read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
  852. read_buf &= ~HW_CFG_RXDOFF_;
  853. /* set Rx data offset=2, Make IP header aligns on word boundary. */
  854. read_buf |= NET_IP_ALIGN << 9;
  855. ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
  856. if (ret < 0)
  857. return ret;
  858. ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
  859. if (ret < 0)
  860. return ret;
  861. netif_dbg(dev, ifup, dev->net,
  862. "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
  863. ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
  864. if (ret < 0)
  865. return ret;
  866. ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
  867. if (ret < 0)
  868. return ret;
  869. netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
  870. /* Configure GPIO pins as LED outputs */
  871. write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
  872. LED_GPIO_CFG_FDX_LED;
  873. ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
  874. if (ret < 0)
  875. return ret;
  876. /* Init Tx */
  877. ret = smsc95xx_write_reg(dev, FLOW, 0);
  878. if (ret < 0)
  879. return ret;
  880. ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
  881. if (ret < 0)
  882. return ret;
  883. /* Don't need mac_cr_lock during initialisation */
  884. ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
  885. if (ret < 0)
  886. return ret;
  887. /* Init Rx */
  888. /* Set Vlan */
  889. ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
  890. if (ret < 0)
  891. return ret;
  892. /* Enable or disable checksum offload engines */
  893. ret = smsc95xx_set_features(dev->net, dev->net->features);
  894. if (ret < 0) {
  895. netdev_warn(dev->net, "Failed to set checksum offload features\n");
  896. return ret;
  897. }
  898. smsc95xx_set_multicast(dev->net);
  899. ret = smsc95xx_phy_initialize(dev);
  900. if (ret < 0) {
  901. netdev_warn(dev->net, "Failed to init PHY\n");
  902. return ret;
  903. }
  904. ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
  905. if (ret < 0)
  906. return ret;
  907. /* enable PHY interrupts */
  908. read_buf |= INT_EP_CTL_PHY_INT_;
  909. ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
  910. if (ret < 0)
  911. return ret;
  912. ret = smsc95xx_start_tx_path(dev);
  913. if (ret < 0) {
  914. netdev_warn(dev->net, "Failed to start TX path\n");
  915. return ret;
  916. }
  917. ret = smsc95xx_start_rx_path(dev, 0);
  918. if (ret < 0) {
  919. netdev_warn(dev->net, "Failed to start RX path\n");
  920. return ret;
  921. }
  922. netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
  923. return 0;
  924. }
  925. static const struct net_device_ops smsc95xx_netdev_ops = {
  926. .ndo_open = usbnet_open,
  927. .ndo_stop = usbnet_stop,
  928. .ndo_start_xmit = usbnet_start_xmit,
  929. .ndo_tx_timeout = usbnet_tx_timeout,
  930. .ndo_change_mtu = usbnet_change_mtu,
  931. .ndo_set_mac_address = eth_mac_addr,
  932. .ndo_validate_addr = eth_validate_addr,
  933. .ndo_do_ioctl = smsc95xx_ioctl,
  934. .ndo_set_rx_mode = smsc95xx_set_multicast,
  935. .ndo_set_features = smsc95xx_set_features,
  936. };
  937. static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
  938. {
  939. struct smsc95xx_priv *pdata = NULL;
  940. u32 val;
  941. int ret;
  942. printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
  943. ret = usbnet_get_endpoints(dev, intf);
  944. if (ret < 0) {
  945. netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
  946. return ret;
  947. }
  948. dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
  949. GFP_KERNEL);
  950. pdata = (struct smsc95xx_priv *)(dev->data[0]);
  951. if (!pdata)
  952. return -ENOMEM;
  953. spin_lock_init(&pdata->mac_cr_lock);
  954. if (DEFAULT_TX_CSUM_ENABLE)
  955. dev->net->features |= NETIF_F_HW_CSUM;
  956. if (DEFAULT_RX_CSUM_ENABLE)
  957. dev->net->features |= NETIF_F_RXCSUM;
  958. dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
  959. smsc95xx_init_mac_address(dev);
  960. /* Init all registers */
  961. ret = smsc95xx_reset(dev);
  962. /* detect device revision as different features may be available */
  963. ret = smsc95xx_read_reg(dev, ID_REV, &val);
  964. if (ret < 0)
  965. return ret;
  966. val >>= 16;
  967. if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) ||
  968. (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_))
  969. pdata->features = (FEATURE_8_WAKEUP_FILTERS |
  970. FEATURE_PHY_NLP_CROSSOVER |
  971. FEATURE_REMOTE_WAKEUP);
  972. else if (val == ID_REV_CHIP_ID_9512_)
  973. pdata->features = FEATURE_8_WAKEUP_FILTERS;
  974. dev->net->netdev_ops = &smsc95xx_netdev_ops;
  975. dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
  976. dev->net->flags |= IFF_MULTICAST;
  977. dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
  978. dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
  979. pdata->dev = dev;
  980. INIT_DELAYED_WORK(&pdata->carrier_check, check_carrier);
  981. schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
  982. return 0;
  983. }
  984. static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
  985. {
  986. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  987. if (pdata) {
  988. cancel_delayed_work(&pdata->carrier_check);
  989. netif_dbg(dev, ifdown, dev->net, "free pdata\n");
  990. kfree(pdata);
  991. pdata = NULL;
  992. dev->data[0] = 0;
  993. }
  994. }
  995. static u32 smsc_crc(const u8 *buffer, size_t len, int filter)
  996. {
  997. u32 crc = bitrev16(crc16(0xFFFF, buffer, len));
  998. return crc << ((filter % 2) * 16);
  999. }
  1000. static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
  1001. {
  1002. struct mii_if_info *mii = &dev->mii;
  1003. int ret;
  1004. netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
  1005. /* read to clear */
  1006. ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
  1007. if (ret < 0)
  1008. return ret;
  1009. /* enable interrupt source */
  1010. ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
  1011. if (ret < 0)
  1012. return ret;
  1013. ret |= mask;
  1014. smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
  1015. return 0;
  1016. }
  1017. static int smsc95xx_link_ok_nopm(struct usbnet *dev)
  1018. {
  1019. struct mii_if_info *mii = &dev->mii;
  1020. int ret;
  1021. /* first, a dummy read, needed to latch some MII phys */
  1022. ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
  1023. if (ret < 0)
  1024. return ret;
  1025. ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
  1026. if (ret < 0)
  1027. return ret;
  1028. return !!(ret & BMSR_LSTATUS);
  1029. }
  1030. static int smsc95xx_enter_suspend0(struct usbnet *dev)
  1031. {
  1032. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1033. u32 val;
  1034. int ret;
  1035. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1036. if (ret < 0)
  1037. return ret;
  1038. val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
  1039. val |= PM_CTL_SUS_MODE_0;
  1040. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1041. if (ret < 0)
  1042. return ret;
  1043. /* clear wol status */
  1044. val &= ~PM_CTL_WUPS_;
  1045. val |= PM_CTL_WUPS_WOL_;
  1046. /* enable energy detection */
  1047. if (pdata->wolopts & WAKE_PHY)
  1048. val |= PM_CTL_WUPS_ED_;
  1049. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1050. if (ret < 0)
  1051. return ret;
  1052. /* read back PM_CTRL */
  1053. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1054. if (ret < 0)
  1055. return ret;
  1056. pdata->suspend_flags |= SUSPEND_SUSPEND0;
  1057. return 0;
  1058. }
  1059. static int smsc95xx_enter_suspend1(struct usbnet *dev)
  1060. {
  1061. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1062. struct mii_if_info *mii = &dev->mii;
  1063. u32 val;
  1064. int ret;
  1065. /* reconfigure link pulse detection timing for
  1066. * compatibility with non-standard link partners
  1067. */
  1068. if (pdata->features & FEATURE_PHY_NLP_CROSSOVER)
  1069. smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG,
  1070. PHY_EDPD_CONFIG_DEFAULT);
  1071. /* enable energy detect power-down mode */
  1072. ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS);
  1073. if (ret < 0)
  1074. return ret;
  1075. ret |= MODE_CTRL_STS_EDPWRDOWN_;
  1076. smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret);
  1077. /* enter SUSPEND1 mode */
  1078. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1079. if (ret < 0)
  1080. return ret;
  1081. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1082. val |= PM_CTL_SUS_MODE_1;
  1083. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1084. if (ret < 0)
  1085. return ret;
  1086. /* clear wol status, enable energy detection */
  1087. val &= ~PM_CTL_WUPS_;
  1088. val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_);
  1089. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1090. if (ret < 0)
  1091. return ret;
  1092. pdata->suspend_flags |= SUSPEND_SUSPEND1;
  1093. return 0;
  1094. }
  1095. static int smsc95xx_enter_suspend2(struct usbnet *dev)
  1096. {
  1097. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1098. u32 val;
  1099. int ret;
  1100. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1101. if (ret < 0)
  1102. return ret;
  1103. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1104. val |= PM_CTL_SUS_MODE_2;
  1105. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1106. if (ret < 0)
  1107. return ret;
  1108. pdata->suspend_flags |= SUSPEND_SUSPEND2;
  1109. return 0;
  1110. }
  1111. static int smsc95xx_enter_suspend3(struct usbnet *dev)
  1112. {
  1113. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1114. u32 val;
  1115. int ret;
  1116. ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val);
  1117. if (ret < 0)
  1118. return ret;
  1119. if (val & 0xFFFF) {
  1120. netdev_info(dev->net, "rx fifo not empty in autosuspend\n");
  1121. return -EBUSY;
  1122. }
  1123. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1124. if (ret < 0)
  1125. return ret;
  1126. val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
  1127. val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS;
  1128. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1129. if (ret < 0)
  1130. return ret;
  1131. /* clear wol status */
  1132. val &= ~PM_CTL_WUPS_;
  1133. val |= PM_CTL_WUPS_WOL_;
  1134. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1135. if (ret < 0)
  1136. return ret;
  1137. pdata->suspend_flags |= SUSPEND_SUSPEND3;
  1138. return 0;
  1139. }
  1140. static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up)
  1141. {
  1142. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1143. int ret;
  1144. if (!netif_running(dev->net)) {
  1145. /* interface is ifconfig down so fully power down hw */
  1146. netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
  1147. return smsc95xx_enter_suspend2(dev);
  1148. }
  1149. if (!link_up) {
  1150. /* link is down so enter EDPD mode, but only if device can
  1151. * reliably resume from it. This check should be redundant
  1152. * as current FEATURE_REMOTE_WAKEUP parts also support
  1153. * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */
  1154. if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) {
  1155. netdev_warn(dev->net, "EDPD not supported\n");
  1156. return -EBUSY;
  1157. }
  1158. netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
  1159. /* enable PHY wakeup events for if cable is attached */
  1160. ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
  1161. PHY_INT_MASK_ANEG_COMP_);
  1162. if (ret < 0) {
  1163. netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
  1164. return ret;
  1165. }
  1166. netdev_info(dev->net, "entering SUSPEND1 mode\n");
  1167. return smsc95xx_enter_suspend1(dev);
  1168. }
  1169. /* enable PHY wakeup events so we remote wakeup if cable is pulled */
  1170. ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
  1171. PHY_INT_MASK_LINK_DOWN_);
  1172. if (ret < 0) {
  1173. netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
  1174. return ret;
  1175. }
  1176. netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
  1177. return smsc95xx_enter_suspend3(dev);
  1178. }
  1179. static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
  1180. {
  1181. struct usbnet *dev = usb_get_intfdata(intf);
  1182. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1183. u32 val, link_up;
  1184. int ret;
  1185. ret = usbnet_suspend(intf, message);
  1186. if (ret < 0) {
  1187. netdev_warn(dev->net, "usbnet_suspend error\n");
  1188. return ret;
  1189. }
  1190. if (pdata->suspend_flags) {
  1191. netdev_warn(dev->net, "error during last resume\n");
  1192. pdata->suspend_flags = 0;
  1193. }
  1194. /* determine if link is up using only _nopm functions */
  1195. link_up = smsc95xx_link_ok_nopm(dev);
  1196. if (message.event == PM_EVENT_AUTO_SUSPEND &&
  1197. (pdata->features & FEATURE_REMOTE_WAKEUP)) {
  1198. ret = smsc95xx_autosuspend(dev, link_up);
  1199. goto done;
  1200. }
  1201. /* if we get this far we're not autosuspending */
  1202. /* if no wol options set, or if link is down and we're not waking on
  1203. * PHY activity, enter lowest power SUSPEND2 mode
  1204. */
  1205. if (!(pdata->wolopts & SUPPORTED_WAKE) ||
  1206. !(link_up || (pdata->wolopts & WAKE_PHY))) {
  1207. netdev_info(dev->net, "entering SUSPEND2 mode\n");
  1208. /* disable energy detect (link up) & wake up events */
  1209. ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
  1210. if (ret < 0)
  1211. goto done;
  1212. val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
  1213. ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
  1214. if (ret < 0)
  1215. goto done;
  1216. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1217. if (ret < 0)
  1218. goto done;
  1219. val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
  1220. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1221. if (ret < 0)
  1222. goto done;
  1223. ret = smsc95xx_enter_suspend2(dev);
  1224. goto done;
  1225. }
  1226. if (pdata->wolopts & WAKE_PHY) {
  1227. ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
  1228. (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_));
  1229. if (ret < 0) {
  1230. netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
  1231. goto done;
  1232. }
  1233. /* if link is down then configure EDPD and enter SUSPEND1,
  1234. * otherwise enter SUSPEND0 below
  1235. */
  1236. if (!link_up) {
  1237. netdev_info(dev->net, "entering SUSPEND1 mode\n");
  1238. ret = smsc95xx_enter_suspend1(dev);
  1239. goto done;
  1240. }
  1241. }
  1242. if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
  1243. u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL);
  1244. u32 command[2];
  1245. u32 offset[2];
  1246. u32 crc[4];
  1247. int wuff_filter_count =
  1248. (pdata->features & FEATURE_8_WAKEUP_FILTERS) ?
  1249. LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM;
  1250. int i, filter = 0;
  1251. if (!filter_mask) {
  1252. netdev_warn(dev->net, "Unable to allocate filter_mask\n");
  1253. ret = -ENOMEM;
  1254. goto done;
  1255. }
  1256. memset(command, 0, sizeof(command));
  1257. memset(offset, 0, sizeof(offset));
  1258. memset(crc, 0, sizeof(crc));
  1259. if (pdata->wolopts & WAKE_BCAST) {
  1260. const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
  1261. netdev_info(dev->net, "enabling broadcast detection\n");
  1262. filter_mask[filter * 4] = 0x003F;
  1263. filter_mask[filter * 4 + 1] = 0x00;
  1264. filter_mask[filter * 4 + 2] = 0x00;
  1265. filter_mask[filter * 4 + 3] = 0x00;
  1266. command[filter/4] |= 0x05UL << ((filter % 4) * 8);
  1267. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1268. crc[filter/2] |= smsc_crc(bcast, 6, filter);
  1269. filter++;
  1270. }
  1271. if (pdata->wolopts & WAKE_MCAST) {
  1272. const u8 mcast[] = {0x01, 0x00, 0x5E};
  1273. netdev_info(dev->net, "enabling multicast detection\n");
  1274. filter_mask[filter * 4] = 0x0007;
  1275. filter_mask[filter * 4 + 1] = 0x00;
  1276. filter_mask[filter * 4 + 2] = 0x00;
  1277. filter_mask[filter * 4 + 3] = 0x00;
  1278. command[filter/4] |= 0x09UL << ((filter % 4) * 8);
  1279. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1280. crc[filter/2] |= smsc_crc(mcast, 3, filter);
  1281. filter++;
  1282. }
  1283. if (pdata->wolopts & WAKE_ARP) {
  1284. const u8 arp[] = {0x08, 0x06};
  1285. netdev_info(dev->net, "enabling ARP detection\n");
  1286. filter_mask[filter * 4] = 0x0003;
  1287. filter_mask[filter * 4 + 1] = 0x00;
  1288. filter_mask[filter * 4 + 2] = 0x00;
  1289. filter_mask[filter * 4 + 3] = 0x00;
  1290. command[filter/4] |= 0x05UL << ((filter % 4) * 8);
  1291. offset[filter/4] |= 0x0C << ((filter % 4) * 8);
  1292. crc[filter/2] |= smsc_crc(arp, 2, filter);
  1293. filter++;
  1294. }
  1295. if (pdata->wolopts & WAKE_UCAST) {
  1296. netdev_info(dev->net, "enabling unicast detection\n");
  1297. filter_mask[filter * 4] = 0x003F;
  1298. filter_mask[filter * 4 + 1] = 0x00;
  1299. filter_mask[filter * 4 + 2] = 0x00;
  1300. filter_mask[filter * 4 + 3] = 0x00;
  1301. command[filter/4] |= 0x01UL << ((filter % 4) * 8);
  1302. offset[filter/4] |= 0x00 << ((filter % 4) * 8);
  1303. crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
  1304. filter++;
  1305. }
  1306. for (i = 0; i < (wuff_filter_count * 4); i++) {
  1307. ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]);
  1308. if (ret < 0) {
  1309. kfree(filter_mask);
  1310. goto done;
  1311. }
  1312. }
  1313. kfree(filter_mask);
  1314. for (i = 0; i < (wuff_filter_count / 4); i++) {
  1315. ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]);
  1316. if (ret < 0)
  1317. goto done;
  1318. }
  1319. for (i = 0; i < (wuff_filter_count / 4); i++) {
  1320. ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]);
  1321. if (ret < 0)
  1322. goto done;
  1323. }
  1324. for (i = 0; i < (wuff_filter_count / 2); i++) {
  1325. ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]);
  1326. if (ret < 0)
  1327. goto done;
  1328. }
  1329. /* clear any pending pattern match packet status */
  1330. ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
  1331. if (ret < 0)
  1332. goto done;
  1333. val |= WUCSR_WUFR_;
  1334. ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
  1335. if (ret < 0)
  1336. goto done;
  1337. }
  1338. if (pdata->wolopts & WAKE_MAGIC) {
  1339. /* clear any pending magic packet status */
  1340. ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
  1341. if (ret < 0)
  1342. goto done;
  1343. val |= WUCSR_MPR_;
  1344. ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
  1345. if (ret < 0)
  1346. goto done;
  1347. }
  1348. /* enable/disable wakeup sources */
  1349. ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
  1350. if (ret < 0)
  1351. goto done;
  1352. if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
  1353. netdev_info(dev->net, "enabling pattern match wakeup\n");
  1354. val |= WUCSR_WAKE_EN_;
  1355. } else {
  1356. netdev_info(dev->net, "disabling pattern match wakeup\n");
  1357. val &= ~WUCSR_WAKE_EN_;
  1358. }
  1359. if (pdata->wolopts & WAKE_MAGIC) {
  1360. netdev_info(dev->net, "enabling magic packet wakeup\n");
  1361. val |= WUCSR_MPEN_;
  1362. } else {
  1363. netdev_info(dev->net, "disabling magic packet wakeup\n");
  1364. val &= ~WUCSR_MPEN_;
  1365. }
  1366. ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
  1367. if (ret < 0)
  1368. goto done;
  1369. /* enable wol wakeup source */
  1370. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1371. if (ret < 0)
  1372. goto done;
  1373. val |= PM_CTL_WOL_EN_;
  1374. /* phy energy detect wakeup source */
  1375. if (pdata->wolopts & WAKE_PHY)
  1376. val |= PM_CTL_ED_EN_;
  1377. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1378. if (ret < 0)
  1379. goto done;
  1380. /* enable receiver to enable frame reception */
  1381. smsc95xx_start_rx_path(dev, 1);
  1382. /* some wol options are enabled, so enter SUSPEND0 */
  1383. netdev_info(dev->net, "entering SUSPEND0 mode\n");
  1384. ret = smsc95xx_enter_suspend0(dev);
  1385. done:
  1386. /*
  1387. * TODO: resume() might need to handle the suspend failure
  1388. * in system sleep
  1389. */
  1390. if (ret && PMSG_IS_AUTO(message))
  1391. usbnet_resume(intf);
  1392. return ret;
  1393. }
  1394. static int smsc95xx_resume(struct usb_interface *intf)
  1395. {
  1396. struct usbnet *dev = usb_get_intfdata(intf);
  1397. struct smsc95xx_priv *pdata;
  1398. u8 suspend_flags;
  1399. int ret;
  1400. u32 val;
  1401. BUG_ON(!dev);
  1402. pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1403. suspend_flags = pdata->suspend_flags;
  1404. netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
  1405. /* do this first to ensure it's cleared even in error case */
  1406. pdata->suspend_flags = 0;
  1407. schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
  1408. if (suspend_flags & SUSPEND_ALLMODES) {
  1409. /* clear wake-up sources */
  1410. ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
  1411. if (ret < 0)
  1412. return ret;
  1413. val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
  1414. ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
  1415. if (ret < 0)
  1416. return ret;
  1417. /* clear wake-up status */
  1418. ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
  1419. if (ret < 0)
  1420. return ret;
  1421. val &= ~PM_CTL_WOL_EN_;
  1422. val |= PM_CTL_WUPS_;
  1423. ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
  1424. if (ret < 0)
  1425. return ret;
  1426. }
  1427. ret = usbnet_resume(intf);
  1428. if (ret < 0)
  1429. netdev_warn(dev->net, "usbnet_resume error\n");
  1430. return ret;
  1431. }
  1432. static int smsc95xx_reset_resume(struct usb_interface *intf)
  1433. {
  1434. struct usbnet *dev = usb_get_intfdata(intf);
  1435. int ret;
  1436. ret = smsc95xx_reset(dev);
  1437. if (ret < 0)
  1438. return ret;
  1439. return smsc95xx_resume(intf);
  1440. }
  1441. static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
  1442. {
  1443. skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
  1444. skb->ip_summed = CHECKSUM_COMPLETE;
  1445. skb_trim(skb, skb->len - 2);
  1446. }
  1447. static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
  1448. {
  1449. /* This check is no longer done by usbnet */
  1450. if (skb->len < dev->net->hard_header_len)
  1451. return 0;
  1452. while (skb->len > 0) {
  1453. u32 header, align_count;
  1454. struct sk_buff *ax_skb;
  1455. unsigned char *packet;
  1456. u16 size;
  1457. memcpy(&header, skb->data, sizeof(header));
  1458. le32_to_cpus(&header);
  1459. skb_pull(skb, 4 + NET_IP_ALIGN);
  1460. packet = skb->data;
  1461. /* get the packet length */
  1462. size = (u16)((header & RX_STS_FL_) >> 16);
  1463. align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
  1464. if (unlikely(header & RX_STS_ES_)) {
  1465. netif_dbg(dev, rx_err, dev->net,
  1466. "Error header=0x%08x\n", header);
  1467. dev->net->stats.rx_errors++;
  1468. dev->net->stats.rx_dropped++;
  1469. if (header & RX_STS_CRC_) {
  1470. dev->net->stats.rx_crc_errors++;
  1471. } else {
  1472. if (header & (RX_STS_TL_ | RX_STS_RF_))
  1473. dev->net->stats.rx_frame_errors++;
  1474. if ((header & RX_STS_LE_) &&
  1475. (!(header & RX_STS_FT_)))
  1476. dev->net->stats.rx_length_errors++;
  1477. }
  1478. } else {
  1479. /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
  1480. if (unlikely(size > (ETH_FRAME_LEN + 12))) {
  1481. netif_dbg(dev, rx_err, dev->net,
  1482. "size err header=0x%08x\n", header);
  1483. return 0;
  1484. }
  1485. /* last frame in this batch */
  1486. if (skb->len == size) {
  1487. if (dev->net->features & NETIF_F_RXCSUM)
  1488. smsc95xx_rx_csum_offload(skb);
  1489. skb_trim(skb, skb->len - 4); /* remove fcs */
  1490. skb->truesize = size + sizeof(struct sk_buff);
  1491. return 1;
  1492. }
  1493. ax_skb = skb_clone(skb, GFP_ATOMIC);
  1494. if (unlikely(!ax_skb)) {
  1495. netdev_warn(dev->net, "Error allocating skb\n");
  1496. return 0;
  1497. }
  1498. ax_skb->len = size;
  1499. ax_skb->data = packet;
  1500. skb_set_tail_pointer(ax_skb, size);
  1501. if (dev->net->features & NETIF_F_RXCSUM)
  1502. smsc95xx_rx_csum_offload(ax_skb);
  1503. skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
  1504. ax_skb->truesize = size + sizeof(struct sk_buff);
  1505. usbnet_skb_return(dev, ax_skb);
  1506. }
  1507. skb_pull(skb, size);
  1508. /* padding bytes before the next frame starts */
  1509. if (skb->len)
  1510. skb_pull(skb, align_count);
  1511. }
  1512. return 1;
  1513. }
  1514. static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
  1515. {
  1516. u16 low_16 = (u16)skb_checksum_start_offset(skb);
  1517. u16 high_16 = low_16 + skb->csum_offset;
  1518. return (high_16 << 16) | low_16;
  1519. }
  1520. static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
  1521. struct sk_buff *skb, gfp_t flags)
  1522. {
  1523. bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
  1524. int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
  1525. u32 tx_cmd_a, tx_cmd_b;
  1526. /* We do not advertise SG, so skbs should be already linearized */
  1527. BUG_ON(skb_shinfo(skb)->nr_frags);
  1528. if (skb_headroom(skb) < overhead) {
  1529. struct sk_buff *skb2 = skb_copy_expand(skb,
  1530. overhead, 0, flags);
  1531. dev_kfree_skb_any(skb);
  1532. skb = skb2;
  1533. if (!skb)
  1534. return NULL;
  1535. }
  1536. if (csum) {
  1537. if (skb->len <= 45) {
  1538. /* workaround - hardware tx checksum does not work
  1539. * properly with extremely small packets */
  1540. long csstart = skb_checksum_start_offset(skb);
  1541. __wsum calc = csum_partial(skb->data + csstart,
  1542. skb->len - csstart, 0);
  1543. *((__sum16 *)(skb->data + csstart
  1544. + skb->csum_offset)) = csum_fold(calc);
  1545. csum = false;
  1546. } else {
  1547. u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
  1548. skb_push(skb, 4);
  1549. cpu_to_le32s(&csum_preamble);
  1550. memcpy(skb->data, &csum_preamble, 4);
  1551. }
  1552. }
  1553. skb_push(skb, 4);
  1554. tx_cmd_b = (u32)(skb->len - 4);
  1555. if (csum)
  1556. tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
  1557. cpu_to_le32s(&tx_cmd_b);
  1558. memcpy(skb->data, &tx_cmd_b, 4);
  1559. skb_push(skb, 4);
  1560. tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ |
  1561. TX_CMD_A_LAST_SEG_;
  1562. cpu_to_le32s(&tx_cmd_a);
  1563. memcpy(skb->data, &tx_cmd_a, 4);
  1564. return skb;
  1565. }
  1566. static int smsc95xx_manage_power(struct usbnet *dev, int on)
  1567. {
  1568. struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
  1569. dev->intf->needs_remote_wakeup = on;
  1570. if (pdata->features & FEATURE_REMOTE_WAKEUP)
  1571. return 0;
  1572. /* this chip revision isn't capable of remote wakeup */
  1573. netdev_info(dev->net, "hardware isn't capable of remote wakeup\n");
  1574. if (on)
  1575. usb_autopm_get_interface_no_resume(dev->intf);
  1576. else
  1577. usb_autopm_put_interface(dev->intf);
  1578. return 0;
  1579. }
  1580. static const struct driver_info smsc95xx_info = {
  1581. .description = "smsc95xx USB 2.0 Ethernet",
  1582. .bind = smsc95xx_bind,
  1583. .unbind = smsc95xx_unbind,
  1584. .link_reset = smsc95xx_link_reset,
  1585. .reset = smsc95xx_reset,
  1586. .rx_fixup = smsc95xx_rx_fixup,
  1587. .tx_fixup = smsc95xx_tx_fixup,
  1588. .status = smsc95xx_status,
  1589. .manage_power = smsc95xx_manage_power,
  1590. .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
  1591. };
  1592. static const struct usb_device_id products[] = {
  1593. {
  1594. /* SMSC9500 USB Ethernet Device */
  1595. USB_DEVICE(0x0424, 0x9500),
  1596. .driver_info = (unsigned long) &smsc95xx_info,
  1597. },
  1598. {
  1599. /* SMSC9505 USB Ethernet Device */
  1600. USB_DEVICE(0x0424, 0x9505),
  1601. .driver_info = (unsigned long) &smsc95xx_info,
  1602. },
  1603. {
  1604. /* SMSC9500A USB Ethernet Device */
  1605. USB_DEVICE(0x0424, 0x9E00),
  1606. .driver_info = (unsigned long) &smsc95xx_info,
  1607. },
  1608. {
  1609. /* SMSC9505A USB Ethernet Device */
  1610. USB_DEVICE(0x0424, 0x9E01),
  1611. .driver_info = (unsigned long) &smsc95xx_info,
  1612. },
  1613. {
  1614. /* SMSC9512/9514 USB Hub & Ethernet Device */
  1615. USB_DEVICE(0x0424, 0xec00),
  1616. .driver_info = (unsigned long) &smsc95xx_info,
  1617. },
  1618. {
  1619. /* SMSC9500 USB Ethernet Device (SAL10) */
  1620. USB_DEVICE(0x0424, 0x9900),
  1621. .driver_info = (unsigned long) &smsc95xx_info,
  1622. },
  1623. {
  1624. /* SMSC9505 USB Ethernet Device (SAL10) */
  1625. USB_DEVICE(0x0424, 0x9901),
  1626. .driver_info = (unsigned long) &smsc95xx_info,
  1627. },
  1628. {
  1629. /* SMSC9500A USB Ethernet Device (SAL10) */
  1630. USB_DEVICE(0x0424, 0x9902),
  1631. .driver_info = (unsigned long) &smsc95xx_info,
  1632. },
  1633. {
  1634. /* SMSC9505A USB Ethernet Device (SAL10) */
  1635. USB_DEVICE(0x0424, 0x9903),
  1636. .driver_info = (unsigned long) &smsc95xx_info,
  1637. },
  1638. {
  1639. /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
  1640. USB_DEVICE(0x0424, 0x9904),
  1641. .driver_info = (unsigned long) &smsc95xx_info,
  1642. },
  1643. {
  1644. /* SMSC9500A USB Ethernet Device (HAL) */
  1645. USB_DEVICE(0x0424, 0x9905),
  1646. .driver_info = (unsigned long) &smsc95xx_info,
  1647. },
  1648. {
  1649. /* SMSC9505A USB Ethernet Device (HAL) */
  1650. USB_DEVICE(0x0424, 0x9906),
  1651. .driver_info = (unsigned long) &smsc95xx_info,
  1652. },
  1653. {
  1654. /* SMSC9500 USB Ethernet Device (Alternate ID) */
  1655. USB_DEVICE(0x0424, 0x9907),
  1656. .driver_info = (unsigned long) &smsc95xx_info,
  1657. },
  1658. {
  1659. /* SMSC9500A USB Ethernet Device (Alternate ID) */
  1660. USB_DEVICE(0x0424, 0x9908),
  1661. .driver_info = (unsigned long) &smsc95xx_info,
  1662. },
  1663. {
  1664. /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
  1665. USB_DEVICE(0x0424, 0x9909),
  1666. .driver_info = (unsigned long) &smsc95xx_info,
  1667. },
  1668. {
  1669. /* SMSC LAN9530 USB Ethernet Device */
  1670. USB_DEVICE(0x0424, 0x9530),
  1671. .driver_info = (unsigned long) &smsc95xx_info,
  1672. },
  1673. {
  1674. /* SMSC LAN9730 USB Ethernet Device */
  1675. USB_DEVICE(0x0424, 0x9730),
  1676. .driver_info = (unsigned long) &smsc95xx_info,
  1677. },
  1678. {
  1679. /* SMSC LAN89530 USB Ethernet Device */
  1680. USB_DEVICE(0x0424, 0x9E08),
  1681. .driver_info = (unsigned long) &smsc95xx_info,
  1682. },
  1683. { }, /* END */
  1684. };
  1685. MODULE_DEVICE_TABLE(usb, products);
  1686. static struct usb_driver smsc95xx_driver = {
  1687. .name = "smsc95xx",
  1688. .id_table = products,
  1689. .probe = usbnet_probe,
  1690. .suspend = smsc95xx_suspend,
  1691. .resume = smsc95xx_resume,
  1692. .reset_resume = smsc95xx_reset_resume,
  1693. .disconnect = usbnet_disconnect,
  1694. .disable_hub_initiated_lpm = 1,
  1695. .supports_autosuspend = 1,
  1696. };
  1697. module_usb_driver(smsc95xx_driver);
  1698. MODULE_AUTHOR("Nancy Lin");
  1699. MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
  1700. MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
  1701. MODULE_LICENSE("GPL");